Problem Slide4
-
Upload
bharavi-k-s -
Category
Documents
-
view
219 -
download
0
Transcript of Problem Slide4
8/3/2019 Problem Slide4
http://slidepdf.com/reader/full/problem-slide4 1/18
Problem 16.40
The gyrator shown is used to simulate an inductance.
(a) Show that Z R R
I V
i
i 21!
(b) For any resistance between .1 to k ; what is the range of
inductances possible.
R 1
R 1
Ii
Vi
+
-
Vi
R 3
R 3
V12R
2
Z
Vo
-
+
i V V 21!
8/3/2019 Problem Slide4
http://slidepdf.com/reader/full/problem-slide4 2/18
Thus
11
1
R
V V
R
V V I oi i
i
!
111
2
R
V
R
V
R
V V oi i i
!
1 R
V I o
i
!
at 2nd op AMP
1
22
V
R
Z V o !
i i V R
Z R I 2.
22
1!
Z
R R
I
V
i
i 21!
8/3/2019 Problem Slide4
http://slidepdf.com/reader/full/problem-slide4 3/18
When
Z is a capacitor µC¶
Then
21
21
1RCR j
C
j
R R Z [
[
!!
Thus21
RCR L !
largest possible inductance for R lying between .1 & 10 k ;
01.min
! L
100max
! L
for < = 1 F
8/3/2019 Problem Slide4
http://slidepdf.com/reader/full/problem-slide4 4/18
Problem 16.40
The gyrator shown is used to simulate an inductance.
(a) Show that Z R R
I V
i
i 21!
(b) Assuming resistance range between 0.1 to10k ;, what is
the range of inductances possible.
R 1
R 1
Ii
Vi
+
-
Vi
R 3
R 3
zVi2R
2
Z
Vo
-
+
Vi
8/3/2019 Problem Slide4
http://slidepdf.com/reader/full/problem-slide4 5/18
iov
R
Z v 2
2 2
!
iv
R
Z
2
!
i
i
ii I R
R
Z v
R
vv
!
¼
½
»¬
-
«
@
1
2
1
1
2
iiI
R R
Z
R Rv !¼
½
»¬-
«
2111
11
Z
R R
I
v
i
i 21! Hence proved
If resistance lies between 0.1 & 10K ; then the range of inductance
= 0.01 to 100. Ans.
8/3/2019 Problem Slide4
http://slidepdf.com/reader/full/problem-slide4 6/18
Problem 16.41
An alternate form of the gyrator is shown. Show that Vi/Ii is
inductive. Assume ideal Op-Amps.
Find the input impedance of the circuit
Vi
+
-
Ii
C
R 1
R 2
+
-
Vo
8/3/2019 Problem Slide4
http://slidepdf.com/reader/full/problem-slide4 7/18
1 R
V V I oi
i
!
01
2
!
R
V V
SC
V oi i
01
2
1 ! R
I R
SC
V i i
i i I R
R SCV
2
1!
SC R
R
I
V
i
i
.2
1!
C j R
R
[2
1!
C R
R j
[2
1! ¼½
»¬-
«!
C R
R j
2
2
1
[[
8/3/2019 Problem Slide4
http://slidepdf.com/reader/full/problem-slide4 8/18
Problem 17.29
The amplifier is operating at the sinusoidal amplifier for which the dissipation is
a maximum verify that conversion efficiency is 50%.
+VCC
Vi
-VCC
RL
U1
U2
The ideal class B push-pull amplifier in the figure is operating at the sinusoidal
amplitude for which the dissipation is a maximum. Verify that the conversion
efficiency is 50 percent.
8/3/2019 Problem Slide4
http://slidepdf.com/reader/full/problem-slide4 9/18
Solution
t mi [YY sin!
Tr U1 conducts for positive half cycle & U2 conducts for negativehalf cycle
d.c current obtained from supply =T
m I 2
where
L
mm
R
V I !
Output power = L
m
R
V
2
2
Power supplied bydc
CC CC
I V V .!
T
mdc
I I
2!
Collector dissipation
L
m
L
mCC C
R
V
R
V V P
2
22
!
T
8/3/2019 Problem Slide4
http://slidepdf.com/reader/full/problem-slide4 10/18
For dissipation to be max
0
2
0 !! L
m
L
CC
m
C
R
V
R
V
d V
d P
T
T
CC m
V V
2!
Output power = L
CC
R
V
2
1.
42
2
¹¹ º
¸©©ª
¨T
Power from supply =
L
CC
R
V 2
24
T
%501004
2
4
2
2
2
2
!v!
L
CC
L
CC
R
V
R
V
T
TL
8/3/2019 Problem Slide4
http://slidepdf.com/reader/full/problem-slide4 11/18
The ideal class B push pull Amplifier is operating at the
sinusoidal amplitude for which the dissipation is maximum.Verify that the conversion efficiency is 50%.
Problem 17.29
+VCC
Vi
-VCC
R LQ2
Q1
8/3/2019 Problem Slide4
http://slidepdf.com/reader/full/problem-slide4 12/18
t V V mi
[sin!
Q1 conducts for +Ve half cycles & Q2 conducts for ±Ve half cycles.
d.c. current obtained from supply =T
m I 2
L
m
m R
V I !
Input power = CC
L
mV
R
V .
2
T
Output power = L
m
R
V
2
2
Power supplied bydcCC CC I V V .!
T
m
dc
I I
2!
@ Collector dissipation L
m
L
mCC
C
R
V
R
V V P
2
2 2
!T
8/3/2019 Problem Slide4
http://slidepdf.com/reader/full/problem-slide4 13/18
For dissipation to be maximum:-
0!m
C
dV
dP 02
! L
m
L
CC
R
V
R
V
T
T
CC
m
V V
2!
Output power L
CC
R
V
2
1.42
2
¹¹ º ¸©©
ª¨T
Power from supply =
L
CC
R
V
2
24
T
%5010042
4100
4
2
4
2
2
2
2
2
2
2
2
!vv!v!CC
L
L
CC
L
CC
L
CC
V
R
R
V
R
V
R
V
T
T
T
TL Ans.
8/3/2019 Problem Slide4
http://slidepdf.com/reader/full/problem-slide4 14/18
Problem 17.30.
In the circuit shown the base-emitter voltage may be assumed to
remain constant at the cut-in value VK for all values of forward bias.The biasing voltage is idealized by two batteries of voltage kVK ,
where 0 < k e 1. Assume that Yi = Vs sin [t.
+VCC
Vi
kVK
kVK
-VCC
Vo
t V V si [sin!
8/3/2019 Problem Slide4
http://slidepdf.com/reader/full/problem-slide4 15/18
(i) For k = 0, 0.5 & 1 plot output as a sanction of time
(Vs= 1V) (VK = .6V)
(ii)What happens to distortion when Vs is increased
(iii)What happens if k exceeds unity
(iv)What happens if k > 1 & a resister is added between two emitters.
(v) What is the class of operation.
0sin0! V V kV t V s KK
[
1sin0
! k V t V V s K[
on ±ve half cycle
1sin0
! k V t V V s K[
8/3/2019 Problem Slide4
http://slidepdf.com/reader/full/problem-slide4 16/18
Cut in angle
01sin ! k V t V s K[
sV
V k t
K[ 1sin !
¼½
»¬-
«!!
s
incut V
V k t Q
K[ 1sin
1
0!k
5.0!k
1!k
0188.36
1
6.sin !¹
º
¸©ª
¨!
incut U
0145.17
1
3.sin !¹
º
¸©ª
¨!
incut U
0100sin !!
incut U
8/3/2019 Problem Slide4
http://slidepdf.com/reader/full/problem-slide4 17/18
Vo
Vo
08.36
05.17
K = 0
K = .5
K = 1
8/3/2019 Problem Slide4
http://slidepdf.com/reader/full/problem-slide4 18/18
(b) as Vs is increased, amplitude of current harmonics increases
The distortion also increases.
(c ) For k > 1
then the output voltage is not zero and is given by
0! oV V kV KK
K
V k V o 1!
(d) if a resistor is placed between the emitters, then the value of
output can be reduced to zero by changing the value of Resister.
(e) it is a class AB operation.