Presented by Brad Doerr, R&D manager Insights for your ... · MIPI (CSI-2, DSI 1.1) D-PHY (1G/...

Insights for your Best High-Speed Digital Design

Presented by

Brad Doerr, R&D manager

Oscilloscope and Protocol Division

Keysight Technologies

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Our Key Purpose Has Not Changed

2

We believe in “Firsts”

• It’s in our DNA.

• Bill Hewlett and Dave Packard shaped our

purpose of believing in firsts 75 years ago.

• It launched Silicon Valley.

• We are committed to bring you a new

generation of firsts – unlocking insights for

you so you can bring a new generation of

technologies into the world.

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Communications Industrial, Computer,

Semiconductor

High-Speed Digital Market

3

Where is “High-Speed” Digital?

EDA Simulation Software | Oscilloscopes | Logic Analyzers | Protocol Analyzers | Bit Error Ratio Testers |

Network Analyzers

Mobile Devices

Desktop Computers

Servers “The Cloud”

Displays

Cable Connectors

Typically at speeds

> 5 Gbps

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Driving Market Trends

4

Mobile Devices (Smartphones, Tablets....)

• Smartphone and tablets outgrow everything

• Connected everywhere, everytime

• Need for power-efficient architectures everywhere

• Network bandwidth demand grows 100% per annum

Cloud Computing

• Cloud drives server performance

• Focuses on maximizing the shared resources

Semiconductor Technology Rollover

• Technology rollover to smaller notes, larger wafers, etc.

Emerging Countries

• Investments not only in extensions of manufacturing, but also in R&D

centers.

Convergence: Wireless & Digital | Optical & Digital

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Desire for “More” Turning Into Innovations…

“Mobile” Phones “Smart” Phones

Image Source: Nokia/Google

Image Source: Google

5

Features: • Calls

• SMS

• Games

Features: • Calls, SMS, Games

• Personal Organizer

• Search Engine

• Social Networking

• Navigation

• Surveillance

• Entertainment

• Biometrics

• Medical Diary

• Etc.

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• Ongoing efforts to increase the basic baud rates

and associated methodologies

• Increasing the data throughput by higher symbol

rates based on a given baud rate, such as PAM or

Complex Modulation

• Innovating on the link mechanism, such as optical

chip-to-chip links, pre- & de-emphasis

• Designing for low-power is becoming a critical

design criteria

2.5 Gb/s

5 Gb/s

8 Gb/s

2003 2008

2006 2011

2009 2014

PCI Express

Technology Impacts

6

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High-Speed Digital I/Os

7

Datacenter

• 10GbE ports at server

CPUs

• Many 100GbE (4x 25G),

32G FC, CEI (28/56G)

• Electrical + optical

• Crosstalk

• PAM4 and higher

modulation formats

Gen 4 Computing

• PCIe4 (16G), USB3.1

(10G)

• Link training

• 128/130 or 128/132 coding

• Stress calibration at TP

• TX De-emphasis and RX

equalization

• Interference

Mobile MIPI

• M-PHY: 6G/12G (gear3/4)

• Multi-lane, skew, PWM

• D-PHY (3G)

• 3-phase signaling

• Many versions – always a

custom RX solution

• Built-in error counters

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UFS 2.0 (6Gbx2)

MIPI (CSI-3, LLI) M-PHY (5/5.8 Gb)

2010 2011 2012 2013 2014 2015

1

2

3

5

6

8

9

10

40

Sp

ee

d (

Gb

)

Year

20

2016

MIPI (DigRFv4, UFS) / M-PHY (2.5/ 2.9 Gb)

MIPI (CSI-2, DSI 1.1) D-PHY (1G/ 1.5G)

Legend: Memory:

Computer:

Storage:

Mobile Computing

Display:

MIPI (DigRFv4) / M-PHY (1.25/1.46 Gb)

MIPI M-PHY (10/11.6 Gb)

M-PHY (5/ 5.8 Gb)

eDP 1.2 (5.4 Gb)

HDMI 2.0 ( 6 Gb/s)

PCIe4 (16Gb)

PCIe3 (8Gb)

SAS3 (12 Gb)

Thunderbolt (10G)

HBM (2Gbx128)

UFS 1.1 (3Gb)

DDR4 (1.6-3.2 Gbx8)

DDR3 (800MB-2.3 Gbx8)

Thunderbolt (20G)

GDDR5 (7Gbx32)

SATA3 ( 6 Gb) SAS2 (6 Gb)

DP 1.2 (5.4 Gb)

USB 3 (5Gb) PCIe2 (5Gb)

HDMI 1.4 (3.4 Gb/s)

eDP 1.1 (2.7 Gb)

W-USB 1.1(1Gb)

USB 2.0(480 Mb) Wide I/O2 (533Mbx512)

MHL 3 Gb UFS 1.1 (3Gb)

eDP 1.5 (8.1 Gb) DP 1.3 (8.1 Gb)

USB 3.5 (10Gb) )

SATA4 (12 Gb)

HMC (16Gbx64)

Digital Technology Waves

8

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Gaining Insight for Leading High-Speed Digital Test

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Engagement

• Engaging with the High-Speed

Digital Industry

• Design for generations ahead

• Enable compliance throughout

the food-chain

Participation

Keysight is actively involved in

international standards

committees, Plugfests and

seminars

Innovation

• New technologies

• Complete test solution

offerings

Technology

Leaders

Standards Bodies & Trade Associations

Early Workshops DeFacto Std

Test Procedures

Plugfests DevCon’s Ind. Std Test Procedures

Test Houses

Customer

Customer

Customer Customer

Customer

Customer

• JEDEC, Board of Directors

• PCI-SIG, Board of Directors

• VESA, Board of Directors

• HDMI, Board of Directors

• MIPI, Contributing Member

• USB, Contributing Member

• Serial ATA (SATA,

Contributing Member

• IEEE, OIF, ITU, T11

member

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High-Speed Digital Test

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Typical Design Cycle

Design and

Simulation

Analysis and

Debug Compliance

Keysight is the only Test and Measurement company that can help designers

with each step in this design cycle.

Manufacturing

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Design and Simulation

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Typical Measurements

Simulate system feasibility under real world conditions



Equipment

Keysight EEsof Electronic Design Automation (EDA) Software

N1930B Physical Layer Test System (PLTS) Software with Vector Network Analyzer

Test Challenges

Cost/Technology trade-offs to meet market needs

Interconnect characterization

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Analysis and Debug

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Voltage/timing measurements on key buses

Eye timing, eye opening, skew, impacts of loading, etc



Equipment

Infiniium Oscilloscopes

Protocol and Logic Analyzers

ENA network analyzer with option TDR

x1149 Boundary Scan Analyzer

Test Challenges

Basic functionality: electrical, timing, basic messaging/protocol

Meet operation conditions and specifications

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High-Speed Digital Design & Simulation

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Analysis and Debug Design and Simulation Compliance

Infiniium High Performance Oscilloscopes

Z-Series Oscilloscopes

• 63 GHz of real-time bandwidth

• Industry’s lowest noise and jitter

measurement floor

• Industry’s deepest memory (up to 2

Gpts)

X-Series Oscilloscopes

• 13 GHz to 33 GHz

• 12.1-inch display

• 80 GSa/s sample rate

• The world's fastest real-time oscilloscope

and the best measurement accuracy

Manufacturing

http://s7.images.keysight.com/s7viewers/flash/genericzoom.swf?logo2=false&serverUrl=/is/image/&contentRoot=/skins/&locale=en&config=Keysight/KEYSIGHT-IMGSET&image=Keysight/PROD-2391603-IS

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Compliance

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Pre-compliance measurements to save time and money



Equipment

Infiniium Oscilloscopes

Logic and Protocol Analyzers

Bit Error Rate Testers

Compliance Test Softwares

Test Challenges

Determine best test methodology to meet published test specifications

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High-Speed Digital Design & Simulation

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Analysis and Debug Design and Simulation Compliance

Compliance Test Applications

• Automated setup ensures result

repeatability and allows test

engineers to run the application

without being an expert on the

procedures

• Instrument setup is automatically

configured for each test, and

measurement connection setups

are displayed

Manufacturing

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Manufacturing

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Opens and shorts, Component values, Some component analog or digital functionality



Equipment

i3070 In-circuit Test System

i1000 Low cost In-circuit Test System

x1149 Boundary Scan Analyzer

Test Challenges

Detection of manufacturing defects; Opens, Shorts, Missing Component, Wrong

Component, etc

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Keysight’s solution set for high-speed digital test is a combination of instrumentation and

broad expertise built on our ongoing involvement with industry experts. By sharing our latest

experiences, we can help anticipate challenges and accelerate your ability to create products

you’ll be proud of.

Advanced

Design System

(ADS) and

EMPro

N1930B Physical

Layer Test

System (PLTS)

Bit Error Ratio

Testers (BERTs)

ENA-TDR

Infiniium 90000

X-Series

AXIe-based

Logic

Analyzer

Module 86100D Infiniium

DCA-X

Insights For Your Best Design With Keysight

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http://cp.home.agilent.com/agilent7/s7viewers/flash/genericzoom.swf?logo2=false&serverUrl=/agilent7/is/image/&contentRoot=/agilent7/skins/&locale=en&config=Agilent/AGILENT-IMGSET&image=Agilent/PROD-1970950-IS

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• JEDEC, Board of Directors, Perry Keller

• PCI-SIG, Board of Directors, Rick Eads

• VESA, Board of Directors, Brian Fetz

• MIPI, Contributing Member, Roland Scherzinger

• HDMI, Contributing Member, Stefan Friebe

• USB, Contributing Member, Brian Fetz

• Serial ATA (SATA), Contributing Member, Min-Jie Chong

• IEEE 802.3 Ethernet, Greg Le Cheminant

• OPT TRX WAN, Stefan Loefflar

Agilent experts helping define next generation standards, and solutions

Leadership in Developing Future Standards

18

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More Information

19

www.keysight.com/find/hsd

http://www.agilent.com/find/hsd

http://www.agilent.com/find/hsd

New Wave Storage Evolution

Market Insight and Strategy

D-U-N-S : 65-802-3291

NAND Flash Application Solution Provider

Controller IC Design & System Integration

Established in Nov 2000

Based in Zhunan, Taiwan (15 min South of Hsinchu Science Park)

Phison = Founded by “5-Person”, more than 14 years of experience in NAND Flash Industry

827 Employees (R&D 506, 61% of Total)

Phase I (2008)

Phase II (2012)

About Phison

Time Achievement

05.2001 Announced the World's First Single-Chip USB Flash Drive Controller (PS1001) and Pen DriveTM

04.2002 Invested by Toshiba Corporation and M-Systems Ltd.

09.2004 Launched SD/MMC memory card controller

12.2004 Initial Public Offering (IPO) in Taiwan

05.2006 Founded and became Board of Director of Open NAND Flash Interface (ONFI) with Intel, Micron, Sony, Hynix and ST

06.2008 Invested by Kingston Technology and Hynix Semiconductor

01.2009 Elected Board of Director of SD Card Association (SDA) along with Nokia, Motorola, Canon, NEC, HP, Sharp and other companies

05.2009 eMMC controller adopted by NAND Flash manufacturers and designed into tier-1 smart phones and automotive systems

05.2010 Ranked 65th in Bloomberg BusinessWeek “The Tech 100” – Annual list of World’s top technology companies

10.2011 PS3105 SATA controller design-win in World’s 1st Ultrabook

12.2011 NAND Flash controller IC shipped in 2011 – 556 Million Units

12.2012 NAND Flash controller IC shipped in 2012 – 679 Million Units

11.2013 PS3109 SATA controller M.2 SSD design-wins in Tier-1 Chromebooks

10.2014 SSD controller joint development with major semiconductor company

Company Milestone

0

200

400

600

800

1000

1200

4 25 74

119

192

378

630 575

750

1,007

1,100 1,118 1,085

808

US$m

Sales Revenue

* Updated Oct 2014

Region Pending Granted

Taiwan 168 279

China 226 188

USA 165 212

Others 2 29

Total 561 708

LBA to PBA mapping to improve

Random Write Performance and

maximize Device Life Time

Solve the problem of accumulated error

introduced by Copy Back operation

Smart card technology embedded Mobile Security

6,490,163 6,724,680 6,792,501 6,876,579 6,880,024 6,916,208 7,187,583 7,206,893 7,222,211 7,225,291 7,243,186 7,259,988 7,263,649 7,276,889 7,319,360 7,376,781 7,649,794 7,822,912 7,840,745 7,949,929 8,037,233 8,055,837 8,103,820 …..

Flash management for eMMC Products

to support new NAND Flash architecture and to improve performance

Data Integrity of MLC large block

NAND. Improve performance of partial page programming

Patent Portfolio

Full Product Portfolio

USB Flash Drive microSD & SD eMMC Smart Card microSD

SSD Modules & Solutions

A diversified product mix for consumer, industrial and enterprise storage

Laptop Ultrabook Tablet Industrial PC Set-Top Box Automotive Server

Phone & Tablet E-Book GPS Networking Camera/Camcorder Automotive Digital TV

Telecommunication Online Transaction Medical Military Entertainment Transportation Cloud Computing

SSD Embedded Security

NAND Flash market flourishing from an expanding number of applications

NAND Flash Market Outlook

Storage Evolution – Some Said Floppy Killed by Phison

✗

✗

✗ ✗

✗ ✗ ✗ ✗

NAND Flash Everywhere

100% Flash

227M SSDs in

2017

100% SSD

Amazon EC2

New Datacenter Drives SSD Growth

VIRTUALIZED DATA CENTER

LUN OS APP

LUN OS APP

LUN OS APP

LUN OS APP

LUN OS APP

LUN OS APP

LUN OS APP

LUN OS APP

LUN OS APP

LUN OS APP

LUN OS APP

LUN OS APP

LUN OS APP

LUN OS APP

LUN OS APP

LUN OS APP

LUN OS APP

LUN OS APP

LUN OS APP

LUN OS APP

LUN OS APP

LUN OS APP

LUN OS APP

LUN OS APP

LUN OS APP

LUN OS APP

LUN OS APP

LUN OS APP

LUN OS APP

LUN OS APP

Thousands of VMs

Time

Data patterns add-up

All turn to random

IO A

gg

reg

atio

n

The only storage solution to datacenter today is SSD.

Market Dynamics

2015-2016 TLC Flash will meet market requirement. 128/256GB will be laptop storage standard.

Lean/thin net laptop (Chromebook like) will be popular. SSD is the only choice.

SSD is the industrial application storage standard now.

SSD will be the key component in modern datacenter.

Phison’s Next Move

SSD! SSD! SSD!

- PS3110 high performance maintream SATA3 SSD.

- PS3111 for entry SSD storage and industrial.

- PS5007 – No.1 individual IC design house to announce first PCIe 3.0x4. Direct hit to high performance datacenter requirements.

Phison’s Strategy – We Support Partners

Team with SSD brands to retail.

Direct support

- System vendors

- Industrial vendors

Customized application support

- End to end technology ownership.

- Flexibility to support partners.

Thank You

D-U-N-S : 65-802-3291

PHISON is a trademark of PHISON Electronics Corporation, registered in the United States and other countries.

SD Logo, miniSD Logo, microSD Logo, SDHC Logo, miniSDHC Logo, microSDHC Logo are trademarks of SD-3C, LLC.

CompactFlash® and CF logo are trademarks of the CompactFlash Association.

Windows 8 and the Windows logo are trademarks of the Microsoft group of companies.

General Notice: Other trademarks and product names used herein are for identification

purposes only and are the property of their respective owners.

PHISON disclaims any and all rights in those marks.

© 2014 PHISON Electronics Corporation. All rights reserved.

Signal Integrity Simulation for Compliance Testing, Taking DDR4 As An Example

Page Keysight EDA 2

– Introduction to DDR4

– “DDR4 Simulation -> Compliance Test” Flow

– DDR4 Compliance Test Bench Video Demo

– Summary

Agenda

Page Keysight EDA 3

Introduction: DDR4 memory ramping up in electronic systems

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Page Keysight EDA 4

DDR4 Memory in the News

4

Page Keysight EDA 5

DDR4 High Speed => Less Timing Margin

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Typical DDR4 Architecture

Keysight EDA 6

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Danger of Disparate Compliance Tests… 1) from EDAco:

…and 2) from ScopeCo:

Bridging script generates report Design and simulate

≠

Keysight EDA 7

Page Keysight EDA 8

ADS “DDR4 Simulation=>Compliance Test” Flow

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Page Keysight EDA 9

ADS DDR4 Simulation Setup

Simulation Setup for Data and Strobe Signals in WRITE Cycle

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Page Keysight EDA 10

Driver and Receiver IBIS models

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Channel Model

– Use multilayer transmission

line models and S-

parameters to build the

channel model

– Can import a PCB layout to

build an EM model using

Momentum or FEM

– Can import S-parameters

from other EM tools or

VNA/TDR measurements

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Pattern Generator

– Use PRBS sources to

generate random DQ pattern

and repetitive DQS pattern

– Use pulse sources as input

to IBIS Enable Pin to

generate DQ and DQS

bursts

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ADS Transient Simulation to Generate Waveform in .h5

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Read .h5 files for analysis in Infiniium Offline

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DDR4 Compliance Test

– What are we testing?

• Clock Tests (Noise)

• Electrical (Voltage)

• Timing (Signal Edge)

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DDR4 Electrical and Timing Tests

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Load ADS waveforms to perform DDR4 compliance tests

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Generate measurement results and HTML report

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DDR4 Compliance Test Bench Video

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ADS DDR4 Simulation to Compliance Test User Story

1. As a DDR controller designer at an IC company, I need to swap out the simulated testbench’s generic controller model with my controller I/O model…

2. As a PCB/package/DIMM designer at an OEM or IC company, I need to swap out parts of the simulated testbench’s generic channel cascade with the post-layout EM-based model of my package (or PCB or DIMM)…

3. As a DRAM I/O designer at an IC company, I need to swap out the simulated testbench’s generic DRAM model with my DRAM I/O model….

(for all three)…then I want to run a sign-off compliance test on the simulated test bench waveforms before committing to fabrication. I want to run the exact same tests on the simulated testbench that I will run on my ‘scope in the test lab when get my prototypes back from fab.

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ADS DDR4 Bus Simulator

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BER Mask Margin Measurements

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• Comprehensive margin measurements versus DDR4 Rx mask

• Timing and voltage margins between mask and contour at target

BER are reported for each mask corner

Keysight EDA

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Eye Density of All DQ Signals

23 Keysight EDA


Summary

• ADS simulates the physical channel effects of I/O drivers/receivers

and package/PCB/connectors between MCH and DDR4 memory

• Simulated waveforms are used to run DDR4 compliance test

• Compliance sign-off report is generated from the simulated waveforms

before committing to fabrication. Exact same tests can be run in the

test lab when hardware prototypes come back from fabrication

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Presented by Brad Doerr, R&D manager Insights for your ... · MIPI (CSI-2, DSI 1.1) D-PHY (1G/...

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