OVONIC UNIFIED MEMORY

OR

PHASE CHANGE MEMORY

BY MANOJ.S

INTRODUCTION Ovonic Unified Memory is a new semiconductor memory technology, originally invented by Energy Conversion Devices, Inc. (ECD), and now licensed exclusively to Ovonyx, Inc. OUM uses a reversible structural phase-change -- from the amorphous phase to a crystalline phase - in a thin-film chalcogenide alloy material as the data storage mechanism.

MEMORY DEVICE CHARACTERISTICS

Cost

Access Time And Access Rate

Access Mode

Permanence Of Storage

Cycle Time And Data Transfer Rate

MOORE’S LAW

OVONIC UNIFIED MEMORY : ANSWER TOMOORE’S LAW PROBLEM The nonvolatile memory industry recognizes that

current flash memory technology must shrink to remain profitable, As a consequence, nonvolatile memory technology which is emerging as potential alternatives to replace Flash, is Ovonic Unified Memory ( OUM) also called as Phase Change Memory (PCM).

PCM, however, is based on a physical state change of a chalcogenide material, com monly referred to as GST.

As the PCM memory cell shrinks, the volume of GST material involved in the state change shrinks resulting in reduced power consumption or higher write performance and hence the answer to moore’s law.

CONTINUED . . . The phase change technology were used in

commercially avaliable rewriteable CDs and DVD optical memory disks.

OUM is the non volatile memory that utilizes a reversible structural phase change between amorphous and polycrystalline states in a GeSbTe chalcogenide alloy material.

The transistion is bought about by resistive heating a small volume of material with a current pulse.

Compared to the amorphous state, the polycrystalline state shows a dramatic increase in free electron density, similar to a metal . This difference in free electron density gives rise to a difference in reflectivity and resistivity.

CONTINUED . . .

In the amorphous phase, the material is highly disordered and exhibits high resistivity and high refractivity and is defined as the RESET state.

In the polycrystalline phase, the material has a regular crystalline structure and exhibits low refractivity and low resistivity and is defined as the SET state.

PCM is using an alloy of Germanium , Antimony and Tellurium (Ge2Sb2Te5) in a 2:2:5 ratio and known more commonly as “GST”.

PCM ATTRIBUTES AND CAPABILITIES

EVOLUTION The use of phase-change chalcogenide alloy

films to store data electrically and optically was first reported in 1968 and in 1972.

During 1980’s new material compositions, derived from the GeTe-Sb ternary system, begin to be implemented.

In the 1990s, researchers at Energy Conversion Devices Inc. and Ovonyx Inc. developed new, thermally optimized phase-change memory device structures.

Ovonyx is now commercializing its phase-change memory technology called Ovonic Unified Memory(OUM) through a number of license agreements and joint development programs with semiconductor device manufacturers.

CONTINUED . . . In February 2000, Intel and Ovonyx announced a

collaboration and licensing agreement that spawned the modern age of research & development in PCM.

In 2006, BAE Systems offered a radiation-hardened 4 Mb Chalcogenide RAM based on  it is claimed, cost advantages over conventional solid-state memories such as DRAM or Flash due to its thin-film nature, very small active storage media, and simple device structure

CONTINUED . . . This prototype phase-change

memory chip has 128Mb capacity. Startup Numonyx, that combines memory technology from Intel and STMicroelectronics, will be manufacturing these chips.

In 2009 A new type of memory based on phase-change materials that can be stacked in layers could lead to much denser memory chips at lower costs, according to the researchers at Intel and Numonyx who developed a 64-megabit test chip.

CHALCOGENIDES The term “chalcogen”

refers to the Group VI elements of the periodic table.“Chalcogenide” refers to alloys containing at least one Group VI element such as the alloy of germanium, antimony, and tellurium

These group of materials exhibit both optical and electrical properties.

CONTINUED . . . Since the binary information is

represented by two different phases of material it is inherently non-volatile requiring no energy to keep the material in either of its two stable structural states

The amorphous,high resistance state is used to represent a binary 0.

The crystalline,low resistance state is used to represent a binary 1.

STORAGE MECHANISM During the amorphizing

reset pulse, the temperature of the programmed volume of phase change material exceeds the melting point which eliminates the polycrystalline order in the material.

The crystallizing set pulse is of lower amplitude and of sufficient duration to maintain the device temperature in the rapid crystallization range for a time sufficient for crystal growth.

ELECTRONIC PROPERTIES OF CRYSTALLINE ANDAMORPHOUS GST ALLOYS

The strong dependence of electrical resistivity on the structural state of the material .

High-field threshold switching phenomenon

STRONG DEPENDENCE OF ELECTRICAL RESISTIVITY ON STRUCTURE

When chalcogenide alloy semiconductors are amorphized, the Fermi level to lie near the mid gap between the energy levels of the two types of traps.

In the polycrystalline state, crystal vacancies are proposed to give rise to acceptor-like states that move the Fermi level close to the valence-band edge and gives rise to the nearly degenerate p-type high conductivity of the polycrystalline state.

The phase-change memory cell uses a reversible change in long-range atomic order (the amorphous-to-crystalline phase change) to modulate both the Fermi level position in the chalcogenide alloy and the carrier mobility to change the cell’s resistance.

ELECTRON DIFFRACTION PATTERN REVEALS THE FOLLOWING INSIGHTS ABOUT BOTH PHASES

THRESHOLD SWITCHING From a high-resistance

(“RESET”) state, an OUM bit is programmed into a low resistance(“SET”) state by applying programming voltage in excess of Vth, allowing the bit to enter the dynamic ON state.

The device can then be programmed to the RESET state by applying a short, somewhat larger current pulse to a bit in the polycrystalline state.

OUM MEMORY STRUCTURE

CONTINUED . . .The oum is programmed by

application of current pulse.

Information is read out by cell’s resistance

To write data the material is heated.

Thermal insulators are also attached.

PERFORMANCE

The reset resistance saturates when the pulse width is long enough to achieve melting of the phase change material. The set pulse adequately crystallizes the bit in 50 ns .

Starting in the set condition, moving from left to right, the device continues to remain in SET state as the amplitude is increased.

Beginning again with a device initially in the RESET state, Once Vth is surpassed, the device programmed resistance is dramatically reduced as crystallization of the material is achieved.

CONTINUED… The retention offered by

OUM is excellent showing very small deviation even after 10^12 cycles.

The demonstrated Endurance of OUM is 10^13.

The high resistance, “Reset,” state shows activated, semiconductor like behavior while the low resistance, “Set,” state shows essentially temperature independent metallic behavior.

TECHNOLOGY CAPABILITIES Direct write capability (no erase before write) easing

significantly system implementation

For PCM, changing a byte involves writing the new data: (total < 100 nSec, can be less than 50 nSec with new alloy)

With read current > 10 μA, read speed is expected to be comparable to NOR and DRAM

Data retention capability to 10 years at 110 degrees C. thus the device has an excellent life as failure

occurrence is negligible.

Radiation hardness of phase-change memory is excellent.

INTEGRATION WITH CMOS

Integration of the chalcogenide-based memory element into a radiation-hardened CMOS process was desired to maximize the potential memory density of the technology by placing the memory element directly above the transistors and below the first level of metal.

CONTINUED . . . To accomplish this process integration task, it

was necessary to design a test chip with appropriate structures. This vehicle was called the Access Device Test Chip (ADTC) .

A memory cell, comprised of one access transistor and one chalcogenide resistor, and referred to as a 1T1R cell.

The ADTC included 272 macros, each with 2 columns of 10 probe pads.

I-V CHARACTERISTICS The voltage is applied to

one of the two terminals of the chalcogenide resistor, and the access transistor (biased on) is between the other resistor terminal and ground.

Above VT, both materials display identical I-V characteristics, with a dynamic resistance (RDYNAMIC) of ˜1k.

The applied voltage must be reduced below VH to exit the programming mode

RELATIONSHIP BETWEEN RESISTANCE AND CURRENT

With the access transistor biased on. these devices require approximately 0.6 mA to set to the low resistance state(RSET) and 1.2 mA to reset to the high resistance state (RRESET). The circuit was verified to be electrically open with the access transistor biased off.

ADVANTAGES

Cost/Bit reduction• Low voltage – single supply• Reduced assembly and test costs

Near Ideal Memory Quality• High endurance – >10^13 demonstrated .• Long data retention – >10 years.• Random accessible – read and write.• Direct overwrite capability.

Highly Scalable• Performance improves with scaling• Low voltage operation• Small storage active medium

Radiation Immunity• OUM however offers the distinctive advantage over all other memory

types owing to its Radiation Immunity characteristics.

RISK FACTORS Standard CMOS process integration Alloy optimization for robust high temp

operation and speed Cycle life endurance consistency Endurance testing to 10^14–DRAM Defect density and failure mechanisms

TECHNOLOGY CHALLENGES

Reduction of programming current for lower voltage and lower power operation.

Increased set/reset resistance and decreased read current/set current margin with Scaling → impact on read performance/margin.

Management of proximity heating with declining cell space → disturb risk.

MARKET APPLICATIONS PCM is a direct replacement for this very popular

type of nonvolatile memory (NVM) used primarily for code storage.

Unified Memory- PCM’s capability of direct bit overwrite (no erase required) and high speed R/W performance coupled with high cycle life endurance, allows it to replace a previous dual chip solution of DRAM and Flash with a single unified memory solution for lower cost, reduced power .

PCM can displace a significant amount of DRAM in both mobile and PC/server applications.

CONTINUED . . . As NAND Flash scales, the random R/W speed

performance and cycle endurance continues to degrade, accentuating the need and size of a buffer memory where PCM would be an ideal memory solution.

In microprocessors, microcontrollers and System-on-a-Chip (SOC) applications.

The ability to use PCM technology will permit the manufacture of nonvolatile, high cycle-life reprogrammable devices.

PCM stores the phase of a material, which is effectively immune to radiation and is an ideal candidate for military, space, and other radiation sensitive applications.

DIGITAL AND ANALOG APPLICATIONS Chalcogenide within the digital electronics product set

is a reconfigurable logic device such as Field Programmable Gate Array (FPGA).Reconfigurable systems utilize fused-based circuits.

Embedded chalcogenide i.e Memory cells may be inserted into processors, Application Specific Integrated Circuits(ASICs), or System-on-a-chip (SOC) applications.

Multi-state capability of chalcogenide by incrementally stepping the voltage used to program the element, each memory cell can represent multiple bits.

Numerous linear and power devices are optimized for performance using resistance trimming.

There is an opportunity to explore whole new methods of storing and processing analog signals.

CONCLUSION

PCM employs a reversible phase change phenomenon to store information through a resistance change in different phases of a material.

PCM offers a combination of some of the best attributes of NOR flash, NAND flash, EEPROM and RAM in a single memory device.

OUM has direct applications in all products presently using solid state memory, including computers, cell phones , graphics-3D rendering, GPS, video conferencing, multimedia, Internet networking and interfacing, digital TV, telecom , PDA, digital voice recorders, modems, DVD, networking (ATM),Ethernet, and pagers.