M.PRASANNA +91-9840961291

prasannamathivanan@gmail.com

OBJECTIVE

To work with maximum potential in a challenging and dynamic environment, with an opportunity of working with diverse group of people and enhancing my professional skills with learning and experience for career growth.

PROFESSIONAL SUMMARY

Specialised in Embedded System Technologies with Master of engineering Degree in this field. Proficient in programming language in C, Verilog HDL (Beginner). Having a sound knowledge on Digital electronics, Pic & 8051 Microcontroller and Linux. Successfully executed project on VLSI domain based on Logic gates (Fredkin gate) to test and

design a Digital circuit. Self-motivated, creative and innovative team player willing to work hard. Exposure to Model sim, Xilinx and Matlab software.

ACADEMIC PROFILE

Master of Engineering in Embedded System Technologies from Anna University passed out in 2015 with 8.23 (CGPA) securing first class.

Bachelor of Engineering in Electronics & Communication engineering from Anna university passed out in 2013 with 8.18(CGPA) securing first class.

H.S.C (Class 12th) from Zion Matric HSS passed out in 2009 with 93.75%. S.S.C (Class 10th) from Zion Matric HSS passed out in 2007 with 88%.

TECHNICAL SKILLS

Programming languages: C, Verilog HDL, Embedded C (Beginner). Operating system: Windows 98, Windows 2000, Windows 7, 8 & 10. Embedded software : Keil uVision3 (V 3.00) Software: Model sim, Matlab. Knowledge learning: Red Hat Linux certification (RHCSA & RHCE)

CERTIFICATIONS

RHCSA (RED HAT CERTIFIED SYSTEM ADMINISTRATOR) – 160-010-948 RHCSE (RED HAT CERTIFIED ENGINEER) – 160-010-948

ACADEMIC PROJECTS

Project Title : Implementation of testable reversible sequential circuits on FPGA. Period : June 2014 - June 2015. Description : In this project we design a testable reversible sequential circuit based on

Fredkin gate. It uses both reversible and conservative logic. It tests the

circuit by using only two test vectors 0 and 1. It mainly tests for stuck-at faults. Reversible logic reduces heat dissipation and where conservative logic helps to design a sequential circuit with zero internal power dissipation. It does not allow Fan-out to occur.

Debugging Tools : Model sim.

Project Title : Efficient charging of super capacitor for extended lifetime of inverter. Period : December 2012- April 2013. Description : In this project, the solar panel, the wind generator, & piezoelectric cell

are used for charging the battery through super capacitor and from the battery the inverter is designed. The inverter input is taken from the super capacitor and the output is AC. At the heart of the inverter is a real-time microcontroller. The controller executes the very precise algorithms required to invert the DC voltage generated by the solar, wind and piezo electric module in to AC.

Debugging Tools : keil C.

TRAINING PROGRAMME

Inplant training at Doordharshan Kendra, Chennai from 06.06.11 to 10.06.11. Inplant training at Airport Authority of India (AAI), Chennai Airport from 15.06.12 to 17.06.12.

CONFERENCE & PUBLICATIONS

Attended “International conference on Innovations in information, embedded and communication system” and presented a paper in VLSI domain on March 20th at Karpagam College of engineering, Coimbatore.

Attended “International conference on Bio-Medical Applications, ICBA’15” and presented a paper in VLSI domain on March 11th at SCAD College of engineering & Technology, Tirunelveli.

Published paper “Implementation of testable reversible sequential circuit on FPGA” on International Journal of Advanced Research Trends in Engineering and Technology (IJARTET), Vol. II, Special issue XII, March 2015.

URL:(http://ijartet.com/papers/ICRTET15/V02S130319.pdf)

Published paper “Implementation of testable reversible sequential circuit on FPGA” on IEEE Xplore Digital Library.

URL: (http://ieeexplore.ieee.org/xpl/articleDetails.jsp?arnumber=7192888&queryText=implementation+of+testable+reversible+sequential+circuit+on+FPGA&newsearch=true&searchField=Search_All)

STRENGTH

Excellent team player. Good problem solving abilities. Excellent grasping power. Willingness to learn.

EXTRACURRICULAR ACTIVITIES

Participated in Football zonal conducted by Anna University. Represented the department Football team at intra college sports and banged prizes. Regular blood donor in the Blood Donation Camp conducted by the NSS unit of the College.

PERSONAL INFORMATION

Name : M.Prasanna

Father’s Name : Mr. J. Mathivanan

Languages known : English, Tamil

Date of Birth : 26/03/1992

Nationality : Indian

Age : 23

Hobbies : Music & Football

Address : P.no:57, D.no:8, 3rd street, Sri Ramakrishna nagar,

Chitlapakkam, Chennai-600064.

DECLARATION

I hereby declare that the information given herewith is correct to the best of my knowledge.

Place: CHENNAI M.PRASANNA

Date: 01/02/2016