power electronics 2

18
1 Hello, in two impo reverse r current. N current to (Refer Sl See, it is reverse r that this i off when path also Now com layers P 1 and N 3 i compared as P 2. So reverse v other wo my last clas ortant param recovery tim Now, what i o 25% of the lide Time: 1 s here, it is recovery cha is the triangl n the current o. So, t rr is an ming to SCR N 1 P 2 N 2. is a very th d to N 2. N 1 i o, therefore voltage that j rds B AK is p Dep India ss I discusse meters for d me, t rr and th is reverse re e peak of the :34) t rr the time arge is the ar le area of th become 0 fr n indication o R, the silico P 1 is anode hin layer hig is the thickes J 3 or the rev junction J 3 c ositive, junc Powe Prof. B partment of an Institute L d the diode a iode that ar he reverse re covery time e reverse reco between the rea, the shad e triangle i rr rom positive of the maxim on controlled , N 2 is catho ghly doped, st among all verse voltag an block is v ction J 1 and J er Electronic B. G. Fernan Electrical E of Technolo ecture - 5 and silicon c re to be used ecovery cha ? It is a tim overy curren e negative 0 ded area her into t rr divid e value. It w mum frequen d rectifier is ode and P 2 i P 2 is slight l the 4, dopin ge that j 3 can very small. S J 3 are forwar cs ndes Engineering ogy, Bomba controlled re d in high fr arge or the p me between th nt. 0 crossing to re. We are c ded by 2. Re will become 0 ncy at which s a minority s gate. So, t tly thicker a ng level is m n block is v So, when the rd biased and g ay ectifier, SCR requency cir peak of the he negative o say 25% o considering, emember, dio 0, it continue h the diode c y carrier dev there are 3 ju also the dop minimum the very small. I e device is fo d J 2 is revers R or thyristor rcuits are; o reverse reco 0 crossing o of i rr, peak r we are assu ode does no es in the neg can operate. vice. There unctions; J 1, ping level is ere and p 1 is I will repea orward biase e biased. r. The one is overy of the rr and uming t turn gative are 4 , J 2, J 3 s less same at, the ed, in

Transcript of power electronics 2

Page 1: power electronics 2

1  

Hello, in two imporeverse rcurrent. Ncurrent to (Refer Sl

See, it isreverse rthat this ioff whenpath also Now comlayers P1

and N3 icomparedas P2. Soreverse vother wo

my last clasortant paramrecovery timNow, what io 25% of the

lide Time: 1

s here, it is recovery chais the triangl

n the current o. So, trr is an

ming to SCR N1 P 2 N2. is a very thd to N2. N1 i

o, therefore voltage that jrds BAK is p

Dep

India

ss I discussemeters for dme, trr and this reverse ree peak of the

:34)

trr the time arge is the arle area of thbecome 0 fr

n indication o

R, the silicoP1 is anode

hin layer higis the thickesJ3 or the revjunction J3 cositive, junc

Powe

Prof. B

partment of

an Institute

L

d the diode aiode that ar

he reverse recovery time

e reverse reco

between therea, the shade triangle irr

from positiveof the maxim

on controlled, N2 is catho

ghly doped,st among allverse voltagan block is v

ction J1 and J

er Electronic

B. G. Fernan

Electrical E

of Technolo

ecture - 5

and silicon cre to be usedecovery cha? It is a timovery curren

e negative 0ded area herinto trr divid

e value. It wmum frequen

d rectifier isode and P2 i

P2 is slightl the 4, dopinge that j3 canvery small. SJ3 are forwar

cs

ndes

Engineering

ogy, Bomba

controlled red in high fr

arge or the pme between th

nt.

0 crossing tore. We are cded by 2. Re

will become 0ncy at which

s a minoritys gate. So, ttly thicker ang level is mn block is vSo, when therd biased and

g

ay

ectifier, SCRrequency cirpeak of the he negative

o say 25% oconsidering, emember, dio0, it continueh the diode c

y carrier devthere are 3 jualso the dop

minimum thevery small. Ie device is fod J2 is revers

R or thyristorrcuits are; oreverse reco0 crossing o

of irr, peak rwe are assuode does noes in the neg

can operate.

vice. Thereunctions; J1,

ping level isere and p1 is I will repea

forward biasee biased.

r. The one is overy of the

rr and uming t turn

gative

are 4 , J2, J3

s less same

at, the ed, in

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Yesterdaone is for (Refer Sl

See hereleakage cjunction Device gnegative Current imode is increasesthe voltaabout whwhen the The applreverse bThereforthe breakappears a

ay I showed rward blocki

lide Time: 4

e, from p tocurrent. So, J2 that is V

goes into conresistance z

is determinea forward, a

s the break dge at which hen the devie device is re

lied voltage biased, j2 is e, the entire

k down voltaacross the th

you the SCing mode, V

:52)

q is a forwif IG is 0 and

VBO appears nduction modzone. Havin

ed by the loaagain a stab

down voltagedevice goes

ice is forwaeverse biased

should be forward bia

e reverse volage of junctioyristor shou

CR characterVAK is positiv

ward blockind if the applacross junc

de. Which png gone intoad. So, again

ble mode of e of junctions into conducard biased ord?

less than VB

sed. Reverseltage appearon J1. So, in ld be less th

ristics. Thereve, IG or dev

ng mode, a lied voltage ction J2, J1 aath it takes?

o conductionn it is a staboperation. S

n J2 goes on rction mode br the operat

BR. In the ree voltage thrs across junany circuit tan the VBR r

e are 3 zonevice current i

very small is higher tha

and J2 are, J? It takes QRn mode, curble mode of So, I told yoreducing. Inby supplyintion in the f

everse bias hat a junctionnction J1. Sothe VBR or mrating of the

es in the foris very small

current thaan the breakJ1 and J3 areR, it is unstabrrent is limi

f operation, fou that is a

n other wordsg the gate cu

first quadran

mode, junctn J3 can blo

o, the VBR ismaximum rev

SCR.

rward bias ml. It is stable

at is flowingk down voltae forward bible because iited by the forward blocfinite IG or s, you can reurrent. So, th

nt. What hap

tion J1 and jock is very ss an indicativerse voltage

mode, .

g is a age of iased. it is a load.

cking as IG

educe hat is ppens

j3 are small. on of e that

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(Refer Sl

Now I stN2 then wcurrents Iemitter ocurrent ffunction every 10 See, ICBO

current gfor a trantransistor Similarlythyristor?and cathocurrent. Y

lide Time: 8

arted explainwe derived tICBO1 and ICB

open circuiteflowing from

of temperatdegree rise

O1 increases gain approximnsistor T1? Ar T1.

y, alpha2 inc? It is an emode current Yesterday w

:05)

ning two trathe expressioBO2. What is ed. This asp

m collector toture, it increin the tempe

with the temmately equaAlpha1 incre

reases with mitter current

of the thyriswe have deriv

ansistor analoon for IA anICBO1? It is

pects, we hao base with eases with terature.

mperature. Wal to IC divideases with I

the cathode t of transistostor? Cathod

ved that equa

ogy, I said th

node current a reverse cu

ave studied emitter ope

temperature,

What are alpded by IE. AlpIA. Why IA?

current of tor T2. What ide current isation.

here are twoin terms of

urrent flowinin transistor

en circuited., it could ap

pha1 and alppha1 increasIA is nothin

the thyristoris the relatios the sum of

o transistors gate current

ng from coller course. ICB

Remember,pproximately

ha2? They ases with IE. Sng but the e

. Why cathoonship betwef anode curr

P1N1P2 and t and the leaector to baseBO is the re, it is very sy be double

are commonSo, what hapemitter curre

ode current oeen anode curent plus the

N1P2

akage e with everse strong ed for

n base ppens ent of

of the urrent e gate

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(Refer Sl

See here,transistorwhat hapalso incrminus alpincreasesupper trathis is frincreasessum of IA

alpha2 wi

See thisincreasedbecause increasesincreasessort of a oscillatorto stabiliz So therefcurrent. infinity, maximumresults in

lide Time: 10

, IE1 the emir T2 is a cathppens with aeases. Here pha1 plus als. I will repeansistor is noom the exprs. If IA increA plus IG. Soill further in

s is this expd, alpha1 incboth alpha1

s. This is sos. IA increasepositive feers, we use thze it.

fore, due to So, when aof course th

m value of an large anode

0:40)

itter current hode current a finite IG? A

is the exprelpha2. So if Ieat, I said alpothing but thression that eases alpha2 , if this currecrease IA.

pression. Sincreases and t1 plus alphaome sort ofe will result dback, you w

his positive f

the positivealpha1 plus hat equationanode currene current her

of transistorthat is sum

A pulse of cuession, IA is IG increases pha increasehe anode cuwe have dealso increa

ent increases

nce IG incretherefore alpa2, they havf a positive

in increase would have

feedback. Al

e feedback,alpha2 appr

n is not valint is determre.

r T1 is anodeof IA plus IG

urrent is appequal to alpsuddenly, I

s with IE, theurrent IA. I toerived yesterases becauses alpha2 also

eases suddenpha2 increaseve increased

feedback. Sof alpha1 anstudied in ymost all the

a small IG

roaches 1, bid when alp

mined by the

e current itseG. This we h

plied to the gpha2 into IG

IA increases.e emitter curold you thatrday. So thee the emittero will increa

nly, that inces. So, that rd, denominatSo initially,nd alpha2. T

your control other system

will result ibecause theha1 plus alp

e load. Henc

elf. IE2, the ehave derivedgate circuit. plus ICBO1 pNow, if IA

rrent. The emt if IG increarefore, if IA

r current of se. So, incre

creases IA. Nresults in agaator decrease

because IG

That again intheory class

ms, we use n

in a large IA

e equation spha2 equal tce, a small I

emitter curred yesterday. N

If IG increasplus ICBO2 byincreases, amitter currenases IA incre

A increases atransistor T

ease in alpha

Now, since ain increase es. Therefor

G is increasencreases IA. Ss. Only may negative feed

A here, the asays IA becto 1, becausIG, a gate cu

ent of Now, ses IA y one alpha1 nt for eases, alpha1 T2 is a a1 and

IA is in IA

re, IA ed, IA Some be in

dback

anode comes se the urrent

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(Refer Sl

So, this itrigger ththan the l (Refer Sl

See here,gate has which is It is like happens

lide Time: 14

is one of thehe thyristor, latching curr

lide Time: 15

, the latchingno control. less than thethis, withouif there is a l

4:51)

e ways to trigIG should berent.

5:28)

g current, thTo turn off

e holding cuut holding, hlarge dv by d

gger the thyre present till

his is the latcf the thyristorrent and ho

how can youdt across the

ristor. Whatl the current

ching currentor, the devic

olding currenu latch? So, te device?

is the condit through the

t, IL. Havingce current snt is always lthis is the w

ition? If there device is e

g gone into cshould be reless than the

way to remem

re is a finite equal to or h

conduction mduced to a v

e latching cumber. Now,

IG to higher

mode, value

urrent. what

Page 6: power electronics 2

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You are ffigure (0between dv by dt,Cj2, Ij2 wi. Now, thiby transiapproachyou applywithout I (Refer Sl

So for suapplied vpositive higher thacross thconductio I told youthey apprresult in device agdirect lig

forward bias00:16:22), tra

emitter and , Ij2 will incrill increase

s will result istor action. h 1, device wy a large dv IG. That is be

lide Time: 1

ummarizing,voltage is hiIG also you

han the latchihe device. Ton mode bec

u that ICBO1 roximately dincrease in again goes int

ght radiation.

sed the devicansistor analbase of T1 b

rease. Ij2 wil

in the higheNow, if th

will turn on. Sby dt, a pos

ecause of the

8:09)

, when the digher than th

can triggering current. This is anotcause of the

and ICBO2, thdouble for evalpha1 and alto conductio.

ce, a large pology. Now, base and agall increase be

er leakage cuey get amplSo, it is not sitive dv by e junction ca

device is fohe forward r the deviceThe third wather way oftemperature

hese are the very 10 deglpha2 and in on mode. Th

ositive dv bythere are ju

ain collector ecause of th

urrent ICBO1

lified by traonly a positidt across the

apacitors.

orward biasebreak over . But IG shoay to triggerf triggering e effect.

strong functgree rise in te

case, alpha1

here is yet an

y dt is appeaunction capar of T1 and sohis dv by dt a

and ICBO2 anansistor actioive IG will tre device, it w

ed, device goVBO, if theould be presr the thyristo

the thyristo

tion of the teemperature.1 plus alpha2

nother way o

aring across acitors, thereo on. Now, and because

nd this curreon and if alrigger the thywill go into

oes into conere is no gatsent till the or is a large dor also or t

emperature. So if they i

2 approach 1of triggering

it, so just see is one capaif there is a

e of this capa

ent gets amplpha1 plus ayristor, in caconduction m

nduction mote current IG

anode curredv by dt appthyristor ma

They doublincrease, this, IA increase

g the thyristo

e this acitor large

acitor

plified alpha2 ase, if mode

ode if G. By, ent is

plying ain to

e for, s will

es and or, by

Page 7: power electronics 2

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(Refer Sl

See herethat will thyristor applicatiothrough t So, you transmissways or tways of are … (0 Now, whflowing, current bpulse is a

lide Time: 20

, I am radiatincrease a jgoes into

ons becausethe conventi

trigger the sion, HVDCthyristors aretriggering th0:21:18)

hat about thimmediately

builds up, whapplied.

0:01)

ting light in junction temconduction

e as the voltonal wires, l

thyristor bC. What exace triggered bhe thyristor

he switching y device wilhat is known

the junctionmperature, le

mode. So tage level inlead wires.

by the direcctly the HVDby direct lighor thyristor

characteristll not start con as the dela

n, to this junakage currenthis method

ncreases, it m

ct light radiDC is? Weht radiation Hgoes into co

tics? In the onducting. Tay time, td. S

nction light nts will incr

d, the last omay be diffi

iation, this e will see soHVDC systeonduction m

forward bloThere is a finSee here, som

is being radrease, they gone is used icult to pass

is used in ometime lateems. So, tha

mode if 1 of

ocking modenite time delmewhere at

diated. Definget amplified

in high vos the gate cu

high voltager. So, one oat is about vaf the 5 condi

e, when IG

lay before dthis point, a

nitely, d and oltage urrent

ge dc of the arious itions

starts device a gate

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(Refer Sl

See, therincrease determinwhich is (Refer Sl

Now, whWhy it wcathode pto near g

lide Time: 2

e is a finite tin current i

ned by the loapproximate

lide Time: 22

hat happens iwill fail? Seeperiphery. Inate cathode p

1:52)

time, only afs determine

oad. Again hely say 1.5 to

2:40)

if rate of rise, during the nitially the dperiphery an

fter which thd by the loahere voltageo 2 volts.

e in current iinitial turn o

device was bnd it slowly s

he anode curad, this near

e VAK starts

is very high?on that occurblocking, nospreads with

rrent starts inrby dt and adecreasing

? If di by dt rs, the initia

ow it starts ch a finite vel

ncreasing. Aattains a valand attains

is very highal turn on occconducting aocity to the

Again this culue given bya very low v

, device maycurs near theand it is conentire juncti

urrent, y, not value

y fail. e gate nfined ion.

Page 9: power electronics 2

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Now in case, di by dt is very high, I told you the conduction is confined to a very small area, gate cathode periphery in the beginning, current is increasing at a very fast rate, so definitely there will be hot spots or over heating of the junction. So, if there are hot spots or over heating of the junction, it may, device may get damaged. So remember, see it is here, I have written. Initial turn on the device occurs near the gate cathode periphery. Before the turn on, device is blocking and then it spreads with the finite velocity across the entire junction. Now di by dt is high, there is a very small area that is available, current is confined to a small area, so definitely there will be hot spots or over heating of the junction and therefore the junction or the device will fail. So therefore, during turn on, di by dt has to be controlled. How to control this di by dt? We will see some time later. Now what happens once the device has gone into conduction mode? J1 and J2 were, sorry J1 and J3 were forward biased, J2 was blocking, now there is the junction J2 breaks down, now it is highly saturated with minority carriers. Remember, I will repeat, J2 is saturated with minority carriers. See, it has a very special effect, the reverse recovery current in a diode and because of minority carriers, they require a finite time to recombine or to get neutralized. Definitely, similar effect will be there in the thyristor. I will discuss it sometime later. Now, since J2 is highly saturated with minority carriers, gate as no further control. That is the reason I have been saying that having gone into condition mode, you can withdraw the gate. In fact, one should withdraw the gate signal because if the gate current is continuously flowing, it has no control but then it will amount to power dissipation in the junction J3 and because of temperature arise, it may fail. Of course, it has a maximum power dissipation capability. So that is about the conduction mode. Now, how do you turn off the device? For turning it off, one has to reduce or current through the device should be reduced below the holding value. Now, if the input is AC, beyond pi, voltage will become negative. Input voltage becomes negative. So, there are chances of current also reducing and becoming 0. If the input is DC, having triggered the thyristor and gone into condition mode, how will you turn off the device? So, device can be turned off by temporarily applying a negative voltage with other L and C elements or in other words you have to reverse, you have to apply a reverse voltage across the device. What happens? IA starts decreasing, becomes 0, it continues to conduct in a negative direction, all most same thing that are happened in the diode.

Page 10: power electronics 2

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(Refer Sl

See herehighly sacan be tube or onl (Refer Sl

Now, VA

reverse creverse cThen, fir

lide Time: 2

, whatever yaturated withurned off by ly L, it depen

lide Time: 29

AK is still pocurrent has recurrent whicrst J1 blocks

8:33)

you can takeh minority ctemporarily

nds.

9:06)

ositive, till jeached a peach is a peaks and then J

e down thiscarriers, gate

applying a n

junction J1 ak, somethin

k, junctions J3, I will rep

explanation

e has no connegative vol

J3 starts to b

ng known asbegin to blopeat, when

n, this is abontrol. Then, ltage using o

become revs IRR, you havock both J1

the peak, w

out the turn SCR cannot

or in addition

verse biased.ve seen in a and J3, they

when the rev

on process.t be turned on to L and C

. Now, whea diode, wheny begin to bverse curren

. J2 is off or

C may

n the n this block. nt has

Page 11: power electronics 2

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attained aJ1 blocks less heav When thicurrent, wSee, I wirecovery leakage idecays anhad only By the wis the reathey requtime. See (Refer Sl

Anode cuthe negathigher cofast and charge ca So, therethyristor were attathey haveis compl

a peak, negajust before

vily doped co

is happens, rwill cause a ill repeat tha

current cauinductance end it attainsone junction

way, J2 is stillason, gate asuire a finite te this part is

lide Time: 32

urrent starts tive current ompared to it attains a larriers in tha

efore SCR shtill junction

ained the bloe to recombileted, positiv

ative peak, bJ3? Junctionompared to N

reversed curvoltage overat the reversuses a voltaeffect that dus a very lown, here we h

l forward bias no control time to recomfor not there

2:36)

decreasing,or the reve

that for diodow value bu

at junction. T

hould not ben J2 has attaiocking modine, it takes ve dv by dt

both junctionn J3 or N3 is hN2. So, J1 blo

rrents starts r shoot acrosse currents sage over shoue to the stra

w value. Thisave two junc

ased becausehaving gonembine or to ge. See, I wil

VAK is stillerse current de and onceut then junctThey take a c

e forward biained the bloe, J2 is still considered t should not

ns, they begihighly dopedocks first, the

decaying. Nss the devicetarts decayin

oot, L di byy inductance

s process is ctions.

e there were e into conducget neutralizll explain to

l positive, it attains a pe

e J1 and J3 hation J2 is stilconsiderable

ased or positcking modeforward biaamount of tit be applied

in to block.d, where J1 isen J3 blocks.

Now, this fase due to the lng towards

y dt effect ae and this realmost the s

large numbction mode

zed and this tyou with the

becomes 0,eak value ofave blockedll forward bie amount of t

tive voltage , forward bl

ased becauseime. Till thid across the

J1 blocks jus between P1

st decaying cleakage cond0 now and tacross the dverse recovesame as the

bers of minorthat is what takes conside figure.

VAK starts f IRR and th

d, this curreniased. Theretime.

should not alocking mode there are ms occurs or t

e thyristor b

st before J3.

1 and N1 and

current, a reductance effthis fast dec

device due tery current, Idiode. Ther

rity carriers.I told you. N

derable amou

falling. Thishis value is mnt starts decae are still res

appear acrosde. J1 and J3

minority cartill this proc

because J2 a

Why N1 is

everse fect. cay of to the I said re we

That Now, unt of

s, IRR, much aying sidual

ss the , they rriers, cesses as not

Page 12: power electronics 2

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attained conductiohave brofrom ther (Refer Sl

Now, whIA currenwithstandcapable ohere and J3 is not a

a blocking on mode. So

oken, this jure I am not, p

lide Time: 35

hat is tq? It isnt, the anodding forwardof withstandit becomes

attaining the

mode and o see, this isst indicates positive volt

5:39)

s a minimumde current d voltage, wding forwardif the SCR i blocking m

in case if y time periodthat this is

tage or SCR

m time intervhas becomeithout turnin

d voltage wits getting for

mode. So, this

you apply ad tq. What ex

a break becR, a positive v

val between e 0 and theng on. See ththout turningrward biaseds has to be en

a positive dvxactly tq I wcause this tivoltage appe

on state, IA

e instant whe instant ofg on. In cased somewherensured.

v by dt devwill define. Sime could bears across th

current becowhen thyristof current bece, dv by dt be here, it wil

vice will goee, at this po

be significanhe thyristor.

omes 0. See or is capabcoming 0 andbecomes poll turn on bec

o into oint I

nt and

here, ble of d it is sitive cause

Page 13: power electronics 2

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(Refer Sl

Now, whcurrent toblocking during tuyou havevoltage anaturallycurrent mturn it of Again, ancurrent, rdrop, offsides. di required sometimewill expl

lide Time: 36

hat are the io assess its s

voltage samurn on and de to reverse across the thyy, it is fine. may go, becoff forcibly.

nother imporreverse blocf state currenby dt turn oto design p

e later. Snubain to you.

6:43)

important pasuitability wme like diodduring turn obias it, onlyyristor to turIt may happ

ome 0 and th

rtant paramecking voltagent. Again th

on or during protection cibber circuit

arameters wwith the powede, constant off. Why dury you are or rn it off. Sompen naturallhyristor will

eter is reapple to assess t

hese 2 to calturn on and

ircuit, what which prote

ith the thyrier circuit, savoltage dro

ring turn offin other wo

mehow, youly sometimel turn off its

lied dv by dtthe suitabilitlculate the hd during turn

is known aects the devi

istor? Similaame thing asop to determf? You haveords, forciblyu have to rede, it we will

own and if

t. See here, tty with a po

heat sinks orn off and reaas a snubberice against d

ar to diode, s in the case mine the heae to apply a y you have tduce that curl see. In certhe input is

these are theower circuit,r to determinapplied dv br circuit. I wdi by dt and

average forof diode, re

at sinks, di bnegative volto apply negrrent if it haprtain applicaDC, you ha

e average for, on state vone the heat

by dt. Thesewill come tod dv by dt, h

rward everse by dt ltage, gative ppens ations ave to

rward oltage sinks 2 are

o that how I

Page 14: power electronics 2

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(Refer Sl

I square switchingexplainedwill go inother wothere is a See I wilby dt is aa large vthere is apoint sho So, how control thNo, you avoided f

lide Time: 39

R rating simg capability,d to you thanto conductirds device s

a di by dt and

ll repeat, thea voltage spioltage spike

a current limould lie withi

do I addreshe rate of chuse a resis

for higher fr

9:20)

milar to dio, the importaat because ofion mode. Ahould be prod there is alw

ere is alwaysike that maye could dama

mit and there in SOA, safe

ss these twohange of voltter and a ca

requency. He

ode and agaiant parametef the J2 junc

Also, voltageotected if theways some st

s some strainy appear acroage the thyriis a power lie operating a

o issues or wtage? Naturaapacitor. Seere it may be

in device tuer. Now, howction capacite across the ere is a spuritrained attain

ned attains inoss the thyrisistor becauseimit. I have area.

which passially use a caee, the othere required, n

urn off timew do I limit tance if therthyristor shoious spike thns.

n the circuitstor. So, in ae all that devtold you tha

ive element apacitor. Canr day I told

no choice.

tq to assessdi by dt and

re is a large ould not exchat could hap

t and if thereaddition to thvices, there iat at any give

will I use tn I directly ud you that re

s high frequd dv by dt?dv by dt, d

ceed its rate ppen whene

e is di by dt,he normal suis a voltage en time oper

to suppress use the capacesister shou

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device or in ver if

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uld be

Page 15: power electronics 2

15  

(Refer Sl

So, one wwe knowyou turnAssume current wNow, whstarts chathyristor. So, by covoltage aand 2 resNow, whtransferrethis waydischargi See, in adevices, has to cadischarge So in thicapacitordiode. SoSCR andflowing dconsidere

lide Time: 42

way to contrw that capacin it off, wha

that initiallywas flowing hat happens?arging. Capa.

ontrolling oracross the thysistors. Why hen you turned to the loa

y. Now, if ting current in

addition to again it depearry. So, R e current sho

is combinatr or during to, current stad during turnduring turn ed as the turn

2:08)

rol dv by dt iitor does notatever the cy the thyrist

through the? All the curacitor voltag

r by choosinyristor. Seeam I using

n on the deviad. In other wthere is no n addition to

the load cuends on the should be r

ould be contr

ion, what hthe turn off arts flowing

n on, capaciton, becausen off snubbe

is to have a Rt allow instaurrent that tor is on, soe device detrrent that wa

ge will increa

ng suitable v, there are ot2 resistors aice again, wwords, capacresistor or

o the others,

urrent and thcircuit confi

rated such throlled during

happens is of time, durin

through D1

or R1 R2 ande we have toers.

RC snubberantaneous vowas flowing voltage acrtermined byas flowing, sase and that

value of R ather combina

and a diode hwhatever the citor has to dif the resistcurrent will

his could beiguration thahat dischargg turn on.

only R1 comng the turn o

R1and C, dud maybe, youo control di

, snubber ciroltage changg, it starts fross this is y the load, nstarts gettingvoltage is n

and C, you cations also. here? Now, charge store

discharge. Stor is very l flow throug

e the reversat capacitor dged current i

mes in seriesoff time becuring chargiu would likeby dt anyw

rcuit. Now, ige. So, whatflowing throas slow as now you wag diverted he

nothing but v

can control tSee here, I hwhat happe

ed in the capo, capacitor small, wha

gh the SCR.

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it does not at happens? Wough this ci1.5 or 2 volant to turn iere and capa

voltage acros

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at happens i

current of urrent also dd during tur

e charging obypassed byg turn off timthe current this, this or th

allow, When ircuit. lts. A it off. acitor ss the

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Page 16: power electronics 2

16  

Now, howWhich pconnect iL and RC (Refer Sl

How aboare variocurrent iscome in signal is So, if yohigh andacross thdetermin So definifeatures, circuit frtransformtransform See hereof the traa pulse ad phi by only, ther

w do I contrassive elemeit in series asC will protec

lide Time: 47

out the gatinous types ofs higher thanseries with tapplied, gate

u see in thisd this is veryhe thyristor, ned by the oth

itely, we neeyou isolate

rom the pomer that is usmer? It has to

, I have justansformer, wat the rising e

dt and therere is a voltag

rol di by dt?ent will I uss shown in tct the device

7:24)

ng requiremef snubbers on the latchingthe load ande and the cat

s circuit VAK

y low, pleasthe forward

her circuit h

ed to isolatethe control cwer circuit?sed in gate do just pass th

shown a trawhat happensedge and at te is d phi byge induced h

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against di b

ent? I will juor protectiveg current tha

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here, power c

e the controlcircuit from ? One way drive circuit he pulses.

ansformer hes? Transformthe falling e

y dt. So, therhere.

uld not allowly, we need This will notby dt as well

ust briefly toe circuits. Nat is essentiate control elenal. The volt

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is known as

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w a fast risingto use an inallow a fastas dv by dt.

ouch up on Now, IG shoual. I told you ement is thetage that is re

n, not duringe on time, then it is re

m the powercircuit. Nowwhat is kn

s the pulse tr

e this sort ofng but a diffall, this workuring d phi b

g current thrnductor, a smt rising curre

these issuesuld be presethat anode a

e gate elemeequired is ve

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everse biased

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f a wave forferentiator. Sks as a differby, if the d p

rough the demall inductoent. So these

s. Similarly,ent till the aand cathode,

ent, a gate coery small.

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is is one of solate the cotransformer.Why it is a

rm to the priSo, I will getrentiator. Thphi by dt is

evice. r you

e two,

there anode , they ontrol

e very earing letely

those ontrol The pulse

imary t only ere is there

Page 17: power electronics 2

17  

It so happthis regiosaturatedthen, SCReven if I Now, honeed to usharp pulI get 2 shvery lowsharp pulseries of (Refer Sl

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pens that traon there is nd in this regioR requires akeep a broad

w do I addruse the translse here and harp pulses.

w reverse brelse in the populses and u

lide Time: 5

a pulse tranpulses, they d. So, they arTransistor is re flowing th

ctive circuit,t this point,

wing during tsistor is also,has some rer in the colly of this puthe signal. S

ansformer mano d phi by on. So, there

a gate pulse td pulse here

ress this issusformer. Traa negative s

So, that waseak down voositive. So, wuse this circu

1:57)

nsformer, thiare very sm

re reproduceon during thhrough the tr

, current, yoyou have tothis period. S, people connsistance andlective circulses. I told ySo, I am usi

ay get saturadt and there

e is a sharp ptill the curre, at the outpu

ue? I have tansformer issharp pulse as the negativoltage. So, Iwhat is beinuit.

s pulses are mall pulses.

ed in the secohis period anransformer.

u cannot breo provide a pSo, you connnect here. I a

d in addition uit, it all depyou, there wing this diod

ated in this reefore no volpulse here a

ent through thut I get just 2

to provide iss nothing buat the fallinge sharp pulsI have to blg done is in

applied to t

. So, I am ondary, same

nd is off duri

eak the indupath for the nect a transiam not connyou may co

pends on VC

will be negatde to block

egion and if ltage. So, I aand there is athe device is2 sharp plus

solation. Inut a differeng edge. So, ese that shouldlock negativnstead of hav

the base of tassuming the pulses. Seeing this perio

uctive circuitmagnetizing

istor across tnect a resisteonnect some CC, the resisttive spike inthat negativ

f transformerassume that another shar higher thanes.

order to prontiator. Throueven if thered be blocked

ve gate pulseving 1 broad

the transistohat transforme, transformod. When th

t but then whg current thathe inductor

er because I aload resistan

tance of the n the secondve spike. On

rs get saturattransformer

rp pulse heren the latching

ovide isolatiugh a dc, I

e is a broad pd because J3

e and I haved pulse, you

r. These aremer will no

mer is an induhe transistor i

hen you opeat is flowing. See, generaam assumingnce in the emwinding an

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ted in r gets e. But g. So,

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pulse, has a e just have

e very ot get uctive is on,

en the g, that ally a g that mitter nd the alling large

Page 18: power electronics 2

18  

number of series pulses. We require large number of series pulses because if the load is highly inductive, with one pulse thyristor may not turn on. See, there are various types of loads and gating requirement depends strongly on the type of loads. It does not depend only on thyristor. After all, current through the device, is determined by the load. So, gating requirement also varies with the load. So invariably, a high frequency gating pulses are used to trigger the thyristor in general. But then, in our entire analysis, we will assume that 1 sharp pulse will trigger the thyristor. See I will repeat, gating requirement is a strong function of load because anode current is determined by the load and gate pulses should be there till IA is equal to I latching. So invariably, high frequency gate pulses are applied, but then for our analysis, we will assume that a sharp pulse is sufficient to trigger the thyristor. So, with that I conclude today’s lecture. More on this, we will see in our next class. Thank you.