Pipelined Control (Simplified)

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Pipeline Control Computer Organization II 1 Pipelined Control (Simplified)

description

Pipelined Control (Simplified). Control Refresher. Here are the control signals that were previously identified:. Control Signals Grouped by Stages. pass to EX stage. pass to MEM stage. pass to WB stage. Control Signal Forwarding. Control signals derived from instruction opcode, as before:. - PowerPoint PPT Presentation

Transcript of Pipelined Control (Simplified)

Page 1: Pipelined Control (Simplified)

Pipeline Control

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1Pipelined Control (Simplified)

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2Control Refresher

Here are the control signals that were previously identified:

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3Control Signals Grouped by Stages

pass to EX stage

pass to MEM stage

pass to WB stage

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4Control Signal Forwarding

Control signals derived from instruction opcode, as before:

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5Pipelined Control Overview

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6Data Hazards in ALU Instructions

Consider this sequence:sub $2, $1,$3and $12,$2,$5or $13,$6,$2add $14,$2,$2sw $15,100($2)

We can resolve hazards with forwarding, but how do we detect when to forward?

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7Dependencies & Forwarding

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8Detecting the Need to Forward

Pass register numbers along pipeline– e.g., ID/EX.RegisterRs = register number for Rs sitting in ID/EX pipeline register

ALU operand register numbers in EX stage are given by– ID/EX.RegisterRs, ID/EX.RegisterRt

Data hazards when1a. EX/MEM.RegisterRd = ID/EX.RegisterRs1b. EX/MEM.RegisterRd = ID/EX.RegisterRt

2a. MEM/WB.RegisterRd = ID/EX.RegisterRs2b. MEM/WB.RegisterRd = ID/EX.RegisterRt

Fwd fromEX/MEMpipeline reg

Fwd fromMEM/WBpipeline reg

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9Detecting the Need to Forward

But only if forwarding instruction will write to a register!– EX/MEM.RegWrite, MEM/WB.RegWrite

And only if Rd for that instruction is not $zero– EX/MEM.RegisterRd ≠ 0,

MEM/WB.RegisterRd ≠ 0

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10ALU Operand Selection

Value from register fetch in ID stage

Value from WB stage

Value from ALU execution

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11Forwarding Paths

Select source for $rs

Select source for $rt

Must select correct operand sources

$rd # from EX stage

$rd # from MEM stage

register #s from current instruction

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12Conditions for EX Hazard

If ( EX/MEM.RegWrite and

EX/MEM.RegisterRd ≠ 0 and

EX/MEM.RegisterRd = ID/EX.RegisterRs )then

ForwardA = 10

If ( EX/MEM.RegWrite and

EX/MEM.RegisterRd ≠ 0 and EX/MEM.RegisterRd = ID/EX.RegisterRt )

then ForwardB = 10

QTP: could BOTH occur with respect to the same instruction?

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13Conditions for MEM Hazard

If ( MEM/WB.RegWrite and

MEM/WB.RegisterRd ≠ 0 and MEM/WB.RegisterRd = ID/EX.RegisterRs )

then ForwardA = 01

If ( MEM/WB.RegWrite and

MEM/WB.RegisterRd ≠ 0 and MEM/WB.RegisterRd = ID/EX.RegisterRt )

then ForwardB = 01

QTP: could BOTH an EX hazard and a MEM hazard occur with respect to the same instruction?

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14Double Data Hazard

Consider the sequence:add $1,$1,$2add $1,$1,$3add $1,$1,$4

Both hazards occur… which value do we want to forward?

Revise MEM hazard condition:– Only forward if EX hazard condition is not true

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15Revised Conditions for MEM Hazard

If ( MEM/WB.RegWrite and

MEM/WB.RegisterRd ≠ 0 and

not ( EX/MEM.RegWrite and

EX/MEM.RegisterRd ≠ 0 and

EX/MEM.RegisterRd = ID/EX.RegisterRs ) and

MEM/WB.RegisterRd = ID/EX.RegisterRs )

then

ForwardA = 01

If ( MEM/WB.RegWrite and

MEM/WB.RegisterRd ≠ 0 and

not ( EX/MEM.RegWrite and

EX/MEM.RegisterRd ≠ 0 and

EX/MEM.RegisterRd = ID/EX.RegisterRt ) and

MEM/WB.RegisterRd = ID/EX.RegisterRt )

then

ForwardB = 01

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16Datapath with Forwarding