Pesc99 Seminar
Transcript of Pesc99 Seminar
1999 Power Electronics Specialists Conference
Advances in Averaged SwitchModeling and Simulation
Dragan Maksimovic * and Robert EricksonColorado Power Electronics Center
CoPEChttp://ece-www.colorado.edu/~pwrelect
* Acknowledgment: the work by Dragan Maksimovic was supported in part by the National Science FoundationCAREER Award, Grant No. ECS-9703449.
1. Introduction: converter modeling approaches and objectives2. Averaged switch modeling of PWM converters operating in the
continuous conduction mode (CCM)• Basics of averaged switch modeling• Switch network steady-state and small-signal models
• Using averaged-switch model to predict converter steady-statecharacteristics and small-signal dynamics in CCM
• PSpice implementation of the averaged switch model• Application examples: small-signal dynamics,
conduction losses and efficiency of a Sepic converter• Averaged switch modeling exercise: include switching losses
3. Averaged switch modeling of PWM converters operating indiscontinuous conduction mode (DCM)• Averaged switch model in DCM
• Switch network steady-state and small-signal models in DCM• Using averaged-switch model to predict converter steady-state
characteristics and small-signal dynamics in DCM
• Combined CCM/DCM averaged switch model
• PSpice implementation of combined CCM/DCM models• Application examples:
Large-signal transient response of a SEPIC
Flyback converter small-signal frequency responses in CCMand DCM
4. Averaged modeling of PWM converters with current-programmedmode (CPM) control• Averaged switch model in CCM and DCM
• Steady-state and AC models in CCM and DCM• Large-signal averaged CCM/DCM model for CPM controller
• PSpice implementation of the CPM controller model
• Application example: buck converter with CPM controller
5. Single-phase low-harmonic rectifiers• The ideal rectifier
• Averaged models of rectifiers• Application examples:
DCM boost rectifier
SEPIC rectifier with nonlinear-carrier control
6. Summary7. Bibliography
• http://ece-www.colorado.edu/~pwrelect/publicationsseminar slides, collection of simulation examples, library of PSpice
models used in the examples, and many other CoPEC publicationsand presentation materials
• http://ece-www.colorado.edu/~pwrelect/ is the CoPEC home page• http://ece-www.colorado.edu/~pwrelect/book/bookdir.html
is the home page for the Textbook: R.W.Erickson, Fundamentals ofPower Electronics
• Power Electronics courses at the University of Colorado:• Power Electronics 1: http://ece-www.colorado.edu/~ecen5797• Power Electronics 2: http:// ece-www.colorado.edu/~ecen5807• Power Electronics Lab: http:// ece-www.colorado.edu/~ecen4517
• All simulation examples completed using free PSpice evaluationversion available from: http://www.orcad.com
Engineering design based on converter modeling:• Predict converter system behavior, validate models by experiments• Use the model to predict performance under worst-case conditions
• Improve design until worst-case behavior meets specifications
(or until reliability and production yield are acceptably high)
Models:• Circuit models that yield design-oriented, analytical results
• Models for computer simulation
Results of interest:• Steady-state characteristics
• Component stresses, losses, efficiency• Large and small-signal dynamic responses
• Describe basic averaged switch modeling approach
• Develop averaged models forConverters in continuous conduction mode (CCM)
Converters in discontinuous conduction mode (DCM)
Converters with Current-Programmed Mode (CPM) controllerSingle-phase power-factor correctors
• Summarize analytical results for steady-state and dynamic responses
• Demonstrate PSpice implementations of averaged-switch models andcontrollers
• Present application examplesLarge-signal transient responses and small-signal dynamics of DC-DC
converters and single-phase power-factor correctors
!
• Switch network is replaced by averaged circuit model. Switchingharmonics are removed, and low-frequency components of waveformsare modeled in a simple way.
• A very general approach to modeling converter losses, efficiency, anddynamics.
• Yields an intuitive understanding of converter behavior in CCM, DCM,current-programmed mode, etc.
• Applicable to all types of converters: dc-dc converters, as well as dc-acinverters, ac-dc low-harmonic rectifiers, ac-ac matrix converters.
• Well-suited to simulation• Well developed and understood technique, easily taught to students.
• Main reference for the material in this seminar:
R.W.Erickson, Fundamentals of Power Electronics, Chapman andHall, 1997.
Bibliography has a large collection of other selected references
Averaged switch modeling
+–
Switching converter circuit
Switchingnetwork +
–+–
Large-signal averaged circuit model
Averagedswitchmodel
d
+–
+–
DC and small-signal averaged circuit model
D+d
2)/(/)/1(1
/1)(
oo
scoc wswsQ
wsGsG
++−=
1D
2S
3K
4A
5
duty
ccm-dcm1+
-
DC, AC and Transient simulation
Model implementation for simulation
simulationmodel
linearization
Analytical results:steady-state characteristicsand small-signal dynamics
averaging
• Basics of averaged switch modeling• Switch network steady-state and small-signal models• Using averaged-switch model to predict converter steady-state
characteristics and small-signal dynamics in CCM• PSpice implementation of averaged switch models
- ideal switches (ccm1)
- switches with conduction losses (ccm2)- switches in converters with isolation transformer (ccm3)
- switch with conduction losses in converters with (possibly)isolation transformer (ccm4)
• Application example:- SEPIC small-signal frequency response, conduction losses and
efficiency
• Averaged switch modeling exercise: include switching losses
Averaged switch modelingBasic approach
Given a PWM converter operating in continuous conduction mode:
+–
D1L1
C2
+
v
–
Q1
C1
L2RVg
SEPICexample
Separate the switching elements from the remainder of the converter...
Definition of switch network,SEPIC example
+
v1(t)
–
+–
D1
L1
C2
Q1
C1
L2 R
iL1(t)
vg(t)
Switch network
iL2(t)
+ vC1(t) –+
vC2(t)
–
–
v2(t)
+
i1(t) i2(t)
Dutycycle
d(t)
• Define a switchnetwork,containing all ofthe converterswitchingelements.
• The remainder ofthe converter islinear and time-invariant.
• The terminalvoltages andcurrents of theswitch networkcan be arbitrarilydefined.
Switching converter systemwith switch network explicitly defined
+–
Time-invariant networkcontaining converter reactive elements
C L
+ vC(t) –iL(t)
R
+
v(t)
–
vg(t)
Power input Load
Switch network
po
rt 1
po
rt 2
d(t)Controlinput
+
v1(t)
–
+
v2(t)
–
i1(t) i2(t)
Discussion
l The number of ports in the switch network is less than or equalto the number of SPST switches in the converter
l Simple dc-dc case, in which converter contains two SPSTswitches: switch network contains two portsThe switch network terminal waveforms are then the port voltages and
currents: v1(t), i1(t), v2(t), and i2(t).
Two of these waveforms can be taken as independent inputs to theswitch network; the remaining two waveforms are then viewed asdependent outputs of the switch network.
Switch network also includes control input d(t)
l Definition of the switch network terminal quantities is not unique.Different definitions lead equivalent results having differentforms
Several ways to define the PWM switch network,and the corresponding CCM models
+
v2(t)
–
i1(t) i2(t)
+
v1(t)
–
1 : D
D' : 1
+
v2(t)
–
i1(t) i2(t)
+
v1(t)
–
+
v2(t)
–
i1(t) i2(t)
+
v1(t)
–
D' : D
⟨ i1(t) ⟩Ts⟨ i2(t) ⟩Ts
+
⟨ v1(t) ⟩Ts
–
+
⟨ v2(t) ⟩Ts
–
⟨ i1(t) ⟩Ts⟨ i2(t) ⟩Ts
+
⟨ v1(t) ⟩Ts
–
+
⟨ v2(t) ⟩Ts
–
⟨ i1(t) ⟩Ts⟨ i2(t) ⟩Ts
+
⟨ v1(t) ⟩Ts
–
+
⟨ v2(t) ⟩Ts
–
A few pointsregarding averaged switch modeling
• The switch network can be defined arbitrarily, as long as
its terminal voltages and currents are independent, and
the switch network contains no reactive elements.
• It is not necessary that some of the switch network terminal quantities
coincide with inductor currents or capacitor voltages of the converter, or
be nonpulsating.
• The object is simply to write the averaged equations of the switch network;i.e., to express the average values of half of the switch network terminalwaveforms as functions of
the average values of the remaining switch network terminal waveforms,and
the control input.
Terminal waveforms of the switch network
+
v1(t)
–
+–
D1
L1
C2
Q1
C1
L2 R
iL1(t)
vg(t)
Switch network
iL2(t)
+ vC1(t) –+
vC2(t)
–
–
v2(t)
+
i1(t) i2(t)
Dutycycle
d(t)
t
v2(t)
dTs Ts
00
v2(t) T2
0
vC1 + vC2
t
i1(t)
dTs Ts
00
i1(t) T2
0
iL1 + iL2
t
v1(t)
dTs Ts
00
v1(t) Ts
0
vC1 + vC2
t
i2(t)
dTs Ts
00
i2(t) Ts
0
iL1 + iL2
The averaging step
Now average all waveforms over one switching period:
+–
Averaged time-invariant networkcontaining converter reactive elements
C L
+ ⟨vC(t)⟩Ts –
⟨iL(t)⟩Ts
R
+
⟨v(t)⟩Ts
–
⟨vg(t)⟩Ts
Power input Load
Averagedswitch network
po
rt 1
po
rt 2
d(t)Controlinput
+
⟨v2(t)⟩Ts
–
⟨i1(t)⟩Ts⟨i2(t)⟩Ts
+
⟨v1(t)⟩Ts
–
x(t)
Ts= 1
Tsx(t)dt
t
t + Ts
The averaging step
The basic assumption is made that the natural time constants of theconverter are much longer than the switching period, so that theconverter contains low-pass filtering of the switching harmonics:
One may average the waveforms over an interval that is shortcompared to the system natural time constants, withoutsignificantly altering the system response.
In particular, averaging over the switching period Ts removes theswitching harmonics, while preserving the low-frequencycomponents of the waveforms.
This step removes the small but mathematically-complicatedswitching harmonics, leading to a relatively simple and tractableconverter model.
In practice, the only work needed for this step is to average the switchdependent waveforms.
Averaged terminal equationsof the switch network
v1(t) Ts= d'(t) vC1(t) Ts
+ vC2(t) Ts
i1(t) Ts= d(t) iL1(t) Ts
+ iL2(t) Ts
v2(t) Ts= d(t) vC1(t) Ts
+ vC2(t) Ts
i2(t) Ts= d'(t) iL1(t) Ts
+ iL2(t) Ts
(small switching ripple is neglected)
t
v1(t)
dTs Ts
00
v1(t) Ts
0
vC1 + vC2
t
v2(t)
dTs Ts
00
v2(t) T2
0
vC1 + vC2
t
i1(t)
dTs Ts
00
i1(t) T2
0
iL1 + iL2
t
i2(t)
dTs Ts
00
i2(t) Ts
0
iL1 + iL2
Derivation of switch network equations(Algebra steps)
iL1(t) Ts+ iL2(t) Ts
=i1(t) Ts
d(t)
vC1(t) Ts+ vC2(t) Ts
=v2(t) Ts
d(t)
We can write
Hence
v1(t) Ts=
d'(t)d(t)
v2(t) Ts
i2(t) Ts=
d'(t)d(t)
i1(t) Ts
+–
–
⟨v2(t)⟩Ts
+
⟨i1(t)⟩Ts
Averaged switch network
+
⟨v1(t)⟩Ts
– ⟨i2(t)⟩Ts
d'(t)d(t)
v2(t) Ts
d'(t)d(t)
i1(t) Ts
Result
Modeling the switch network viaaveraged dependent sources
Steady-state switch model:Dc transformer model
D' : DI1
I2
+
V1
–
–
V2
+
+
v1(t)
– D1Q1
Switch network
–
v2(t)
+
i1(t) i2(t)
Dutycycle
d(t)
Original switch network
Averaged steady-state model:“DC transformer”
• Correctly represents therelationships between the dcand low-frequencycomponents of the terminalwaveforms of the switchnetwork
Steady-state CCM SEPIC model
Replace switch network with dc transformer model
+–
L1
C2
C1
L2 R
IL1
Vg
IL2
+ VC1 –+
VC2
–
D' : DI1
I2
+
V1
–
–
V2
+
• Can now let inductorsbecome short circuits,capacitors become opencircuits, and solve for dcconditions.
• Can simulate this modelusing PSPICE, to findtransient waveforms
Modeling converter dynamics:Small-signal linearization of model
Perturb and linearize the switchnetwork averaged waveformsabout a quiescent operatingpoint. Let:
d(t) = D + d(t)
v1(t) Ts= V1 + v1(t)
i1(t) Ts= I1 + i1(t)
v2(t) Ts= V2 + v2(t)
i2(t) Ts= I2 + i2(t)
Voltage equation becomes
D + d V1 + v1 = D' – d V2 + v2
Eliminate nonlinear termsand solve for v1 terms:
V1 + v1 = D'D V2 + v2 – d
V1 + V2
D
= D'D
V2 + v2 – dV1
DD'
Linearization, continued
D + d I2 + i2 = D' – d I1 + i1
Current equation becomes
Eliminate nonlinear termsand solve for i2 terms:
I2 + i2 = D'D I1 + i1 – d
I1 + I2
D
= D'D I1 + i1 – d
I2
DD'
Switch network:Small-signal ac model
+– D' : DI1 + i1
I2 + i2
I2
DD'dV1 + v1
V1
DD'd
V2 + v2
+
–
–
+
Reconstruct an equivalent circuit that corresponds to these small-signal equations:
A general small-signal ac model for the PWM switch networkoperating in CCM.
Transistor port Diode port
Small-signal ac modelof the CCM SEPIC
+–
L1
C2
C1
L2 R
+– D' : D
I2
DD'd
V1
DD'd
Vg + vg
IL1 + i L1
IL2 + i L2
VC1 + vC1
VC2 + vC2
+
–
Replace switch network with small-signal ac model:
Can now solve thismodel to determine actransfer functions
Small-signal modelsof several basic switch networks
+
v2(t)
–
i1(t) i2(t)
+
v1(t)
–
+–1 : DI1 + i1 I2 + i2
I2 dV1 + v1
V1 d
V2 + v2
+
–
+
–
+– D' : 1I1 + i1 I2 + i2
I1 dV1 + v1
V2 d
V2 + v2
+
–
+
–
+
v2(t)
–
i1(t) i2(t)
+
v1(t)
–
+
v2(t)
–
i1(t) i2(t)
+
v1(t)
–
+– D' : DI1 + i1 I2 + i2
I2
DD'dV1 + v1
V1
DD'd
V2 + v2
+
–
+
–
Table of resultsTransfer functions of the basic buck, boost, and buck-boost converters
Converter Gg0 Gd0 ω0 Q ωz
buck D VD
1LC
R CL ∞
boost 1D'
VD'
D'LC
D'R CL
D'2RL
buck-boost – DD'
VD D'2
D'LC
D'R CL
D'2 RD L
where the transfer functions are written in the standard forms
Gvd(s) = Gd0
1 – sωz
1 + sQω0
+ sω0
2
Gvg(s) = Gg01
1 + sQω0
+ sω0
2
Control-to-output and line-to-output transfer functions Gvd(s) and Gvg(s)
ccm1
averagingswitch
network1
2
3
4
D
S
K
A
+
_
v1(t)
+
_
v2(t)
i1(t) i2(t)
+–
1
2
3
4
D
S
K
A
Et Gd
5
duty
averaged-switchmodel
(sub-circuit)
d
1-dd
v21-dd
i1
+
_
v2
+
_
v1
i2i1
• Controlled voltage source Et replaces the transistor, controlledcurrent source Gd replaces the diode
• Duty ratio d is input to the subcircuit
• Large-signal, nonlinear model suitable for DC, AC or Transientsimulation
• The same model can be applied in any two-switch PWM converter(the transistor and the diode need not have a common node)
• Limitations: ideal switches, CCM only, valid for two-switchconverters without isolation transformer
CCM Averaged-Switch ModelPSpice Implementation: ccm1
*********************************************************** MODEL: ccm1* Application: two-switch PWM converters* Limitations: ideal switches, CCM only, no transformer*********************************************************** Parameters: none*********************************************************** Nodes:* 1: transistor+ (D)* 2: transistor- (S)* 3: diode cathode (K)* 4: diode anode (A)* 5: duty ratio (duty)**********************************************************.subckt ccm1 1 2 3 4 5Et 1 2 value=(1-v(5))*v(3,4)/v(5)Gd 4 3 value=(1-v(5))*i(Et)/v(5).ends**********************************************************
+–
1
2
3
4
D
S
K
A
Et Gd
5
duty
averaged-switchnetwork
(sub-circuit)
1D
2S
3K
4A
5
duty
ccm1
U1
Sepic converter exampleusing ccm1 model
Objective: generate small-signal control-to-output frequency responses
800u
L1
0.1R2
100uL2
C1
100u
100u
C2
R1
0.5
+
-
ACMAG=1V VdDC=0.5V
50R3
1D
2S
3K
4A
5
duty
U1
ccm1
+
-50V
Vg
V
2x1
2 3 4
sepic-ccm1.sch
ccm1
(A) sepic-ccm1.dat
10Hz 100Hz 1.0KHz 10KHz 100KHzFrequencyP(V(4))
0d
-100d
-200d
-270d
phase of vout/d
small-signal control-to-output responseVout=50V, R=50, D=0.5
DB(V(4))
80
40
0
-20
magnitude || vout/d ||
• Subcircuit ccm1 is implementation of a large-signal, nonlinearaveraged model of the switch network
• Averaged circuit model of the converter is obtained simply by replacingswitching devices with the averaged-switch subcircuit model
• Linearization and AC small-signal analysis are performed by thesimulator
• Small-signal dynamic responses can be easily generated for differentoperating points or different sets of parameter values
• MOS transistor model: on-resistance RON
• Diode model: constant forward voltage drop VD in series with Rd resistance
• Switch network switchnetwork
1
2
3
4
D
S
K
A
+
_
v1(t)
+
_
v2(t)
i1(t) i2(t)
• Waveforms
0 dTs Tst
v1(t)
0 dTs Tst
i1(t)
Ron i
iv+VD+Rd i
0 dTs Tst
v2(t)
0 dTs Tst
i2(t)
i
-VD-Rd i
v-Ron i
ccm2
0 dTs Tst
v1(t)
0 dTs Tst
i1(t)
Ron i
iv+VD+Rd i
0 dTs Tst
v2(t)
0 dTs Tst
i2(t)
i
-VD-Rd i
v-Ron i
ss TTidi =1
ss TTidi )1(2 −=
ss TTi
d
di 12
1−=
( )( )iRVvdidRv dDTTonT sss++−+= 11
sss TTTvvv =+ 21
( ) ( )DT
TdTon
TVv
d
d
d
iRd
d
iRv
s
ss
s+−+
−+= 12
11
1
11
CCM Averaged-Switch ModelPSpice Implementation: ccm2
*********************************************************** MODEL: ccm2* Application: two-switch PWM converters, includes * conduction losses due to Ron, VD, Rd* Limitations: CCM only, no transformer*********************************************************** Parameters:* Ron=transistor on resistance* VD=diode forward voltage drop (constant)* Rd=diode on resistance*********************************************************** Nodes: (same as in ccm1)**********************************************************.subckt ccm2 1 2 3 4 5+params: Ron=0 VD=0 Rd=0Eron 1 1x value=i(Et)*(Ron+(1-v(5))*Rd/v(5))/v(5)Et 1x 2 value=(1-v(5))*(v(3,4)+VD)/v(5)Gd 4 3 value=(1-v(5))*i(Et)/v(5).ends**********************************************************
Subcircuit implementation
+–
1
2
3
4
D
S
K
A
Et
Gd
5
duty
averaged-switchsub-circuit
+–
Eron
1D
2S
3K
4A
5
duty
ccm2
U2
Sepic converter example using ccm2 model
Objective: find converter efficiency as a function of the transistoron-resistance, for a range of loads
800u
L1
0.1R2
100uL2
C1
100u
100u
C2
R1
0.5
+
-50V
Vg
+
-DC=0.5V Vd
+
-
Iload1A
10KR4
1D
2S
3K
4A
5du
ty VD=0.8V
ccm2
Rd=0.05
U1
Ron=RonPARAMETERS:Ron 0.0
V
2x1
32 4
ccm2
(D) sepic-ccm2.dat
1.0A 1.5A 2.0A 2.5A 3.0A 3.5A 4.0A 4.5A 5.0AI_Iload
-100*V(4)* I(Iload)/ V(1)/ I(Vg)
100
95
90
85
80
Efficiency [%] (only conduction losses are included)
Ron=0
Ron=0.5
0.1
0.2
0.3
0.4
ccm3 ! "
Switch network Waveforms
0 dTs Tst
v1(t)
0 dTs Tst
i1(t)
iv
0 dTs Tst
v2(t)
0 dTs Tst
i2(t)
i/nn v
switchnetwork
1
2
3
4
D
S
K
A
+
_
v1(t)
+
_
v2(t)
i1(t) i2(t)
1:n
PRIMARY SECONDARY
• Converters: Flyback, Cuk, Sepic, Inverse Sepic (Zeta), with isolation transformer
ss TTi
nd
di 12
1−=ss TT
vnd
dv 21
1−=
CCM Averaged-Switch ModelPSpice Implementation: ccm3
*********************************************************** MODEL: ccm3* Application: two-switch PWM converters, * with (possibly) transformer* Limitations: ideal switches, CCM only*********************************************************** Parameters:* n=transformer turns ratio 1:n (primary:secondary)*********************************************************** Nodes: (same as in ccm1)**********************************************************.subckt ccm3 1 2 3 4 5+params: n=1Et 1 2 value=(1-v(5))*v(3,4)/v(5)/nGd 4 3 value=(1-v(5))*i(Et)/v(5)/n.ends**********************************************************
+–
1
2
3
4
D
S
K
A
Et Gd
5
duty
averaged-switchnetwork
(sub-circuit)
1D
2S
3K
4A
5
duty
ccm3
U3
ccm4
• Combined ccm2 and ccm3 averaged-switch models
• Parameters:
• Transistor on resistance Ron
• Diode forward voltage drop VD
• Diode on resistance Rd
• Transformer turns ratio n
• A general model implementation valid for all two-switch convertersoperating in CCM
CCM Averaged-Switch ModelPSpice Implementation: ccm4
* MODEL: ccm4* Application: two-switch PWM converters, includes * conduction losses due to Ron, VD, Rd* and (possibly) transformer* Limitations: CCM only*********************************************************** Parameters:* Ron=transistor on resistance* VD=diode forward voltage drop (constant)* Rd=diode on resistance* n=transformer turns ratio 1:n (primary:secondary)*********************************************************** Nodes: (same as in ccm1)**********************************************************.subckt ccm4 1 2 3 4 5+params: Ron=0 VD=0 Rd=0 n=1Eron 1 1x value=i(Et)*(Ron+(1-v(5))*Rd/n/n/v(5))/v(5)Et 1x 2 value=(1-v(5))*(v(3,4)+VD)/v(5)/nGd 4 3 value=(1-v(5))*i(Et)/v(5)/n.ends
Subcircuit implementation
+–
1
2
3
4
D
S
K
A
Et
Gd
5
duty
averaged-switchsub-circuit
+–
Eron
1D
2S
3K
4A
5
duty
U4
ccm4
!"
• Use averaged-switch modeling approach to construct anaveraged model that includes switching losses
• Loss mechanism example: diode reverse recovery
Modeling switching loss
Example: diode storedcharge in boost converter
+
v2(t)
–
i1(t) i2(t)
+
v1(t)
–
+–
L
C Rvg(t)
iL(t)
+
v(t)
–
t
Ts
v1(t)
0
t r
dTs
t
0
i1
i2(t)
0
v2
v2
0
i1
Area –Qr
• Other switching loss mechanismsare ignored in this example; onecan include other losses ifdesired, using a similar procedure
• Determine averaged terminalwaveforms of switch network
• Construct averaged equivalentcircuit model
Waveforms:
Expressions for average terminal waveformsBoost converter, switching loss example
t
Ts
v1(t)
0
tr
dTs
t
0
i1
i 2(t)
0
v2 v2
0
i1
Area –Qr
tr = diode reverse recovery time
Qr = diode recovered charge
( ) ( )( ) ( )ss Trs
sT
tvtTdT
tv 21 11 +−=
( ) ( ) ( )s
rTT T
Qtidti
ss−−= 12 1
Averaged equivalent circuitof switch network
• Diode reverse recovery time affects conversion ratio
• Stored charge leads to power loss, modeled by current sink
( ) ( )ss T
s
rT
tvT
tdtv 21 1
+−=
( ) ( )( )
+−
+−=
s
Trr
Ts
rT T
titQti
T
tdti s
ss
1
12 1
+
_
+
_
+
_
+
_
switch networkaveraged switch model
( )tv1
( )ti1 ( )ti2
( )tv2( )
sTtv1
( )sT
ti1 ( )sT
ti2
( )sT
tv2
1:1
+−
s
r
T
td
s
Trr
T
itQs
1+
Insert averaged switch model into converter circuit
Originalconverter
Averagedmodel
+
v2(t)
–
i1(t) i2(t)
+
v1(t)
–
+–
L
C Rvg(t)
iL(t)
+
v(t)
–
+–
L
C R
⟨ i1(t) ⟩Ts⟨ i2(t) ⟩Ts
+
⟨ v1(t) ⟩Ts
–
+
⟨ v2(t) ⟩Ts
–
tr
Ts+ (1 – d) : 1
Qr
Ts
+
⟨ v(t) ⟩Ts
–
⟨ iL(t) ⟩Ts
⟨ vg(t) ⟩Ts
Efficiency Analysis Boost converter, switching loss example
1
2
IV
VI
P
P
gin
out ==η
D
T
QI
I s
r
−
+=
1
2
1 DT
t
VV
s
r
g
−+=
1
( )
+
−+
=
+
+−
−==
sload
r
s
r
s
r
s
rg
TI
Q
TD
t
T
QI
I
T
tD
D
IV
VI
1
1
11
1
1
1
2
2
1
2η
Efficiency due to diode reverse recovery. Other switching loss mechanismscan be included using a similar procedure.
$%
• Basic idea of average-switch modeling:
Define a switch network, containing all of the converter switchingelements
Average terminal waveforms over a switching periodUse controlled sources with values equal to average of the switch
network terminal waveforms
The result is a large-signal, nonlinear, time-invariant model that can beinserted back into the converter network
• The choices of the switch network and the independent terminalwaveforms are not unique - there are many ways to construct averagedswitch models
• Averaged-switch model (suitable for circuit analysis or simulation)yields predictions of converter steady-state and low-frequency dynamicproperties
• Next: apply the averaged-switch modeling approach to other cases ofinterest.
• Averaged switch model in DCM• Using averaged-switch model to predict converter steady-state
characteristics and small-signal dynamics in DCM• Combined CCM/DCM averaged switch model• PSpice implementation of combined CCM/DCM models
- ideal switches (ccm-dcm1)
- ideal switches in converters with isolation transformer (ccm-dcm2)
• Application examples:- comparison of transient simulation results in a SEPIC example
using (1) switching circuit model and (2) averaged model
- small-signal dynamic responses of a flyback converter operating inCCM or DCM
- more converter examples using averaged-switch subcircuits
Change in characteristics at the CCM/DCM boundary
l Steady-state output voltage becomes strongly load-dependentl Simpler dynamics: one pole and the RHP zero are moved to very high
frequency, and can normally be ignored
l Traditionally, boost and buck-boost converters are designed to operatein DCM at full load
l All converters may operate in DCM at light load
So we need equivalent circuits that model the steady-state and small-signal ac models of converters operating in DCM
The averaged switch approach yields an intuitive result that is relativelyeasy to solve
Derivation of DCM averaged switch modelBuck-boost example
+–
L
C R
+
v
–
vg
iL
+vL–
Switch network
+
v1
–
–
v2
+
i1 i2• Define switch terminalquantities v1, i1, v2, i2, asshown
• Let us find the averagedquantities ⟨ v1 ⟩, ⟨ i1 ⟩ , ⟨ v2 ⟩, ⟨i2 ⟩, for operation in DCM,and determine therelations between them
d1Ts
Ts
t
i1(t)ipkArea q1
i1(t) Ts
v1(t)
0
vg – v
v1(t) Tsvg
i2(t)ipk Area q2
v2(t)
0
vg – v
– v
i2(t) Ts
v2(t) Ts
d2Ts d3Ts
DCM waveforms
t
iL(t)
0
ipk
vg
L
vL
vL(t) vg
v
0
+–
L
C R
+
v
–
vg
iL
+vL–
Switch network
+
v1
–
–
v2
+
i1 i2
Basic DCM equations
d1Ts
Ts
t
i1(t)ipkArea q1
i1(t) Ts
v1(t)
0
vg – v
v1(t) Tsvg
i2(t)ipk Area q2
v2(t)
0
vg – v
– v
i2(t) Ts
v2(t) Ts
d2Ts d3Ts
ipk =vg
Ld1Ts
vL(t) Ts= d1 vg(t) Ts
+ d2 v(t)Ts
+ d3 ⋅ 0
Peak inductor current:
Average inductor voltage:
In DCM, the diode switches off when theinductor current reaches zero. Hence, i(0)= i(Ts) = 0, and the average inductorvoltage is zero. This is true even duringtransients.
vL(t) Ts= d1(t) vg(t) Ts
+ d2(t) v(t)Ts
= 0
Solve for d2:
d2(t) = – d1(t)vg(t) Ts
v(t)Ts
Average switch network terminal voltages
d1Ts
Ts
t
i1(t)ipkArea q1
i1(t) Ts
v1(t)
0
vg – v
v1(t) Tsvg
i2(t)ipk Area q2
v2(t)
0
vg – v
– v
i2(t) Ts
v2(t) Ts
d2Ts d3Ts
Average the v1(t) waveform:
v1(t) Ts= d1(t) ⋅ 0 + d2(t) vg(t) Ts
– v(t)Ts
+ d3(t) vg(t) Ts
Eliminate d2 and d3:
v1(t) Ts= vg(t) Ts
Similar analysis for v2(t) waveform leads to
v2(t) Ts= d1(t) vg(t) Ts
– v(t)Ts
+ d2(t) ⋅ 0 + d3(t) – v(t)Ts
= – v(t)Ts
Average switch network terminal currents
d1Ts
Ts
t
i1(t)ipkArea q1
i1(t) Ts
v1(t)
0
vg – v
v1(t) Tsvg
i2(t)ipk Area q2
v2(t)
0
vg – v
– v
i2(t) Ts
v2(t) Ts
d2Ts d3Ts
Average the i1(t) waveform:
Eliminate ipk:
Note ⟨ i1(t)⟩Ts is not equal to d ⟨ iL(t)⟩Ts !
Similar analysis for i2(t) waveform leads to
i1(t) Ts= 1
Tsi1(t)dt
t
t + Ts
=q1
Ts
The integral q1 is the area under the i1(t)waveform during first subinterval. Use trianglearea formula:
q1 = i1(t)dtt
t + Ts
= 12
d1Ts ipk
i1(t) Ts=
d 12(t) Ts
2Lv1(t) Ts
i2(t) Ts=
d 12(t) Ts
2L
v1(t) Ts
2
v2(t) Ts
Input port: Averaged equivalent circuit
i1(t) Ts=
d 12(t) Ts
2Lv1(t) Ts
i1(t) Ts=
v1(t) Ts
Re(d1)
Re(d1) = 2Ld 1
2 Ts
v1(t) Ts
i1(t) Ts
Re(d1)
+
–
Low-frequency components of input port waveformsobey Ohm’s law
Output port: Averaged equivalent circuit
i2(t) Ts=
d 12(t) Ts
2L
v1(t) Ts
2
v2(t) Ts
i2(t) Tsv2(t) Ts
=v1(t) Ts
2
Re(d1)= p(t)
Ts
p(t)
+
v(t)
–
i(t)
• Output port is a source of power p(t)
• Power p(t) is independent of load characteristics
• Power p(t) is dependent on (equal to) the power apparentlyconsumed by the switch network input port
The dependent power source
p(t)
+
v(t)
–
i(t)
v(t)i(t) = p(t)
v(t)
i(t)
• Must avoid open- and short-circuitconnections of power sources
• Power sink: negative p(t)
How the power source arisesin lossless two-port networks
In a lossless two-port network without internal energy storage:instantaneous input power is equal to instantaneous output power
In all but a small number of special cases, the instantaneous powerthroughput is dependent on the applied external source and load
If the instantaneous power depends only on the external elementsconnected to one port, then the power is not dependent on thecharacteristics of the elements connected to the other port. The otherport becomes a source of power, equal to the power flowing throughthe first port
A power source (or power sink) element is obtained
Properties of power sources
P1
P2 P3
P1 + P2 + P3
P1P1
n1 : n2
Series and parallelconnection of powersources
Reflection of powersource through atransformer
The loss-free resistor (LFR)
i2(t) Ts
+
–
v2(t) Tsv1(t) Ts
i1(t) Ts
Re(d1)
+
–
p(t)Ts
A two-port lossless network
Input port obeys Ohm’s Law
Power entering input port is transferred to output port
Averaged switch model: buck-boost example
+–
L
C R
+
v
–
vg
iL
+vL–
Switch network
+
v1
–
–
v2
+
i1 i2
i2(t) Ts
v2(t) Tsv1(t) Ts
i1(t) Ts
Re(d)
+–
L
C R
+
–
+
–
–
+ v(t)Ts
vg(t) Ts
p(t)Ts
Original circuit
Averaged model
Solution of averaged model: steady state
P
Re(D)+– R
+
V
–
Vg
I1Let
L → short circuit
C → open circuit
Converter input power:
Converter output power:
Equate and solve:P =
V g2
Re
P = V 2
R
P =V g
2
Re= V 2
R
VVg
= ± RRe
Steady-state LFR solution
VVg
= ± RRe
is a general result, for any system that canbe modeled as an LFR.
For the buck-boost converter, we have
Re(D) = 2LD2Ts
Eliminate Re:
VVg
= –D2TsR
2L= – D
K
which agrees with the results of previous steady-state analyses.
Averaged models of other DCM converters
• Determine averaged terminal waveforms of switch network
• In each case, averaged transistor waveforms obey Ohm’s law, whileaveraged diode waveforms behave as dependent power source
• Can simply replace transistor and diode with the averagedmodel as follows:
i2(t) Ts
+
–
v2(t) Tsv1(t) Ts
i1(t) Ts
Re(d1)
+
–
+
v2(t)
–
+
v1(t)
–
i1(t) i2(t)p(t)
Ts
DCM buck, boost
Re(d)
+–
L
C R
+
–
v(t)Ts
vg(t) Ts
Re(d)+–
L
C R
+
–
v(t)Ts
vg(t) Ts
Buck
Boost
p(t)Ts
p(t)Ts
Re = 2Ld 2Ts
DCM Cuk, SEPIC
Cuk
+–
L1
C2 R
C1 L2
vg(t) Ts
+
–
v(t)TsRe(d)
+–
L1
C2 R
C1
L2vg(t) Ts
+
–
v(t)TsRe(d)
SEPIC
p(t)Ts
p(t)Ts
Re =2 L1||L2
d 2Ts
Steady-state solution: DCM buck, boost
P
Re(D)
+– R
+
V
–
Vg
PRe(D)+– R
+
V
–
Vg
Let L → short circuit
C → open circuit
Buck
Boost
Steady-state solution of DCM/LFR models
Converter M, CCM M, DCM
Buck D 21 + 1 + 4Re/R
Boost 11 – D 1 + 1 + 4R/Re
2
Buck-boost, Cuk – D1 – D
– RRe
SEPIC D1 – D
RRe
I > Icrit for CCMI < Icrit for DCM
Icrit = 1 – DD
Vg
Re(D)
Small-signal ac modeling of the DCM switch network
d(t) = D + d(t)
v1(t) Ts= V1 + v1(t)
i1(t) Ts= I1 + i1(t)
v2(t) Ts= V2 + v2(t)
i2(t) Ts= I2 + i2(t)
i2(t) Ts
+
–
v2(t) Tsv1(t) Ts
i1(t) Ts
Re(d)
+
–
p(t)Ts
d(t)
Large-signal averaged model Perturb and linearize: let
i1(t) Ts=
d 12(t) Ts
2Lv1(t) Ts
i2(t) Ts=
d 12(t) Ts
2L
v1(t) Ts
2
v2(t) Ts
i1 =v1r1
+ j1d + g1v2
i2 = –v2r2
+ j2d + g2v1
A more convenient way to model the buck and boostsmall-signal DCM switch networks
+
v2(t)
–
i1(t) i2(t)
+
v1(t)
–
+
v2(t)
–
i1(t) i2(t)
+
v1(t)
–
+
–
+
–
v1 r1 j1d g1v2
i1
g2v1 j2d r2
i2
v2
In any event, a small-signal two-port model is used, of the form
Small-signal DCM switch model parameters
–
+
+–v1 r1 j1d g1v2
i1
g2v1 j2d r2
i2
v2
Switch type g1 j1 r1 g2 j2 r2
Buck,Fig. 10.16(a)
1Re 2(1 – M)V1
DRe
Re 2 – MMRe
2(1 – M)V1
DMRe M 2Re
Boost,Fig. 10.16(b)
1(M – 1)2 Re
2MV1
D(M – 1)Re
(M – 1)2
MRe
2M – 1(M – 1)2 Re
2V1
D(M – 1)Re
(M – 1)2Re
Buck-boost,Fig. 10.7(b)
0 2V1
DRe
Re 2M
Re 2V1
DMRe
M 2Re
DCM small-signal transfer functions
l When expressed in terms of R, L, C, and M (not D), the small-signal transfer functions are the same in DCM as in CCM
l Hence, DCM boost and buck-boost converters exhibit two polesand one RHP zero in control-to-output transfer functions
l But , value of L is small in DCM. Hence
RHP zero appears at high frequency, usually greater thanswitching frequency
Pole due to inductor dynamics appears at high frequency, nearto or greater than switching frequency
So DCM buck, boost, and buck-boost converters exhibitessentially a single-pole response
l A simple approximation: let L → 0
The simple approximation L → 0
Buck, boost, and buck-boost converter models all reduce to
+
–
+– r1 j1d g1v2 g2v1 j2d r2 C R
DCM switch network small-signal ac model
vg v
Transfer functions
Gvd(s) =v
dvg = 0
=Gd0
1 + sωp
Gd0 = j2 R || r2
ωp = 1R || r2 C
Gvg(s) =v
vg d = 0
=Gg0
1 + sωp
Gg0 = g2 R || r2 = M
withcontrol-to-output
line-to-output
Transfer function salient features
Converter Gd0 Gg0 ωp
Buck 2VD
1 – M2 – M M 2 – M
(1 – M)RC
Boost 2VD
M – 12M – 1 M 2M – 1
(M– 1)RC
Buck-boost VD M 2
RC
R = 12 Ω
L = 5 µH
C = 470 µF
fs = 100 kHz
The output voltage is regulated to be V = 36 V. It is desired to determine Gvd(s) at the
operating point where the load current is I = 3 A and the dc input voltage is Vg = 24 V.
DCM boost exampleControl-to-output transfer function Gvd(s)
+– Q1
L
C R
+
v(t)
–
D1
Vg
i(t)
+ vL(t) –
iD(t)
iC(t)
Evaluate simple model parameters
P = I V – Vg = 3 A 36 V – 24 V = 36 W
Re =V g
2
P=
(24 V)2
36 W= 16 Ω
D = 2LReTs
=2(5 µH)
(16 Ω)(10 µs)= 0.25
Gd0 = 2VD
M – 12M – 1
=2(36 V)(0.25)
(36 V)(24 V)
– 1
2(36 V)(24 V)
– 1
= 72 V ⇒ 37 dBV
fp =ωp
2π = 2M – 12π (M– 1)RC
=
2(36 V)(24 V)
– 1
2π (36 V)(24 V)
– 1 (12 Ω)(470 µF)= 112 Hz
Control-to-output transfer function, boost example
–20 dB/decade
fp112 Hz
Gd0 ⇒ 37 dBV
f
0˚0˚
–90˚
–180˚
–270˚
|| Gvd ||
|| Gvd || ∠ Gvd
0 dBV
–20 dBV
–40 dBV
20 dBV
40 dBV
60 dBV
∠ Gvd
10 Hz 100 Hz 1 kHz 10 kHz 100 kHz
!"
• Observed high-frequency response due to inductor dynamics
• Averaged-switch model derivation used:
0=sTLv
which is consistent with the fact that in DCM the inductor current startsfrom zero and ends at zero in each switching cycle, even in transients
• However, high-frequency dynamics due to the inductor indicates thatthe AC voltage across the inductor in the small-signal model is not zero
• Model predictions at high frequencies are not quite correct• Corrected averaged models that include the inductor in the averaged
switch model have recently been describedSee References: [Sun et. al. PESC’99], [Ben-Yaakov et.al. PESC’94]
Objective: a general large-signal averaged-switch model
• Valid in CCM and DCM
• 5 terminals:
transistor port (2 terminals)
diode port (2 terminals)
duty ratio input (1 terminal)
• DCM/CCM boundary resolved within the model, based only on theterminal voltages/currents of the model
• Spice compatible
v1(t)
d
+
v1
1
2
3
45
dutyd
+
_
v2
_
i2i1
Re(d)p(t)
switchnetwork
1
2
3
4
+
_
+
_
v2(t)
i1(t) i2(t)
1
2
3
45
dutyd
+
_
v2
_
i2i1
averaged-switchmodel
CCM
+–
1
2
3
4
Et Gd
5
duty
1-dd
v21-dd
i1
+
_
v2
+
_
v1
i2i1
?
averaged-switchmodel
DCM
averaged-switchmodel
CCM/DCM
3
4
K
A
Et Gd
5
duty
averaged-switchmodel
CCM/DCM
d
1-uu
i1
+
_
v2
i2
+–
1
2
D
S
1-uu
v2
+
_
v1
i1
+
=DCM
v
iLfd
d
CCMd
u
s
,2
,
2
12
2
CCM/DCM boundary:
+=
2
12
2
2,
vi
Lfd
ddMAXu
s
u = equivalent switch duty ratio
CCM/DCM Averaged-Switch ModelPSpice Implementation: ccm-dcm1
*************************************************************************************** MODEL: ccm-dcm1* Application: two-switch PWM converters, CCM or DCM* Limitations: ideal switches, no transformer*************************************************************************************** Parameters:* L=equivalent inductance (relevant for DCM)* fs=switching frequency*************************************************************************************** Nodes: (same as in ccm1)**************************************************************************************.subckt ccm-dcm1 1 2 3 4 5 params: L=1 fs=1E6Et 1 2 value=(1-v(u))*v(3,4)/v(u)Gd 4 3 value=(1-v(u))*i(Et)/v(u)Ga 0 a value=MAX(i(Et),0)Va a bRdummy b 0 10Eu u 0 table MAX(v(5), v(5)*v(5)/(v(5)*v(5)+2*L*fs*i(Va)/v(3,4))) (0 0) (1 1).ends**************************************************************************************
+
=DCM
v
inLfd
d
CCMd
u
s
,2
,
2
12
2
CCM/DCM boundary:
+=
2
12
2
2,
vi
nLfd
ddMAXu
s
u = equivalent switch duty ratio
3
4
K
A
Et Gd
5
duty
averaged-switchmodel
CCM/DCM
d
1-u i1
+
_
v2
i2
+–
1
2
D
S
1-u v2
+
_
v1
i1
n u n u
CCM/DCM Averaged-Switch ModelPSpice Implementation: ccm-dcm2
* MODEL: ccm-dcm2* Application: two-switch PWM converters, CCM or DCM with (possibly) transformer* Limitations: ideal switches, no transformer***************************************************************************************** Parameters:* L=equivalent inductance (relevant for DCM), referred to primary* fs=switching frequency* n=transformer turns ratio 1:n (primary:secondary)***************************************************************************************** Nodes: (same as in ccm1)****************************************************************************************.subckt ccm-dcm2 1 2 3 4 5 params: L=1 fs=1E6 n=1Et 1 2 value=(1-v(u))*v(3,4)/v(u)/nGd 4 3 value=(1-v(u))*i(Et)/v(u)/nGa 0 a value=MAX(i(Et),0)Va a bRdummy b 0 10Eu u 0 table MAX(v(5), v(5)*v(5)/(v(5)*v(5)+2*L*n*fs*i(Va)/v(3,4))) (0 0) (1 1).ends****************************************************************************************
• ccm-dcm1 (for non-isolated converters) and ccm-dcm2 (for convertersthat may include isolation transformer) are general, large-signalaveraged-switch models (PSpice subcircuits) valid for both CCM andDCM
• Can be applied to DC, AC, or Transient simulation of any two-switchPWM converter
• Limitations: ideal switches, no losses are modeled, but the model canbe refined further to include conduction losses
• Application examples:• Comparison of Transient simulation results in a Sepic converter
example using:
– (1) switching circuit model– (2) ccm-dcm2 averaged switch model
• AC simulation results for a flyback converter operating in CCM orDCM
Sepic converter example:switching circuit model
Switching frequency 100kHz, duty ratio D=0.5
100uL4
100u
C4
0.5
R6
800u
L3
MUR820
D1IRF640
M1
100R5
100u
C3
0.1R4Resr3
0.2
+-
+
-
S2
switch
R1120
R710
+
-
V4
+
-
V3
+
-
Vg2
50V
V
242322
21
22x
Sepic converter example:averaged model using ccm-dcm2
Exactly the same PSpice circuit, except the MOSFET M1 and thediode D1 replaced by the ccm-dcm2 subcircuit, and pulsatinggate drive V3 replaced by a duty-ratio voltage source Vd
800u
L1
100uL2
+
-
ACMAG=1V VdDC=0.5V
100u
C2
0.5
R1
100R3
C1
100u0.1R2Resr1
0.2
1D
2S
3K
4A
5
duty
ccm-dcm2
U6
R10
20
+
-
V4+-
+
-
S1
switch
+
-
Vg
50V
V
2x1
2 3 4
(B) sepic-switch.dat
0s 5ms 10ms 15ms 20msTimeV(24) V(4)
80V
60V
40V
20V
0V
Averaged model
Switching model
Vout
start-up transient load transient
Start-up and load transient response
(B) sepic-switch.dat
10.0ms 10.2ms 10.4ms 10.6ms 10.8ms 11.0ms 11.2ms 11.4msTimeI(D1) I(X_U6.Gd)
10A
8A
6A
4A
2A
0A
-2A
Diode current during load transient
switching model
averaged model
Details of the diode current waveform around the load transient
Flyback converter exampleusing ccm-dcm2 averaged-switch model
CCM for Rload=1 Ohm, DCM for Rload=2 Ohm
+
-0.25 VdAC=1
500uFC1
+
-48VVg
0.2R2
* *1:n
Lm
2
3
4
1Lm=50u
n=0.25
transformer
T1
1D
2S
3K
4A
5du
tyn=0.25
ccm-dcm2
U1
L=50ufs=100K
PARAMETERS:Rload 2
R1
Rload
V
1
2
34
ccm-dcm2
(C) flyback-ccm-dcm2.dat
10Hz 100Hz 1.0KHz 10KHz 100KHzFrequencyP(V(4))
0d
-100d
-200d
DB(V(4))
50
0
-50
Magnitude response, control-to-output v/d
Phase response, control-to-output v/d
Rload = 1, CCM
Rload = 2, DCM
Rload = 2, DCM
Rload = 1, CCM
Frequency responses generated by PSpice AC analyses
Other Converter Examples
Watkins-Johnson converter
Pspice averaged circuit model using ccm-dcm2 averaged-switch subcircuit
+
-
Vg
**
1:n
Lm
2
34
1
transformer
+
- Vd
1D
2S
3K
4A
5
duty
ccm-dcm2
**
1:n
Lm
2
34
1
transformer
+
-
Vg
Other Converter Examples
Cuk converter withisolation transformer
PSpice averaged circuit model using ccm-dcm2 averaged-switch subcircuit
+
-
Vg * *1:n
Lm
2
3
4
1
transformer
+
-
Vg * *1:n
Lm
2
3
4
1
transformer
1D
2S
3K
4A
5
duty
ccm-dcm2
U2
• Averaged switch model for current-programmed mode (CPM) inCCM
• Steady-state and simple AC model in CCM• Averaged switch model for CPM in DCM• Steady-state and small-signal AC model in DCM• Large-signal averaged CCM/DCM model for current-mode
controller• PSpice implementation of the averaged CPM controller model• Application examples
- Buck converter with current-programmed mode controller
Current-programmed control
+–
Buck converter
Current-programmed controller
Rvg(t)
is(t)
+
v(t)
–
iL(t)
Q1
L
CD1
+
–
Analogcomparator
Latch
Ts0
S
R
Q
Clock
is(t)
Rf
Measureswitch
current
is(t)Rf
Controlinput
ic(t)Rf
–+
vref
v(t)Compensator
Conventional output voltage controller
Switchcurrentis(t)
Control signalic(t)
m1
t0 dTs Ts
on offTransistor
status:
Clock turnstransistor on
Comparator turnstransistor off
The peak transistor currentreplaces the duty cycle as theconverter control input.
A simple approximation
iL(t) Ts= ic(t)
• Neglects switching ripple and artificial ramp (slope compensation)
• Yields physical insight and simple first-order model
• Accurate when converter operates well into CCM (so that switchingripple is small) and when the magnitude of the artificial ramp is nottoo large
• Well-accepted by practicing engineers
• Resulting small-signal relation:
iL(s) ≈ ic(s)
Averaged switch modelingwith the simple approximation
+–
L
C R
+
v(t)
–
vg(t)
iL(t)
+
v2(t)
–
i1(t) i2(t)
Switch network
+
v1(t)
–
v2(t) Ts= d(t) v1(t) Ts
i1(t) Ts= d(t) i2(t) Ts
Averaged terminal waveforms,CCM:
The simple approximation:
i2(t) Ts≈ ic(t) Ts
Buck converter example
CPM averaged switch equations
v2(t) Ts= d(t) v1(t) Ts
i1(t) Ts= d(t) i2(t) Ts
i2(t) Ts≈ ic(t) Ts
Eliminate duty cycle:
i1(t) Ts= d(t) ic(t) Ts
=v2(t) Ts
v1(t) Ts
ic(t) Ts
i1(t) Tsv1(t) Ts
= ic(t) Tsv2(t) Ts
= p(t)Ts
So:
• Output port is a current source
• Input port is a dependent power sink
CPM averaged switch model
+–
L
C R
+
⟨v(t)⟩Ts
–
⟨vg(t)⟩Ts
⟨iL(t)⟩Ts
+
⟨v2(t)⟩Ts
–
⟨i1(t)⟩Ts⟨i2(t)⟩Ts
Averaged switch network
+
⟨v1(t)⟩Ts
–
⟨ic(t)⟩Ts
⟨ p(t)⟩Ts
Results for other converters
+–
L
C R
+
⟨v(t)⟩Ts
–
⟨vg(t)⟩Ts
⟨iL(t)⟩Ts
Averaged switch network
⟨ic(t)⟩Ts
⟨ p(t)⟩Ts
+–
L
C R
+
⟨v(t)⟩Ts
–
⟨vg(t)⟩Ts
⟨iL(t)⟩Ts
Averaged switch network
⟨ic(t)⟩Ts
⟨ p(t)⟩Ts
Boost
Buck-boost
Perturbation and linearizationto construct small-signal model, CCM
v1(t) Ts= V1 + v1(t)
i1(t) Ts= I1 + i1(t)
v2(t) Ts= V2 + v2(t)
i2(t) Ts= I2 + i2(t)
ic(t) Ts= Ic + ic(t)
Let
V1 + v1(t) I1 + i1(t) = Ic + ic(t) V2 + v2(t)
Resulting input port equation:
Small-signal result:
i1(t) = ic(t)V2
V1
+ v2(t)Ic
V1
– v1(t)I1
V1
Output port equation:
î2 = îc
Resulting small-signal modelBuck example
+–
L
C R
+
–
+
–
Switch network small-signal ac model
+
–
vg –V1
I1
i1 i2
i cV2
V1i c
v1 v2Ic
V1
v2 v
i1(t) = ic(t)V2
V1
+ v2(t)Ic
V1
– v1(t)I1
V1
Predicted transfer functions of the CPM buck converter
+–
L
C R
+
–
vg ic v– D2
RDR
vic D 1 + sLR
ig iL
Gvc(s) =v(s)ic(s)
vg = 0
= R || 1sC
Gvg(s) =v(s)vg(s)
i c = 0
= 0
Table of resultsbasic converters
+–
ig
vg RCr1f1(s) i c g1 v g2 vg f2(s) i c r2 v
+
–
Converter g1 f1 r1 g2 f2 r2
Buck DR
D 1 + sLR
– RD2 0 1 ∞
Boost 0 1 ∞ 1D'R
D' 1 – sLD'2R R
Buck-boost – DR
D 1 + sLD'R
– D'RD2 – D2
D'R – D' 1 – sDL
D'2R R
D
Discontinuous conduction modein current-programmed converters
• Again, use averaged switch modeling approach
• Result: simply replace
Transistor by power sink
Diode by power source
• Inductor dynamics appear at high frequency, near to or greaterthan the switching frequency
• Small-signal transfer functions contain a single low frequency pole
• DCM CPM boost and buck-boost are stable without artificial ramp
• DCM CPM buck without artificial ramp is stable for D < 2/3. Asmall artificial ramp ma ≥ 0.086m2 leads to stability for all D.
DCM CPM buck-boost example
+–
L
C R
+
v(t)
–
vg(t)
iL(t)
Switch network
+
v1(t)
–
–
v2(t)
+
i1(t) i2(t)
m1
=v1 Ts
L
m2 =v2 Ts
L
t
iL(t)
0
ipk
vL(t)
0
v1(t) Ts
v2(t) Ts
ic – ma
Analysis
m1
=v1 Ts
L
m2 =v2 Ts
L
t
iL(t)
0
ipk
vL(t)
0
v1(t) Ts
v2(t) Ts
ic – ma
ipk = m1d1Ts
m1 =v1(t) Ts
L
ic = ipk + mad1Ts
= m1 + ma d1Ts
d1(t) =ic(t)
m1 + ma Ts
Averaged switch input port equation
d1Ts
Ts
t
i1(t)ipkArea q1
i1(t) Ts
d2Ts d3Ts
i2(t)ipk Area q2
i2(t) Ts
i1(t) Ts=
1
Ts
i1(τ)dτt
t + Ts
=q1
Ts
i1(t) Ts=
12
ipk(t)d1(t)
i1(t) Ts=
12
m1d 12(t)Ts
i1(t) Ts=
12
Lic2 fs
v1(t) Ts1 +
ma
m1
2
i1(t) Tsv1(t) Ts
=
12
Lic2 fs
1 +ma
m1
2 = p(t)Ts
Discussion: switch network input port
• Averaged transistor waveforms obey a power sink characteristic
• During first subinterval, energy is transferred from input voltagesource, through transistor, to inductor, equal to
W =12
Li pk2
This energy transfer process accounts for power flow equal to
p(t)Ts
= W fs =12
Li pk2 fs
which is equal to the power sink expression of the previous slide.
Averaged switch output port equation
d1Ts
Ts
t
i1(t)ipkArea q1
i1(t) Ts
d2Ts d3Ts
i2(t)ipk Area q2
i2(t) Ts
i2(t) Ts=
1
Ts
i2(τ)dτt
t + Ts
=q2
Ts
q2 = 12 ipkd2Ts
d2(t) = d1(t)v1(t) Ts
v2(t) Ts
i2(t) Ts=
p(t)Ts
v2(t) Ts
i2(t) Tsv2(t) Ts
=
12
Lic2(t) fs
1 +mam1
2 = p(t)Ts
Discussion: switch network output port
• Averaged diode waveforms obey a power sink characteristic
• During second subinterval, all stored energy in inductor istransferred, through diode, to load
• Hence, in averaged model, diode becomes a power source,having value equal to the power consumed by the transistorpower sink element
Averaged equivalent circuit
i2(t) Ts
v2(t) Tsv1(t) Ts
i1(t) Ts
+–
L
C R
+
–
+
–
–
+ v(t)Ts
vg(t) Ts
p(t)Ts
Steady state model: DCM CPM buck-boost
+– R
+
V
–
Vg
P
V 2
R = P
Solution
P =
12
LI c2(t) fs
1 +Ma
M 1
2
V= PR = Ic
RL fs
2 1 +Ma
M 1
2
for a resistive load
Models of buck and boost
+–
L
C R
+
–
v(t)Ts
vg(t) Ts
p(t)Ts
+–
L
C R
+
–
v(t)Ts
vg(t) Ts p(t)Ts
Buck
Boost
Summary of steady-stateDCM CPM characteristics
Converter M IcritStability rangewhen ma = 0
Buck Pload – P
Pload
12
Ic – M ma Ts 0 ≤ M < 2
3
Boost Pload
Pload – P Ic – M – 1
Mma Ts
2 M
0 ≤ D ≤ 1
Buck-boost Depends on load characteristic:
Pload = P
Ic – MM – 1
ma Ts
2 M – 1
0 ≤ D ≤ 1
I > Icrit for CCM
I < Icrit for DCM
Linearized small-signal models
+
–
+– v1 r1 f1i c g1v2
i1
g2v1 f2i c r2
i2
v2
+
–
L
C R
+
–
vg v
iL
Buck
+
–
+– v1 r1 f1i c g1v2
i1
g2v1 f2i c r2
i2
v2
+
–
L
C R
+
–
vg v
iL
Boost
Linearized small-signal models: Buck-boost
+
–
+–
v1 r1 f1i c g1v2
i1
g2v1 f2i c r2
i2
v2
–
+
L
C R
+
–vg v
iL
DCM CPM small-signal parameters: input port
Converter g1 f1 r1
Buck 1R
M 2
1 – M
1 –mam1
1 +mam1
2I1
Ic
– R 1 – MM 2
1 +mam1
1 –mam1
Boost – 1R
MM – 1
2 IIc
R
M 2 2 – MM – 1
+2
mam1
1 +mam1
Buck-boost 0 2I1
Ic
– RM 2
1 +mam1
1 –mam1
DCM CPM small-signal parameters: output port
Converter g2 f2 r2
Buck
1R
M1 – M
mam1
2 – M – M
1 +mam1
2 IIc
R1 – M 1 +
mam1
1 – 2M +mam1
Boost 1R
MM – 1
2I2
Ic
R M – 1M
Buck-boost 2MR
mam1
1 +mam1
2I2
IcR
Simplified DCM CPM model, with L = 0
+
–
+– r1 f1i c g1v g2vg f2i c r2 C Rvg v
Buck, boost, buck-boost all become
Gvc(s) =v
ic vg = 0
=Gc0
1 + sωp
Gc0 = f2 R || r2
ωp = 1R || r2 C
Gvg(s) =v
vg ic = 0
=Gg0
1 + sωp
Gg0 = g2 R || r2
! "#
t
0 dTs Ts
ic-ma
m1-m2
ipk
iL(t)
d2Ts=(1-d)Ts
t
0 dTs Ts
ic-ma
m1 -m2
ipk
(d+d2)Ts
iL(t)
d2Ts
sacpk dTmii −=
−+
−=
2222
21 s
pks
pkTL
Tdmid
dTmidi
s
−
=DCM
Tm
i
CCMd
d
s
pk
2
2
1
−=
s
pk
Tm
idMINd
22 ,1CCM/DCM:
! "#
( )( ) sas
sTLc
TddmdTm
Tdmiddid s
21
2222
2
22
++
−−+=
−−=s
sac
Tm
dTmidMINd
22 ,1
ci 1m 2m
d
sTLiInputs:
Model:
Output: duty ratio
2d
CPM Large-Signal Averaged Model:PSpice Implementation
*********************************************************** MODEL: CPM* Current-Programmed-Mode CCM/DCM controller model.* All parameters and inputs are referred to * the primary side.*********************************************************** Parameters:* L=equivalent inductance, referred to primary* fs=switching frequency* va=amplitude of the artificial ramp, va=Rf*ma/fs* Rf=equivalent current-sense resistance*********************************************************** Nodes:* ctr: control input, v(ctr)=Rf*ic* current: sensed average inductor current v(current)=Rf*iL* 1: voltage across L in interval 1, slope m1=v(1)/L* 2: (-) voltage across L in interval 2, slope m2=v(2)/L* d: duty ratio (output of the controller)**********************************************************.subckt CPM ctr current 1 2 d+params: L=100e-6 fs=1e5 va=0.5 Rf=0.1*
* generate d2 for CCM/DCMEd2 d2 0 table + MIN(+ L*fs*(v(ctr)-va*v(d))/Rf/(v(2)),+ 1-v(d)+ ) (0,0) (1,1)* Em1 m1 0 value=Rf*v(1)/L/fsEm2 m2 0 value=Rf*v(2)/L/fs** generate duty-ratio d (valid CCM and DCM operation)*Eduty d 0 table + + 2*(v(ctr)*(v(d)+v(d2))+ -v(current)-v(m2)*v(d2)*v(d2)/2)+ /(v(m1)*v(d)+2*va*(v(d)+v(d2)))+ (0.01,0.01) (0.99,0.99)*.ends ; end of subcircuit CPM **********************************************************
• Demonstrate how CCM/DCM averaged-switch model can be usedtogether with CCM/DCM averaged model of the current-mode controller
• Use DC sweep simulation to show steady-state characteristicsincluding operation in DCM or CCM
• Use AC simulation to show control-to-output responses compared forduty-ratio control and current-mode control, in DCM or CCM
• Use parametric sweep simulation to find the amplitude of the artificialramp to minimize input-to-output audio-susceptibility
• Specifications:• Input Vg = 28V, output V = 5-20V, 0.5-2A
• Switching frequency fs=100kHz, inductance L = 35uH
• Equivalent current-sense resistance Rf = 1• Artificial-ramp amplitude Va = 0-3V
Buck Converter with Current-Mode Control
Example: Cpm-buck
10R2C1
100u
0.05
R1L1
35uH1
D
2S
3K
4A
5
duty
fs=100K
ccm-dcm1
U2
L=35uH
CTRVc
CURRENTRf iL
1V
1
2V
2
Dduty
va=VaRf=1
CPMU1
L=35uHfs=100kHz
OU
T+
OU
T-
IN+
IN-
V(2x)
E4
EVALUE
OUT+
OUT-
IN+
IN-
i(L1)
E2
EVALUE
OU
T+
OU
T-
IN+
IN-
V(1)-V(2x)EVALUE
E3
PARAMETERS:Va 1+
-
VcDC=2V
+
-
DC=28V Vg
VDB
2x
d
ctr
1
3
531.52mV
177.09mV
5.315V
(E) cpm-buck.dat
0.5V 1.0V 1.5V 2.0V 2.5V 3.0VVcV(d) 1-V(d) V(Xs.u) V(Xcpm.d2)
1.0V
0.8V
0.6V
0.4V
0.2V
0V
DCM CCM
u
d
d2
1-d
Duty ratio d, equivalent duty ratio u, and diode conductioninterval d2 as functions of the control input Vc
(F) cpm-buck.dat
0.5V 1.0V 1.5V 2.0V 2.5V 3.0VVcI(L1) v(ctr)
3.0
2.5
2.0
1.5
1.0
0.5
0
iL
Vc=Rf*Ic
Average inductor current iL as a function of the control input Vc
(H) cpm-buck.dat
10Hz 100Hz 1.0KHz 10KHz 100KHzFrequencyDB(V(3)) DB(V(3)/v(d)) P(V(3)) P(V(3)/v(d))
100
50
0
-50
-100
-150
-200
Vc=2.0, CCM
v/d
v/vc
v/d
v/vc
MAGNITUDE
PHASE
Control-to-output frequency responses for duty-ratio control (v/d)and current-mode control (v/vc). The converter operates in CCM.
(H) cpm-buck.dat
10Hz 100Hz 1.0KHz 10KHz 100KHzFrequencyDB(V(3)) DB(V(3)/v(d)) P(V(3)) P(V(3)/v(d))
50
0
-50
-100
-150
Vc=1.5, DCM
PHASE
MAGNITUDE
v/vc
v/d
v/vc
v/d
Control-to-output frequency responses for duty-ratio control (v/d)and current-mode control (v/vc). The converter operates in DCM.
Va=0.8, v/vg(0) = -62.848dB
(A) cpm-buck.dat
0 0.5 1.0 1.5 2.0VaVDB(3)
-20
-30
-40
-50
-60
-70
Audio-susceptibility v/vg as a function of the artificial-ramp amplitude Va
Parametric sweep used to determine amplitude of the artificial rampVa to minimize input-to-output response (audio-susceptibility) v/vg.
• Ideal rectifier• Averaged model obtained by averaging over switching period• Averaged model obtained by averaging over line period• Application examples:
- Power factor corrector based on boost converter operating in DCM- Power factor corrector based on SEPIC with nonlinear-carrier control
Properties of the Ideal Rectifier
It is desired that the rectifier present a resistive load to the ac powersystem. This leads to
• unity power factor
• ac line current has same waveshape as voltage
iac(t) =vac(t)
Re
Re is called the emulated resistance Re
+
–
vac(t)
iac(t)
Control of power throughput
Re(vcontrol)
+
–
vac(t)
iac(t)
vcontrol
Pav =V ac,rms
2
Re(vcontrol)
Power apparently “consumed” by Re
is actually transferred to rectifier dcoutput port. To control the amountof output power, it must be possibleto adjust the value of Re.
Output port model
Re(vcontrol)
+
–
vac(t)
iac(t)
vcontrol
v(t)
i(t)
+
–
p(t) = vac2/Re
Ideal rectifier (LFR)
acinput
dcoutput
The ideal rectifier islossless and contains nointernal energy storage.Hence, theinstantaneous inputpower equals theinstantaneous outputpower. Since theinstantaneous power isindependent of the dcload characteristics, theoutput port obeys apower sourcecharacteristic.
p(t) =vac
2 (t)Re(vcontrol(t))
v(t)i(t) = p(t) =vac
2 (t)Re
Equations of the ideal rectifier / LFR
iac(t) =vac(t)
Re(vcontrol)
v(t)i(t) = p(t)
p(t) =vac
2 (t)Re(vcontrol(t))
Vrms
Vac,rms= R
Re
Iac,rms
Irms= R
Re
Defining equations of theideal rectifier:
When connected to aresistive load of value R, theinput and output rms voltagesand currents are related asfollows:
A switch network that is capable of satisfying the above (averaged)equations can be employed in low-harmonic rectifier applications
Single-phase system with internal energy storage
vac(t)
iac(t)
Re
+
–
Ideal rectifier (LFR)
C
i2(t)ig(t)
⟨ pac(t)⟩Ts
vg(t)
i(t)
load
+
v(t)
–
pload(t) = VI = Pload
Energy storagecapacitor
vC(t)
+
–
Dc–dcconverter
Energy storage capacitorvoltage vC(t) must beindependent of input andoutput voltage waveforms, sothat it can vary according to
=d 1
2 CvC2 (t)
dt= pac(t) – pload(t)
This system is capable of
• Wide-bandwidth control ofoutput voltage
• Wide-bandwidth control ofinput current waveform
• Internal independent energystorage
Large signal modelaveraged over switching period Ts
Re(vcontrol)⟨ vg(t)⟩Ts
vcontrol
+
–
Ideal rectifier (LFR)
acinput
dcoutput
+–
⟨ ig(t)⟩Ts
⟨ p(t)⟩Ts
⟨ i2(t)⟩Ts
⟨ v(t)⟩TsC Load
Ideal rectifier model, assuming that inner wide-bandwidth loopoperates ideally
High-frequency switching harmonics are removed via averaging
Ac line-frequency harmonics are included in model
Nonlinear and time-varying
Predictions of large-signal model
Re(vcontrol)⟨ vg(t)⟩Ts
vcontrol
+
–
Ideal rectifier (LFR)
acinput
dcoutput
+–
⟨ ig(t)⟩Ts
⟨ p(t)⟩Ts
⟨ i2(t)⟩Ts
⟨ v(t)⟩TsC Load
vg(t) = 2 vg,rms sin ωt
If the input voltage is
Then theinstantaneous poweris:
p(t)Ts
=vg(t) Ts
2
Re(vcontrol(t))=
vg,rms2
Re(vcontrol(t))1 – cos 2ωt
which contains a constant term plus a second-harmonic term
Separation of power source into its constant andtime-varying components
+
–
⟨ i2(t)⟩Ts
⟨ v(t)⟩TsC Load
V g,rms2
Re–
V g,rms2
Recos2 2ωt
Rectifier output port
The second-harmonic variation in power leads to second-harmonicvariations in the output voltage and current
Removal of even harmonics via averaging
t
v(t)
⟨ v(t)⟩T2L
⟨ v(t)⟩Ts
T2L = 12
2πω = π
ω
Resulting averaged model
+
–
⟨ i2(t)⟩T2L
⟨ v(t)⟩T2LC Load
V g,rms2
Re
Rectifier output port
Time invariant model
Power source is nonlinear
Perturbation and linearization
v(t)T2L
= V + v(t)
i2(t) T2L= I2 + i2(t)
vg,rms = Vg,rms + vg,rms(t)
vcontrol(t) = Vcontrol + vcontrol(t)
V >> v(t)
I2 >> i2(t)
Vg,rms >> vg,rms(t)
Vcontrol >> vcontrol(t)
Let with
The averaged model predicts that the rectifier output current is
i2(t) T2L=
p(t)T2L
v(t)T2L
=vg,rms
2 (t)
Re(vcontrol(t)) v(t)T2L
= f vg,rms(t), v(t)T2L
, vcontrol(t))
Linearized result
I2 + i2(t) = g2vg,rms(t) + j2v(t) –vcontrol(t)
r2
g2 =df vg,rms, V, Vcontrol)
dvg,rmsvg,rms = Vg,rms
= 2Re(Vcontrol)
Vg,rms
V
where
– 1r2
=df Vg,rms, v
T2L, Vcontrol)
d vT2L
v T2L= V
= –I2
V
j2 =df Vg,rms, V, vcontrol)
dvcontrolvcontrol = Vcontrol
= –V g,rms
2
VRe2(Vcontrol)
dRe(vcontrol)
dvcontrolvcontrol = Vcontrol
Small-signal equivalent circuit
C
Rectifier output port
r2g2 vg,rms j2 vcontrol R
i2
+
–
v
v(s)vcontrol(s)
= j2 R||r21
1 + sC R||r2
v(s)vg,rms(s)
= g2 R||r21
1 + sC R||r2
Predicted transfer functions
Control-to-output
Line-to-output
Constant power load
vac(t)
iac(t)
Re
+
–
Ideal rectifier (LFR)
C
i2(t)ig(t)
vg(t)
i(t)
load
+
v(t)
–
pload(t) = VI = Pload
Energy storagecapacitor
vC(t)
+
–
Dc-dcconverter
+–Pload V
⟨ pac(t)⟩Ts
Rectifier and dc-dc converter operate with same average power
Incremental resistance R of constant power load is negative, and is
R = – V 2
Pav
which is equal in magnitude and opposite in polarity to rectifierincremental output resistance r2 for all controllers except NLC
Transfer functions with constant power load
v(s)vcontrol(s)
=j2
sC
v(s)vg,rms(s)
=g2
sC
When r2 = –R, the parallel combination r2 || R becomes equal to zero.The small-signal transfer functions then reduce to
!
Objectives:• Example of how large-signal averaged-switch model can be used for
analysis and simulation of a power-factor corrector
• Show examples of averaged pulse-width modulator model, andimplementation of closed-loop control
• Use transient simulation to study start-up transient response of the PFCand harmonic distortion of the AC line current in steady state
Specifications:• Input: 120Vrms, 50Hz. Output: 300VDC, 100W
• Switching frequency: 100kHz
!
L
vline
i line +
_
vg
+
_
VCo
+
_
vco
ig = <i L>
L
vline
i lineis
+
_
vg
+
_
VoCo
+
_
vco
ig = <i L>id
Re p(t)
<i s>
<i d>
Switching circuit model Averaged circuit model (in DCM)
)(
2
ge
g
e
g
ge
g
TdTsg vVR
v
R
v
vV
p
R
viii
ss −+=
−+=+=
−=
V
vR
vi
ge
gg
1
1
se TD
LR
2
2=
Line current distrortion dueto this term
Boost converter operates in DCM at constant duty ratio, constant frequency
DCM Boost PFC
Averagedmodel ofthe boostrectifier
Averaged PWM model: d=vm/VM=0.5vm,Dmin=0.1, Dmax=0.9 limits
Closed-loop outputvoltage control
VAMPL=170
diodeD3
diodeD4
L1
200uH0.2
R2
+
-VCC
12V10KR6
+
-Vref5V
10KR4
R3600K
C2 1u
0.9
0.1
0.5 +-
Voffset
2V
diode
D2
diode
D1
1
+ 3
- 2
V+
4
V-
11
U2A
LM324
+
-
Vac
FREQ=50
R5 3.3K
C1150uF
RloadR1
1D
2S
3K
4A
5
duty
L=200uH
U1
ccm-dcm1fs=100KHz
PARAMETERS:Rload 900
V
m
d
output
PWM
(A) dcm-boost-rectifier-closed-loop.dat
0s 50ms 100ms 150ms 200msTimeV(output)
400V
200V
0V
V(d)
0.8
0.4
0
100W load
50W load
Duty ratio d
100W load
50W load
Start-up transient response for full load and 50% load
(A) dcm-boost-rectifier-closed-loop.dat
180ms 185ms 190ms 195ms 200msTimeI(Vac)
1.5A
1.0A
0.5A
0A
-0.5A
-1.0A
-1.5A
100W load1st harmonic: 0.87A3rd harmonic: 0.14A (16.4%)THD: 16.4%
50W load1st harmonic: 0.48A3rd harmonic: 0.08A (16.2%)THD: 16.2%
AC line current waveforms at full load and 50% load
AC line current waveforms at full load (100W),50% load, and 150% load
(A) dcm-boost-rectifier-closed-loop.dat
500ms 505ms 510ms 515ms 520msTimeI(Vac)
2.0A
0A
-2.0A
-4.0A
-6.0A
-8.0A
Converter operates in CCM
150W load
100W load
50W load
Nonlinear-CarrierController
Rsis
is
+
–vm
voltage-looperror amplifier
Vref
AC linevoltage
120V, 60Hz
Magnetics 1F19 UU
53 turns 53 turns#18 #18
136 turns #18
IRF840
1uF
2400uF
• Active current shaping using Nonlinear Carrier Control method
• Sepic converter has integrated magnetics designed for zero switchingripple in the AC line current
• Specifications:
• Input: 90-120Vrms, 60Hz. Output: 48VDC, 200W
• Switching frequency: 90kHz
Objectives:• Show application of the CCM/DCM averaged-switch model in power-
factor correctors with active current shaping and closed-loop outputvoltage control
• Show average model implementation of a nonlinear pulse-widthmodulator (NLC controller)
• Compare average model predictions to experimental results:• AC line current waveshapes
• Start-up and load transient responses
+– NLC generator
vc(t) = vm f(t/Ts)
switchcurrent sensor
switchdrive
Q R
SQ
vmvc(t)
vq(t) = Rs < i s >
clock
d
is [5A/div]
vc
vq
c(t)
−=
s
sms T
t
t
TvTtf 1)/(
d
dviR mTss
s
−= 1
mTss
m
viR
vd
s+
=
sTsg ii =g
s
mg v
VR
vi
=V
v
d
d g=−1
Ideal current shaping
NLC Controller Model
Sepic PFC with NLC Control:Simulation Model
Coupled-inductormodel
NLC controller model Closed-loop outputvoltage control
diodeD2
diodeD3
diodeD4
diodeD1
+
- Vsense
* *1:n
Lm
2
3
4
1
n=1
transformer
T1 Lm=180uH
1D
2S
3K
4A
5
duty
L=180uH ccm-dcm1
U1
fs=90kHz
OUT+
OUT-
IN+
IN-V(m)/(Rs*I(Vsense)+V(m))
E1EVALUE
L-13-23950uH
**
1:n
12
34
TX1n=0.942400uF
C3
Rload
17
+
-
VAMPL=170
Vac
1
+ 3
- 2
V+
4
V-
11
LM324
U2A
R3
18K
R2
68K
R4 15k C4 1uF
+ -
Vref
10.4V
+ -
Vcc12V
C1
1uF
0
0
00
00
0
0
0
0
0 0
0
m
NLC controller
i line [2A/div]
Line current harmonics [1.6%/div]
3 5 7 9 11 13 15 17
0
2A
0A
-2A
i line
Experiment
Simulation
i line [1A/div]
Line current harmonics [2.4%/div]
Experiment
Simulation
1A
0.5A
0 A
-0.5A
-1A
0
3 5 7 9 11 13 15 17
i line
AC line current waveform and spectrum at 50W load (left) and170W load (right)
-3A
vo
vm
i line
50V
30V
10V
0V
3A
0A
vm
vo
i line [2A/div]
Experiment
Simulation
50W to 125W load transient in the Sepic PFC
vg
vm
i line
200V
0V
3A
-3A
10V
0V
100V
0V
0A
vo
vo
vm
vg
i line [2A/div]
Experiment Simulation
Start-up transient in the Sepic PFC at 50W load
• The averaged switch modeling approach: replace switch network withan equivalent circuit that correctly predicts the low-frequencycomponents of the switch network terminal waveforms
• Seminar addressed:
- PWM converters in continuous and discontinuous conduction modes- PWM converters with current-programmed mode (CPM) control
- Single-phase low-harmonic rectifiers (power-factor correctors)
• In each case, the large-signal averaged switch model can be used:- to develop steady-state and (by linearization) small-signal circuit
models suitable for analysis- to construct Spice-compatible model implementations suitable for
DC, Transient and AC simulations• A number of PSpice model implementation examples and converter
application examples were presented
Selected bo oks:
R.W. Erickson, Fundamentals of Power Electronics, Chpman & Hal, 1997.Web page: http://ece-www.colorado.edu/~pwrelect/book/bookdir.html
J.G.Kassakian, M.F.Schlecht, G.C.Verghese, Principles of Power Electronics, Addison-Wesley, 1991.
A.Kislovski, R.Redl, N.Sokal, Dynamic Analysis of Switched-Mode DC/DC Converters, New York: VanNostrand Reinhold, 1994.
P.T. Krein, Elements of Power Electronics, Oxford University Press, 1998.
Daniel M. Mitchel, DC-DC Switching Regulator Analysis, New York: McGraw-Hill, 1988.
N.Mohan, T.Undeland, W.Robbins, Power Electronics: Converters, Applications and Design, Second Edition,John Wiley & Sons, 1995.
S.M. Sandler, SMPS Simulation with Spice 3, McGraw Hill, 199.
Selected papers on averaged modeling of switching power converters
R. M. Bass, J. Sun, “Averaging under large-signal conditions,” IEEE PESC 1998, pp. 630-632.
R.Erickson, M.Madigan, S.Singer, “Design of a simple high power factor rectifier based on the flybackconverter,” IEEE APEC, 1990, pp.792-801.
P. Krein, et al, "On the Use of Averaging for the Analysis of Power Electronic Systems," IEEE Transactions onPower Electronics, Vol. 5, No. 2, pp 182-190, April1990.
K.Mahabir, G.Verghese, J.Thottuvelil, A.Heyman, “Linear averaged and sampled data models for large signalcontrol of high power factor AC-DC converters,” IEEE PESC, 1990, pp. 372-381.
D.Maksimovic, S.Cuk, ``A unified analysis of PWM converters in discontinuous modes,'' IEEE Trans. on PowerElectronics, Vol.6, No.3, July 1991.
D.~Maksimovic, Y.Jang and R.Erickson, ``Nonlinear-carrier control for high power factor boost rectifiers,'' IEEETransactions on Power Electronics, Vol.11, No.4, July 1996, pp.578-584.
R.D.Middlebrook and Slobodan Cuk, “A general unified approach to modeling switching-converter powerstages, International Journal of Electronics, Vol.42, No.6, pp.521-550, June 1977.
R.D.Middlebrook, “Topics in multiple-loop regulators and current-mode programming,” IEEE PESC, 1985, pp.716-732.
Selected papers on averaged modeling of switching power converter (continued)
R.D.Middlebrook, “Modeling current programmed buck and boost regulators,” IEEE Trans. On PowerElectronics, Vol.4, No.1, January 1989, pp.36-52.
S.R.Sanders, G.C.Verghese, “Synthesis of averaged circuit models for switched power converters,” IEEETransactions on Circuits and Systems, Vol.38, No.8, pp.905-915, August 1991.
S.Singer, R.W. Erickson, “Power source element and its properties,” IEE Proceedings - Circuits DevicesSystems, Vol.141, Np.3, pp.220-226, June 1994.
J.Sun, D.M.Mitchel, M.Greuel, P.T.Krain, R.M.Bass, “Averaged modeling of PWM converters in discontinuousconduction mode: a reexamination,” IEEE PESC 1998, pp.615-622.
J.Sun, D.M.Mitchel, M.Greuel, P.T.Krain, R.M.Bass, “Averaged models for PWM converters in discontinuousconduction mode,” HFPC 1998.
J.Sun, R.M.Bass, “Modeling and practical design issues for average current control,” IEEE APEC 1999.
R. Tymerski and V. Vorperian, “Generation, classification and analysis of switched-mode DC-to-Dcconvertersby the use of converter cells,” INTELEC 1986, pp.181-195.
E. Van Dijk, H.J.N.Spruijt, D.M.O’Sullivan, J.B.Klaassens, “PWM switch modeling of DC/DC converters,” IEEETransactions on Power Electronics, Vol.10, No.6, November 1995, pp. 659-665.
Selected papers on averaged modeling of switching power converter (continued)
G. Verghese, C. Bruzos, K. Mahabir, “Averaged and sampled-data models for current mode control: areexamination,” IEEE PESC, 1989, pp.484-491.
V.Vorperian, R.Tymerski, F.C.Lee, “Equivalent circuit models for resonant and PWM switches,” IEEETransactions on Power Electronics, Vol.4, No.2, pp.205-214.
V.Vorperian, “Simplified analysis of PWM converters using the model of the PWM switch: Parts I and II,” IEEETransactions on Aerospace and Electronic Systems, Vol.AES-26, pp.490-505, May 1990.
G.W.Wester and R.D.Middlebrook, “Low-frequency characterization of switched Dc-Dc converters,” IEEETransactions on Aerospace and Electronic Systems, Vol.AES-9, pp.376-385, May 1973.
R.~Zane, D.~Maksimovic, ``Nonlinear-carrier control for high-power-factor rectifiers based on flyback, Cuk orSepic converters,'’ Proc. IEEE APEC, March 3-7, 1996, San Jose, CA, pp.814-820.
Selected papers on averaged model implementation for computer simulation
V. Bello, "Computer Aided Analysis of Switching Regulators Using SPICE2," IEEE PESC, 1980 Record, pp 3-11.
V. Bello, "Using The SPICE2 CAD Package for Easy Simulation of Switching Regulators in Both Continuousand Discontinuous Conduction Modes," Powercon 8, April, 1981, pp H3-1-14.
V. Bello, "Using the SPICE2 CAD Package to Simulate and Design the Current Mode Converter," Powercon11, April 1984.
Y. Amran, F. Huliehel, S. Ben-Yaakov, “A unified SPICE compatible average model of PWM converters,” IEEETransactions on Power Electronics, Vol. 6, No. 4, pp. 585-594, 1991.
S. Ben-Yaakov, “Average simulation of PWM converters by direct implementation of behavioral relationships,”IEEE APEC, pp.510-516, 1993.
S.Ben-Yaakov, D.Adar, “Average models as tools for studying dynamics of switch mode DC-DC converters,”IEEE PESC 1994, pp.1369-1376
S. Ben-Yaakov, Z. Gaaton, “Generic SPICE compatible model of current feedback in switch mode converters,Electronics Letters, Vol. 28, No. 14, 2nd July 1992.
V.M.Canalli, J.A.Cobos, J.A.Oliver, J.Uceda, “Bihavioral large signal averaged model for DC/DC switchingpower converters,” IEEE PESC 1996.
Selected papers on averaged model implementation for computer simulation
D. Edry, M. Hadar, O. Mor, S. Ben-Yaakov, “A SPICE compatible model of tapped inductor PWM converter,”IEEE APEC 1994, pp.1035-1041.
S. Hageman, "Behavioral Modeling and PSPICE Simulate SMPS Control Loops,” PCIM, April 1990, pp 13-24and May 1990, pp 47-50.
N. Jayaram, D. Maksimovic, “Power factor correctors based on coupled-inductor Sepic and Cuk converterswith nonlinear-carrier control,” IEEE APEC 1998.
D. Kimhi, S. Ben-Yaakov, “A SPICE model for current mode PWM converters operating under continuousinductor current conditions,” IEEE Transactions on Power Electronics, Vol.6, No.2, pp.281-286, 1991.
R. Michelet and W. Roehr, "Evaluating Power Supply Designs with CAE Models” APEC 89, pp 323-334.
D. Monteith and D. Salcedo, "Modeling Feedforward PWM Circuits Using the Nonlinear Function Capabilities
of SPICE II," Powercon 10,March 1983.