Pcm Tta Batch

8/12/2019 Pcm Tta Batch

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PULSE CODE MODULATION (PCM)

DEFINITION: Pulse code modulation (PCM) is essentially analog-to-digital conversion of a special type where the information

contained in the instantaneous samples of an analog signal isrepresented by digital words in a serial bit stream.

Basic Steps For PCM System

Limiter

Filtering Sampling

Quantization

Encoding

Line Coding

FILTERING Filters are used to limit the speech signal to the

frequency band 300-3400 Hz.


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Analog to Digital Conversion

TheAnalog-to-digital Converter (ADC)performs three functions:

Sampling Makes the signal discrete in time. If the analog input has a bandwidth

of W Hz, then the minimum samplefrequencysuch that the signal canbe reconstructed without distortion.

Quantization Makes the signal discrete in

amplitude.

Round off to one of qdiscrete levels.

Encode Maps the quantized values to digitalwords that are 8 bits long.

If the (Nyquist) Sampling Theoremissatisfied, then only quantization introducesdistortion to the system.

ADC

Sample

Quantize

AnalogInput

Signal

Encode

111

110

101

100

011

010

001

000

Digital Output

Signal

111 111 001 010 011 111 011


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4


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SAMPLING PROCESS

5


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4.3 Sampling Theorem

X

Digital signal

s(t)

ms(t)m(t)

m(t)

t

ms(t)

t

s(t)

t

Ts

Sampling theorem states that :"If a band limited

signal is sampled at regular intervals of time and

at a rate equal to or more than twice the highest

signal frequency in the band, then the sample

contains all the information of the original

signal."

fS 2fm

Fourier series for impulse train :

6

S(t) =TS+2TS(Cos 2(tTS)+ Cos 2x2(tTS+.)


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SAMPLING & COMBINING CHANNELS

7


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PAM OUTPUT SIGNALS

8


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RECONSTRUCTION OF ORIGINAL SIGNAL

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f

3f2s 2fs3fsfs0

fs-fm fs+fm 2fs+fm3fs+fm3fs-fm2fs-fm

ms(f)Spectrum of the sampled signal

The spectrum of the sampled signal has sidebandsfsf

m, 2f

sf

m, 3f

sf

m and so

on.

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The choice of sampling frequency,fsmust follow the sampling theorem to overcome

the problem of aliasing and loss of information

(a) Sampling frequency=> fs1< 2fm (max)

f2fs1 3fs1fs1fm

Aliasingms(f)

(b) Sampling frequency=> fs2> 2fm (max)

f

2fs2 3fs2fs2fm

ms(f)

Shannon sampling

theorem=> fs2fm

Nyquist f requency

fs= 2fm= fN

A bandlimited signal thathas a maximum

frequency, fmaxcan be

regenerated fr om the

sampled signal i f i t is

sampled at a rate of at

least 2fmax .

11


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Pulse Code Modulation (PCM)

Codectechnique

Voice Bandwidth =

300 Hz to 3400 Hz

Sampling StageAnalog Audio Source

= Sample

8 kHz (8,000 Samples/Sec)

Nyquists Theoremsays

sample at twice the bandwidth of

the line.

Voice bandwidth ~ 3400 Hz.

So, must sampling rate should be

6800 samples/sec.

PCM actually uses 8000

samples/sec since cutoff not

sharp.

Height of sampled signal above /

below the base line is converted

to a binary value 12


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4.4 Detection of Sampled Signal

By using LPF to the sampled signal, ms(t)

LPFms(t) m(t)

Cut-off frequency , fofor LPF must be within the range: fm fo fs - fm

Eventhough the sampled signal can be detected easily at fs= 2fm , but usuall y

fs> 2fm. The main reason is to have a guardband .

Therefore, the maximum frequency that can be processed by the sampled

data using sampling frequency, fs (without aliasing) is:

=> fm= fs/ 2 = 1 / 2Ts

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4.3.1 Difference in Sampling Methods

In every sampling methods, the pulse amplitude is directly proportional to the

amplitude of the information signal

Practically, an ideal sampling is difficult to generate

However, by using an ideal and natural sampling, noise can be eliminated, which

is not the case for flat-top sampling

I deal Sampling F lat-top Sampli ng

ms(t)

t

Natural Sampli ng

14


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Natural Sampling Flat-top Sampling

Information signal

Pulse signal

Sampled signal (PAM)

t

m(t)

t

s(t)

Ts

t

ms(t)

Ts

t

ms(t)

Ts

15


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16

PULSE AMPLITUDE MODULATED SIGNAL

NATURAL TOP

SAMPLING

CLOCK

The FET is the switch used as a sampling gate.

When the FET is on, the analog voltage is shorted to ground; when off,the FET is essentially open, so that the analog signal sample appears at

the output.

Op-amp 1 is a noninverting amplifier that isolates the analog input

channel from the switching function.


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17

FLAT-TOP SAMPLING

SAMPLED & HOLD CIRCUIT

HIGH FANOUT

OP

AMP-2

clock


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As seen in Figure, the instantaneous amplitude

of the analog (voice) signal is held as a constant

charge on a capacitor for the duration of the

sampling period Ts.

Op-amp 2 is a high input-impedance voltagefollower capable of driving low-impedance loads

(high fanout).

The resistor Ris used to limit the output current

of op-amp 1 when the FET is on and provides

a voltage division with rdof the FET. (rd, the

drain-to-source resistance, is low but not zero)

sample-and-hold circuit.

Q ti ti


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Eeng 360 19

Quantization

The output of a sampler is still continuous in amplitude.

Each sample can take on any value e.g. 3.752, 0.001, etc.The number of possible values is infinite.

To transmit as a digital signal we must restrict the number of

possible values.

Quantizationis the process of rounding off a sample according to

some rule.

E.g. suppose we must round to the nearest tenth, then:

3.752 --> 3.8 0.001 --> 0


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QUANTIZING-POSITIVE SIGNAL

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QUANTIZING - SIGNAL WITH + Ve & - Ve VALUES

21

3 t th t l d i th ti ti


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Quantization Interval

Represent the voltage value for each quantized level

For example: For a sampled signal that has 5V amplitude, Vpp

= 10 V divide by the quantized level, L = 8 level,

Therefore, quantized interval , qi=10V/8=1.25V

Quantization level, L = 2n

Quantization level depends on the number of binary bits, nused to represent each sample.

For example:For= 3; Quantization level, L = 23 = 8 level.

In this example, first level (level 0) is represented by 000,whereas bit 111 represents the eigth level

3 terms that are commonly used in the quantization

process:

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Quantization value, Vk

The middle voltage for each quantized level

For example: for n = 3, quantized level, L = 8 and a sampled

sinusoidal signal with +5 V ,

The middle quantized value for level 0,

V = - 5V+(1.25V2) = - 4.375V

In this example, for a sample that is in level 0 segment will

be represented by bit 000 with a voltage value of4.375 V.The difference between the sampled value and the

quantized value results in quantization noise.

23

For voice communication 256 levels are commonly

used (i.e n = 8)

Quantization


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Quantization

1. Quantizing operation approximatesthe analog

values by using a finite number of levels. Thisoperation is considered in 3 steps

a) Uniform Quantizer

b) Quantization Errorc) Quantized PAM signal output

2. PCM signal is obtained from the quantized PAM

signal by encoding each quantized sample valueinto a digital word.


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Uniform Quantization

Most ADCs use uniform

quantizers. The quantization levels of a

uniform quantizer are

equally spaced apart.

Uniform quantizers are

optimal when the input

distribution is uniform.

When all values within theDynamic Rangeof the

quantizer are equally likely.

Input sample X

Example: Uniform 3 bit quantizer

q=8 and XQ= {1,3,5,7}

2 4 6 8

1

5

3

Output sample

XQ

-2-4-6-8

Dynamic Range:

(-8, 8)

7

-7

-3

-5

-1

Quantization Characteristic

UNIFORM QUANTIZATION


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t

Level 0 : 000

Level 1 : 001

Level 2 : 010

Level 3 : 011

Level 4 : 100

Level 5 : 101

Level 6 : 110

Leve l 7 : 111

1.9V

+5.0V

-5.0V

4.375V

3.125V

1.875V

0.625V

-0.625V

-1.875V

-3.125V

-4.375V

4.3V

1.9V

-3.2V

-4.5V

Quantization level &

binary representationQuantized

value

Sampled signal

UNIFORM QUANTIZATION

Uniform quantization is a quantization process with a uniform (fixed) quantization

interval.

Example : n = 3 , L = 8 , signal +5 V ; => Vk= 1.25 V . Bit rate: b = n s

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Quantization error

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Input voltage range:14 mV to

+14 mV

Binary

number

Input voltage

range (mV)

1 11 10 to 141 10 6 to 10

1 01 2 to 6

1 00 0 to 2

0 00 -2 to 0

0 01 -6 to -2

0 10 -10 to -6

0 11 -14 to -10

Example : Uniform Quantization error

Qn= LSB voltage /2 = qi /2

14 mV = 28 mV with 8 steps and 8 codes.

Therefore Qn= 28/8 = 3.5 mV.

Therefore : Qn= 3.5 mV / 2 = 1.75 mV

SNRq= [1.76 + 6.02n] dB

Noise from quantization error

can be reduced by increasingthe quantization level i.e

increase n.

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Companding

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Pulse Code Modulation - Analog to Digital Conversion

Stage 1

Quantizing Stage

Output

100100111011001

A-Law (Europe)

-Law (USAJapan)33


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2 Popular companding system (standardized by ITU)

EUROPE => A - Law

USA/NORTH AMERICA => - Law

Axfor

xA

for

A

AxA

Ax

y1

0

11

log1

log1

)log(1

A- compressor paramater. Usually the

value ofAis 87.6.

34


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USA/NORTH AMERICA => - Law

Law is a standard compress-

expand that is used in America and

Japan. The value of used is 255 (8

bit).

1log

)1log( xy

(max)i

i

E

E

x (max)o

o

E

E

y

For both laws, the values of xand y

refers to the equation below:

35


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E1 CAS T i i F t


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ITU-T Rec. G.704

E1 CAS Transmission Format

Time Slot 16 : Frames 2 through 15 are the same as frame 1

Time Slot 0: Even number frames 2 through 14 are the same as frame 0

Time Slot 0: Odd number frames 3 through 15 are the same as frame 1

1 = bit set to 1 0 = bit set to 0

1/0 = speech / signalling (varying data) X = unassigned bit (normally set to 1)

Fr. Ch. Ch.

1 1 162 2 17

3 3 18

: : :

15 15 30

10 2 3 4 5 6 7 8 9 10 11 12 13 14 15Multiframe (16 frames)

Frame 0 (32 Time Slots)

10 2 3 4 5 6 7 8 9101112131415 1716 1819202122232425262728293031

Frame 1 (32 Time Slots)

10 2 3 4 5 6 7 8 9101112131415 1716 1819202122232425262728293031

Time Slot 0

(8 bits)

0X 0 1 1 0 1 11

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

Time Slot 1

Speech (Ch. 1)

Time Slot 16

(8 bits)

00 0 0 X 0 X X

Time Slot 0

(8 bits)

1X 0 X X X X X

Time Slot 16

Signalling Bits1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

Speech

Ch. 1-15

Speech

Ch. 16-30

Speech

Ch. 1-15Speech

Ch. 16-30

Frame

Time Slot

Frame

Alignment

Word

Multi-

Frame

Alignment

Word

Changes to 1 on

loss of distant

multiframe

Changes to 1 on

loss of distant frame

(remote alarm)Not-Frame

alignment word

A B C D A B C D

LSB

E1 CAS T i i F t


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Applying this framing method to the Omniplexer.

TS 0 is used for framing and alarm information

TS 16 contains the voice signalling bits:

the A bit is used for the call status indication.

the B bit is used as a busy indication.

bit C & D are not used in most voice applications.

The Omniplexer assigns channel numbers 1 to 30, for usable transmission.

ITU-T G.704 (32 Time Slots)

10 2 3 4 5 6 7 8 9 10 11 12 13 14 15 1716 18 19 20 21 22 23 24 25 26 27 28 29 30 31

Omniplexer - 30 Channel Assignments

1- 2 3 4 5 6 7 8 9 101112 13 14 15 16- 17 18 19 20 21 22 23 24 25 26 27 28 29 30

E1 CAS Transmission Format

E1 CCS T i i F t


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E1 CCS Transmission Format

Applying this framing method to the OMNIBranch and OMNIFlex.

TS 0 is used for framing and alarm information

The OMNIBranch assigns channel numbers 1 to 31, for usable transmission.

CCITT G.704 (32 Time Slots)

10 2 3 4 5 6 7 8 9 10 11 12 13 14 15 1716 18 19 20 21 22 23 24 25 26 27 28 29 30 31

OMNIBranch / OMNIFlex - 31 Time Slot Assignments

1- 2 3 4 5 6 7 8 9 10 11 12 13 14 15 1716 18 19 20 21 22 23 24 25 26 27 28 29 30 31

Frame (32 Time Slots)

10 2 3 4 5 6 7 8 9 101112131415 1716 1819202122232425262728293031

Speech

Ch. 1-31

Time Slot

Time Slot 0

(8 bits)

0X 0 1 1 0 1 1

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

Time Slot 1

Speech (Ch. 1)

Frame

Alignment

Word

ITU-T Rec. G.704


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Example : PCM TDM CEPT System


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Example : PCM-TDM CEPT SystemFrame structure and Timing : European standard PCM system : E Line

(a) bits per time slot (b) time slots per frame (c) frames per multiframe

488 ns

3.9 s

3.9 s

125 s

125 s

2 ms

8 bits pertime slot

Bit duration

30 signal + 2 control = 32 channels = 1 frame

Signalling & synchronization

16 frames = 1 multiframeDuration of multiframe

41

PCM30 basic frame

PDH E1 signal


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1 2 3 4 5 6 7 8

X 1 Y Y Y 1 1 1

Bit No.

Value

Message

ca. 3,9 s1 2 3 4 5 6 7 8

Bit numbering

32 x 8 = 256 bit

125 s

t

voice1 voice2 voice15 voice16 voice30

0 1 2 15 16 17 31

SIG

1 2 3 4 5 6 7 8

0 0 1 1 0 1 1

Bit No.

value

Frame alignment

X

g

42

Bit 1 X Used in international connections

Bit 3 Y=1 FRAME SYNCHRONISATION

Bit 4 Y=1 HIGH ERROR DENSITY

Bit 3,4,5 111 Urgent alarm

Bit 6-8 111 Reserved for national options

Bit 1, X Used in

international

connections,

FAW :-0011011

PCM32 channels (30 signals + 2 control)


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Frame structure and timing

Number of channel = 32

Number of bits in one time slot = 8

32 channels = 1 frame

Number of bits in a frame = 32 x 8 = 256 bits

( g )

This frame must be transmitted within the sampling period and thus 8

x 103frames are transmitted per second.

Therefore :

Transmission rate = 8 x 103x 256 = 2.048 Mb/s

Bit duration = 1 / 2.048 x 106= 488 ns

Duration of a time slot = 8 x 488 ns = 3.9

s

Duration of a frame = 32 x 3.9 s = 125 s => (= 1 / 8 kHz = 125 s)

Duration of a multi frame = 16 x 125 s = 2 ms

43

Bit rate for PCM & Higher Order Mux


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Europe bit rate(Mb/s)

2.048

8.448

34.368

139.264

565.148

Telephone

channel

30

120

480

1920

7680

SDH 2.5Gb/s

Telephone

channel

North America bit

rate(Mb/s)

24 1.544

48 3.152

96 6.321

672 44.736

4032 274.176

European standard : A-Law

30 + 2 control channel = 32

Bit rate= 32 x 8 bit/sample x 8000 sample/s

= 2.048 Mb/s

North American standard (NAS) :-Law

For every 24 sample, 1 bit is added for

synchronization

For 24 sample => 24 x 8 bit/sample + 1 bit

= 193 bits

Bit rate= 193 x 8000 = 1.544 Mb/s

Needs MultiplexingProcess of transmitting two or more

signals simultaneously44


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LINE CODE

AMI CODE SPECTRUM

45

LINE CODE


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LINE CODE30 CHL PCM HDB-3 (HIGH-DENSITY BIPLOAR code)

Number of' 1 's preceding

violation is ODD

46

Number of' 1 's precedingviolation is EVEN

Number of ' 1 ' since

last ViolationPolarity of

preceding'1'

Odd Even

Negative 000 V- B+OOV+

Positive 000 V + B-00 V-


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30 CHL PCM SYSTEM ITI/SHYAM

DC-DC CONVERTER . CONTROL CARD

10 NO OF SIGNALLING CARD . TP CARD

SIGNALLING MDX . VOICE OR DATA CARD (5 NO.)47


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4W DATA/SPEECH CARD

4W SPEECH

4W DATA CARD(64Kb/S)

Attenuator 0.5,1,2,4dB

48

PCM Transmission System


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PCM Transmission System

Th d t f PCM


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The advantages of PCM are:

Relatively inexpensive digital circuitry may be used

extensively. PCM signals derived from all types of analog sources

may be merged with data signals and transmitted overa common high-speed digital communication system.

In long-distance digital telephone systems requiringrepeaters, a clean PCM waveform can be regeneratedat the output of each repeater, where the input consistsof a noisy PCM waveform.

The noise performance of a digital system can besuperior to that of an analog system.

The probability of error for the system output can bereduced even further by the use of appropriate codingtechniques.


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DIGITAL MULTIPLEXING

PDH E1 signal


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European digital signal 1

PCM30 (Pulse Code Modulation, 30 voice channels)

G.703, G.704, G.732 (ITU recommendations)PDH basic system (Plesiochronous Digital Hierarchy)

Features

Time multiplex

Bit rate 2.048 Mbit/s 50 PPM32 channels with 64 kbit/s each

30 voice channels, 1 synchronization/message, 1 signalling

75 coax or 120 symmetrical twisted pair

Rectangular pulses, HDB3 line coding

52

Bit rate for PCM & Higher Order Mux


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Europe bit rate(Mb/s)

2.048

8.448

34.368

139.264

565.148

Telephone

channel

30

120

480

1920

7680

SDH 2.5Gb/s

Telephone

channel

North America bit

rate(Mb/s)

24 1.544

48 3.152

96 6.321

672 44.736

4032 274.176

European standard : A-Law

30 + 2 control channel = 32

Bit rate= 32 x 8 bit/sample x 8000 sample/s

= 2.048 Mb/s

North American standard (NAS) :-Law

For every 24 sample, 1 bit is added for

synchronization

For 24 sample => 24 x 8 bit/sample + 1 bit

= 193 bits

Bit rate= 193 x 8000 = 1.544 Mb/s

Needs MultiplexingProcess of transmitting two or more

signals simultaneously

53

/


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DIGITAL HIERARCHIES BASED ON THE 1544 KBIT/S PCM PRIMARY MULTIPLEX

EQUIPMENT(BELL LAB 1968)

Level in

hierarchy

Bit rate Trans. line

First level 1544 kbit/s T1

Second level 6312 kbit/s T2

Third level 46304 kbit/s L5 (Jumbo Grp)

Fourth level 280000 kbit/s WT4 (Wave guide)

Fifth level 568000 kbit/s T5

PLESIOCHRONOUS DIGITAL HIERARCHY


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PLESIOCHRONOUS DIGITAL HIERARCHY

(PDH)

2/25/2014 55

PDH Hierarchy


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(E5)

564.992

Mbit/s

E1

2.048 Mbit/s

DSMX

64k/2M

MStD

PCM

DIV

LE2

E2

8.448 Mbit/s

E22/8

E3

34.368 Mbit/s

E3

8/34

E4

139.264 Mbit/s

E4

34/140

56

E5

140/565


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Specification at Output Port

E1 E2 E3 E4 E5

Bit rate in Mbit/s 2.048 8.448 34.368 139.264 565.992

Clock tolerance 50PPM

30

PPM

20

PPM

15

PPM

5 PPM

Frame length in

bits/Time in s

256bit

125s

848bit/

100.38

1536bit/

22.375

1928bit/

21.024

Stuffing rate per

frame

0.42 0.4357 0.4192

Impedance in 120 75 75 75 75

Line code HDB

3

HDB3 HDB3/

CMI

CMI


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SIGNAL :-

PLESIOCHRONOUS SIGNAL

SIGNALS WHOSE CLOCK CAN VARRY

INDEPENDENT OF ONE ANOTHER BUT THE

RANGE OF SIGNAL VARIATION IS RESTRICTED

WITHIN CERTAIN LIMITS.

Synchronous Signal

Asynchronous Signal

MULTIPLEXING OF SYNCHRONOUS DIGITAL


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MULTIPLEXING OF SYNCHRONOUS DIGITAL

SIGNALS

Block interleaving :

Bunch of information taken at a time from eachtributary and fed to main multiplex output

stream. The memory required will be verylarge.

Bit interleaving :

A bit of information taken at time from eachtributary and fed to main multiplex outputstream in cyclic order, a very small memoryis required.


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Justification

In general, incoming tributaries have

independent clocks. In that case, it is

inevitable that clock rate of a tributary and the

(divided) clock rate of the multiplexer (insecond order TDM, it is 8448/4 = 2112 KHz)

are not the same. Without any precautions,

the result will be Slip.


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The Frame Alignment Princip le


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Justification


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Justification

MULTIPLEXING OF ASYNCHRONOUS


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MULTIPLEXING OF ASYNCHRONOUS

SIGNAL

Positive justification :Common synchronization bitrate offered at each tributary is higher than the bitrate of individual tributary.

Positive-negative justification : Commonsynchronization bit rate offers is equal to thenominal value.

Negative justification :Common synchronizationbit rate offered is less than the nominal value.


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Incoming Bit Rate Too High


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Incoming Bit Rate Too Low

Multiplexing 4 E1 signalsPDH E2 signal


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E2: 8,448 Mbit/s 30 ppm

>

E1: 2,048 Mbit/s 50 ppm

E1: 2,048 Mbit/s 50 ppm

E1: 2,048 Mbit/s 50 ppm

E1: 2,048 Mbit/s 50 ppm

67

Positive justificationPDH E2 signal


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t

2 3 4 5 6 7 8 9 10

2 3 4 5 6 7 8 9 10 11S

Suppressing reading clock

Insert stuffing bit

111

fwrite

1

fread

68

Frame structurePDH E2 signal8Mb FRAME STRUCTURE


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Block 1

200 info bits

Block 2

208 info bits

Block 3

208 info bits

Block 4

204-208 info bits

1..12

848 bit

100,38 s

13..212 5..212 5..212 9..212

U N

AlarmsFrame alignment pattern

0 01 0 0 01111

1 2 3 4 1 2 3 4 5 6 7 81 2 3 4

Justification control bits1 bit per channel and frame

(transmitted 3 times)

0=no stuffing; 1=stuffing

Justification bits1 bit per ch. and frame

no stuffing: information

stuffing: fixed value

69

8 b S UC U


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Frame Alignment

Bunched words (first 10 bits in second order

multiplex frame) is preferred to distributed

bits to prevent imitation by any other bit

sequence. The sequence used in Second and Third Order

MUX is 1111010000.


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Four bit stream of 2048 Kb/s are multiplexed. The resulting bit

stream of 8448 Kb/s can be thought of being composed asfollows :- Per tributary=84484=2112Kb/s

No of frame per second =8448kb/s848=996210000

Nominal bit rate : 2048 Kb/s

Frame alignment information Per tributary: 30 Kb/s

Justification control digits : 30 Kb/s

Sub total : 2108 Kb/s

Justification digits : 2112-2108= 4 Kb/s used toallow over speed

Justification rate per frame and E1 signal 0.42 bit

Frame structurePDH E3 signal


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Block 1

372 info bits

Block 2

380 info bits

Block 3

380 info bits

Block 4

376-380 info bits

1..12

1536 bit

44,6927 s

13..384 5..384 5..384 9..384

U N

AlarmsFrame alignment pattern

0 01 0 0 01111

1 2 3 4 1 2 3 4 5 6 7 81 2 3 4







72

PDH E3 signal


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2nd multiplex level of PDH

Multiplexing of four E2 tributariesFeatures

Bit rate 34,368 Mbit/s 20 ppm.

Frame duration 44,6927 sFrame frequency 22,375 kHz

Bits per frame 1536

Bit interleaved multiplexing of 4 E2 signals

1 justification bit per frame and E2 signal

3 justification control bits per frame and E2 signal

Justification rate per frame and E2 signal 0,4357 bit

73

Frame structurePDH E4 signal


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Block 1

472 info bits

Block 2, 3, 4, 5

je 484 info bits

Block 6

480 - 484 info bits

1..16

2928 bit

21,024 s

17..488 5..488 9..488

Alarms

D N

Frame alignment pattern

0 01 0 0 01111 1 0 Y1Y2

Data communication channel

1 2 3 4 1 2 3 4 5 6 7 8







74

PDH E4 signal


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3rd multiplex level of PDH

Multiplexing of four E3 tributaries

Features

Bit rate 139,264 Mbit/s 15 ppm

Frame duration 21,024 s

Frame frequency 47,564 kHz

Bits per frame 2928

Bit interleaved multiplexing of 4 E3 signals

1 justification bit per frame and E3 signal

3 justification control bits per frame and E3 signal

Justification rate per frame and E3 signal 0,41912 bit

75

Specification at Output Port (PCM)


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p p ( )

Pair(s) in each direction One Coaxial

Pair

One Symmetrical

Pair

Test Load Impedance 75 ohm 120 ohm

(rest.)

Nom inal peak vo ltage of a

mark

2.37 V 3 V

Peak vo ltage o f a space 0+0.237 V 0+0.3 V

Nom inal pulse width 244 ns 244ns

Ratio of ampli tude of +ve and

ve pu lses at the centre of

pu lse interval

0.95 to

1.05

0.95 to 1.05

Ratio of w idths o f +ve and ve

pu lses at the nom inal hal f

ampl i tude

0.95 to

1.05

0.95 to 1.05


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Specification at Output Port (8M)Pair(s) in each direction One Coaxial Pair

Test Load Impedance 75 ohm (rest.)

Nom inal peak vo ltage of a mark

(pulse)

2.37 V

Peak vo ltage of a space (no pu lse) 0 + 0.237 V

Nom inal pulse width 59 ns

Ratio of ampli tud e of +ve and ve

pu lses at the centre of pulseinterval

0.95 to 1.05

Ratio of widths of +ve andve

pulses at the nominal half

amplitude

0.95 to 1.05


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Specification at Output Port (34MB)Pair(s) in each direction One Coaxial Pair


Nom inal peak vo ltage of a mark

(pulse)

1.0 V

Peak vo ltage of a space (no pu lse) 0 + 0.1V

Nom inal pulse width 14.55

Ratio of ampli tude of +ve and ve

pu lses at the center of pulseinterval

0.95 to 1.05

Ratio of w idths o f +ve and ve

pu lses at the nom inal hal f

ampl i tude

0.95 to 1.05


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Specification at Output Port (140Mb)

Pair(s) in each direction One Coaxial Pair


pk . to p k. Voltage 1 + 0.1 V

Rise time between 10%

and 90% amp l i tude of

measured ampl i tude

< 2 ns

Return loss > 15 dB for 7 MHz to 210

MHz


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DIGITAL TRANSMISSION ANALYSER

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f


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Performance Criteria

Digital Transmission Analyser (DTA) is used forthe measurement of both BER and Jitter.

Digital Transmission - Performance Criteria (

General)1 in 106 (1.OE6) : Better

1 in 105 (1.OE5) : Good

1 in 104 (1.OE4) : Reasonably good

1 in 103 (1.OE3) : Just Acceptable

More than 1 in 103 : Unacceptable

Bit errorsgreatly affect data service.

For data channels 1 in 109 (1.OE9) is normally realizable.

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Quality Parameters

The quality parameters are: Error Seconds (ES)

Severely Error Seconds (SES)

Non Severely Error Seconds (NSES)

Degraded Minutes (DM).

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Quality Parameters

Error Seconds (ES):Number of one-secondintervals with one or more errors.

Severely Error Seconds (SES):Number of one-

second intervals with an error rate, worsethan 1.OE-3

Non-Severely Error Seconds (NSES): Number

of one-second intervals with an error rate,better than or equal to 1.OE-3.

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Degraded Minutes (DM): Number of one second


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Degraded Minutes (DM): Number of one-second

intervals with a bit error rates worse than 1.OE-6.

Available and non-available time A period of available time begins with a period of

ten consecutive seconds each of which has a BER

better than 1.0E-3. These 10 seconds areconsidered to be available time.

A period of unavailable time begins when the bit

error rate in each second is worse than 1.0E-3 fora period of 10 consecutive seconds. These 10

consecutive seconds are considered to be

unavailable time.84

JITTER


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JITTER

Jitteris the undesired deviation from trueperiodicity of an assumed periodic signal in

electronics and telecommunications, often in

relation to a reference clock source. Jitter maybe observed in characteristics such as the

frequency of successive pulses, the signal

amplitude, or phase of periodic signals. Jitteris a significant, and usually undesired, factor in

the design of almost all communications links.

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JITTER ASPECT OF MULTIPLEX


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JITTER ASPECT OF MULTIPLEX

EQUIPMENT

Jitter introduced by the multiplex system:1. Jitter introduced due to the routine insertion of the

frame alignment words and of the service digitsand justification instructions.

2. Justification jitter.

3. Waiting time jitter:-waiting time jitter which is dueto phase difference between write and read clockand varies from frame to frame, has a lowfrequency component and cannot be jittered outby P.L.L. at the demultiplexer


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Pcm Tta Batch

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