PBSS5255PAPS - Nexperia

17
PBSS5255PAPS 55V, 2A PNP/PNP low VCEsat (BISS) double transistor 11 December 2015 Product data sheet 1. General description PNP/PNP low V CEsat Breakthrough In Small Signal (BISS) double transistor in a leadless medium power DFN2020D-6 (SOT1118D) Surface-Mounted Device (SMD) plastic package with visible and solderable side pads. 2. Features and benefits Very low collector-emitter saturation voltage V CEsat High collector current capability I C and I CM High collector current gain h FE at high I C Reduced Printed-Circuit Board (PCB) requirements Exposed heat sink for excellent thermal and electrical conductivity High energy efficiency due to less heat generation Suitable for Automatic Optical Inspection (AOI) of solder joints AEC-Q101 qualified 3. Applications Load switch Battery-driven devices Power management Charging circuits LED lighting Power switches (e.g. motors, fans) 4. Quick reference data Table 1. Quick reference data Symbol Parameter Conditions Min Typ Max Unit Per transistor V CEO collector-emitter voltage open base - - -55 V I C collector current - - -2 A I CM peak collector current single pulse; t p ≤ 1 ms - - -3 A Per transistor V CEsat collector-emitter saturation voltage I C = -0.7 A; I B = -7 mA; pulsed; t p ≤ 300 µs; δ ≤ 0.02 ; T amb = 25 °C - -300 -420 mV

Transcript of PBSS5255PAPS - Nexperia

Page 1: PBSS5255PAPS - Nexperia

PBSS5255PAPS55V, 2A PNP/PNP low VCEsat (BISS) double transistor11 December 2015 Product data sheet

1. General descriptionPNP/PNP low VCEsat Breakthrough In Small Signal (BISS) double transistor in a leadlessmedium power DFN2020D-6 (SOT1118D) Surface-Mounted Device (SMD) plasticpackage with visible and solderable side pads.

2. Features and benefits• Very low collector-emitter saturation voltage VCEsat• High collector current capability IC and ICM• High collector current gain hFE at high IC• Reduced Printed-Circuit Board (PCB) requirements• Exposed heat sink for excellent thermal and electrical conductivity• High energy efficiency due to less heat generation• Suitable for Automatic Optical Inspection (AOI) of solder joints• AEC-Q101 qualified

3. Applications• Load switch• Battery-driven devices• Power management• Charging circuits• LED lighting• Power switches (e.g. motors, fans)

4. Quick reference dataTable 1. Quick reference dataSymbol Parameter Conditions Min Typ Max Unit

Per transistor

VCEO collector-emittervoltage

open base - - -55 V

IC collector current - - -2 A

ICM peak collector current single pulse; tp ≤ 1 ms - - -3 A

Per transistor

VCEsat collector-emittersaturation voltage

IC = -0.7 A; IB = -7 mA; pulsed;tp ≤ 300 µs; δ ≤ 0.02 ; Tamb = 25 °C

- -300 -420 mV

Page 2: PBSS5255PAPS - Nexperia

© Nexperia B.V. 2017. All rights reserved

Nexperia PBSS5255PAPS55V, 2A PNP/PNP low VCEsat (BISS) double transistor

PBSS5255PAPS All information provided in this document is subject to legal disclaimers.

Product data sheet 11 December 2015 2 / 17

5. Pinning informationTable 2. Pinning informationPin Symbol Description Simplified outline Graphic symbol

1 E1 emitter TR1

2 B1 base TR1

3 C2 collector TR2

4 E2 emitter TR2

5 B2 base TR2

6 C1 collector TR1

7 C1 collector TR1

8 C2 collector TR2

Transparent top view

7 8

6 5 4

1 2 3

DFN2020D-6 (SOT1118D)sym138

B1E1 C2

B2C1

TR1TR2

E2

6. Ordering informationTable 3. Ordering information

PackageType number

Name Description Version

PBSS5255PAPS DFN2020D-6 DFN2020D-6: plastic, thermally enhanced ultra thin andsmall outline package; no leads; 6 terminals; body 2 x 2x 0.65 mm

SOT1118D

7. MarkingTable 4. Marking codesType number Marking code

PBSS5255PAPS 3N

Page 3: PBSS5255PAPS - Nexperia

© Nexperia B.V. 2017. All rights reserved

Nexperia PBSS5255PAPS55V, 2A PNP/PNP low VCEsat (BISS) double transistor

PBSS5255PAPS All information provided in this document is subject to legal disclaimers.

Product data sheet 11 December 2015 3 / 17

8. Limiting valuesTable 5. Limiting valuesIn accordance with the Absolute Maximum Rating System (IEC 60134).Symbol Parameter Conditions Min Max Unit

Per transistor

VCBO collector-base voltage open emitter - -55 V

VCEO collector-emitter voltage open base - -55 V

VEBO emitter-base voltage open collector - -7 V

IC collector current - -2 A

ICM peak collector current single pulse; tp ≤ 1 ms - -3 A

IB base current - -0.3 A

IBM peak base current single pulse; tp ≤ 1 ms - -1 A

[1] - 370 mW

[2] - 570 mW

[3] - 530 mW

Ptot total power dissipation Tamb ≤ 25 °C

[4] - 700 mW

Per device

[1] - 510 mW

[2] - 780 mW

[3] - 730 mW

Ptot total power dissipation Tamb ≤ 25 °C

[4] - 960 mW

Tj junction temperature - 150 °C

Tamb ambient temperature -55 150 °C

Tstg storage temperature -65 150 °C

[1] Device mounted on an FR4 Printed-Circuit Board (PCB), single-sided copper, tin-plated and standardfootprint.

[2] Device mounted on an FR4 PCB, single-sided copper, tin-plated, mounting pad for collector 1 cm2.[3] Device mounted on an FR4 PCB, 4-layer copper, tin-plated and standard footprint.[4] Device mounted on an FR4 PCB, 4-layer copper, tin-plated and mounting pad for collector 1 cm2.

Page 4: PBSS5255PAPS - Nexperia

© Nexperia B.V. 2017. All rights reserved

Nexperia PBSS5255PAPS55V, 2A PNP/PNP low VCEsat (BISS) double transistor

PBSS5255PAPS All information provided in this document is subject to legal disclaimers.

Product data sheet 11 December 2015 4 / 17

Tamb (°C)-75 17512525 75-25

aaa-020729

0.4

0.6

0.2

0.8

1Ptot(W)

0

(1)

(4)

(3)(2)

(1) FR4 PCB, single-sided copper, standard footprint(2) FR4 PCB, 4-layer copper, standard footprint

(3) FR4 PCB, single-sided copper, 1 cm2

(4) FR4 PCB, 4-layer copper, 1 cm2

Fig. 1. Power derating curves

9. Thermal characteristicsTable 6. Thermal characteristicsSymbol Parameter Conditions Min Typ Max Unit

Per transistor

[1] - - 338 K/W

[2] - - 219 K/W

[3] - - 236 K/W

Rth(j-a) thermal resistancefrom junction toambient

in free air

[4] - - 179 K/W

Per device

[1] - - 246 K/W

[2] - - 161 K/W

[3] - - 172 K/W

Rth(j-a) thermal resistancefrom junction toambient

in free air

[4] - - 131 K/W

[1] Device mounted on an FR4 PCB, single-sided copper, tin-plated and standard footprint.[2] Device mounted on an FR4 PCB, single-sided copper, tin-plated, mounting pad for collector 1 cm2.[3] Device mounted on an FR4 PCB, 4-layer copper, tin-plated and standard footprint.[4] Device mounted on an FR4 PCB, 4-layer copper, tin-plated, mounting pad for collector 1 cm2.

Page 5: PBSS5255PAPS - Nexperia

© Nexperia B.V. 2017. All rights reserved

Nexperia PBSS5255PAPS55V, 2A PNP/PNP low VCEsat (BISS) double transistor

PBSS5255PAPS All information provided in this document is subject to legal disclaimers.

Product data sheet 11 December 2015 5 / 17

aaa-020730

10

1

102

103

Zth(j-a)(K/W)

10-110-5 1010-210-4 10210-1

tp (s)10-3 1031

duty cycle = 10.75

0

0.500.33

0.200.10

0.050.02

0.01

FR4 PCB, standard footprint

Fig. 2. Transient thermal impedance from junction to ambient as a function of pulse duration; typical valuesaaa-020731

10

1

102

103

Zth(j-a)(K/W)

10-110-5 1010-210-4 10210-1

tp (s)10-3 1031

duty cycle = 10.75

0

0.500.33

0.200.10

0.050.02

0.01

FR4 PCB, mounting pad for collector 1 cm2

Fig. 3. Transient thermal impedance from junction to ambient as a function of pulse duration; typical values

Page 6: PBSS5255PAPS - Nexperia

© Nexperia B.V. 2017. All rights reserved

Nexperia PBSS5255PAPS55V, 2A PNP/PNP low VCEsat (BISS) double transistor

PBSS5255PAPS All information provided in this document is subject to legal disclaimers.

Product data sheet 11 December 2015 6 / 17

aaa-020733

10

1

102

103

Zth(j-a)(K/W)

10-110-5 1010-210-4 10210-1

tp (s)10-3 1031

duty cycle = 10.75

0

0.500.33

0.200.10

0.050.02

0.01

FR4 PCB, 4-layer copper, standard footprint

Fig. 4. Transient thermal impedance from junction to ambient as a function of pulse duration; typical valuesaaa-020734

10

1

102

103

Zth(j-a)(K/W)

10-110-5 1010-210-4 10210-1

tp (s)10-3 1031

duty cycle = 10.75

0.500.33

0.200.10

0.05 0.02

0.01 0

FR4 PCB, 4-layer copper, mounting pad for collector 1 cm2

Fig. 5. Transient thermal impedance from junction to ambient as a function of pulse duration; typical values

Page 7: PBSS5255PAPS - Nexperia

© Nexperia B.V. 2017. All rights reserved

Nexperia PBSS5255PAPS55V, 2A PNP/PNP low VCEsat (BISS) double transistor

PBSS5255PAPS All information provided in this document is subject to legal disclaimers.

Product data sheet 11 December 2015 7 / 17

10. CharacteristicsTable 7. CharacteristicsSymbol Parameter Conditions Min Typ Max Unit

Per transistor

VCB = -44 V; IE = 0 A; Tamb = 25 °C - - -100 nAICBO collector-base cut-offcurrent VCB = -44 V; IE = 0 A; Tj = 150 °C - - -50 µA

ICES collector-emitter cut-offcurrent

VCE = -44 V; VBE = 0 V; Tamb = 25 °C - - -100 nA

IEBO emitter-base cut-offcurrent

VEB = -5 V; IC = 0 A; Tamb = 25 °C - - -100 nA

VCE = -2 V; IC = -100 mA; pulsed;tp ≤ 300 µs; δ ≤ 0.02 ; Tamb = 25 °C

170 250 -

VCE = -2 V; IC = -500 mA; pulsed;tp ≤ 300 µs; δ ≤ 0.02 ; Tamb = 25 °C

140 200 -

VCE = -2 V; IC = -1 A; pulsed;tp ≤ 300 µs; δ ≤ 0.02 ; Tamb = 25 °C

110 150 -

hFE DC current gain

VCE = -2 V; IC = -2 A; pulsed;tp ≤ 300 µs; δ ≤ 0.02 ; Tamb = 25 °C

50 75 -

IC = -0.5 A; IB = -50 mA; pulsed;tp ≤ 300 µs; δ ≤ 0.02 ; Tamb = 25 °C

- -80 -120 mV

IC = -1 A; IB = -50 mA; pulsed;tp ≤ 300 µs; δ ≤ 0.02 ; Tamb = 25 °C

- -170 -250 mV

IC = -0.7 A; IB = -7 mA; pulsed;tp ≤ 300 µs; δ ≤ 0.02 ; Tamb = 25 °C

- -300 -420 mV

VCEsat collector-emittersaturation voltage

IC = -2 A; IB = -200 mA; pulsed;tp ≤ 300 µs; δ ≤ 0.02; Tamb = 25 °C

- -300 -450 mV

RCEsat collector-emittersaturation resistance

IC = -1 A; IB = -50 mA; pulsed;tp ≤ 300 µs; δ ≤ 0.02 ; Tamb = 25 °C

- - 250 mΩ

IC = -0.5 A; IB = -50 mA; pulsed;tp ≤ 300 µs; δ ≤ 0.02 ; Tamb = 25 °C

- -0.89 -1 V

IC = -1 A; IB = -50 mA; pulsed;tp ≤ 300 µs; δ ≤ 0.02; Tamb = 25 °C

- -0.93 -1 V

VBEsat base-emitter saturationvoltage

IC = -2 A; IB = -200 mA; pulsed;tp ≤ 300 µs; δ ≤ 0.02; Tamb = 25 °C

- -1.13 -1.25 V

VBE base-emitter voltage IC = -0.5 A; VCE = -2 V; pulsed;tp ≤ 300 µs; δfactor ≤ 0.02; Tamb = 25 °C

- -0.76 -0.9 V

td delay time - 10 - ns

tr rise time - 80 - ns

ton turn-on time

IC = -1 A; IBon = -50 mA; IBoff = 50 mA;Tamb = 25 °C

- 90 - ns

Page 8: PBSS5255PAPS - Nexperia

© Nexperia B.V. 2017. All rights reserved

Nexperia PBSS5255PAPS55V, 2A PNP/PNP low VCEsat (BISS) double transistor

PBSS5255PAPS All information provided in this document is subject to legal disclaimers.

Product data sheet 11 December 2015 8 / 17

Symbol Parameter Conditions Min Typ Max Unit

ts storage time - 195 - ns

tf fall time - 75 - ns

toff turn-off time - 270 - ns

fT transition frequency VCE = -10 V; IC = -500 mA;f = 100 MHz; Tamb = 25 °C

- 100 - MHz

Cc collector capacitance VCB = -10 V; IE = 0 A; ie = 0 A;f = 1 MHz; Tamb = 25 °C

- 16 - pF

aaa-020735

200

400

600

hFE

0

IC (mA)-10-1 -104-103-1 -102-10

(1)

(3)

(2)

VCE = −2 V(1) Tamb = 100 °C(2) Tamb = 25 °C(3) Tamb = −55 °C

Fig. 6. DC current gain as a function of collectorcurrent; typical values

-1.2

-1.8

-0.6

-2.4

-3.0IC(A)

-0

VCE (V)0 -5-4-2 -3-1

aaa-020736

-5

-15

-10

-20-25-30

-35-40-45

IB (mA) = -50

Tamb = 25 °C

Fig. 7. Collector current as a function of collector-emitter voltage; typical values

Page 9: PBSS5255PAPS - Nexperia

© Nexperia B.V. 2017. All rights reserved

Nexperia PBSS5255PAPS55V, 2A PNP/PNP low VCEsat (BISS) double transistor

PBSS5255PAPS All information provided in this document is subject to legal disclaimers.

Product data sheet 11 December 2015 9 / 17

aaa-020738

-0.4

-0.8

-1.2

VBE(V)

0

IC (mA)-10-1 -104-103-1 -102-10

(1)

(3)

(2)

VCE = −2 V(1) Tamb = −55 °C(2) Tamb = 25 °C(3) Tamb = 100 °C

Fig. 8. Base-emitter voltage as a function of collectorcurrent; typical values

aaa-020740

-0.4

-0.8

-1.2

VBEsat(V)

0

IC (mA)-10-1 -104-103-1 -102-10

(1)

(3)

(2)

IC/IB = 20(1) Tamb = −55 °C(2) Tamb = 25 °C(3) Tamb = 100 °C

Fig. 9. Base-emitter saturation voltage as a function ofcollector current; typical values

aaa-020741

-10-1

-10-2

-1

VCEsat(V)

-10-3

IC (mA)-10-1 -104-103-1 -102-10

(1)

(3)(2)

IC/IB = 20(1) Tamb = 100 °C(2) Tamb = 25 °C(3) Tamb = −55 °C

Fig. 10. Collector-emitter saturation voltage as afunction of collector current; typical values

aaa-020743

-10-1

-10-2

-1

VCEsat(V)

-10-3

IC (mA)-10-1 -104-103-1 -102-10

(1)

(3)

(2)

Tamb = 25 °C(1) IC/IB = 100(2) IC/IB = 50(3) IC/IB = 10

Fig. 11. Collector-emitter saturation voltage as afunction of collector current; typical values

Page 10: PBSS5255PAPS - Nexperia

© Nexperia B.V. 2017. All rights reserved

Nexperia PBSS5255PAPS55V, 2A PNP/PNP low VCEsat (BISS) double transistor

PBSS5255PAPS All information provided in this document is subject to legal disclaimers.

Product data sheet 11 December 2015 10 / 17

IC (mA)-10-1 -104-103-1 -102-10

aaa-020744

1

10-1

102

10

103

RCEsat(Ω)

10-2

(1)

(3)(2)

IC/IB = 20(1) Tamb = 100 °C(2) Tamb = 25 °C(3) Tamb = −55 °C

Fig. 12. Collector-emitter saturation resistance as afunction of collector current; typical values

IC (mA)-10-1 -104-103-1 -102-10

aaa-020745

1

10-1

102

10

103

RCEsat(Ω)

10-2

(1)

(3)(2)

Tamb = 25 °C(1) IC/IB = 100(2) IC/IB = 50(3) IC/IB = 10

Fig. 13. Collector-emitter saturation resistance as afunction of collector current; typical values

Page 11: PBSS5255PAPS - Nexperia

© Nexperia B.V. 2017. All rights reserved

Nexperia PBSS5255PAPS55V, 2A PNP/PNP low VCEsat (BISS) double transistor

PBSS5255PAPS All information provided in this document is subject to legal disclaimers.

Product data sheet 11 December 2015 11 / 17

11. Test information

006aaa266

- IBon (100 %)

- IB

input pulse(idealized waveform)

- IBoff

90 %

10 %

- IC (100 %)

- IC

tdton

90 %

10 %

tr

output pulse(idealized waveform)

t f

t

tstoff

Fig. 14. BISS transistor switching time definition

RC

R2

R1

DUT

mgd624

Vo

RB(probe)450 Ω

(probe)450 Ω

oscilloscope oscilloscope

VBB

VI

VCC

Fig. 15. Test circuit for switching times

11.1 Quality informationThis product has been qualified in accordance with the Automotive Electronics Council(AEC) standard Q101 - Stress test qualification for discrete semiconductors, and issuitable for use in automotive applications.

Page 12: PBSS5255PAPS - Nexperia

© Nexperia B.V. 2017. All rights reserved

Nexperia PBSS5255PAPS55V, 2A PNP/PNP low VCEsat (BISS) double transistor

PBSS5255PAPS All information provided in this document is subject to legal disclaimers.

Product data sheet 11 December 2015 12 / 17

12. Package outline

ReferencesOutlineversion

Europeanprojection Issue date

IEC JEDEC JEITA

SOT1118D - - -

sot1118d_po

14-07-1614-10-16

Unit

mmmaxnommin

0.650.620.59

0.04 2.1 0.77 2.1 1.0 0.54 0.300.49 0.250.44 0.20

0.05

A

Dimensions (mm are the original dimensions)

Note1. Dimension A is including plating thickness.

DFN2020D-6: plastic, thermally enhanced ultra thin and small outline package; no leads;6 terminals; body 2 x 2 x 0.65 mm SOT1118D

A1 bp

0.352.0 0.67 2.0 0.90.301.9 0.57 1.9 0.80.25

D D1 E E1 e

0.65

e1 Lp v

0.1

y y1

0.05

0 1 2 mm

scale

pin 1index area

cut-off end ofnon-fuctional bonding wire

A BD

E

detail X

A1

A

E1(2x)

Lp(6x)

e1 e1

pin 1index area

D1(2x)

1 3

6 4

bp(6x)

BAv

X

C

yCy1

(8x)

solderable lead endprotrusion maximum 0.035 mm (6x)

e e

Fig. 16. Package outline DFN2020D-6 (SOT1118D)

Page 13: PBSS5255PAPS - Nexperia

© Nexperia B.V. 2017. All rights reserved

Nexperia PBSS5255PAPS55V, 2A PNP/PNP low VCEsat (BISS) double transistor

PBSS5255PAPS All information provided in this document is subject to legal disclaimers.

Product data sheet 11 December 2015 13 / 17

13. Soldering

0.33

SOT1118D

sot1118d_fr

solder lands

occupied area

solder resist

solder paste

Dimensions in mm

0.9 1 1.1

0.350.45 0.2

1.652.2

0.30.25 0.65

1.650.21

0.31

0.935

0.22

2.32.5

0.12

0.53 0.43

0.77

0.670.570.49

Fig. 17. Reflow soldering footprint for DFN2020D-6 (SOT1118D)

Page 14: PBSS5255PAPS - Nexperia

© Nexperia B.V. 2017. All rights reserved

Nexperia PBSS5255PAPS55V, 2A PNP/PNP low VCEsat (BISS) double transistor

PBSS5255PAPS All information provided in this document is subject to legal disclaimers.

Product data sheet 11 December 2015 14 / 17

14. Revision historyTable 8. Revision historyData sheet ID Release date Data sheet status Change notice Supersedes

PBSS5255PAPS v.1 20151211 Product data sheet - -

Page 15: PBSS5255PAPS - Nexperia

© Nexperia B.V. 2017. All rights reserved

Nexperia PBSS5255PAPS55V, 2A PNP/PNP low VCEsat (BISS) double transistor

PBSS5255PAPS All information provided in this document is subject to legal disclaimers.

Product data sheet 11 December 2015 15 / 17

15. Legal information

15.1 Data sheet statusDocumentstatus [1][2]

Productstatus [3]

Definition

Objective[short] datasheet

Development This document contains data fromthe objective specification for productdevelopment.

Preliminary[short] datasheet

Qualification This document contains data from thepreliminary specification.

Product[short] datasheet

Production This document contains the productspecification.

[1] Please consult the most recently issued document before initiating orcompleting a design.

[2] The term 'short data sheet' is explained in section "Definitions".[3] The product status of device(s) described in this document may have

changed since this document was published and may differ in case ofmultiple devices. The latest product status information is available onthe Internet at URL http://www.nexperia.com.

15.2 DefinitionsPreview — The document is a preview version only. The document is stillsubject to formal approval, which may result in modifications or additions.Nexperia does not give any representations or warranties as tothe accuracy or completeness of information included herein and shall haveno liability for the consequences of use of such information.

Draft — The document is a draft version only. The content is still underinternal review and subject to formal approval, which may result inmodifications or additions. Nexperia does not give anyrepresentations or warranties as to the accuracy or completeness ofinformation included herein and shall have no liability for the consequencesof use of such information.

Short data sheet — A short data sheet is an extract from a full data sheetwith the same product type number(s) and title. A short data sheet isintended for quick reference only and should not be relied upon to containdetailed and full information. For detailed and full information see therelevant full data sheet, which is available on request via the local Nexperiasales office. In case of any inconsistency or conflict with theshort data sheet, the full data sheet shall prevail.

Product specification — The information and data provided in a Productdata sheet shall define the specification of the product as agreed betweenNexperia and its customer, unless Nexperia andcustomer have explicitly agreed otherwise in writing. In no event however,shall an agreement be valid in which the Nexperia productis deemed to offer functions and qualities beyond those described in theProduct data sheet.

15.3 DisclaimersLimited warranty and liability — Information in this document is believedto be accurate and reliable. However, Nexperia does not giveany representations or warranties, expressed or implied, as to the accuracyor completeness of such information and shall have no liability for theconsequences of use of such information. Nexperia takes noresponsibility for the content in this document if provided by an informationsource outside of Nexperia.

In no event shall Nexperia be liable for any indirect, incidental,punitive, special or consequential damages (including - without limitation -lost profits, lost savings, business interruption, costs related to the removalor replacement of any products or rework charges) whether or not suchdamages are based on tort (including negligence), warranty, breach ofcontract or any other legal theory.

Notwithstanding any damages that customer might incur for any reasonwhatsoever, Nexperia’s aggregate and cumulative liability towardscustomer for the products described herein shall be limited in accordancewith the Terms and conditions of commercial sale of Nexperia.

Right to make changes — Nexperia reserves the right tomake changes to information published in this document, including withoutlimitation specifications and product descriptions, at any time and withoutnotice. This document supersedes and replaces all information supplied priorto the publication hereof.

Suitability for use in automotive applications — This Nexperiaproduct has been qualified for use in automotiveapplications. Unless otherwise agreed in writing, the product is not designed,authorized or warranted to be suitable for use in life support, life-critical orsafety-critical systems or equipment, nor in applications where failure ormalfunction of a Nexperia product can reasonably be expectedto result in personal injury, death or severe property or environmentaldamage. Nexperia and its suppliers accept no liability forinclusion and/or use of Nexperia products in such equipment orapplications and therefore such inclusion and/or use is at the customer's ownrisk.

Quick reference data — The Quick reference data is an extract of theproduct data given in the Limiting values and Characteristics sections of thisdocument, and as such is not complete, exhaustive or legally binding.

Applications — Applications that are described herein for any of theseproducts are for illustrative purposes only. Nexperia makes norepresentation or warranty that such applications will be suitable for thespecified use without further testing or modification.

Customers are responsible for the design and operation of theirapplications and products using Nexperia products, and Nexperiaaccepts no liability for any assistance with applications orcustomer product design. It is customer’s sole responsibility to determinewhether the Nexperia product is suitable and fit for thecustomer’s applications and products planned, as well as for the plannedapplication and use of customer’s third party customer(s). Customers shouldprovide appropriate design and operating safeguards to minimize the risksassociated with their applications and products.

Nexperia does not accept any liability related to any default,damage, costs or problem which is based on any weakness or defaultin the customer’s applications or products, or the application or use bycustomer’s third party customer(s). Customer is responsible for doing allnecessary testing for the customer’s applications and products using Nexperiaproducts in order to avoid a default of the applicationsand the products or of the application or use by customer’s third partycustomer(s). Nexperia does not accept any liability in this respect.

Limiting values — Stress above one or more limiting values (as defined inthe Absolute Maximum Ratings System of IEC 60134) will cause permanentdamage to the device. Limiting values are stress ratings only and (proper)operation of the device at these or any other conditions above thosegiven in the Recommended operating conditions section (if present) or theCharacteristics sections of this document is not warranted. Constant orrepeated exposure to limiting values will permanently and irreversibly affectthe quality and reliability of the device.

Terms and conditions of commercial sale — Nexperiaproducts are sold subject to the general terms and conditions of commercialsale, as published at http://www.nexperia.com/profile/terms, unless otherwiseagreed in a valid written individual agreement. In case an individualagreement is concluded only the terms and conditions of the respectiveagreement shall apply. Nexperia hereby expressly objects toapplying the customer’s general terms and conditions with regard to thepurchase of Nexperia products by customer.

Page 16: PBSS5255PAPS - Nexperia

© Nexperia B.V. 2017. All rights reserved

Nexperia PBSS5255PAPS55V, 2A PNP/PNP low VCEsat (BISS) double transistor

PBSS5255PAPS All information provided in this document is subject to legal disclaimers.

Product data sheet 11 December 2015 16 / 17

No offer to sell or license — Nothing in this document may be interpretedor construed as an offer to sell products that is open for acceptance or thegrant, conveyance or implication of any license under any copyrights, patentsor other industrial or intellectual property rights.

Export control — This document as well as the item(s) described hereinmay be subject to export control regulations. Export might require a priorauthorization from competent authorities.

Translations — A non-English (translated) version of a document is forreference only. The English version shall prevail in case of any discrepancybetween the translated and English versions.

15.4 TrademarksNotice: All referenced brands, product names, service names andtrademarks are the property of their respective owners.

Page 17: PBSS5255PAPS - Nexperia

© Nexperia B.V. 2017. All rights reserved

Nexperia PBSS5255PAPS55V, 2A PNP/PNP low VCEsat (BISS) double transistor

PBSS5255PAPS All information provided in this document is subject to legal disclaimers.

Product data sheet 11 December 2015 17 / 17

16. Contents1 General description ............................................... 12 Features and benefits ............................................13 Applications ........................................................... 14 Quick reference data ............................................. 15 Pinning information ...............................................26 Ordering information .............................................27 Marking ................................................................... 28 Limiting values .......................................................39 Thermal characteristics .........................................410 Characteristics .......................................................711 Test information ................................................... 1111.1 Quality information ............................................. 1112 Package outline ................................................... 1213 Soldering .............................................................. 1314 Revision history ...................................................1415 Legal information .................................................1515.1 Data sheet status ............................................... 1515.2 Definitions ...........................................................1515.3 Disclaimers .........................................................1515.4 Trademarks ........................................................ 16

© Nexperia B.V. 2017. All rights reservedFor more information, please visit: http://www.nexperia.comFor sales office addresses, please send an email to: [email protected] Date of release: 11 December 2015