On-board digital electronics and software emerging ... · On-board digital electronics and software...

© Airbus Defence and Space

On-board digital electronics and software

emerging technologies in space applicationsETFA 2015, September 8th, Luxembourg

mailto:[email protected]?subject=ETFA 2015

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Outline

Introduction – Spacecraft systems

Applications

Specific constraints

Architecture

Space systems on-board digital electronics and software

State of the art technologies for processors and data-links

Future needs and technology development strategy

On-board processing Technology trends

20th IEEE International Conference on Emerging Technologies in Factory Automation

ETFA 2015, Industry day, September 8th, 2015, Luxembourg

On-board digital electronics and software emerging technologies in space applications

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Pleiades

Spacecraft systems applications

Satellites

Earth Observation

Science

Telecommunications

Navigation

© AIRBUS Defence and Space




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Gaia


Satellites

Earth Observation

Science

Telecommunications

Navigation

© AIRBUS Defence and Space




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Satellites

Earth Observation

Science

Telecommunications

Navigation

Alphasat I-XL communications satellite © AIRBUS Defence and Space




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Satellites

Earth Observation

Science

Telecommunications

Navigation

Space exploration

Cruise vehicles

Specific manoeuvers

Surface exploration (rovers)

Bepi Colombo release at Mercury © AIRBUS Defence and Space




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Satellites

Earth Observation

Science

Telecommunications

Navigation

Space exploration

Cruise vehicles

Specific manoeuvers


EXOMARS rover © ESA




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Satellites

Earth Observation

Science

Telecommunications

Navigation

Space exploration

Cruise vehicles

Specific manoeuvers


Space Transportation

Orbit service vehicles

Manned Flight

Launchers International Space Station and ATV-2 Johannes Kepler © NASA




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Ariane 5 launch of EUTELSAT 21B & STAR ONE C3


Satellites

Earth Observation

Science

Telecommunications

Navigation

Space exploration

Cruise vehicles

Specific manoeuvers




Manned Flight

Launchers© CNES

© ESA-CNES-ARIANESPACE




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Comet 67P/Churyumov-Gerasimenkoon 3 August 2014 from a distance of 285 km.

Spacecraft systems

Satellites

Earth Observation

Science

Telecommunications

Navigation

Space exploration

Cruise vehicles

Specific manoeuvers




Manned Flight

Launchers© CNES

© ESA/Rosetta/MPS

Various space systems Common technology solutions20th IEEE International Conference on Emerging Technologies in Factory Automation



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Spacecraft systems specific constraintsPhilae landing on the comet Chury




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Spacecraft systems specific constraintsData Handling

Limited Communications Limited data rates and low availability of the RF link except in

geostationary orbit– Indirect communication paths (using other spacecraft)

– Autonomous on-board data processing for bandwidth optimisation

– Automated on-board procedures and operation scheduling

– High capacity on-board data storage and compression

Real-time autonomous control Navigation and Orbit control: autonomous avionics system

Time reference, time distribution and synchronisation between

on-board devices and with distant systems

Robustness Long mission lifetime

Maintainability limited to software

Autonomous Failure Detection, Isolation and Recovery

Operator error robustness

Secured communications© NASA




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Spacecraft systems specific constraints Environment

Tolerance to radiations for on-board electronics Cumulated radiation dose limits time-life + Destructive effects (latch-up) + Transients errors

due to space particles (heavy ions, protons…)

Rad hard component technologies (e.g. Silicon On Isolator)

Fault-tolerant design inside the chips

Fault-tolerant systems architecture with COTS components

Poor electronics components and devices catalogue

Lower processing performance w.r.t. ground applications

Complex systems, heavy investments

Technology gap on processing devices

Electrical power: only solar energy Highly critical in deep space exploration

Mechanical constraints Pre-operational life: Assembly Integration and Tests, transport, launch, orbit-transfer

Extreme vacuum and thermal cyclic variations in operation




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Spacecraft systems specific constraintsIndustrial efficiency

Variety of missions / limited market

Generic platforms and standard product families

– Requirement domain without precise mission selection

– Customisation for adaptation to mission

Interfaces standardisation

– inter-operable products catalogue from several sources

Payloads with specific instruments

Legal constraints Geographical-return for international institutional missions

ITAR / Export control

Testability Full test coverage on highly complex systems

Production, integration and validation methods and tools

Quality Cost of non-quality

Highly demanding development, manufacturing, assembly andverification processes

Obsolescence Maintenance of manufacturing capability for critical components

Strategic stocks




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Spacecraft systems on-board architectureThe International Space Station and the Space Shuttle




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Spacecraft systems on-board architectureSatellites

Two subsystems

Payload

Instruments Data Processing– Mission specific

(science instruments…)

– Huge volumes of non-real-time data

– High speed data links

– High Performance data processing

– High capacity data Storage(delayed transmission to ground stations)

Platform

Command and Control & Data Handling– Mostly generic

– Control loop with real-time constraints

– Low data volumes

– Low speed data bus

– Low performance data processing

– Low capacity data storage (Buffering) METOP Platform TERRASAR Platform

Performance

Reliability




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gyroscopesmagnetometer

sun sensor

Sensors

star trackersmagnetic torquers

Actuators

thrusters

Attitude and Orbit Control System (AOCS)

wheels

Control

Momentum

Gyroscope

Spacecraft systems on-board architectureSatellites

Power

Control &

Distribution

Battery

Electrical Power

Solar Panel

Deployment

Mechanisms

…On-board Buses and Networks

Data management System

Data

Storage

Data

Storage

Central

Software

Central

DMS

Central

Computer

Thermal Regulation

Thermal

Control

Electronics

Thermal

sensors

Heaters

Fluid loops

Thermal Regulation

Thermal

Control

Electronics

Thermal

sensors

Heaters

Fluid loops

Thermal Regulation

Thermal

Control

Electronics

Thermal

sensors

Heaters

Fluid loops

Payload processing

Payload

SoftwareHigh performance

Computer (s)

instruments

Transponders

RF Communications

Transponders

Antennas




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Spacecraft systems on-board architectureSatellites Platform Data Handling

To dumb sensors (>100):

Thermistors, switch closure…

Central

On-Board

Computer

Main system bus

Point-to-point

Connections or

connection

to Main system bus

To smart sensors (<10):

Reaction wheels, star trackers,

Gyroscopes, GPS receiver…

Remote

Terminal

Analogue

interfaces

Remote

TerminalRemote

Terminal

Remote

Terminal




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Spacecraft systems on-board architectureSatellite Payload data processing chain

Data Storage

Instrument or

antenna

Data

Receiving

Data

Processing

Data

TransmissionAntenna

Payload

Control




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Spacecraft systems on-board architectureTypical scientific spacecraft architecture




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Spacecraft systems on-board architectureLauncher example (Ariane 5)

Fully automated system

Stages separation

Guidance Navigation and Control

Generic equipment with specific mission

configurations

Low data volumes

Critical real-time constraints

High Availability

Low speed data bus

Telemetry system

High data volumes

Segregated from the GNC system

Ref

IssueDate

Page

SIGNAL DE BON

FONCTIONNEMENT

EQ.Nominal

N°1

EQ.Nominal

N°i

EQ. Redondant

N°1

EQ. Redondant

N°i

OBSERVATION DU CONTEXTE

ET REPRISE EN CAS DE

DEFAILLANCE DE

L’OBC MAITRE

OBC 1(Maître)

UCTM

COUPLEUR

VERS ETAGES INFERIEURS

BUS 1 BUS 2

OBC 2(Secours)

ENVOI DES ORDRES,

ACQUISITION DES MESURES,

AUTOTEST.

INHIBITION EN CAS

DE DEFAILLANCE

VERS ETAGES INFERIEURS

MIL-STD-1553B




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Rendez-vousSensors

SENSORS ACTUATORS

VTC CMU

FTC 1

ATV CORE

SYSTEM BUSES

RUSSIAN SEGMENT BUSES

FTC 2 FTC 3

US SEGMENT BUSES

CMU

Launch Pad i/f BUSES

CMU

EquipmentMeasurement & Command

MSU

ATVCARGO

PropulsionDrive

ElectronicsGyros Earth

Sensors

GPSPowerDistr.

UHFSBand

SunSensors

to CMUs

Spacecraft systems on-board architectureIn Orbit service & manned flight (ATV)




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… now lets focus on future needs and technologies …

Pleiades takes high resolution pictures of the Earth


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… now lets focus on future needs and technologies …

Satellite avionics under test



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Outline


Applications


Architecture








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State of the artOn-board Processors

Mil-Std-1750 Mil-STD-1750A standard architecture, many implementations

16 bits, typically 3 Mips @ 25 MHz

Missions: ISS, ATV, Envisat, Rosetta, LansSat…

3-1750 recent implementation still in use onEurostar 3000 telecom satellites

ERC-32 Sparc V7, 32 bits, typically 20 Mips @ 25 MHz (0,5µm)

Missions: ISS, ATV, Ariane 5, VegaPleiades, TerraSar, Herschel, Gaia, Galileo

LEON 2 and LEON 3 Sparc V8, 32 bits, 80 Mips @ 100 MHz (0,18nm)

Spacecraft Controller on a Chip– Leon 2 or Leon3

– Specialised functions such as TM/TC, Reconfiguration, Modem

– Space standard I/O’s: for 1553, SpaceWire, Can Bus

Selected on almost all new Spacecraft

Vega On-Board Computer

(ERC-32 processor)

© RUAG Space

OSCAR Computer

(LEON-3 processor)


Eurostar 3000 SCU

(3-1750 processor)





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State of the ArtKey data processing components

Memories

Commercial grade components with ECC’s (EDAC or Reed Solomon)

SDRAM or non volatile flash memory

FPGA (*)

Rad hard components (anti-fused technology: programmable only once)

No common use (yet) of reprogrammable devices (radiation sensible)

ASIC (**)

Space components developped in ASIC rad-hard technologies:– Standard products: Spacecraft Controller on a Chip, I/O devices, memory control, Compression, FFT,

GNSS processing,…

– Specialized functions when processing performance

cannot be reached through reprogrammable devices

Rad-Hard libraries derived from commercial technologies :– 180nm from ATMEL

– Aeroflex 90 nm

– STM 65 nm to be ready in 2016

– (Commercial: 28nm or below)

(*) Field-Programmable Gate Array

(**) Application Specific Integrated Circuits

Solid State Recorder

up to 20 Tb with Flash memory


CORECI recorder with ASIC’s

Up to 8.6 Gb/s image compression,

cyphering and storage





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State of the artBuses and Networks technologies

Field bus or direct connections to many sensors and actuators Typical bandwidth: 10 to 100 Kbps

Connections to local Remote Terminals or directly to on-board computer

► CAN bus, RS422, analogues

Spacecraft control bus Main data link between the on-board functional sub-systems

– On Board Computers, remote terminals, sensors and actuators

Key properties: reliability, real-time & dependability

Typical data rate: 0,1 to 1 Mbps

► Mil-Std-1553B

Payload data network For instruments data processing and storage

Key properties: reliability & performance for data throughput

Typical data rate: 10 Mbps to 1 Gbps

Direct links or network topology

► SpaceWireECSS (European Cooperation for Space Standardisation)

European technology interoperability and harmonisation

SpaceWire, MIL-STD-1553 and CAN bus




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State of the artMil-Std-1553 bus

Well adapted for spacecraft command and control Master/Slave concept with 2 types of nodes

– One Master Bus Controller (BC), 31 slave remote Terminals (RT)

– Deterministic and reliable

– 1 Mbps

– Space standard for implementation requirements and communication services protocol (ECSS-E50-15)

Large return on experience in many applications (space, aeronautics, ground transport…)– Lot of sensors, commercial products, test equipment and know-how

Industrial baseline on almost all space on-board data systems Launcher avionics (Ariane, Vega)

Satellites platforms and payloads control

In-Orbit infrastructure and manned flight (ISS, ATV)

BC

RT 1 RT 2 RT 3 RT 31

To sensors/actuators

● ● ●

To Data Handling

System




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State of the artSpaceWire

Spacecraft payload data network

Adapted to space requirements from IEEE

1355

– LVDS point to point connections with switched network

capability

– 100 to 200 Mbps

ECSS Space standard covers all layers and

protocols

Widely used worldwide

Europe, US, Japan, Russia, China

Active user community

– SpaceWire working group, International Conference

Worldwide (small) industrial ecosytem




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Outline


Applications


Architecture



► Future needs and technology development strategy





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Future missions

In development Space science and exploration program

– Bepi-Colombo, Solo, Euclid, Juice…

Metop-SG

Next generation telecom

Ariane 6

Human Flight: ORION

Large constellations (OneWeb)

Longer term Machine to Machine services

Multi-service payloads

Highly flexible and autonomous systems

Space exploration robotic systems

Vision based navigation

Reusable launchers

Space plane

…




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Challenging requirements…

New on-board functions, autonomy and flexibility

Missions with high availability requirements

High data throughput increasing with instruments technology

Payload with many instruments…

Rapidly growing on-board data processing performance

requirements

Constraints

Ground space communications limited bandwidth

Limited power, volume & mass

Harsh environment (mechanical, thermal, radiations…)

Cost and competitiveness…

Context

Increasing technology gap between space and ground electronics

Limited choice of space-grade components

Cost of technology development (cost, time, risks, business model)

Space is a niche market

Future Needs




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Processing 400 - 900 M single instructions per second.

I/O 100 – 1000 Mbits/s/channel – I/O.

Memory 10 – 1000 Mbit fast Memory

Processing 900 - 3000 M single Instructions per second.



Processing 900 - 3000 M single Instructions per second.



1

2

3

High Processing, High Input, reprogrammable

Medium Processing, Medium Input, reprogrammable

High Processing, High Input, no or limited reprogrammability

Processing classes

1 Image Processing – Earth Observations – Optical

2 Image Processing – Earth Observations / Astro. – NIR - IR.

3 Image Processing – Astronomical – Optical Star based.

4 Image Processing – Astronomical – Optical Wide field.

5 Image Processing – Robotic Navigation

6 Radar SAR – signal processing

7 Radar SAR – On-board image processing & feature extraction

8 Telecom/SAR (Multi) Beam forming and Steerability.

9 Telecoms DSP – Transparent

10 Telecoms DSP – Regenerative

11 Soft Radio – reconfigurable payload data communication interface.

12 Standard Compression

13 Payload Crypto

14 Radiometry – Spectral analysis e.g. WBS

15 Others…

Application categories

Processing Gflop/s Flexibility Re-ProgVery High > 50 Very High Very Essential

High 5 - 50 High Essential

Medium 0.5 – 5 Medium Prefferable

Low < 0.5 Low Not Essential

I/O Gbit/s Power CriticalityVery High >100 High Very Limited

High 1 – 100 Medium Limited

Medium 0,2 - 1 Low Not Critical

Low <0,2

Memory % activityHigh 50 - 75%

Medium 25 - 50%

Medium < 25%

Performance requirements

Category Flexibilty Processing I/O Power % Memory

1.(1-3) Not Essential High Not Critical High High

2.(1-3) Prefferable High Not Critical High High

3.(3) Essential Very High High Limited Low

4.(1,3) Not Essential Medium High Limited Medium

5.(1,2) Essential High Low Very Limited Medium

6.(1,3) Not Essential High Medium Limited Low

7.(1,2) Very Essential Very High Very High Limited High

8.(2,3) Not Essential Very High Very High Not Critical Medium

9.(2,3) Not Essential Very High Very High Not Critical

10.(2) Very Essential Very High Very High Not Critical High

11.(1,2) Very Essential High Medium Not Critical Low

12.(1,2) Not Essential Medium Medium Not Critical

13.(1,2) Not Essential Medium Medium Not Critical

14.(1-3) Not Essential High Medium Limited Low

Requirements per categories

System analysis for high performance processingVariety of missions ?

Performance metrics ?

Driving Performance Requirements ?

Technology solutions ?

➋➊

➌ ➍




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System analysis for high performance processingProcessing power and I/O performance

-2

-1,5

-1

-0,5

0

0,5

1

1,5

2

2,5

3

0 0,5 1 1,5 2 2,5 3 3,5 4

processing performance - Log10(GFlop)

I/O

per

form

ance

-

Log1

0(G

bps)

“Very High” processing > 100 GFlopTypically requires ASIC technology

Increase flexibility with high performance

reporgrammable FPGA

103

100

10

1

10-1

10-2

1 10 100 1000 104

“High” processing 10 - 100 GFlopTypically requires reprogrammable FPGA or a very

efficient processing architecture with several

multi/many cores

“Medium” processing 0.5 - 10 GFlopOne or several µP (multicore) µP

or reprogrammable FPGA

Adapt our systems to use high performance COTS processing devices

One single technology/product

cannot cover the full range

Sustained development of space grade processing technology




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Space technology development strategy

Space TAXI

Space WHEEL

Fill the technology gap without re-inventing the wheel for space

Synergies between Space, Aeronautics and other domains

Enable use of commercial electronics

Develop a coherent set of interoperable products

Develop the relevant methods and tools for Model Driven Development

Focus technology developments on their competitiveness




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Outline


Applications


Architecture




► On-board processing Technology trends




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Reference architecture definition with

ESA and European Industry (SAVOIR)

Standard functional interfaces

Generic specifications

Common basis for European industry inter-

operable building block development

On-Board Software Reference Architecture




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Next Generation execution platform

Multi-core processors and COTS processors

ARM Multicore

COTS FPGA technologies (Virtex, ProAsic, Spartan, Zynq…)

NGMP (multicore Leon) in shorter term

Secured framework for Software integration on central computer

Time and Space Partitioning (enabling technology)

Hypervisor, operating system, schedulability issues on multicore etc…

On-Board Software framework based on reusable product lines

Execution platform with hypervisor, Real-Time Operating System and standard I/O’s handling

Data Handling Software and operational standards (PUS, FMS, CFDP…)

Auto-coded AOCS application + integration of third party software

Satellite Data Communication Network (SDCN)

I/Os: multi communication standards with common API to IMA execution platform

Legacy interfaces (1553/SpW/Can) to comply with current satellites equipment product lines

New interfaces supporting higher data-rate and lower cost with more convergence toward COTS technologies (e.g. Ethernet)

SpaceFibre (1 to 5 Gbps) interoperable with SpaceWire Networks

Trade-off SDCN technology

Ethernet based solution for satellite is supported by Airbus R&T with CNES/DLR/ESA studies in the pipe

ESA roadmap for TTE, including physical characterization on Ethernet devices in progress and ECSS standardisation

FP7 Mission project « AFDX for Space »

ESA studies to allow use of SpaceWire for platform command and control (SpaceWire AOCS, N-Mass, SpaceWire-D)

Ariane 6 decision on TTE technology selection can influence the roadmap

Potential technology choices in constellations could eventually give momentum for future evolutions on standard product lines

COTS Based Computers

Ecosystem

Cost

Performance

IMA

4

Space

Ethernet

4

Space

CBC




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ARM processor Could be a basis for a next generation processor

Efficient architecture

Low Power consumption

AvionicX project (CNES)

ARM based breadboard computer with TTE interfaces

Evaluation on launcher and satellite use cases

ARM4Space project (H2020)

Rad-Tolerant ARM based architecture for space use

ASCOT project

Definition of a next generation Spacecraft controller on a chip

based on ARM Cortex– All embedded spacecraft control function as current SCoC

– High Speed interfaces

– New embedded processing functions (e.g. GNSS)

ARM is selected for Ariane 6 on-board computer

ARM Processor

The AvionicX

Breadboard with

embedded ARM

Cortex 5




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Multicore Processors NGMP (multicore Leon 4) will be available in 2016

Almost all COTS high performance processing devices include several cores

Methods, tools to optimize application software parallelisation on several cores

New approaches for schedulability analysis based on probabilistic approach– WCET formal proof too pessimistic

– Projects Proxima (H2020) and ProArtis for Space (ESA)

Software on Multicore processors

Start TDI cycle / record start time

Task 1Record task start

timeRecord task

endtime

Start tasks


timeRecord task

endtime


timeRecord task

endtime


timeRecord task

endtime

Wait for tasks execution

completion

End TDI cycle / record end time




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High Speed on-board NetworkSingle network

common standard platform and payload networks on satellites

Functional and telemetry data for launchers

reduces costs to adapt products for a given mission

Simplify interface with Ground Test equipment (EGSE)

Network Configuration, Verification, Qualification, Security and Certification issues

Need for embedded support functions (Network management, FDIR, debug, security functions..)

Need for engineering support tools: modeling simulation, network analysis, formal proof

Several European projectsSwitched Ethernet with different protocols/QoS

AFDX (Mission project), Time-Triggered Ethernet, Standard Ethernet

Synergy with aeronautics

Ariane 6 and Orion/MPCV selected TT-Ethernet

Evolution of the SpaceWire standard / SpaceFibre

Sensor Networks Many simple terminals (e.g. thermistors) on spacecraft: lots of wires

Wireless (main issues with EMC and power autonomy, not data handling & protocols)

On-board communications

Payload

SSMM

Communication

AOCS

IMU B

STR 2

Reaction wheel Unit

SADE

DST-1

Instrument1

Instrument2

Instrument3

Instrument4

Instrument5

Instrument6

Instrument7

Instrument8

Instrument9

Instrument10

STR 1

Sun SensorRIU

Sun Sensor

ThermistorsThermistors


Thermistors

//x

ThrustersThrustersThrustersThrusters

//8

//8

APME Unit

OBC

TTRM A board TTRM B board

PCM A PCM B

DC/DC A

Controller memory A

Controller memory B

DC/DC B

DC/DC BDC/DC A

PM B boardPM A board

Trans A

Receive ADST-2

Trans B

Receive B

IMU A

PCDU Doors control

Unit

3/4 hot redundancy

//4

//2

TMTC A

TMTC B

//4

//4

//2 //2

BB

AA

AA

AA BB

Legend

APME: Antenna Pointing Mechanism ElectronicsDST: Deep Space TransponderSADE: Solar Array Drive ElectronicsTTRM: TM, TC, RM and MM ModulePM: Processor Module PCM: Power converters Module

TTE or AFDXTTE or AFDX

Cold Redundancy

Hot Redundancy

Satellite Data Communication Network




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Ethernet

4

Space

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Hypervisors for time an space partitioning

Project IMA for Space (ESA)

defined the partitioning concept for space

evaluated feasibility with several use cases

and hypervisor technologies

Baseline for SAVOIR reference architecture

Project OBC-SA (DLR)

Development of the OMAC4S test bed

IMA Kernel Qualification

Specification of Hypervisor functions and

qualification requirements

Adaptation of hypervisors to targets:• Multicore (ARM, NGMP…)

• RTEMS and other operating systems

Space qualification planned in 2016

for Xtratum, PikeOS,…

IMA and Software Partitioning




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IMA

4

Space

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High Performance Payload Processing

Instrument

Instrument

COTS PM

COTS PM

COTS PM

ICPUInstrument

link

MMUMMURTC

Switch Matrix

SDCN Network

SDCN Network

RTCDDR

HS link

Software

Kernel

PartitionSystem

Core Core Core Core

Partition Instrument A

Partition Instrument B

Custom ASIC’s

► High performance

► Limited to specific applications

► High non-reccuring cost

► Outdated silicon technology

COTS based processor boards and Rad-hard

programmable components

► Medium performance

► High recurring cost

► US dependant technology

► quickly obsolete

Need for flexible generic processing

at lower costs High Performance Payload Processing (H3P)

Performance

ReliabilityAvailability

State of the artFUTURE

COTS based computing architecture

tailored to mission requirementsH3P




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COTS Based Computing Architecture

SmartIO to mitigate radiations effectsESA project High Performance COTS Based Computer

Concept

Rad hard SmartIO component is in charge of the

interface between the COTS world and the rad hard

world. It implements the fault mitigation techniques

COTS components are managed by the SmartIO,

shared memory mechanisms

The SmartIO buffers input data in a fast local

memory, and replay it in case of error

Benefits

SmartIO / PM link is a high level data link: SpW or

SRIO, PCIe flexibility

PM are slaves of the SmartIO : simplicity of the fault

model reduced radiation campaign

SmartIO includes a µ processor to manage fault

mitigation techniques versatility

Batch processing and results checking using

signature performance

SmartIO

Processor

Module

From instrument

To Mass memory

MemoryProcessor

Module

Processor

Module

COTSRad-Hard




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High Performance COTS Based Processor

board developed with TI DSP C6727

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HW/SW codesign

CoDesign Process for parallel S/W

and HW functions development

Trans-domain collaboration

(Socket and Projet P projects)

Modelling techniques (System C)

Co-simulation HW/SW

Coherent development of HW and SW

Seamless design flow

Autocoding

Very efficient hybrid execution platforms

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Model Driven Development

System-Software engineering

methods and tools Write and manage “good” requirements

Handle MBSE and requirements in the

same referential

Customize methods and tools to manage

product lines

Technologies Connect interdisciplinary models for GS :

RAMS, Design, Performance, ….

Evaluate the system operability during

design and how to use design information

during operation

Implement extended enterprise

Implements standards to support our

design method

Verification Engineering

OperationalEngineering

Flight S/W Engineering

RAMS & FDIR Engineering AOCS

Engineering

MBSE approach around the functional avionics level

Avionics modelling

MTM-MIS

SW Dev.

SVFSW Verif.

MCS EGSE (FM)MCS EGSE (EM)

SRDB

SRDB Mirror

TM/TC,

Mission SW data

Instruments

MPO EGSE

(EM)

TM/TC,

Relation to Harness

Engineering/

Operations

TM/TC,

Mission SW data,

Relation to Harness

MPO EGSE

(FM)

S/C Config,

Verification Infos

Verification Info

TM/TC,

Mission SW data

OBCP Dev.

ESOC

STB

ATB

SVFOBCP Dev.

SVFFCP Dev.

MIS

TM/TC

TM/TC,

Verif. Info

Units

TM/TC

SRDB Input

TBC: TM/TC,

Verif. Info MMO

Main Input

to SRDB

Test

Bench

Legend:

RF-Test

Bench

TM/TC

Satellite Reference DataBase RANGE

Hybrid

Numerical

FVI

Simulation

Use Cases

Linux / Windows Linux / Windows

SimTG Simulation Kernel

SM&C I/F

FVB Models

(Actuator Models ,

Sensor Models , Enviroment / Dynamics

Models )CSW Cradle

AOCS Controller SW

Specifc FVB Services

SimOPS Jsynoptic

FVB (Functional Verification Bench)

FVB :Functional Verification Bench

Linux / Windows Linux / Windows

Operating System


SimOPS

SM&C - Corba

Jsynoptic OBC ModelBus Models (1553, Spw,

Connectors , TMTC)

Equipment Models

Processor Emulator

(SimLeon / SimERC32)FVB Models

SVF-Dev (Software Verification Facitlity – CSW Development)

SVF: Software Verification Facility

Operating System Linux / W indows


SM&C

OBC Model

Bus Models

(1553 , Spw , Connectors ,

TMTC)

Equipment Models

Processor Emulator

(SimLeon / SimERC32)

FVB Models

CCS SCOE Models

SimAIT

SatSim: Operations Simulator

Linux / Windows Real -Time Linux


SM&C

Bus Models (1553 , Spw, Connectors , TMTC)

SimFE I/FSimFE I/F

SimFE HW I/F

STB (Software Test Bench)

SimOPS Jsynoptic

STB: Software Test Bed

Operating System Real -Time Linux

Operating System


SM&C

CCS Equipment Models

FVB Models

Bus Models

(1553, Spw, Connectors , TMTC)

SimFE I /FSimFE I/F

SimFE

HW I/F

EFM (Electrical / Functional Model)

EFM: Electrical/ Functional Model ……

Modelling & Simulation RANGE

… Block Failure Effects

STR Loss of tracking Effect1(T0)

Effect2(T0+xx)

HWe.g. STR

HWe.g. OBC

1

Functione.g. AOCS

Architecture

Monitoring Recovery Final State

MON#32 (T+xx) FIR L2 (T0+xx) Mission cont.

•Dynamic FMECA Generation

•Step-by-Step Simulation

•RAMS/FDIR Analyses & Verification

FMECA enhanced with failure propagation time FDIR enrichment (HSIA)

LocalMON

FIR Lx

3 FDIR Integration

Reconfiguration

Orders (FIR)

Monitoring (PMON, FMON)

S/SFMON FIR Lx

UnitFMON

S/SFMON

FIR Lx

Validity

•Inputs to FDIR SW Specs (SM/FM/FIR lists)

•Inputs to FV Test Specs (Simulation traces)

•FDIR Maturity &

Complexity Metrics (KPIs)

RAMS / FDIR Modelling approach presentation

Failures modes

& propagation

2

Cascading effect (timed), observables dysfunctional behaviour

4

Iterative

&

Incremental

RAMS/FDIR modelling RANGE

Data processing

Payload

Communication

AOCSPlatform

Antenna Pointing

Mechanism

PCDU

FSS FSS

Memory

Memory

Deep Space Transponder Rx

Deep Space Transponder Tx

PCDUSolar Array

drive

RIU

RIU

FSS

IMU

IMU

STR

STR

Reaction wheel

Sun Sensor

Reaction wheel

Reaction wheel

Reaction wheel

Solar Array drive

Antenna Pointing

Mechanism

Deep Space Transponder Tx

Deep Space Transponder Rx

Instrument1

Instrument2

Instrument3

Instrument4

Instrument5

Instrument6

Instrument7

Instrument8

Instrument9

Instrument10

OBC

OBC



Thermistors

ThrustersThrustersThrustersThrusters

High Speed Deterministic Links RANGE

SysML OBSW RANGE

Ground System Engineering

AOCS autocoding RANGE

Others specialists (mechanical, electrical,...)




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On-board processing technology trendsSummaryMissions

Product lines (Astrobus/E3000): incremental changes

No short term perspective of interface nor big computer change: Cost is the main driving factor for

improvements

Space Science, Instruments and Exploration

Autonomous Robotics and mission planning / high performance processing / low power consumption

Various robustness requirements vs. radiations

New constellation projects - OneWeb

New business conditions: implies changes/accelerations in technology priorities

Recurring COST becomes a dominant driver

Trends

Lower the number of electronics equipment through centralisation of data processing functions

Higher performance On Board Computers (and lower cost)– Competitive/export markets including constellations: Maximise the use of COTS based processing

– Institutional specific missions: multicore Leon (Leon4/NGMP) / Rad-Tolerant Reconfigurable FPGA (BRAVE)

Secured Software application framework allowing integration on central computer of several

applications with different criticality levels Hypervisor for partitioning

Increase data rates toward and within central computer Switched Ethernet Data Network

More COTS @ Less COST




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http://www.space-airbusds.com/

http://www.esa.int/

http://www.airbus.com/

mailto:[email protected]?subject=ETFA 2015 - Industry Day

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Space SelfieTo: EARTH

From: ROSETTA and the Comet Chury

(67P-Churyumov-Gerasimenko)


http://www.esa.int/



On-board digital electronics and software emerging ... · On-board digital electronics and software...

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