October 10, 20001. 2 USB 2.0 Hub Additions John Garney Chair Hub Working Group Intel Corporation...

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October 10, 2000 1

Transcript of October 10, 20001. 2 USB 2.0 Hub Additions John Garney Chair Hub Working Group Intel Corporation...

Page 1: October 10, 20001. 2 USB 2.0 Hub Additions John Garney Chair Hub Working Group Intel Corporation John Garney Chair Hub Working Group Intel Corporation.

October 10, 2000 1

Page 2: October 10, 20001. 2 USB 2.0 Hub Additions John Garney Chair Hub Working Group Intel Corporation John Garney Chair Hub Working Group Intel Corporation.

October 10, 2000 2

USB 2.0 Hub Additions

USB 2.0 Hub Additions

John GarneyJohn GarneyChair Hub Working GroupChair Hub Working Group

Intel CorporationIntel Corporation

John GarneyJohn GarneyChair Hub Working GroupChair Hub Working Group

Intel CorporationIntel Corporation

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Hub AdditionsHub Additions

Standard Hub ClassStandard Hub Class– Port IndicatorsPort Indicators

Transaction TranslatorTransaction Translator Bulk/Control Transaction HandlingBulk/Control Transaction Handling Isochronous/Interrupt Transaction HandlingIsochronous/Interrupt Transaction Handling Scheduling Split TransactionsScheduling Split Transactions

Additions to Chapter 11Additions to Chapter 11 New AppendicesNew Appendices

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Hub Requirements:Hub Requirements:

Provide high-speed expansionProvide high-speed expansion Isolate full/low-speed from high-speedIsolate full/low-speed from high-speed

– Avoid lower speed impact on HS, i.e., LS impact on FSAvoid lower speed impact on HS, i.e., LS impact on FS

All USB2.0 Hub ports support HS/FS/LSAll USB2.0 Hub ports support HS/FS/LS

Optional: standardized port indicators (LEDs)Optional: standardized port indicators (LEDs)

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System SWSystem SW

Client DriverClient Driver Client DriverClient Driver

USB 1.1 USB 1.1 DeviceDevice

USB 1.1 USB 1.1 DeviceDevice

HS HubHS HubHS HubHS Hub

USB 1.1 HubUSB 1.1 Hub

USB 1.1 USB 1.1 DeviceDevice

USB 1.1 USB 1.1 DeviceDevice

HS DeviceHS DeviceHS DeviceHS Device

USB 2.0 HostUSB 2.0 HostControllerController

USB 2.0 HostUSB 2.0 HostControllerController

Full/Low SpeedFull/Low Speed

High Speed OnlyHigh Speed Only

(2 x 12Mb/s(2 x 12Mb/sCapacity)Capacity)

Hub In High Speed SystemHub In High Speed System

Hub provides high-speed expansion (ala 1.1 hub)Hub provides high-speed expansion (ala 1.1 hub) Hub provides additional classic bus(es)Hub provides additional classic bus(es)

– Same total number of devices per USB2.0 Host Controller (e.g. 127)Same total number of devices per USB2.0 Host Controller (e.g. 127) Greater end user value than classic hubGreater end user value than classic hub

– Performance, expansion and ease of usePerformance, expansion and ease of use Hub is user selected device (not required for all systems)Hub is user selected device (not required for all systems)

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Reuse Classic Hub

Reuse Classic Hub

Design Knowledge

Design KnowledgeReuse Classic Hub

Reuse Classic Hub

Design Knowledge

Design Knowledge

HS/Classic HS/Classic Hub StateHub StateMachineMachine

HS/Classic HS/Classic Hub StateHub StateMachineMachine

HS/Classic HS/Classic HubHub

RepeaterRepeater

HS/Classic HS/Classic HubHub

RepeaterRepeater

HS/Classic HS/Classic HubHub

ControllerController

HS/Classic HS/Classic HubHub

ControllerController

High Speed OnlyHigh Speed Only

PortPort PortPort PortPort

PortPort

Hub “Classic Pieces”Hub “Classic Pieces”

RepeaterRepeater– High speed signalingHigh speed signaling

Also, FS/LS signaling for 1.1 compatibilityAlso, FS/LS signaling for 1.1 compatibility– ReclockingReclocking

State MachineState Machine– HS termination sequencingHS termination sequencing

HS Detect, Reset, Suspend, ResumeHS Detect, Reset, Suspend, Resume Hub ControllerHub Controller

– Respond to hub device class requests/eventsRespond to hub device class requests/events

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Hub ArchitectureHub Architecture

Same as classic hub:Same as classic hub:– High & full/low-speed repeaters, determined by upstream facing linkHigh & full/low-speed repeaters, determined by upstream facing link– Hub controllerHub controller– No different then classic USB besides high-speed signalingNo different then classic USB besides high-speed signaling

Minor changes from classic hub:Minor changes from classic hub:– Hub state machine (HS detect, HS termination transitions, test mode)Hub state machine (HS detect, HS termination transitions, test mode)

New in hub:New in hub:– Transaction TranslatorTransaction Translator– Routing logicRouting logic

HS/Classic HS/Classic HubHub

ControllerController

HS/Classic HS/Classic HubHub

ControllerController

TransactionTransactionTranslatorTranslator

TransactionTransactionTranslatorTranslator

Full/LowFull/LowSpeedSpeed

High Speed OnlyHigh Speed Only

. . . . .. . . . .

HS/Classic HS/Classic Hub StateHub StateMachineMachine

HS/Classic HS/Classic Hub StateHub StateMachineMachine

Routing LogicRouting Logic

PortPort PortPort PortPort

PortPort

HS/Classic HS/Classic HubHub

RepeaterRepeater

HS/Classic HS/Classic HubHub

RepeaterRepeater

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Routing LogicRouting Logic Routing LogicRouting Logic

TransactionTransactionTranslatorTranslator

TransactionTransactionTranslatorTranslatorFull/LowFull/Low

SpeedSpeed

High Speed OnlyHigh Speed OnlyPortPort

Repeater, Controller, ...Repeater, Controller, ...Repeater, Controller, ...Repeater, Controller, ...

PortPort PortPort PortPort

Hub New PiecesHub New Pieces

Port Routing LogicPort Routing Logic– Controllable electrical connection between:Controllable electrical connection between:

Full/Low (Transaction Translator), orFull/Low (Transaction Translator), or High-Speed (Repeater)High-Speed (Repeater)

– Route done once per device resetRoute done once per device reset Transaction TranslatorTransaction Translator

– Major addition for USB 2.0Major addition for USB 2.0– Uses split transaction protocol HC supportUses split transaction protocol HC support

. . . . .. . . . .

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Hub Cost / Complexity EstimateHub Cost / Complexity Estimate

Classic Hub + new thingsClassic Hub + new things– Classic Hub - implementation dependent, but knowable baselineClassic Hub - implementation dependent, but knowable baseline– New thingsNew things

SignalingSignaling Required for any High-Speed deviceRequired for any High-Speed device

Logic (routing, TT)Logic (routing, TT) RAM (buffer space, transaction pipeline)RAM (buffer space, transaction pipeline)

Total (approximate)Total (approximate)– 40KGates + 1800 Bytes with 4 downstream ports40KGates + 1800 Bytes with 4 downstream ports– 28KGates + (3KG * # of downstream ports) + 1800 Bytes28KGates + (3KG * # of downstream ports) + 1800 Bytes

TT FIFOsTT FIFOsTT FIFOsTT FIFOs

TT LogicTT LogicTT LogicTT Logic

Port

High-Speed “Classic Hub”High-Speed “Classic Hub”High-Speed “Classic Hub”High-Speed “Classic Hub”

Port Port Port

Routing LogicRouting Logic

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Standard Hub ClassStandard Hub Class

Hub DescriptorHub Descriptor– Added to Added to wHubCharacteristicswHubCharacteristics::

D6..D5: TT Think TimeD6..D5: TT Think Time D7: Port indicator supportD7: Port indicator support

Hub Class RequestsHub Class Requests– New Port Features: PORT_TEST, PORT_INDICATORNew Port Features: PORT_TEST, PORT_INDICATOR– Get_Status: PORT_HIGH_SPEEDGet_Status: PORT_HIGH_SPEED– New: ClearTTBuffer, ResetTT, GetTTState, StopTTNew: ClearTTBuffer, ResetTT, GetTTState, StopTT

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Hub Port IndicatorsHub Port Indicators

OptionalOptional standardized end user visible indicator standardized end user visible indicator 2 color indicator for each downstream facing port2 color indicator for each downstream facing port

– Defined colors: Off, Green, Amber, BlinkingDefined colors: Off, Green, Amber, Blinking Manual (Host SW) & Automatic ControlManual (Host SW) & Automatic Control

– Manual: keeps HW simple while allowing SW controlManual: keeps HW simple while allowing SW control Blinking done by softwareBlinking done by software

– Automatic: basic consistency in USB 1.x/2.0 systemsAutomatic: basic consistency in USB 1.x/2.0 systems Overcurrent, enabled and “neither”Overcurrent, enabled and “neither”

– Full indicator support requires USB 2.0 softwareFull indicator support requires USB 2.0 software

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ReservedReservedBlinking Amber/GreenBlinking Amber/Green

Hardware AttentionHardware AttentionBlinking Off/AmberBlinking Off/Amber

Software AttentionSoftware AttentionBlinking Off/GreenBlinking Off/Green

Fully OperationalFully OperationalGreenGreen

Error ConditionError ConditionAmberAmber

Not OperationalNot OperationalOffOffDefinitionDefinitionColorColor

Indicator Color MeaningsIndicator Color Meanings

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Indicator ControlIndicator Control

Controlled via SetPortFeature(PORT_INDICATOR, indicator_selector)Controlled via SetPortFeature(PORT_INDICATOR, indicator_selector)

ValueValue Port Indicator SelectorPort Indicator Selector Port Indicator Port Indicator ModeMode

Color set automatically, as Color set automatically, as defined in followingdefined in following

AutomaticAutomatic

11 AmberAmber ManualManual

22 GreenGreen

33 OffOff

4-FFH4-FFH ReservedReserved ReservedReserved

00

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Automatic Indicator ControlAutomatic Indicator Control

SetPortFeatureSetPortFeature(PORT_POWER)(PORT_POWER)

AutomaticAutomatic ModeMode

OffOffOffOff!(Enabled or Transmit or TransmitR)!(Enabled or Transmit or TransmitR)

and PORT_OVER_CURRENT != 1and PORT_OVER_CURRENT != 1

Enabled or Transmit or TransmitREnabled or Transmit or TransmitR

GreenGreenGreenGreen

SetPortFeatureSetPortFeature(PORT_INDICATOR,(PORT_INDICATOR,

indicator_selector = 0) orindicator_selector = 0) orClearPortFeatureClearPortFeature

(PORT_INDICATOR, n/a)(PORT_INDICATOR, n/a)

SetPortFeatureSetPortFeature(PORT_INDICATOR,(PORT_INDICATOR,

indicator_selector != 0)indicator_selector != 0)

ManualManualModeMode

AmberAmber

PORT_OVER_CURRENT = 1PORT_OVER_CURRENT = 1

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Host Controller / TT InteractionsHost Controller / TT Interactions

HostHostHostHost

DeviceDeviceDeviceDevice

TTTTTTTTXX22

TT buffers full/low speed transaction information (X) locallyTT buffers full/low speed transaction information (X) locally

1 – SPLIT-s, OUT, DATAx1 – SPLIT-s, OUT, DATAx(Start-split)(Start-split)

Host Controller issues start-split transaction to TTHost Controller issues start-split transaction to TT

TTTTTTTT RR

4 - ...,ACK4 - ...,ACK

TT buffers full/low speed transaction results (R) locallyTT buffers full/low speed transaction results (R) locally

3 - OUT, DATAx, ...3 - OUT, DATAx, ...

TT issues full/low speed transaction on downstream busTT issues full/low speed transaction on downstream bus

6 - …,ACK6 - …,ACK

TT responds with resultsTT responds with results

InterruptInterruptOutOut

ExampleExample

5 – SPLIT-c, OUT, …5 – SPLIT-c, OUT, …(Complete-split)(Complete-split)

Host Controller issues complete-split transaction to TTHost Controller issues complete-split transaction to TT

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Transaction Translator Overview Transaction Translator Overview

Bulk/Control & Interrupt/Isochronous portions to TTBulk/Control & Interrupt/Isochronous portions to TT– Bulk/Control uses USB flow control to make progressBulk/Control uses USB flow control to make progress– Interrupt/Isochronous uses a scheduled full/low speedInterrupt/Isochronous uses a scheduled full/low speed

transaction “pipeline”transaction “pipeline”– Separate buffers are used for each TT portionSeparate buffers are used for each TT portion

2 or more transaction buffers for bulk/control2 or more transaction buffers for bulk/control Start & complete “pipeline” buffers for interrupt/isochronousStart & complete “pipeline” buffers for interrupt/isochronous

Transaction TranslatorTransaction TranslatorTransaction TranslatorTransaction Translator

Bulk &ControlBulk &Control

Interrupt &IsochronousInterrupt &

Isochronous

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TT Bulk / ControlTT Bulk / Control

TT buffers 2 or more bulk/control transactionsTT buffers 2 or more bulk/control transactions TT issues full/low speed transaction when no periodicTT issues full/low speed transaction when no periodic

transactions pendingtransactions pending Host controller issues split transactions to TTHost controller issues split transactions to TT

– Allows starting/completing full/low-speed transactions each microframeAllows starting/completing full/low-speed transactions each microframe– Normal approach of “bandwidth reclamation” is usedNormal approach of “bandwidth reclamation” is used– Tries to issue HS start-split; if successful, next attempt does complete-splitTries to issue HS start-split; if successful, next attempt does complete-split

TTTTTTTT

Bulk/Ctrl #1Bulk/Ctrl #1 Bulk/Ctrl #2Bulk/Ctrl #2

High Speed Start-/Complete-SplitHigh Speed Start-/Complete-Split

Full/Low Speed TransactionFull/Low Speed Transaction

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Example: Bulk OUTSingle Split Trans.Example: Bulk OUTSingle Split Trans.

TTTTTTTT

X22

TT buffers full/low speed transaction information (X) locallyTT buffers full/low speed transaction information (X) locally

3 - OUT, DATAx, ...3 - OUT, DATAx, ...

TT issues full/low speed transaction on downstream busTT issues full/low speed transaction on downstream bus

RR

4 - ...,ACK4 - ...,ACK4 - ...,ACK4 - ...,ACK

TT buffers full/low speed transaction results (R) locallyTT buffers full/low speed transaction results (R) locally TT buffers full/low speed transaction results (R) locallyTT buffers full/low speed transaction results (R) locally

6 - …,ACK6 - …,ACK

TT responds with resultsTT responds with results

1 – SPLIT-s, OUT, DATAx, ACK1 – SPLIT-s, OUT, DATAx, ACK1 – SPLIT-s, OUT, DATAx, ACK1 – SPLIT-s, OUT, DATAx, ACK

Host Controller issues start-split transaction to TTHost Controller issues start-split transaction to TT Host Controller issues start-split transaction to TTHost Controller issues start-split transaction to TT

5 – SPLIT-c, OUT, ...5 – SPLIT-c, OUT, ...5 – SPLIT-c, OUT, ...5 – SPLIT-c, OUT, ...

Host Controller issues complete-split transaction to TTHost Controller issues complete-split transaction to TT Host Controller issues complete-split transaction to TTHost Controller issues complete-split transaction to TT

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Example Bulk OUT SplitsExample Bulk OUT Splits

Assume 2 classic bulk OUT endpointsAssume 2 classic bulk OUT endpoints Assume (illegal) 1 TT bulk/control bufferAssume (illegal) 1 TT bulk/control buffer Classic bus has significant idle timeClassic bus has significant idle time

HS Bus:HS Bus:

Classic Bus:Classic Bus:

SS

SS2aSS2a

OO DD NNSS

SS1aSS1a

OO DD AA

FullFull

SS2aSS2a

OO DD NNSS

CS1aCS1a

OO YYCC

ReadyReady

SS2aSS2a

OO DD AASS

FullFull

CS1aCS1a

OO AACC

EmptyEmpty

Periodic XactsPeriodic Xacts

EmptyEmptyTT Bulk Buffer:TT Bulk Buffer:

CS2aCS2a

OO YYCC

TIMETIME

OO DD AA

EP1 Transaction EP1 Transaction

OO D …D …

EP2 Transaction EP2 Transaction

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Example: Bulk OUTTwo Different Split Trans.Example: Bulk OUTTwo Different Split Trans.

TTTTTTTT

X22

3 - OUT, DATAx, ...3 - OUT, DATAx, ...

RR

6 - ...,ACK6 - ...,ACK6 - ...,ACK6 - ...,ACK

TT buffers 1st full/low speed transaction results (R) locallyTT buffers 1st full/low speed transaction results (R) locally

1 – SPLIT-s, OUT, DATAx, ACK1 – SPLIT-s, OUT, DATAx, ACK1 – SPLIT-s, OUT, DATAx, ACK1 – SPLIT-s, OUT, DATAx, ACK

- Same as before- Same as before- Same as before- Same as before HC issues Start-split transaction for different endpoint to TTHC issues Start-split transaction for different endpoint to TT HC issues Start-split transaction for different endpoint to TTHC issues Start-split transaction for different endpoint to TT

4 – SPLIT-s, OUT, DATAx, ACK4 – SPLIT-s, OUT, DATAx, ACK4 – SPLIT-s, OUT, DATAx, ACK4 – SPLIT-s, OUT, DATAx, ACK

x2

TT buffers full/low speed transaction (x2) locally in 2nd bufferTT buffers full/low speed transaction (x2) locally in 2nd buffer TT buffers full/low speed transaction (x2) locally in 2nd bufferTT buffers full/low speed transaction (x2) locally in 2nd buffer

55

TT issues 2nd full/low speed transaction on downstream busTT issues 2nd full/low speed transaction on downstream bus TT issues 2nd full/low speed transaction on downstream busTT issues 2nd full/low speed transaction on downstream bus

7 - OUT, DATAx, ...7 - OUT, DATAx, ...

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Example: Bulk OUTTwo Different Split Trans.Example: Bulk OUTTwo Different Split Trans.

TTTTTTTT

TT responds with results from 1st bufferTT responds with results from 1st buffer TT responds with results from 1st bufferTT responds with results from 1st buffer

9 - …,ACK9 - …,ACK

HC issues complete-split transaction for 2nd endpoint to TTHC issues complete-split transaction for 2nd endpoint to TT HC issues complete-split transaction for 2nd endpoint to TTHC issues complete-split transaction for 2nd endpoint to TT

8 – SPLIT-c, OUT, ... 8 – SPLIT-c, OUT, ... 8 – SPLIT-c, OUT, ... 8 – SPLIT-c, OUT, ...

r2r2

10 TT buffers full/low speed transaction results (r2) locallyTT buffers full/low speed transaction results (r2) locally TT buffers full/low speed transaction results (r2) locallyTT buffers full/low speed transaction results (r2) locally

10 - ...,ACK10 - ...,ACK10 - ...,ACK10 - ...,ACK

RR

12 TT responds with resultsTT responds with results

12 - …,ACK12 - …,ACK

11 HC issues complete-split transaction for 2nd endpoint to TTHC issues complete-split transaction for 2nd endpoint to TT HC issues complete-split transaction for 2nd endpoint to TTHC issues complete-split transaction for 2nd endpoint to TT

11 – SPLIT-c, OUT, ...11 – SPLIT-c, OUT, ... 11 – SPLIT-c, OUT, ...11 – SPLIT-c, OUT, ...

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Example Bulk OUT SplitsExample Bulk OUT Splits

Assume 2 classic bulk OUT endpointsAssume 2 classic bulk OUT endpoints Always at least 2 TT bulk/control buffersAlways at least 2 TT bulk/control buffers Most classic bus idle time eliminatedMost classic bus idle time eliminated

HS Bus:HS Bus:

Classic Bus:Classic Bus:

SS

SS1aSS1a

OO DD AA

1 Full1 Full1 Empty1 Empty

Periodic XactsPeriodic Xacts

1 Ready1 Ready

CS1aCS1a

OO YYCC

1 Empty1 Empty

CS1aCS1a

OO AACC

SS1bSS1b

OO DD AASS

1 Full1 FullTT Bulk Buffer:TT Bulk Buffer:

CS2aCS2a

OO YYCC

TIMETIME

OO D …D …OO DD AA

EP1 Transaction EP1 Transaction

OO DD AA

EP2 Transaction EP2 Transaction

SS

SS2aSS2a

OO DD AA

2 Full2 Full

CS2aCS2a

OO YYCC

2 Ready2 Ready

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TT Int. / Isoch. PipelineTT Int. / Isoch. Pipeline

Host software budgets when full/low-speed transaction will runHost software budgets when full/low-speed transaction will run Host schedules start-split before “earliest” start timeHost schedules start-split before “earliest” start time Host schedules complete-split at “latest” finish time(s)Host schedules complete-split at “latest” finish time(s) Scheduling variation due to bit-stuffing and timeouts, etc.Scheduling variation due to bit-stuffing and timeouts, etc.

TTTTTTTT

High Speed Start-SplitHigh Speed Start-Split High Speed Complete-SplitHigh Speed Complete-Split

Start-splitStart-splitFIFOFIFO

Start-splitStart-splitFIFOFIFO

Complete-splitComplete-splitFIFOFIFO

Complete-splitComplete-splitFIFOFIFO

StartStartHandlerHandler

StartStartHandlerHandler

CompleteCompleteHandlerHandler

CompleteCompleteHandlerHandler

Full/LowFull/LowHandlerHandlerFull/LowFull/LowHandlerHandler

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TTTTTTTT

Start-splitStart-splitFIFOFIFO

Start-splitStart-splitFIFOFIFO

Complete-splitComplete-splitFIFOFIFO

Complete-splitComplete-splitFIFOFIFO

Full/LowFull/LowHandlerHandlerFull/LowFull/LowHandlerHandler

StartStartHandlerHandler

StartStartHandlerHandler

CompleteCompleteHandlerHandler

CompleteCompleteHandlerHandler

XX22

TT buffers full/low speed transaction information locally

1 – SPLIT-s, OUT, DATAx1 – SPLIT-s, OUT, DATAx

Host Controller issues start-split transaction to TT

3 - OUT, DATAx, ...3 - OUT, DATAx, ...

TT issues full/low speed transaction on downstream bus

6 - …,ACK6 - …,ACK

TT responds with results

Example: Int. OUT Split Trans.Example: Int. OUT Split Trans.

RR

4 - ...,ACK4 - ...,ACK

TT buffers full/low speed transaction results locally

Start-splitStart-splitFIFOFIFO

Start-splitStart-splitFIFOFIFO

5 – SPLIT-c, OUT, ...5 – SPLIT-c, OUT, ...

Host Controller issues complete-split transaction to TT

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Scheduling TT PipelineScheduling TT Pipeline

Best case budget & worst case operationBest case budget & worst case operation

Scheduling split transactions for pipelineScheduling split transactions for pipeline

Keeping the pipeline runningKeeping the pipeline running

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Best Full-Speed BudgetBest Full-Speed Budget

Max. 1500 bytes per classic frame (12Mb/s)Max. 1500 bytes per classic frame (12Mb/s) Max. 1350 bytes of periodic wire time (90% of frame)Max. 1350 bytes of periodic wire time (90% of frame) Max. 1157 allocatable bytes w/ max 6/7 (16.67%) bit stuffMax. 1157 allocatable bytes w/ max 6/7 (16.67%) bit stuff

– Reduced further by other overheadReduced further by other overhead Max. 187.5 “wire” bytes per 125us microframeMax. 187.5 “wire” bytes per 125us microframe

– Budget best case of 188 bytesBudget best case of 188 bytes Best Case Budget assumes wire runs “as fast as possible”Best Case Budget assumes wire runs “as fast as possible”

YY00 YY11 YY22 YY33 YY44 YY55 YY66 YY77

2929188 188 188 188 188 188

3232187.5 187.5 187.5 187.5 187.5 187.5

MicroframesMicroframes

Best case wireBest case wirebudget,1157 bytes budget,1157 bytes w/ no bitstuffingw/ no bitstuffing

Max wire timeMax wire time

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Worst Case OperationWorst Case Operation

Worst case when bus runs “as slow as possible”Worst case when bus runs “as slow as possible” 188 “data” bytes can take 220 bytes of time to move188 “data” bytes can take 220 bytes of time to move Classic transaction runs in three possible microframesClassic transaction runs in three possible microframes

– Due to difference between best & worst caseDue to difference between best & worst case

YY00 YY11 YY22 YY33 YY44 YY55 YY66 YY77

Best case wireBest case wirebudget, 1157 bytes budget, 1157 bytes w/ no bitstuffingw/ no bitstuffing

2929188 188 188 188 188 188

MicroframesMicroframes

220 219 219 220 219 219 34Worst case,Worst case,1350 bytes1350 bytesw/ max bitstuffingw/ max bitstuffing

161161161161187Worst caseWorst casewith bulk reclaimwith bulk reclaim 219 219 220 219 219 34

162 bytes162 bytes

Reclamation (LS control) makes it no worseReclamation (LS control) makes it no worse

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Transaction SchedulingTransaction Scheduling

Classic transaction determines HS split-transactionsClassic transaction determines HS split-transactions Allocate time on classic wire for a new transaction:Allocate time on classic wire for a new transaction:

– Calculate best case classic wire budgetCalculate best case classic wire budget Determine schedule for high speed start-split(s)Determine schedule for high speed start-split(s)

– Based on Best case budgetBased on Best case budget Determine schedule for high speed complete-split(s)Determine schedule for high speed complete-split(s)

– Based on Best case budget and rules that deal with worstBased on Best case budget and rules that deal with worst– Don’t compute worst case, use “3” microframesDon’t compute worst case, use “3” microframes

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Generic Scheduling of Split TransactionsGeneric Scheduling of Split Transactions

Allocate time for a new transactionAllocate time for a new transaction

(Y-1)(Y-1)77 YY00 YY11 YY22 YY33 YY44 YY55 YY66 YY77

Best case budgetBest case budget

#1: A classic transaction budgeted #1: A classic transaction budgeted to run here on the classic bus,...to run here on the classic bus,...

#2: …has a HS start-split scheduled#2: …has a HS start-split scheduledin this microframe and ...in this microframe and ...#2: …has a HS start-split scheduled#2: …has a HS start-split scheduledin this microframe and ...in this microframe and ...

HSHSStart-splitStart-splitHSHSStart-splitStart-split

Start-splits scheduled in microframe “before” Best case classicStart-splits scheduled in microframe “before” Best case classic Start-splits scheduled in microframe “before” Best case classicStart-splits scheduled in microframe “before” Best case classic

Additional scheduling rules for specific cases (see chap 11)Additional scheduling rules for specific cases (see chap 11) Complete-splits in (roughly) “next 3” microframesComplete-splits in (roughly) “next 3” microframes

#3: …has HS complete-split transactions#3: …has HS complete-split transactionsscheduled in the latest possible microframes scheduled in the latest possible microframes for this transactionfor this transaction

HS Complete-splitsHS Complete-splits

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Long Isochronous OUTLong Isochronous OUT

Isochronous OUT with >188 data payload has:Isochronous OUT with >188 data payload has:– More start-splitsMore start-splits

A start-split for each microframe with budgeted data presentA start-split for each microframe with budgeted data present Different PID based on which portion of classic data (begin,mid,end)Different PID based on which portion of classic data (begin,mid,end) Each start-split is scheduled 188 data bytes (except last)Each start-split is scheduled 188 data bytes (except last)

– No complete-split(s)No complete-split(s)

(Y-1)(Y-1)77 YY00 YY11 YY22 YY33 YY44 YY55 YY66 YY77

BeginBegin EndEndMidMid MidMid

Best case budgetBest case budget

Microframes with HS Start-SplitsMicroframes with HS Start-Splits

Long isoch. transactionLong isoch. transaction

Start-SplitStart-SplitTokens:Tokens:

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Keeping the Pipe RunningKeeping the Pipe Running

TT periodic pipeline must continue to sequenceTT periodic pipeline must continue to sequence– Normally it does, but…Normally it does, but…– Errors can occur on high/full/low-speed busesErrors can occur on high/full/low-speed buses

TT must not service full/low-speed transactions:TT must not service full/low-speed transactions:– Too earlyToo early– Too lateToo late

Microframe “clock” tracking is requiredMicroframe “clock” tracking is required

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Periodic Pipeline ExamplePeriodic Pipeline Example

Example full speed transactions:Example full speed transactions:– T1: 187 data byte isoch INT1: 187 data byte isoch IN– T2: 376 data byte isoch OUTT2: 376 data byte isoch OUT– T3: 188 data byte isoch INT3: 188 data byte isoch IN– T4: 564 data byte isoch INT4: 564 data byte isoch IN

Schedule start-splitsSchedule start-splits

SSx SSx - Start-splits- Start-splitsTx - Classic transactionTx - Classic transactionCSx - Complete-splitsCSx - Complete-splits

Best Budget:Best Budget: T3T3T1T1 T2T2 T4T4

SS3SS3SS1SS1 SS4SS4SS2aSS2a SS2cSS2cSS2bSS2b

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October 10, 2000 33

Pipeline ExamplePipeline Example

Schedule Complete-splitsSchedule Complete-splitsSSx - Start-splitsSSx - Start-splitsTx - Classic transactionTx - Classic transactionCSxCSx - Complete-splits - Complete-splits

Best Budget:Best Budget: T1T1 T2T2 T4T4T3T3

CS3bCS3bCS3aCS3a CS3cCS3cCS1aCS1a CS1bCS1b CS1cCS1c CS4bCS4b CS4dCS4dCS4cCS4cCS4aCS4a

– Isoch OUT T2 has no complete-splitsIsoch OUT T2 has no complete-splits– Isoch IN T4 only has one additional complete-splitIsoch IN T4 only has one additional complete-split

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October 10, 2000 34

SS2bSS2b SS2cSS2c SS3SS3 SS4aSS4a

CS1bCS1b

data0data0

CS3aCS3a

errerr

CS4aCS4a

mdatamdata

CS1aCS1a

mdatamdataTT Response:TT Response:

Actual:Actual:

SSxSSx - Start-splits - Start-splitsTx - Classic transactionTx - Classic transactionCSxCSx - Complete-splits - Complete-splits

CS4bCS4b

mdatamdata

CS4cCS4c

mdatamdata

CS4dCS4d

data0data0

Periodic Pipeline ExamplePeriodic Pipeline Example

T1T1 T2T2

Best Budget:Best Budget:

Worst Budget: Worst Budget: T3T3

T1T1 T2T2 T4T4T3T3

T4T4CS1aCS1a CS3bCS3b CS4bCS4b CS4dCS4dCS1bCS1b CS3aCS3a CS4aCS4a CS4cCS4cSS1SS1 SS2aSS2a SS2cSS2c SS3SS3 SS4aSS4aSS2bSS2b

SS1SS1 SS2aSS2a

T1T1T1T1 T2 T2 T2T2T2T2 BulkBulk T4 T4 T4T4T4T4T4T4

CS3cCS3c

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Example Bus TracesExample Bus Traces

Split BulkSplit Bulk

Split InterruptSplit Interrupt

Split IsochronousSplit Isochronous

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USB2.0 HubAdditions SummaryUSB2.0 HubAdditions Summary

Hub Ports Support all Speeds (High/Full/Low)Hub Ports Support all Speeds (High/Full/Low)– Isolation of High and Full/Low Speeds via TTIsolation of High and Full/Low Speeds via TT

Simultaneous High and Full/Low-Speed TransactionsSimultaneous High and Full/Low-Speed Transactions– Full/Low Speed (12Mb/s) bus per TTFull/Low Speed (12Mb/s) bus per TT

Can be TT per hub or TT per portCan be TT per hub or TT per port Hub Class Descriptor & RequestsHub Class Descriptor & Requests Optional Standardized Port IndicatorsOptional Standardized Port Indicators TT InternalsTT Internals

– Bulk/Control bufferingBulk/Control buffering– Interrupt/Isochronous scheduled pipelineInterrupt/Isochronous scheduled pipeline

Host OS Microframe Pipeline SchedulingHost OS Microframe Pipeline Scheduling