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Applications Section 4

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® Application Notes

4-1

Applications

AN20 Interfacing the X9241 XDCPs to 8051 Microcontrollers

AN21 X5043/X5045 System Supervisors Manage 8051 typeMicrocontrollers

AN46 Remotely Adjustable Voltage Regulators using XDCPs

AN48 Shaft Encoder Drives Multiple XICOR Digitally ControlledPotentiometers (XDCPs)

AN49 Digital Audio Amplifier Gain Control using Logarithmic XICORDigitally Controlled Potentiometers (XDCPs)

AN50 Op Amp Gain and Offset Trim using XICOR Digitally ControlledPotentiometers (XDCPs)

AN51 Tone, Balance, and Volume Control using a Quad XDCP

AN52 Power Supply and DC to DC Converter Control using XICORDigitally Controlled Potentiometers (XDCPs)

AN53 Designing with XICOR Digitally Controlled Potentiometers(XDCPs)

AN73 Improving Analog Signal Monitors with XDCPs

AN80 Interfacing the X5043 Watchdog Timer to Hitachi H8/3000Microcontrollers

AN88 Evaluation Circuits for XDCP

AN92 Understanding the Xicor 3-wire XDCP Interface

AN99 Temperature and Optical Power Output Control for DFB LaserApplications using the X9438

AN108 Designing with Xicor’s Supervisory EEPROMs with Watch-dogTimer, Power-On Management and Low Voltage Reset

AN109 Adding a Manual Reset to Xicor CPU Supervisors

AN110 Using the Xicor 16k to 64k Supervisory EEPROMs with the 8051 Microcontroller

AN111 Using the Xicor 16k to 64k Supervisory EEPROMs with the 68HC11 Microcontroller

AN114 Interfacing the X9408/X9418 XDCP to 8051 Microcontrollers

AN115 A Compendium of Application Circuits for Xicor’s Digitally-Controlled (XDCP) Potentiometers

AN119 Xicor Real Time Clock Features & Applications

AN120 Application of XICOR Digitally Controlled Potentiometers(XDCPs) as Hybrid Analog/Digital Feedback System Control Elements

AN124 A Primer on Digitally Controlled Potentiometers

AN126 Smart Battery Primer

AN127 Smart Batteries and the Xicor X3100

AN133 Putting Analog On The Bus

AN134 Programmable Tee Networks

AN135 Sensor Circuits and Digitally Controlled Potentiometers

AN136 Using XICOR Digitally Controlled Potentiometers in Commercial RF Power Amplifier Applications

AN137 The X9520 in Fibre Channel/Gigabit Ethernet Applications

AN138 Programmable On Chip Oscillator Compensation

AN139 Designing Power Supplies using Xicor’s XDCP Mixed SignalProducts

AN140 1 Gb/s Fiber Optic Transmitter Design using XICOR DigitallyControlled Potentiometers (XDCPs)

AN141 The Benefits of cell Balancing

ANA142 X3100 Current Measurement Accuracy

ANA143 X3100 Voltage Measurement Accuracy

AN144 Audio Xcellence: XDCP Signal Integrity Report (AudioCharacterization Reports)

AN146 Improving System Performance through Intelligent PowerManagement

AN147 Automated Linearization of Sensor Circuits

AN154 New Devices Integrate Crystal Compensation Circuits

AN155 Advanced Mixed-Signal-Approach for Modern HVAC System

AN156 Using the X9530 in Laser Diode Applications

AN157 Full Reliability with System Management Solutions for ModernCruise Control Systems

AN159 X5043 CPU Supervisor with 4K SPI EEPROM VtripProgramming using a BP Microsystems Programmer

AN160 Power Sequencing in Distributed Power Applications: SequencedTurn-on of Seven DC/DC Power Supplies with Latched Shutdown

AN162 Power On Conditions for the X9258

AN163 Power On Conditions for the X9400

AN164 CPU Supervisor and System Management Devices for BatteryApplications: Using the X40420/21 as a Battery Backup Switch

AN165 Using the X80200 as A Triple Voltage Tracker

AN166 Power Sequencing in Distributed Power Applications:Sequenced Turn-on of Seven DC/DC Power Supplies withLatched Shutdown

AN167 Using Cell Balancing to Maximize the Capacity of Multi-cell Li-Ion Battery Packs

AN168 Dynamic Temperature Compensation For Pressure Sensors

AN169 X80070, The Flexible -48V Hot Swap Solution

AN170 Using a Rotary Encoder to Control Two X93254 Dual DCPs

AN171 Adding Voltage Sequencing To Your Custom DC-DC ConverterDesign: Using the X80140 Power Sequencer

AN172 Using the X80140 Power Sequencer with Smart Power SolidState Relays

AN173 Using the X80200 Power Sequencer with Intelligent PowerSwitches

AN174 Optimizing LDMOS Transistors Bias Control An AccurateSolution for Basestation RF Power Amplifiers

AN175 Low Cost In-circuit Programmable Quad Power Sequencer

AN176 Sequencing 5 Supplies Using the X80200

* Available via Xicor website: www.xicor.com – Design Tools

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®A Primer on Digitally-Controlled Potentiometers

4-2

The objective of this technical note is to provide the design engineerwith the fundamentals of the operation and application of digitally-controlled potentiometers.

General DescriptionThe potentiometer is a three terminal variable, resistance-likedevice whose schematic symbol is shown in Figure 1.

Figure 1. Schematic Symbol of the Potentiometer

There are two types of potentiometers; mechanical and electronic.The terminals of the mechanical potentiometer are called CW (clock-wise), CCW (counter clockwise), and wiper. The correspondingnames or designations for the terminals of the electronic version areVH or RH, VL or RL, and the wiper VW or RW. The mechanical pot isa three terminal device while the electronic pot is an integrated cir-cuit with a minimum of eight terminals.

Xicor’s digitally-controlled potentiometer (XDCP) is an electronicpotentiometer whose wiper position is computer or digitally con-trolled. The electronic version of the potentiometer also has memo-ry where wiper settings and/or data can be stored.

The digitally-controlled potentiometer (XDCP) is a system level con-trol device performing a component level function.

The block diagram of a typical digitally-controlled potentiometer isshown in Figure 2.

Figure 2. Block Diagram of the Digitally-ControlledPotentiometer

The control and memory section of the device is implemented inCMOS and biased with a 3V or 5V digital or logic supply. The deviceis controlled through one of four different serial buses; (1) 3-wire,(2) 2-wire similar to I2C, (3) SPI (Serial Peripheral Interface), and (4)2-wire and Up/Down Interface (i.e. X9252 /X9455). The control sig-nals for the 3-wire bus are Up/Down, Increment, and Device Select.The Up/Down control input is a level sensitive signal which estab-lishes the direction of the movement of the wiper. The wiper ismoved on the falling edge of the Increment control input in thedirection established by the Up/Down signal. The Device Select con-trol input is like an address line and enables or disables the device.The control inputs for the 2-wire bus are Clock (SCL), a bidirection-al Serial Data line (SDA), and Address lines (ADDR). The controlinputs for the SPI bus are Clock (SCK), Serial In (SI) and Serial Out(SO) data lines, and address lines (ADDR). The 2-wire and SPI seri-al interfaces have protocols that are explained in the data sheets.

The digitally-controlled potentiometer is an integrated circuit whoseimplementation is shown in Figure 3. Polycrystalline resistors areconnected in series between the RH and RL terminals and solid stateswitches implemented by nMOS or CMOS transistors are connect-ed at each end of this resistor array and between the resistors. Theswitches are equivalent to a single pole, single throw switch. Oneend of all the switches are tied together and are connected to thewiper terminal. Only one switch will be closed at a time connectinga node in the series resistor array to the wiper. The resistors arepolycrystalline silicon deposited on an oxide layer to insulate themfrom the other circuitry.

Figure 3. Implementation of the ElectronicPotentiometer

CW (VH or RH)

Wiper (VW or RW)

CCW (VL or RL )

VCC (Supply Voltage)

Controland

Memory

VSS (Ground)

VH/RH

VW/RW

VL /RL

Up/Down (U/D)

Increment (INC)

Device Select (CS)

VH/RH

VW/RW

VL/RL

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4-3

Applications

The potentiometer can be used in application circuits as a three ter-minal device or as a two terminal device. The most common way touse the potentiometer as a three terminal device, Figure 4, is as avoltage divider circuit. Plus and/or minus voltages are connectedacross the potentiometer and the wiper goes from one voltage limitto the other as the wiper is moved from the low to high terminals.In many applications, this circuit can be substituted for a digital-to-analog convertor since it performs a digital in, analog out function.

Figure 4. Three Terminal Configuration and Application

The second fundamental way of using the XDCP is as a two termi-nal, variable resistance. A simple application illustrating this config-uration is shown in Figure 5 where the potentiometer functions as avariable resistor and, in essence, varies the current through the LEDsince the voltage across the potentiometer is relatively constant.

Figure 5. Two Terminal Configuration and Application

The two basic applications illustrate the use of the digitally con-trolled potentiometer in a digital-to-analog voltage circuit and in adigital-to-analog current circuit.

Figure 6 expands the block diagram of the XDCP to include the inter-nal registers and data paths. The WCR or Wiper Counter Register is

a volatile register whose output determines the position of the wiperby closing a switch connecting the wiper terminal to a point in theresistor array. For the XDCPs with a 2-wire or SPI bus, there are alsofour non-volatile Data Registers (R0-3 ) which can be used to storedata or additional wiper settings. The wiper counter and data regis-ters can be programmed from the bus or data can be transferredbetween the registers through the device’s instruction set. Normally,data register R0 is used to store the wiper setting for the power-upcondition. For the XDCPs with a 3-wire interface, there is only oneinternal non-volatile register per potentiometer, which stores thewiper setting for restoration during the power-up condition.

Figure 6. XDCP System Control and Registers

The XDCPs with a 2-wire or SPI serial bus have an instruction set.The typical instructions are shown in Figure 7 along with the typicalbit structure in Figure 8. The instructions control the flow of datainternally or through the bus, the increment decrement feature, andsome specialized commands. The global transfer command trans-fers data between registers in devices with a multiple number ofpotentiometers and the write in progress (WIP) instruction monitorsthe completion of the non-volatile write process.

Figure 7. Instruction Set

-5V →+5V

Programmable Voltage-5V

+5V

⇓R0 R1

R2 R3

WIPERCOUNTERREGISTER

(WCR)

VH/

VL/

VW/

INTERFACEAND

CONTROL

SCL(Clock)

SDA(Data)

A2A3

(Address)

A0

A1 Data

8

RH

RL

RW

Programmable

+5V

Current

⇒

INTER-FACEAND

CONTROL

SCLSDA

A2A3

A0A1

Read/Write Wiper Counter Register (WCR)

Read/Write Data Registers (D)

Transfer WCR and D

Global Transfer WCR and D

Increment/Decrement Wiper

Read “WIP” status bit

example: X9408

Figure 8. Bit Structure

Write Wiper Counter Register (WCR)

START

device typeidentifier

deviceaddresses S

ACK

instructionopcode

wiperaddresses S

ACK

wiper position(sent by master on SDA) S

ACK

STOP0 1 0 1 A

3A2

A1

A0 1 0 1 0 0 0 P1 P0 0 0

WP5

WP4

WP3

WP2

WP1

WP0

Byte 1 Byte 2 Byte 3Slave AcknowledgeTwo-wire Interface

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4-4

Xicor digitally-controlled potentiometers also come with activedevices like operational amplifiers and comparators. The block dia-gram of the dual pot-dual op amp device is shown in Figure 9.

Figure 9. Potentiometer and Operational Amplifier

The terminals of both the potentiometer and the op amp are broughtout to accommodate all possible configurations. The op amp ispowered or biased with the externally connected V+ and V- analogvoltage supplies. The WCR programs the location of the wiper of thepotentiometer and the Analog Control Register (ACR) programs fea-tures of the operational amplifier.

The analog data sheet parameters reflect the limitations of the digi-tally-controlled potentiometer. The key analog data sheet parametersare number of taps, end to end resistance, maximum voltages on thepotentiometer pins, wiper resistance and current, power rating, res-olution, noise, linearity, and temperature coefficient. Figure 10 liststhe data sheet parameters and their values for a typical XDCP.

The number of taps in a potentiometer varies from 16 to 256 andreflects the resolution of the device or its ability to discern 1 of n. Theend to end resistance (RH to RL) of the potentiometer is RTOTAL andcomes in 1kΩ to 1MΩ values. The voltage VCC, 3 to 5V, provides thevoltage biasing for the digital control and memory section and V+and V- provide the voltage biasing for the analog section. The volt-ages VTERMINAL are the maximum voltages, ±5V to +15V, that can beapplied to the potentiometer pins in their application. Wiper resist-ance, nominally 40W, models the resistance rds (on) of the MOSswitches used to connect the wiper terminal to a node in the resistorarray. The wiper current spec, 1-3mA, limits the maximum amountof current allowed through the wiper switches. Absolute linearitydescribes the actual versus expected value of the potentiometerwhen used as a divider and is guaranteed to be accurate within oneleast significant bit or minimum increment (MI). Relative linearitydescribes the tap to tap accuracy and is guaranteed to be 0.2 of anLSB or MI. The potentiometer has a maximum power rating between10mW and 50mW. Two parameters describe the temperaturedependence of RTOTAL and the resistances in the series array. RTO-TAL TC (temperature coefficient) is a nominal 300ppm/°C and theratiometric TC is guaranteed to be within 20ppm/°C.

While the data sheet parameters reflect the performance limitationsof the digitally controlled potentiometer, there are a large number ofcircuit techniques that minimize these limitations. Xicor applicationnotes and technical briefs describe these techniques and are avail-able at the Xicor’s website www.Xicor.com In addition, these publi-cations describe the myriad of possible applications.

VCC

Controland

Memory

V+

V–

+–

RH(0,1) VNI(0,1)

VOUT (0,1)

VINV(0,1)RL(0,1) RW(0,1)VSS

ACR (0,1)

WCR (0,1)

SCLSDA

A3A2A1A0

WP

ANALOG CHARACTERISTICS (Over recommended operating conditions unless otherwise stated.)

Notes: (1) Absolute Linearity is utilized to determine actual wiper voltage versus expected voltage as determined by wiper position when used as a potentiometer.(2) Relative Linearity is utilized to determine the actual change in voltage between two successive tap positions when used as a potentiometer. It is a measure of the error in step size.(3) MI = RTOT/63 or (VH – VL)/63, single pot(4) Iindividual array resolutions.

Symbol Parameter

Limits

Test ConditionsMin. Typ. Max. Units

RTOTAL End to End Resistance –20 +20 %

Power Rating 50 mW 25°C, each pot

IW Wiper Current –3 +3 mA

RW Wiper Resistance40 100

ΩVCC = 5V, IW=±1mA

150 250 VCC = 2.7-5.5V, IW=±1mA

Vv+ Voltage on V+ PinX9410 +4.5 +5.5

VX9410-2.7 +2.7 +5.5

Vv- Voltage on V- PinX9410 -5.5 -4.5

VX9410-2.7 -5.5 -2.7

VTERM Voltage on any V H or VL Pin V- V+ V

Noise -140 dBV Ref: 1kHz

Resolution (4) 1.6 %

Absolute Linearity (1) –1 +1 MI(3) Vw(n)(actual) – Vw(n)(expected)

Relative Linearity (2) –0.2 +0.2 MI(3) Vw(n + 1) – [Vw(n) + MI]

Temperature Coefficient of RTOTAL ±300 ppm/°CRatiometric Temp. Coefficient 20 ppm/°C

Figure 10. Analog Data Sheet Parameters

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4-5

Applications

Increasing the ResolutionResolution is the ability of the potentiometer to discern one part ofX. For the potentiometer, resolution is determined by the number oftaps (X) or wiper positions; the number of taps varies from 32 to 256.However, the effective resolution of the potentiometer in a circuit canbe increased using certain circuit techniques. These techniques—range and resolution, cascading, n squared, and differential V—areshown in Figures 11 and 12.

Figure 11. Increasing the resolution with range andresolution and quad (cascading) techniques

Figure 12. Increasing resolution with n squared and differential V circuit techniques

Optimizing the bandwidthBandwidth refers to the highest useable frequency signal that can beprocessed in a circuit using a potentiometer. A common application ofthe pot is to use it as a passive attenuator similar to a volume controlcircuit. For these types of applications, the wiper capacitance and theresistance of the potentiometer form a low pass filter, shown in Figure13, whose cutoff frequency becomes the limiting factor for bandwidthconsiderations. Selecting low values of RTOTAL, minimizing the straycapacitance at the wiper, and the use of a neutralizing capacitance canoptimize the circuit bandwidth.

Figure 13. Optimizing bandwidth

Minimizing the effect of wiper resistanceThe origin of the wiper resistance of a digitally controlled poten-tiometer is rds (on) of the MOSFET transmission gate used as aswitch to connect the wiper to the resistor array. It is modeled as aresistance in series with the wiper of the potentiometer. The wiperresistance is a limiting factor (along with wiper current) when thepotentiometer is used in two-terminal, variable resistance and inthree terminal, variable divider configurations. The effect of thewiper resistance is typically minimized by connecting the wiper to ahigh impedance circuit or high impedance load or buffering thewiper. Figure 14 illustrates three ways to minimize the effect of wiperresistance.

VR

VX

VX

VR

RT2

Resolution

Range

Range and Resolution Quad (9241)(cascading)

RT1(RTOTAL)

n tap pots

VX VR/4nVX k VR /n, where 0V ≤ k VR ≤VR

Make RT1<< RT2

(smallest) = (smallest) =

VX (V1-V2 ) /nVX (smallest) = (smallest) = VR/n2

VRVR

VR

Pot 1

Pot 3

Pot 2

Differential Vn Squared

V1

V2

VX

VX

R1

R2

Attenuator

Select low RTOTAL device and minimize load capacitanceto optimize bandwidth

RTOTAL C

R1VS

R2

~

fC = 1 2π( )R1//R2 CWIPER

WIPER

V

Design Tips on Using Digital Potentiometers

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4-6

Shifting the temperature dependenceThere are two parameters that describe the temperature dependenceof the digitally controlled potentiometer: RTOTAL TC and potentio-metric TC. The temperature coefficient (TC) of RTOTAL is not guar-anteed and is typically +/- 300ppm/°C. Potentiometric TC describesthe temperature dependence of the ratio of a resistance in the arrayto any other resistor and is guaranteed to be no more than20ppm/°C. When the pot is used as a voltage divider, the tempera-ture dependence in the circuit can be shifted from the RTOTAL TC tothe potentiometric TC by placing a low TC voltage reference acrossthe RTOTAL as shown in Figure 15. In this circuit the voltage acrossthe pot is stable with temperature, hence the temperature depend-ence of the voltage at the various wiper positions is described by thepotentiometric TC.

Figure 15. Shifting the temperature dependence usinga voltage reference

Power protectionSince the digitally controlled potentiometer is an integrated circuit,its voltage, current, and power ratings are less than the mechanicalversions. The maximum power rating per potentiometer per deviceis either 10mW or 50mW and is guaranteed over the full tempera-ture range of the device. Figure 16 shows the typical potentiometerwith its maximum voltages and power levels.

Figure 16. Understanding power

Exceeding the ratings of the data sheet parameters, or subjecting thedevice to system fault conditions, can ultimately destroy it. Figures17 and 18 illustrate, in schematic form, the protection features ofsupply bypassing, the single point grounding system, unusedinputs, and external ESD.

V1 V1

+VOUT+V

+VREF

OUT

V+ V+

(±20ppm/˚C)(±20ppm/˚C)

+5V

1mA 10KΩ

-5V

RTOTAL

V 2

RT

P = = 10mW, 50mW

RT

+VR+VR +VR

VS

≤ 1mA

~15mA

Making RL >> RW, RTUsing a buffer Using high input impedances

Comparator

RWRW

RLRL

VW

VW+-

+-

Figure 14. Minimizing the effect of wiper resistance


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4-7

Applications

Figure 18. Protecting the potentiometer with pullupsand o/u voltage protection

Ensuring reliable performanceAnalog circuit designers can use various circuit techniques to optimizethe performance of the digitally controlled potentiometer in the areasof resolution, bandwidth, wiper resistance, temperature dependence,and power. To ensure the reliable performance of the potentiometerin its application circuits, designers must provide for power supplyfiltering, a solid ground system, no open unused inputs, and extraESD protection, if necessary.

10µF .01µF

.01µF

CeramicDisc

Analog Ground

Digital Ground

Tantalum/Electrolytic

V+

+ +

- -

VCC

Pullup

5-50kΩ VCC

VCCOver and undervoltage protection(and additionalESD protection)

VSS

VSS

CS

Figure 17. Protecting the potentiometer with bypass capacitors and grounds


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4-8

The key analog functions are amplification, regulation, filtering,oscillation, and conversion and the circuits which implement thesefunctions are amplifiers, regulators, filters, oscillators, and convert-ers. Representative examples of each of these circuits will illustratethe computerization of the analog functions.

These basic analog circuits are used as universal building blocks inthe design of analog systems and they also serve as models formore specialized analog functions. The following collection of inde-pendent articles and circuits are examples of ‘putting analog on thebus’. All of them have been breadboarded and tested.

Customized Potentiometers AdvanceAmplifier Design The circuit in Figure 20 is a model of an amplifier circuit whose cutofffrequency and gain are changed using variable resistors. The cutofffrequency is established by a first-order, RC low pass filter and thegain is established by a traditional noninverting operational amplifi-er circuit. Variability and programmability are added to the circuit ifdigitally controlled potentiometers (XDCPs) are used to implementthe variable resistors. The circuit in Figure 21 shows the implemen-tation of the frequency and gain controls. The potentiometer R isconfigured as a pseudo-tee network and along with capacitor Cestablishes the upper cutoff frequency fC. Potentiometer R2 is usedas a three-terminal device and establishes the voltage gain G0.

The voltage gain for the circuit has the form of

G0 is the programmable closed-loop passband gain

where k2 reflects the proportionate position of the wiper from one end of the pot (0) to the other end of the pot (1). The gain is

AnalogFunction

V+

V+

VS VOUT

ClockData

Address

Control and

Memory

Clock

Data

Address

RH

DigitallyControlled Potentiometer

RW

RL

IF a computer controls a potentiometerAND IF a potentiometer controls an analog circuitTHEN a computer controls the analog circuit

AMPLIFIERS: Customized Potentiometers Advance Amplifier Design

REGULATORS: Programmable System-Level Voltage Regulator

FILTERS: Tunable Bandpass (IGMF) Filter

OSCILLATORS: Digitally Controlled Potentiometer Programs the 555,Phase Shift Sinusoidal Oscillator

CONVERTORS: I to V Convertor Vo

Vs

------Goωc

jω ωc+------------------=

G0R1 R2+

R1 k2R2+-------------------------= 0 k2 1≤ ≤

Figure 19. Block Diagram of “Computerizing an Analog Function”

Application Ideas Using Digital Potentiometers

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®

4-9

Applications

1fC =

2πRC

R2G = 1 +R1

R1

R2

R

C

Low Pass Filter Non-Inverting Amplifier

VO

VS

+

–

R1+R 2G =

fC =

R1+K2R 2

K2 R 2 + (1–K2)R 2 = R 2

Control and

MemorySDA

ADDR

SCL

1

2π(K1R)C

X9418W

R1

K2R2 (1-K2)R2

K1R (1-K1)R +5V

+5V

–5V

–5V

VO

VS

C

LW

W

H

R

R2

L H

+

–

Controls Cutoff

Frequency

Controls Passband Gain

Figure 20. Model of Amplifier Circuit

Figure 21. Gain and Frequency Control

A Primer on Digitally-Controlled Potentiometers


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4-10

programmable from 1 to (R1+R2)/R1. The fixed resistor R1 limitsthe circuit’s maximum voltage gain, a condition usually necessaryfor accuracy and bandwidth purposes.

The upper cutoff frequency fC is established by the input R-C network

where k1 (like k2) reflects the proportionate position of the wiperfrom one end of the pot (0) to the other end of the pot (1). The dualversions of the XDCPs use the same serial bus with, of course, dif-ferent addresses for the individual potentiometers.

For high frequency amplifiers, the high end-to-end resistance of 10kΩ(RTOTAL) of the X9418 creates time constants limiting the bandwidthof the circuit. The effective end-to-end resistance of the potentiome-ters can be reduced using two techniques shown in the high frequen-cy amplifier circuit of Figure 22. If the wiper of the potentiometer isconnected to a high impedance, shunting RTOTAL directly with an

external resistor reduces the effective end-to-end resistance. ResistorR3 changes the effective end-to-end resistance of potentiometer R2from 10kΩ to .909kΩ. If the wiper of the potentiometer is not con-nected to a high impedance, the effective end-to-end resistance canbe reduced by adding external, equal valued resistors (R4 and R5)from the wiper to the high terminal and from the wiper to the low ter-minal. This technique, however, creates a potentiometer whose taperis pseudo-linear and whose end-to-end resistance varies with wiperposition by about 20%. For most applications, these conditions areacceptable. The gain of the amplifier circuit in Figure 22 is program-mable from 1 to 2 and the cutoff frequency is programmable from130KHz to over 1MHz. The principle of computerizing an amplifier isshown in Figure 23 where the amplifier is a functional block and thegain and cutoff frequency are controlled through a serial bus con-nected to a digitally controlled potentiometer.

The design of high frequency circuits requires low value and some-times odd value resistances. The two techniques shown in this cir-cuit allow the designer to customize the values of a potentiometer’send-to-end resistance to fit the design requirements.

fcωc

2Π-------

1

2Π k1R( )C---------------------------= = 0 k1 1≤ ≤

Controland

Memory

SDA

ADDR

SCL

X9418W

R1 = 910Ω

R3 = 1KΩ

R2 = 10KΩ

10KΩ

R4 = 5KΩ

130KHz ≤ fc ≤ 1MHz

1 ≤ GO ≤ 2

R5 = 5KΩ300pF

+5V

LT1220

+5V

–5V

–5V

VO

VS

+

–

Figure 22. High Frequency Amplifier


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4-11

Applications

Programmable System-Level VoltageRegulator Power consumption and failing batteries are key issues in batteryoperated applications. Features in the new generation of series voltage regulators address these concerns. For example, NationalSemiconductor’s LP2951 is a micropower voltage regulator whichprovides a logic-level output signal detecting a low regulated outputvoltage and has a logic-level input to shutdown the regulator to conserve power. These signals are digital and hence compatible withprocessor based systems. With these type regulators, systemdesigners can now use the basic device to provide voltage regulationand use the digital signals to address the power and low voltage concerns. But what about the programming or control of the regula-tor’s output voltage? Surely a mechanical potentiometer or resistorselection is not the solution. We can complete the so-called comput-erization or digitizing of the voltage regulator by adding a digitallycontrolled potentiometer to program the regulator’s output voltage.

The circuit in Figure 24 is wide-range, computer controlled voltageregulator whose nominal output voltage varies from 1.235V to 14.8V.The regulator is programmed using a Xicor digitally controlledpotentiometer (XDCP) which, with its 100 taps or steps, can pro-gram the regulator output voltage with a resolution of .136V perstep. The output voltage is given as:

VO = 1.235V (1 + kR/910Ω)

where k is a number that varies from 0 to 1 and reflects the propor-tionate position of the wiper from one end of the pot (0) to the otherend of the pot (1). R is the end to end resistance of the potentiome-ter and is also called RTOTAL.

The XDCP is programmed using a 3-wire bus and the potentiometeris configured as a two-terminal variable resistor. The regulator outputsignal /ERROR warns of a low output voltage and may be used as apower-on reset. The logic compatible SHUTDOWN input signalenables the regulator to be switched on and off to conserve power.These signals along with the ones required to program the XDCP aretypically connected to the I/O port of the processor or controller.

The potentiometer adds variability to the regulator circuit and its digitalcontrols attached to a computer controlled bus provides program-mability. An automated closed-loop calibration procedure to programthe regulator saves manufacturing test time and provides enhancedperformance and security. The circuit can be used as a bias supply,voltage reference, or as a programmable, high output current, volt-age source in test and measurement applications.

The stability of the regulator makes it a potential candidate for appli-cations as a voltage reference. The low-power circuit in Figure 25 isa programmable voltage reference whose output voltage varies from4.73V to 5.10V in 3.7mV steps. The output voltage is given as:

VO = 1.235V [1 + (kR +100kΩ)/ 34kΩ)]

VoltageAmplifier

Computer Bus

Controls Bandwidth and Gain

V+

V–

VS VO

Figure 23. Putting an Amplifier on the Bus


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4-12

1

+

4

4

100KΩ

+5V

X9312W

LP2951 3.3µFVO (Reg)

VO (Reg) = 1.235V (1 + KR/910Ω)

1.235V ≤ VO (Reg) ≤ 14.8V

Resolution = .136V/Step

R(10KΩ)

910Ω

7

7

8

8

2

3

5 1

.01

U/D

SHUTDOWN

ERROR

Vin (UNREG)

[≥ (VO + IV)]

CS

INCControlsOutputVoltage

Figure 24. Programmable Voltage Regulator

1

4

4

100KΩ

+5V

LP2951

3.3µF

VO (Reg) = 5.00V

R10KΩ

100KΩ

34KΩ

7

7

8

8

2

3

5 1

.01

U/D

SHUTDOWN

ERROR

Vin (UNREG)

(≥ 6.1V)

CS

INC

Figure 25. Programmable Voltage Reference


www.xicor.com


4-13

The electronic potentiometer adds variability to the regulator circuitand its digital controls, through its computer controlled bus, pro-vides programmability. An automated closed-loop calibration proce-dure to program the regulator saves test time and providesenhanced performance and security.

Tunable Bandpass (IGMF) Filter The circuit in Figure 26 is a tunable bandpass filter that falls in theInfinite Gain Multiple Feedback (IGMF) class. IGMF type filters arecharacterized by a fixed five-component configuration. For the cir-cuit in Figure 26, the gain expression is

Applications

Vo

Vs

------s R1C⁄–

s2

2( R3C )s R1 R2+( ) R1R2R3C2⁄+⁄+

---------------------------------------------------------------------------------------------------Aos ωo Q⁄( )

s2

s ωo Q⁄( ) ωo2+ +

-----------------------------------------------==

(R1+R2)f0 = , 2.5KHz ≤ f0 ≤ 12.5KHz

A0 = = –1

= 796 Hz

–

R1+R2 R3

Control and

MemoryU/D

CS

INCR

R3

2R1

1

2C

BW =1

πR3C

X9313Z

1/2 LM 6142

C1=C2=C=.01µF

R21KΩ

20KΩ

R1

R340KΩC1

C2

+5V

+5V

–5V

VO1

4

82

3

2VS –

+

ControlsCenter Frequency

Figure 26. Tunable Band Pass (IGMF) Filter


www.xicor.com


4-14

where AO, ωO, and Q represent the passband gain, characteristic fre-quency, and figure of merit respectively.

From the gain expression,

and

A problem common to most second order, active filters is thedependence of each of the filter’s parameters on the values of all ormost circuit components. Ideally, of course we would like to haveone component control one parameter only. The equations aboveshow that fO can be varied by changing R2 without changing thegain AO.

The filter’s bandwidth BW

is also independent of R2. Hence varying R2 will change the centerfrequency fO but not the gain nor the bandwidth of the filter. If R2 is aXicor digitally controlled potentiometer (XDCP) connected as a variableresistor, the bandpass filter is digitally tunable and programmable.

For the circuit values shown, the passband gain is minus one, thebandwidth is 796Hz, and the center frequency can be varied from2.5KHz to 12.5kHz. The circuit can be modified for self-tuning operation.

Digitally-Controlled Potentiometer Programs The 555The use of the digitally-controlled potentiometer in the circuit ofFigure 27 represents a new twist to controlling the heavily used 555timer IC. The replacement of discrete resistors RA and RB in the

traditional oscillator application of the 555 circuit with a program-mable solid-state potentiometer introduces a degree of freedom thatallows the computer control of both the frequency of oscillation andthe duty cycle. The potentiometer adds variability to the analog circuitand its digital controls, through its computer-controlled serial bus,provides programmability.

For discrete values of RA and RB, the frequency and duty cycle aregiven as

If RA and RB are replaced by kR (wiper resistance to one end) and(1-k)R (wiper resistance to the other end) of the potentiometer, thefrequency and duty cycle are given as

k is a number that varies from 0 to 1 and reflects the proportionateposition of the wiper from one end (0) of the potentiometer to theother end (1). As the wiper is programmed from one end of thepotentiometer to the other, the frequency of oscillation will vary from

1.44/2RC < fo < 1.44/RC

and the duty cycle will vary from

.5 < DC < 1

For the circuit values shown, the frequency will vary 725Hz to1450Hz. The circuit uses Xicor’s X9315W which is a 10kΩ poten-tiometer with 32 taps and a 3-wire interface. The number of tapsrepresents the number of programmable wiper positions or frequencyand duty cycle values and R (or RTOTAL) is equivalent to RA + RB. Forthe Xicor digitally-controlled (XDCP) potentiometers, the number oftaps vary from 32 to 256, RTOTAL varies from 1kΩ to 1MΩ, andpotentiometers are also available with SPI and I2C interfaces. Awiper setting can be stored in the XDCP’s non-volatile memory per-mitting the circuit to return to a predetermined frequency and dutycycle value on power-up. The circuit can be used in control, test andmeasurement, and signal processing applications.

A0

R3

2R1

---------,–=

f0

1

2ΠC------------

R1 R2+( )

R1R2R3

----------------------- ,=

Q 1 2⁄( )R1 R2+( )R3

R1R2

------------------------------=

BWfo

Q----

1

ΠR3C---------------= =

fo

1.44

RA 2RB+( )C---------------------------------= and DC

RA RB+

RA 2RB+------------------------=

fo1.44

2 k–( )RC-------------------------=

and DC 1

2 k–------------=


www.xicor.com


4-15

Phase Shift Sinusoidal OscillatorThe sinusoidal oscillator in Figure 28 is implemented with two allpass filters, A2 and A3, and inverting amplifier A1. The magnitude ofthe gain for each of the circuits A1, A2 and A3 (R3 =R2) is ideally one.Hence the magnitude of the loop gain is ideally one. The phase shiftof the loop gain is dependent on the phase shift through the all passfilters and it is a function of R, R1, and C. The frequency where thephase shift of the loop gain is 360° (or 0°) satisfies the condition foroscillation and hence is the frequency of oscillation. An advantage ofthis configuration is that the frequency of oscillation can be directlycontrolled by resistances R or R1 and no gang tuning of elements isnecessary like in many popular oscillator circuits.

The ideal loop gain for this configuration is given by

whose magnitude is

and whose phase shift is

The frequency of oscillation can be found by solving for the valuethat results in 360° phase shift or

The closed loop gain of A1 (R3 >R2) is set to greater than one tocompensate for the finite values of open loop gain of the amplifiersand to ensure startup. R or R1 or both resistors can be used to varythe frequency of oscillation. For the values shown, the programmablefrequency range is from 1.5kHz to 9kHz. Zener or reference diodesD1 and D2 control the amplitude of the signal.

Applications

f0 = , 725 Hz ≤ f0 ≤ 1450 Hz

U/D

CS

INC

555

Controland

Memory

1.44

(2-K)RC

DC = , .5 DC ≤ 11

2-K

X9315W

KR(RA)

(1-K)R(RB)

+5V

.01

C.1µF

1

4

7

8

OUT

2

3

5

6

ControlsFrequency

and DutyCycle

Figure 27. 555 Rectangular Oscillator

AF GA1GA2GA3

R3

R2

------– 1 sR1C–

1 sR1C+-----------------------

1 sRC–

1 sRC+--------------------

= =

AFR3

R2

------=

φ 2tan1–

– ωRC=

ωo 2Πfo

1

C---- 1

RR1

----------

1 2/

= =


www.xicor.com


4-16

I to V Convertor The circuit in Figure 29 is an input current (I) to output voltage (V) convertor. The feedback portion of the circuit is a tee network ofresistive elements consisting of a digitally controlled potentiometerand a fixed resistor R1(=R). The input–output relationship for the I toV convertor is

where k is a number that varies from 0 to 1 and reflects the propor-tionate position of the wiper from one end (0) of the potentiometerto the other end (1). The programming of the location of the wiper

changes the scale factor between the input current and output volt-age without changing the values of any of the resistances and avoidsthe use of high value resistors in measuring low values of current.As k goes from 1 to 0, the scale factor goes from –R (1) to a theo-retical –R(∝). The high impedance output of many transducers, likephotodiodes and photovoltaic cells, is modeled as a current source.

The programming of the 100 tap potentiometer provides for a two-decade change in effective resistance thus allowing the circuit tomeasure at least four decades of current. For the values shown, thecircuit can measure current from 1µA to 1mA.

1

1 1

4

–

–

+

+

–

+

4 4

7

7

10KΩ 10KΩ

D2 D1

+5V

+5V

+5V

–5V

–5V

–5VC C

C = .01µF

30pF

A2 LM308A

A1 LM308A

1/2 X9410Ω

A3 LM308A

30pF

30pF

10KΩ

9.1KΩ

10KΩ

R1(10KΩ)

R3 10KΩ

R2

R(10KΩ)

7

8

8 8

2

2 2

3

3 3

6

6 6

SOSI

SCKControl

andMemory

+5V

–5V

ADDR

Figure 28. Phase Shift Sinusoidal Oscillator

Vo

Is

------ R–1 k k

2–+( )

k----------------------------=


www.xicor.com


4-17

Applications

INC

U/D

CS

VO

IS

–

+LT1097

= –R

1mA < Is < 1mA

Vo

Is

Tee Network

X9C102 (1KΩ)

+5V

+5V

–5V

Controland

Memory

kR(1-K)R

HW

L

R (1KΩ)

1 + k – k2

k(1 – k)R + kR = R = 1K

Figure 29. I to V Convertor


www.xicor.com


4-18

VR

VW/RW

+VR

I

Three terminal Potentiometer; Variable voltage divider Two termial Variable Resistor;

Variable current

Noninverting Amplifier Voltage Regulator

Offset Voltage Adjustment Comparator with Hysterisis

+

–

VSVO

R2

R1

VO = (1+R2 /R1)VS

R1

R2

Iadj

VO (REG) = 1.25V (1+R2 /R1)+Iadj R2

VO (REG)VIN 317

+

–

VS

VO

R2R1

VUL = R1/(R1+R2) VO(max)RLL = R1/(R1+R2) VO(min)

100KΩ

10KΩ10KΩ

10KΩ

+12V -12V

TL072

+

–VSVO

R2R1

Basic Configurations of Potentiometers

Application Circuits

More Application Ideas

www.xicor.com


4-19

Applications

Application Circuits (continued)

Attenuator Filter

Inverting Amplifier Equivalent L-R Circuit

+

–

VSVO

R3

R1

VO = G VS-1/2 ≤ G ≤ +1/2

GO = 1 + R2 /R1fc = 1/(2πRC)

+

–

VS

VO

R2R1

ZIN = R2 + s R2 (R1 + R3) C1 = R2 + s Leq (R1 + R3) >> R2

+

–

VS

Function Generator

R2

R4 R1 = R2 = R3 = R4 = 10kΩ

+

–

VS

R2

R1

R

C

VO = G VSG = - R2 /R1

R2C1

R1

R3

Z IN

+

– R2

+

–

R1

RA

RB

frequency ∝ R1, R2, Camplitude ∝ RA, RB

C

VO

More Application Ideas

www.xicor.com


4-20

a

f

k

m j

l

b

d

e

ce

Top View (Sample Marking) Bottom View (Bumped Side) Side View

Side View

A3 A2 A1

B3 B2 B1

C3 C2 C1

D3 D2 D1

E3 E2 E19119

TB

ZY

WW

IL

ot#

SymbolMillimeters

Min Nominal MaxPackage Width a 2.535 2.565 2.595Package Length b 3.272 3.302 3.332Package Height c 0.644 0.677 0.710Body Thickness d 0.444 0.457 0.470Ball Height e 0.200 0.220 0.240Ball Diameter f 0.300 0.320 0.340Ball Pitch - Width j 0.5Ball Pitch - Length k 0.5Ball to Edge Spacing – Width l 0.758 0.783 0.808Ball to Edge Spacing – Length m 0.626 0.651 0.676

connected to bond pad * no-connect by specification only; bump is

** True no-connect bump

3 2 1

A NC* Vcc RL

B A0 NC* * RH

C A2 NC* * RW

D SCL WP NC*E SDA Vss A1

RH

RLRW

POT

Wiper

1024-taps

NC NC

100KΩPower On Recall

Wiper CounterRegisters (WCR)

Data Registers(DR0-DR3)

VCC

VSS

2-WireBus

Interface

BusInterface

and Control

AddressData

Status

WriteRead

Transfer

Control

X9119 Block Diagram

Package Dimensions

15-Bump Chip Scale Package (CSP B15) Outline Drawing

Ball Matrix

Digital Potentiometer in Special Packages

www.xicor.com


4-21

Applications

f

k

ml j

b

a

A4 A3 A2 A1

A4 A3 A2 A1

A4 A3 A2 A1

A4 A3 A2 A1

A4 A3 A2 A1

A4 A3 A2 A1

e

d

ee

Top View (Marking Side) Bottom View (Bumped Side) Side View

Side View

9259

TR

RY

WW

IL

OT

#

Symbol

Millimeters

Min Nom. Max

Package Width A 2.755 2.785 2.815

Package Length B 4.507 4.537 4.567

Package Height C 0.644 0.677 0.710

Body Thickness D 0.444 0.457 0.470

Ball Height E 0.200 0.220 0.240

Ball Diameter F 0.300 0.320 0.340

Ball Pitch – Width J 0.5

Ball Pitch – Length K 0.5

Ball to Edge Spacing – Width L 0.618 0.643 0.668

Ball to Edge Spacing – Length M 1.056 1.081 1.106

4 3 2 1

A RL1 A1 A2 RW0

B RW1 SDA WP RL0

C VSS RH1 RH0 VCC

D NC RH2 RH3 NC

E RW2 A3 NC1 RL3

F RL2 SCL A0 RW3

NC – must be left unconnected

24-Bump Chip Scale Package (CSP B24) Outline Drawing

Package Dimensions Ball Matrix

RH0

RL0RW0

VCC

VSS

2-WireBus

Interface

50KΩ or 100KΩ versions

RH1

RL1RW1

RH2

RL2RW2

RH3

RL3RW3

Power On Recall

Wiper CounterRegisters (WCR)

Data Registers16 Bytes

BusInterface

and Control

AddressData

Status

WriteRead

TransferInc/Dec

Control

X9259 Block Diagram


www.xicor.com


4-22

Availability of Xicor Devices in Chip Scale Devices

Device Availability Family Size (max)

X9520 Production Bias and Control: Laser Diode Calibration 2.602mm x 3.872mm




X9111 Production Digital Potentiometer 2.595mm x 3.332mm













X9110 Call Factory for Availability Digital Potentiometer








www.xicor.com

® AN177 Voltage Reference Application and Design Note

4-23

What and Why is a Voltage Reference?Conceptually, a voltage reference is a very simple device with onlyone purpose in its life. Quite simply, the purpose of a voltage refer-ence is to generate an exact output voltage no matter what happenswith respect to its operating voltage, load current, temperaturechanges or the passage of time.

The purpose of this Application Note is to provide an understandingof voltage references, their limits of error, and interesting applicationcircuits using high accuracy voltage references. The Xicor X60008voltage reference approaches the design in a new and exciting topol-ogy that provides extremely tight initial tolerance, low temperaturedrift, and unbelievably low operating current.

Where is a Voltage Reference Used?Voltage references are used to provide a very precise voltage formeasurements to be made against. The accuracy of any measurementis only as good as the ability to compare it against a known standard.

High resolution A/D and D/As, digital meters, smart sensors withthreshold detectors, servo systems, battery management, precisionregulators and many other precision industrial control systemsrequire a precision voltage reference at their core.

Voltage references can also be used to very accurately set anothervariable; for example, a laser diode might need to operate at a veryprecise current to generate the proper wavelength of light. A highaccuracy constant current source can be designed using a voltagereference as shown in the Applications Section.

Difference from a Voltage RegulatorVoltage references and voltage regulators seem to be very similardevices; both are used to generate a regulated output voltage that isimmune to changes in load current, input voltage, temperature, etc.A voltage regulator is intended to provide higher output current thana voltage reference. However, the voltage regulator is much lessaccurate than a voltage reference, the output noise is higher, and thelong term stability is not specified in a voltage regulator. Additionally,the voltage regulator is put into a package that can withstand the heatthat is generated by the power dissipated by the regulator.

Types of Voltage References— Advantages and DisadvantagesThere are different topologies to operate a voltage regulator, andthere are many different techniques to generate highly accurate out-put voltages from a voltage reference. The Xicor X60008 voltage ref-erence approaches the design in a new and exciting topology thatprovides extremely tight initial tolerance, low temperature drift, verylow long term drift, and unbelievably low operating current. The Xicor

Floating Gate Analog (FGA) technology will be discussed, but firstlet’s review the various operating modes and reference techniques.

Series and Shunt Mode OperationFirst, voltage references are designed to operate in either seriesmode or shunt mode as shown in Figure 1.

Figure 1

Shunt mode references are typically less accurate than Series mode,but require lower operating current. They can be operated from veryhigh input voltage (Vcc) because only the resistor R1 sees the highvoltage. Shunt references can be used to generate negative referencevoltages or a reference voltage that is floating between potentials.

Series mode references are typically much higher accuracy and lowernoise than Shunt mode references. However, the supply voltage(Vcc) is limited to the absolute maximum rating of the device.Generally, a Series mode reference provides a positive output voltagewith respect to ground; however, the extremely low supply current ofthe Xicor X60008 voltage reference allows clever circuit design tricksto be used to allow negative reference voltages or a reference voltagethat is floating between potentials.

Voltage Reference Design TechniquesIntegrated voltage references are REALLY difficult to make! Most ICvoltage reference designs depend on using nonlinear and highlyprocess dependant characteristic of transistors to cancel the tempera-ture coefficients of diodes or transistors. Extensive trimming of bothinitial tolerance and temperature drift is required, and, often these twoparameters cannot be trimmed to satisfy both conditions. As we willsoon see, the Xicor X60008 voltage reference depends only on the abil-ity to force and measure a high accuracy potential. But first, let’s reviewseveral popular voltage reference topologies – the Bandgap reference,the XFETTM reference, and the buried Zener reference. Finally, I willgive an overview of the Xicor Floating Gate Analog technology.

Applications

R1

VREF

Vcc

VccVout

Vout

Shunt Mode

Vin Vout

Gnd

VREF

Series Mode


Bandgap Voltage ReferenceBandgap references are ideally suited for voltage reference applica-tions that require low reference voltage (<5 v), low operating current(< 1mA), medium temperature drift (>20 ppm/C), and versatileseries/shunt mode operation.

With the exception of the Xicor Floating Gate Analog technology, allvoltage reference topologies rely on the inherent temperaturedependence of a transistor (bipolar or FET). A highly simplified blockdiagram of a Bandgap reference is shown in Figure 2.

Figure 2

Two voltage sources are generated; the first voltage source is theVbe of a forward biased transistor with an output voltage of 0.7 Vwith a –2 mV/∞C temperature coefficient. A second voltage source,the Proportional To Absolute Temperature (PTAT) generator, pro-duces an output voltage with a +2 mV/∞C temperature coefficient.By operating two transistors at different current densities, a PTATvoltage is obtained. The two voltages are applied to a summing cir-cuit so that the two temperature drifts cancel to yield a Vref Out volt-age with zero temperature drift. Due to the magic of semiconductorjunctions, the temperature drift cancellation requires an output volt-age that is equal to the Bandgap voltage of silicon extrapolated to 0oKelvin; this is approximately 1.24 V depending on the fabricationprocess. As can be seen in the graph in Figure 3, zero TC onlyoccurs at one point on the curve due to the nonlinear relationship ofsemiconductor junctions. For additional reading on the theory ofBandgap voltage references, see Notes 5 and 6.

Figure 3 (Note 2)

It should be noted that this curve is highly idealized, and the curvestaken from actual devices show a wide variation from unit to unit;this is shown in the graph in Figure 4 below for 3 typical IC voltagereferences with the same part number.

Figure 4 (Note 3)

A Bandgap reference shows the bow shaped curve as illustrated inFigure 3. The temperature drift can be lowered by adding a secondorder compensation term to achieve “curvature correction”. Thesecurvature correction Bandgap references typically have an S-shapedTC curve as shown in Figure 5.

4-24

Q1

Vcc

I(-2 mv/C)

(+ 2mv/C)

+

+

Vref Out

PTATGenerator

Temperature Drift

Temperature (°C)

1.245

1.240

1.235

1.230

1.225

-55 -35 -15 5 25 45 65 85 105125

Rev

erse

Vo

ltag

e (V

)

Output Voltage Temperature Drift

Temperature (°C)

2.503

2.502

2.501

2.500

2.499

2.498-50 -25 0 25 50 75 100

Ou

tpu

t V

olt

age

(V)

3 Typical Parts


4-25

Figure 5 (Note 3)

XFETTM Voltage ReferenceXFET references are similar in principle to Bandgap referencesexcept they depend on Junction Field Effect Transistors (JFET)instead of bipolar transistors as used in the typical Bandgap refer-ence. XFET references can offer lower noise and drift than Bandgapreferences while operating at lower supply current. For additionalreading on the theory of XFET voltage references, see Note 7.

In summary, Bandgap references are usually used for voltage refer-ence applications that require low reference voltage (<5 v), lowoperating current (< 1mA), medium temperature drift (>20 ppm/C),and versatile series/shunt mode operation.

Buried Zener Voltage ReferenceZener diodes have traditionally been used to make high quality volt-age references. Prior to integrated circuits, discrete Zener diodeswere used for voltage reference applications; “temperature compen-sated” Zener diodes such as 1N829 were used in discrete and hybridcircuits. When IC Zener diodes were first used they were very noisyand unstable due to surface contamination and crystal imperfec-tions. It was found that by moving the Zener junction from the surface of the die to below the surface the noise and stability weregreatly improved. These Zener diodes became known as “buriedZener diodes”, and have been the workhorse device for high qualityvoltage references.

Zener diodes in the 5 to 8 V range show a temperature drift that isapproximately +2 mV/°C. By combining a forward biased diodejunction with a Zener diode, a voltage reference with zero TC couldbe obtained as shown in Figure 6.

Figure 6

However, there are lots of caveats that go along with this referencecircuit:

1. The temperature drift of the two diodes is dependant on theirbias current, and trimming is required to achieve low TC.

2. Often, the zero TC adjustment changes the absolute output volt-age from its intended value so you can not obtain tight initial tol-erance and low temperature drift at the same time.

3. The supply current is higher than a Bandgap reference since theZener diode and forward biased diode are operated at a highercurrent to achieve low noise and zero temperature drift. Also, formaximum flexibility in setting the diode’s TC, two currentsources are used to bias the diodes.

4. The supply voltage must be greater than the Zener diode voltageand the bias current source which makes the supply voltagegreater than 7 V.

In summary, buried Zener references are usually used for voltagereference applications that require low temperature drift and lownoise. However, they require higher supply voltage (>7 v), higheroperating current (> 1.5 mA), and operate only in series modeunless external biasing is used.

Applications

Temperature (°C)

2.5020

2.5015

2.5010

2.5005

2.5000

2.4995

2.4990

2.4985

2.4980-60 -20-40 0 20 40 60 80 100120

Ref

eren

ce V

olt

age

(V)

Tempco -60°C to 120°C3 Typical Parts

Vcc

I

(-2 mv/C)

+

+

Vref Out

I

Zener Diode(+ 2mv/C)


Floating Gate Analog Technology Voltage ReferenceThe Xicor Floating Gate Analog technology takes a radically differentapproach to make a high quality voltage reference. Instead of usingthe inherent temperature drift characteristics of transistors anddiodes which are highly nonlinear, process dependant, and extremelyinflexible, the Xicor Floating Gate Analog technology stores a precisevoltage on Cstore, a floating gate. The floating gate voltage is bufferedwith a high quality CMOS amplifier as shown in the simplified diagramshown in Figure 7:

Figure 7

The resulting voltage reference has excellent characteristics whichare unique in the industry; very low temperature drift (1 ppm/°C),high initial accuracy, and extremely low supply current (< 1 mA).Also, the reference voltage is not limited to “magic” voltagesobtained from Bandgap references or buried Zener diodes to achievetemperature drift cancellation. In addition, there is no need for trim-ming via lasers, fusible links, or Zener zapping. Standard outputvoltage settings from 0.9000 to 5.000 are programmed as part ofthe standard manufacturing process as discussed in the followingsection.

To understand how the output voltage is programmed, refer to thesimplified diagram shown in Figure 8:

Figure 8

During production testing, an external voltage, Vprogram, is appliedto the device under test, and switch S1 is closed. A servo amplifierforces the Vprogram voltage onto the floating gate capacitor, Cstore.When the programming and test modes are complete, the pro-gramming voltage, Vprogram is removed, and switch S1 is openedleaving a charge on capacitor Cstore which is the desired referencevoltage. Typically the trapped charge on the floating gate can remainwithout loss for greater than 10 years. As one might expect, theswitch S1 is a very critical element and is highly simplified in thisdescription. Switch S1 is really two tunnel diodes using a mecha-nism know as the Fowler-Nordheim Tunneling effect. For a completedescription of the Xicor Floating Gate Analog technology, seeAppendix A, “Precision Voltage Reference Using EEPROMTechnology”, by Jim McCreary.

In summary, the Xicor Floating Gate Analog technology provides avoltage reference which has excellent characteristics which areunique in the industry; very low temperature drift (1 ppm/°C), highinitial accuracy (0.01%), and extremely low supply current (< 1 mA).Also, the reference voltage is not limited to “magic” voltages so it ispossible to provide output voltage settings from 0.9000 to 5.000 thatare programmed as part of the standard manufacturing process.

4-26

Vcc

Cstore

Vref Out

I

Vcc

+

–

Cstore

Vref Out

I

S1

Vprogram


4-27

Key Voltage Reference Specifications:Absolute initial accuracy

1. Absolute Initial Accuracy defines the range of the reference’soutput voltage with a defined input voltage, load current, andambient temperature. The top grade voltage reference,X60008AIS8-50 has an output voltage range of 4.9995 V to5.0005 V (5 V ±.5 mV or 5 V ±.01%) with a 6.5 V input, no loadcurrent, and 25 °C operating temperature.

Temperature coefficient and using the Box method

2. Temperature Coefficient (TC) is a measure of the output volt-age change with respect to changes in the operating tempera-ture. The top grade voltage reference, X60008AIS8-50 has a TCof 1 ppm/°C which makes it one of lowest temperature drift ref-erences in the industry. Older voltage references such as theLM399 or LTZ1000 achieve low TC by temperature stabilizingthe device die with a heater. However, just the heater supplycurrent (25 ma) is typically 50,000 times higher than theX60008AIS8-50 supply current of .5 µA!

The limits stated for TC are governed by the method of meas-urement, and there are many ways to cheat when specifying TCin a voltage reference. For example, let’s consider theTemperature Drift curve shown in Figure 9 for a Bandgap refer-ence. At –55 °C the Reference Voltage is 1.232 V and at +125°C the Reference Voltage is 1.231 V. Therefore, the change inReference Voltage is only 1 mV for a change in temperature of180 °C or 5.5 mv/°C; for a 1.235 V reference, this gives a TC of4.4 ppm/°C. Due to the parabolic shape of the TC curve, it ispossible to calculate a TC of zero using this method!

Figure 9

The overwhelming standard for specifying the TC of a referenceis the “Box Method” as shown in Figure 10.

Figure 10

In the Box Method, the reference voltage is measured through-out the temperature range from the minimum specified tem-perature (Tmin) to the maximum specified temperature (Tmax).The minimum reference voltage (Vrmin) and maximum refer-ence voltage (Vrmax) is determined within the temperaturerange. If Vr is the reference output voltage at 25°C, the TC ofthe reference is calculated by:

In the same example as above using the graph in Figure 9:

Tmin = -55°CTmax = +125°CVrmin = 1.231 VVrmax = 1.235 VVr = 1.235 V

Notice the large difference between the first method of calculat-ing TC which gives 4 ppm/°C vs. the standard Box Methodwhich gives 18 ppm/°C.

With both a Bandgap reference and buried Zener reference, the TCcurve is a nonlinear relationship so the designer cannot infer a pro-portional TC relationship. Curvature corrected Bandgap referenceswith the “s-shaped” curve may have a TC slope which exceeds theaverage specified TC by 2x or 3x. The TC characteristic of the XicorX60008 is nearly a straight line with curvature of less than 0.5ppm/∞C over the industrial temperature range of –40 ∞C to +85 ∞C.The combination of very low TC and a predictable TC slope is uniqueto the Xicor X60008 due to its floating gate topology. Figure 11shows the flat slope TC curves for the X60008.

Applications

Temperature Drift

Temperature (°C)

1.245

1.240

1.235

1.230

1.225

-55 -35 -15 5 25 45 65 85 105125

Rev

erse

Vo

ltag

e (V

)

Temperature Drift

Temperature (°C)

1.245

1.240

VRMAX

VRMIN

1.235

1.230

1.225

-55 -35 -15 5 25 45 65 85 105125TMIN TMAX

Rev

erse

Vo

ltag

e (V

)

TC Vrmax Vrmin–( ) Tmax Tmin–( )⁄Vr

--------------------------------------------------------------------------------------- 106ppm/°C×=

TC 1.235 1.231–( ) 125 55–( )–( )⁄1.235

-------------------------------------------------------------------------------- 106× 18 ppm/°C= =


Figure 11

In an A/D converter (ADC) or D/A converter (DAC) design thereference temperature drift is an error source in the full-scaleaccuracy. Over the full operating range, the total drift must beless than 0.5 LSB to maintain an accuracy consistent with theresolution of the ADC or DAC. The chart below shows the driftrequirements for various system accuracies over a 0 ∞C to +70∞C temperature range.

Supply or Quiescent Current

3. The Supply Current of a voltage reference is the current that isrequired to operate the voltage reference with no load current.In the case of the shunt reference, the supply current is theminimum current that must be allowed to flow into the devicefor proper operation. Generally, voltage references are designedwith very low supply current to minimize self-heating effectswhich would degrade the TC of the device. The Xicor X60008voltage reference is unique in the industry due to its incrediblylow supply current of only 500 nA - it is the first voltage reference to make possible continuous battery operation asdiscussed in the Applications section.

Output Noise; Wideband (10 Hz-1KHz) and 0.1 – 10 Hz

4. Voltage reference Output Noise is generally specified as apeak-peak voltage in the 0.1 – 10 Hz bandwidth which is usefulfor low frequency systems such as temperature measurement.Using a rms reading, output noise can also be specified in a

higher frequency bandwidth such as 10 Hz to 1 KHz. Assumingthe noise is truly random, the peak-peak noise can be estimatedby multiplying the rms value by 6. For example, a voltage refer-ence with 2 mV, rms 10 Hz to 1 KHz noise will have a peak-peaknoise of approximately 12 mV.

In reality, the best way to specify high frequency noise is to show a graph of noise voltage spectral density in nv/÷Hz vs.frequency. This allows the design engineer to calculate the reference noise based on the bandwidth of the system.

The following equation can be used to calculate the requiredRMS noise voltage spectral density:

En < Vref / (12 * 2N * ÷BW)

Where En - Noise density (V/÷Hz)Vref - Reference voltageN - ResolutionBW - System bandwidth

For example, for a 12 bit system with a 5 V reference operatingin an audio bandwidth of 100 Hz to 20 Khz:

En < 5 / (12 * 212 * ÷(20 Khz – 100 Hz)

< 720 nv//÷Hz

Noise Performance and ReductionThe X60008 output noise voltage in a 0.1 Hz to 10 Hz bandwidth istypically 30 mVp-p. The noise measurement is made with a band-pass filter made of a 1 pole high-pass filter with a corner frequencyat 0.1 Hz and a 2-pole low-pass filter with a corner frequency at 12.6Hz to create a filter with a 9.9 Hz bandwidth. Noise in the 10 KHz to1 MHz bandwidth is approximately 400 mVp-p with no capacitanceon the output, as shown in Fig.12 below. These noise measurementsare made with a 2 decade bandpass filter made of a 1 pole high-passfilter with a corner frequency at 1/10 of the center frequency and 1-pole low-pass filter with a corner frequency at 10 times the centerfrequency. Figure 12 also shows the noise in the 10 KHz to 1 MHzband can be reduced to about 50 mVp-p using a 0.001 mF capaci-tor on the output. Noise in the 1 KHz to 100 KHz band can be fur-ther reduced using a 0.1 mF capacitor on the output, but noise in the1 Hz to 100 Hz band increases due to instability of the very lowpower amplifier with a 0.1 mF capacitance load. For load capaci-tances above 0.001 mF, the noise reduction network shown in Figure13 is recommended. This network reduces noise significantly overthe full bandwidth. As shown in Figure 12, noise is reduced to lessthan 40 mVp-p from 1 Hz to 1 MHz using this network with a 0.01mF capacitor and a 2KΩ resistor in series with a 10 mF capacitor.

4-28

Resolution(Bits)

1/2 LSB for a 5 V full-scale

(mV)

Drift Required(ppm/°C)

8 9.77 27.90

10 2.44 6.98

12 0.61 1.74

14 0.15 0.44

16 0.04 0.11

Tempco (Normalized to +25°C)

Temperature

4000µV

1ppm/°C3ppm/°C5ppm/°C

10ppm/°C

10ppm/°C

5ppm/°C3ppm/°C1ppm/°C

2000µV

0µV

-2000µV

-4000µV-40°C 25°C 85°C

Ch

ang

e in

VO

UT


4-29

Figure 12

Figure 13

Often external filtering may be required to reduce the reference noiseto acceptable limits based on the system resolution and accuracyrequirements. The filters for voltage references will be discussedfurther in the “Care and Feeding” section of this Application Note.

Line regulation

5. Line Regulation specifies the amount the output voltage willchange as the input voltage is varied over its limits. Line regu-lation is specified as mV/V or ppm/V. For example, the XicorX60008 Line Regulation specification is 100 mV/V, maximum;therefore, if the input voltage is changed by 2 V from 6 V to 8V, then the output voltage will change by 200 mV maximum.

Load regulation

6. Load Regulation specifies the amount the output voltage willchange as the load current is varied over its limits. Load regula-tion is specified as mV/mA or ppm/mA. Due to the output driverstage of a voltage reference, often the current sinking specifica-tion may be different than the output sourcing current specifica-tion. For example, the Xicor X60008 Line Regulation specificationis 100 mV/mA sinking current and 50 mV/mA sourcing current.

Long term stability

7. Long Term Stability tries to predict the amount the output volt-age will change over an extended time period and is specifiedas ppm/1000 hours. The only accurate way to measure longterm stability is to wait a very long time! There is no easy andaccurate way to accelerate the long term stability of a voltagereference. Voltage reference vendors have tried to use elevatedtemperature to predict the effect of aging with the voltage ref-erence. This technique leads to inaccurate and highly optimisticlong term stability results as discussed in Reference Note 8.

The long term stability for the X60008 is shown in Figure 14.Notice that after approximately 10 days (240 hours) of initialpower-up drift, the output voltage variations stabilize at about20 mV peak-peak or 4 ppm from the +5 V nominal output volt-age. Ongoing tests will provide further data on the long termstability for the X60008.

Thermal hysteresis

8. Thermal Hysteresis specifies the maximum change in roomtemperature output voltage after the voltage reference is cycledbetween two extreme temperature. For example, the XicorX60008 is temperature cycled from 25∞C to –40∞C andreturned to 25∞C. The output voltage is measured and record-ed. Then the temperature is cycled to +85∞C and returned to25∞C. The output voltage is then measured and recorded again.The deviation between the first 25∞C reading and the second25∞C reading is the thermal hysteresis expressed in ppm.

Applications

No

ise

Vo

ltag

e (µ

Vp

-p)

X60008-50 Noise Reduction

0

50

100

150

200

250

300

350

400

1 10 100 1000 10000 100000Frequency

CL=0

CL=.001µF

CL=.1µF

.01µF&10µF+2kohm

X60008-50

VinVo

2KΩ

.01µF10µF

0.1µF

GND

ROOM TEMP BOARD2 DRIFTDelta Vout from 5V initial value

0

10

20

30

40

50

60

70

80

0 13 26 39 52 65 78 91 104 117 130 143 156 169 182 195 208 221 234 247 260 273 286 299 312 325 338 351 364 377 390 403 416 429 442 455 468

TIME (Hours)

DR

IFT

(u

V)

2529

Figure 14


Thermal hysteresis is a direct result of the device package withthe smaller plastic SO packages exhibiting higher thermal hysteresis than the older TO39 metal can packages. For furtherdiscussion, see Reference Note 8.

Input voltage range

9. Input voltage range specifies the range of the input voltage forproper device operation and meeting the device electrical spec-ifications. In addition, there is an Absolute Maximum Ratingwhich must not be exceeded to avoid damaging the device.

Dropout voltage

10.Dropout Voltage specifies the minimum differential voltagebetween the input voltage and reference output voltage to main-tain the specified accuracy. Many high precision voltage refer-ences require 1 V or greater of input voltage to output voltagedifferential. The Xicor X60008 dropout voltage is typically lessthan 150 mV with an output current of 5 mA.

Advantages of Xicor X60008 VoltageReferenceThe Xicor X60008 series of voltage references use the FloatingGate Analog (FGA) technology to create references with extremelytight initial tolerance, very low temperature drift, and ultra low sup-ply current. As discussed earlier in this Application Note, thecharge stored on a floating gate cell is set precisely in manufac-turing. The reference output voltage is a buffered version of thefloating gate voltage. The resulting reference device has excellentcharacteristics which are unique in the industry:

Absolute accuracy

1. The Output Voltage Accuracy is extremely tight at ±500 mV or±0.01% for a +5 V output. The tight initial accuracy is set as partof the final manufacturing process and does not depend on tra-ditional trimming techniques such as laser trims or fusible links.

Low temperature drift

2. The Temperature Drift is extremely low at 1 ppm/∞C and is a wellbehaved monotonic slope with no second or third order inflec-tions as shown by Bandgap references. The low temperature driftdoes not depend on traditional trimming techniques such aslaser trims or fusible links.

Low power

3. The Supply Current achieves nanopower levels due to the FGAand CMOS technology. At room temperatures, the supply currentis typically 500 nA which is 1 to 3 orders of magnitude lower thancompetitive voltage references.

Ability to set any output voltage

4. The Ability to set any Output Voltage is certainly unique to theX60008 voltage reference. The reference voltage is not limitedto magic voltages as required by Bandgap voltage or Zenerdiode voltages. Output voltages in the range of 0.9000 V to5.0000 V can easily and accurately be set in manufacturing.

The process used in these voltage references is a floating gate CMOSprocess, and the buffer amplifier circuitry uses CMOS transistors forthe amplifier and output stage. While providing excellent accuracy,low TC, and low power, there are limitations in output noise level dueto the MOS device characteristics. The limitations are addressed withcircuit techniques discussed in this Application Note.

Care and Feeding of Voltage ReferencesTo many, voltage references would seem extremely easy to apply –after all, they only have three pins …. an input voltage, an outputvoltage, and a ground pin. Some references may have additionalpins for trim, temperature output, or noise cancellation, but theX60008 series of references only have three pins. However, unlessone is very careful with the details, things can go wrong very fast!Nothing should be left to chance in a high accuracy system.

Two schematics shown below for the same circuit illustrate goodand bad design practices.

The Bad Schematic shown in Figure 15 is what is typically drawnusing today’s CAD software which has following issues:

1. There is no grounding scheme shown with the use of only oneground symbol.

2. There is no hint to where the grounds or critical connectionsshould be tied together, and as shown at J1, the grounds couldintroduce digital noise into the analog circuits.

3. Decoupling capacitors are shown in a row with no indicationabout which component they are associated.

4. There is no flow to the schematic because the circuit blocks arenot interconnected, and there is no left to right flow. While thisschematic is shown on one page, Sometimes schematics of thecircuit blocks are grouped on unrelated pages. The worse casewas a schematic where each component was shown separatelywith only Net List names indicating connections!

4-30


4-31

5. The CAD Library symbol for the A/D Converter makes no sensefrom a circuit function viewpoint since analog and digital func-tions are mixed together.

The Good Schematic is shown in Figure 16; the connections areidentical to the Bad Schematic, but it is redrawn to illustrate properconnections and PCB routing.

Applications

+7.5 v

ADC Data Out

ADC Clk

20 VCC

1 CH02 CH13 CH24 CH35 CH46 CH57 CH68 CH7

17 DIN

14REF+13REF-19ACLK18SCLK

9COM15CS16DOUT

12V- 11

AGND 10DGND

12 Bit A/D Converter

ADC Data In

ADC Select

5Vref

+5 v 5Vref

1 nF

Vin Vo

Gnd Gnd

X60008

3

2

4 5

17

6OP07

1K

1K

.22 µF

.22 µF

12K10K

+7.5 v

-7.5 v

CH0 In

CH0 In

Typical 8 times

Typical 8 times

A1 In12345678910111213141516

J1

-5 v

+7.5 v

ADC Clk

ADC Select

ADC Data Out

ADC Data In

A8 In

A7 In

A6 In

A5 In

A4 In

A3 In

A1 In

A1 In

.1 µF x 10+7 5 v

10 µF 10 µF

.1 µF

BAD Schematic1

2

4

6

Figure 15


1. The schematic flows from left to right; the input connector J1 is onthe left, and the logic outputs are on the right side of the schematic.

2. A ground scheme is shown using a Power (or digital) Groundplane and an Analog Ground plane. The two ground planes areclearly designated with a “P” and “A”.

3. To be sure there is no digital noise introduced into the AnalogGround, the two grounds are tied together at only one point at theA/D Converter. Furthermore, a Zero Ohm resistor is used to con-nect the two grounds; this ensures a separate Net for each groundso the PCB layout software or layout person does not arbitrarilyconnect the two grounds. The use of a Zero Ohm resistor is cheapinsurance against a noisy and inaccurate analog system!

4. The Analog Ground pin (pin 9) is shown to connect directly tothe COM pin of the A/D Converter. Likewise, the X60008Reference Ground pins (pins 1and 4) are shown to connectdirectly to the REF- pin of the A/D Converter. There are no addi-tional DC or AC currents in these lines which could cause DCerrors or excessive noise.

5. Notice the use of diagonal lines on the COM pin and REF- pin ofthe A/D Converter; these indicate a connection directly at thepin – not at a convenient point on the ground plane, but right atthe pin.

6. The standard Library part for the A/D Converter was not used inthis schematic. Instead, a new library part was created to allowproper signal flow and connections. It should be noted that cre-ating this new library part took several iterations and additionaltime to get it right, but it was worth the effort to create properdocumentation.

7. While not apparent on this schematic, a design should never bebased on ease of schematic entry!

Grounding and IR dropsAs discussed earlier in this application note, voltage references areused to provide a very precise voltage for measurements to be madeagainst. The accuracy of any measurement is only as good as the abil-ity to compare it against a known standard. If the PCB connections are

4-32

123456789

10111213141516

J1

-7.5 v

+7.5 v

ADC Clk

ADC Select

ADC Data Out

ADC Data In

A8 In

A7 In

A6 In

A5 In

A4 In

A3 In

A2 In

10 uF10 uF

3

26

7 1

4

+

– 5

OP071K

1K

.22 µF

.22 µF

12K

10K

+7.5 v

-7.5 v

Typical 8 times

.1 µF

P

Typ

ical

8 t

imes

A

.1 µF

ACH0

CH1

CH2

CH3

CH4

CH5

CH6

CH7

VREF+

VREF-

COMVCC

DOUT

DIN

ACLK

SCLK

CS

DGND

AGND

V-

ADC Data In

ADC Data Out

ADC Select

ADC Clk

P

+7.5 v

22 µF

A

0

20

1

2

3

4

5

6

7

8

910

11

1213

14

15

16

17

18

19

12 Bit A/D Converter

Typ

ical

8 t

imes

+7.5 v

1000 pF

Vin Vo

Gnd Gnd

X60008

.1 µF

1

2

4

6

Good Schematic

Figure 16


4-33

made incorrectly, the most perfect voltage reference can still haveerrors resulting from poor grounding considerations and not under-standing the impact of Ohm’s Law. Any analog or mixed signal PCBmust have a well thought-out grounding scheme with multiple groundplanes or traces. There must be no heavy DC current or AC current inthe analog ground planes that connect the voltage reference to the sys-tem measurement point.

The Good Schematic shown in Figure 16 is an example of a propervoltage reference connection for a data acquisition system wherethe voltage reference ground pin is connected directly to the meas-urement point on the A/D Converter.

Shown below in Figure 17 is a 10 Bit Adjustable, 0-5 Amp Active Loadcircuit that is useful for testing power supplies and DC/DC converters.

The details of this circuit will be discussed in the applications sec-tion, but notice the way that the voltage reference and digital potconnections are shown. To avoid errors caused by IR drops, theconnections must be made directly at the leads of the .05 ohm cur-rent sense resistor. Just 10 milliohms of contact resistance or PCBtrace resistance will cause a 20% error in the current setting as illus-trated in Figure 18.

Applications

10

1K

1000 pF

+6.5 v

1000 pF

Vin Vo

Gnd Gnd

X60008CIS8-50

.1 µF

1

2

4

6

Vcc

Vss

+6.5 v

Rh

Rl

Rw

2-wire Bus

X9119

4.75K

249 (100K)

Iout = 0 - 5 amps

(Heatsink)

D.U.T. Voltage(1 - 5 v)

IRL3714

.05Kelvin Connection

Figure 17

10

1K

1000 pF

+6.5 v

1000 pF

Vin Vo

Gnd Gnd

X60008CIS8-50

0.1 µF

1

2

4

6

Vcc

Vss

+6.5 v

Rh

Rl

Rw

2-wire Bus

X9119

4.75K

249 (100K)

Iout = 0 - 5 amps

(Heatsink)

D.U.T. Voltage(1 - 5 v)

IRL3714

.05

0.005 ohms ofContact and traceresistance

0.005 ohms ofContact and traceresistance

20% Error !! ===>

Figure 18


Due to the outstanding initial accuracy of the X60008AIS8-50 of±500 mV, it takes very little PCB trace resistance to introduce errorsthat exceed the specifications of the X60008AIS8-50. The chartbelow shows the maximum PCB trace resistance at a given load cur-rent to maintain the X60008 accuracy. The chart is based on using1 oz. copper which has a typical sheet resistance of 0.5 mW /square.The resistance of the PCB trace can be calculated by:

R = 0.5 mW/square * Length / Width

Remote sensing as shown in Figure 19 is required if high accuracyat high load currents is required. Notice that remote sensing isemployed on both the +5 V Ref side of the 50 ohm load and on theground side of the load.

PCB Mounting and Location on PCBFor applications requiring the highest accuracy, the board mountinglocation of the voltage reference is critical. Placing the X60008 voltagereference in areas of the PCB subject to twisting can cause degradationin accuracy of the reference voltage due to die stresses. It is normallybest to place the device near the edge of the board or the shortest side.The axis of bending is most limited in these locations.

The following techniques can be used to improve the accuracy:

1. Mechanically restraining the PCB with mounting screws andgrommets in each corner of the PCB

2. Thicker boards and not using thin or flexprint PCB

3. Sots in the board around the voltage reference

4. Avoid trapping adhesives and solder flux under the package

Soldering CareThe incredibly tight output voltage (±500 mV) means that great caremust be taken in the soldering process to avoid stress on the die.The key to soldering the parts onto a PCB is to not do it by hand onepin at a time with a high temperature soldering iron. Having one pinat high temperature while other pins are at low temperature putsvery high uneven stress on the device and causes large (many mV)shifts in the X60008 output voltage.

The best way to solder the X60008 voltage reference is to IR solderit onto the board with the lowest temperature possible; +220 ∞C orbelow is recommended. Also, only put the X60008 voltage referencethrough the IR reflow process once, not multiple times, to minimizeoutput voltage shift due to package stress during IR reflow.Therefore, on a PCB that uses components mounted to both the topside and backside of the board, make sure the X60008 solderingoperation is the second run through the IR reflow process.

DNC PinsDNC or NC pins are truly Do Not Connect pins! On most high accu-racy voltage references, post-package trimming is achieved with theuse of these DNC pins. On some voltage references, the DNC pinsare fusible links to trim the output voltage.

Incoming inspection or in-circuit PCB level tests that force voltagesand currents into pins must be avoided at the DNC pins so as not toalter set voltages or damage the device due to electrical over-stress.

4-34

Load Current

Maximum Trace Resistance 20 mil Trace

(mA) (mΩ) (inches)

10 50 2

50 10 0.4

100 5 0.2

500 1 0.04

1 amp 0.5 0.02

+7.5 v

1000 pF

Vin Vo

Gnd Gnd

X60008CIS8-50

0.1 µF

2 6LT1677

50

+5 v Ref

LT1010CN

1000 pF

13

6

8

+7.5 v

10 µF

2K

2

3

4

67

Figure 19


4-35

Voltage Reference Output FiltersOutput filters can be used to reduce the voltage output noise of theX60008; however, much care must be taken since it is very easy to“lose” 0.5 mV in the filter stage. Testing the output noise of a highquality reference such as the X60008 is often a challenge since totest for 0.1 to 10 Hz noise from a voltage reference, it is necessaryto AC couple the output of the reference before it is applied to a highgain stage as shown in Figure 20.

Figure 20

Additionally, the high gain stage in a typical noise test circuit requiresa very low voltage noise op amp; however, low voltage noise opamps exhibit high current noise which prevent the use of high resist-ance values in the 0.1 Hz AC coupling filter. Appendix B describes anovel voltage reference test circuit which eliminates the need for a0.1 Hz AC and includes a peak to peak voltage detector. Also inAppendix B test data is shown for various output filter circuits.

To effectively attenuate noise in the 0.1 Hz - 10 Hz bandwidth, it is nec-essary to use large value capacitors and/or large value resistors. Forexample, for a one pole low pass filter with a 0.1 Hz corner frequencyit is necessary to use resistor and capacitor values as shown below:

While it seems attractive to use a 1000 µF capacitor and 1.6 Kohmresistor, the large leakage current of an electrolytic capacitor willgenerate an error voltage across the 1.6 Kohm resistor. For exam-ple, the leakage current of a typical 1000 µF capacitor is 100 mA(Panasonic VS series); an error voltage of 100 mA * 1600 ohm =160 mV is created! Reducing the capacitor value and increasing theresistor value does not help because while the leakage current isreduced, the resistor value is increased! For example, for a 100 µFcapacitor in the same Panasonic VS series, the leakage current isreduced to 10 mA, but the resistor value is increased to 16 Kohm.The same 160 mV of error is introduced!

Fortunately there is a solution obtained by bootstrapping two capac-itors as shown in the filter circuit in Figure 21. The bootstrappingarrangement lowers the applied voltage across the capacitors anddrops the capacitor leakage current to acceptable levels. This simplefilter circuit reduces the 0.1 Hz to 10 Hz noise by at least 50%, andattenuates the higher frequency reference noise by the characteris-tic of a single pole low pass filter with a 0.1 Hz corner frequency.

When designing noise filters for the X60008 voltage referenceremember:

1. Beware of capacitor leakage current working against high valueresistors which generate an error voltage.

2. Use a low offset voltage and low bias current op amp for thebuffer amplifier.

3. Low frequency filters require a long time to settle to high accu-racy levels; for example ten time constants are required for0.01% settling time. A 0.1 Hz filter requires 15 seconds to set-tle to 0.01%!

Applications

10 µF

160K

16K

1 µF

X60008Under Test

Gain = 50K0.1 Hz HPF10 Hz LPF

Noise Out

a

Resistor (Kohms) Capacitor (µF)

160 10

16 100

1.6 1000

Figure 21

Vin Vout

Gnd Gnd0.110

a

0.01 10

2K

X60008CIS8-50

7.5 v16K

160K100 µF

100 µF

LT1012Filter Out


Input Voltage RegulatorsIf the input voltage comes from an unregulated source, it may benecessary to add a linear regulator before the X60008 to maintainrated accuracy of ±0.5 mV. The Line Regulation specification for theX60008 is 100 mv/V; if the input voltage ranges from 5 V (minimumvalue) to +10 V (maximum value), the output voltage could have anerror of 500 mV or 0.5 mV. Any simple linear regulator can be usedto stabilize the input voltage to acceptable levels. Several simple reg-ulator circuits are shown below in Figure 22.

It is also possible to operate the X60008 on either 3.3 V or 5 V if theyare the only supply voltages in the system. Simple capacitor basedcharge pump circuits can be designed which use any digital clock inthe system. The circuit shown below in Figure 23a allows operationin a 3.3 V system; notice the additional resistor and capacitor to

attenuate the switching noise and ripple. Figure 23b shows operat-ing the X60008 from a single +5 V supply. The 3.3 V charge pumpcircuit uses Schottky diodes to minimize the diode losses to gener-ate 6 V from a 3.3 V supply. The 5 V charge pump circuit uses twosilicon diodes to maximize the diode losses so the +10 V maximumoperating voltage specification of the X60008 is not exceeded.

Due to the low operating power of the X60008, it is also possible to“float” the operating voltage for the reference on virtually any volt-age by simple charge pump circuits as shown above.

Operating on a negative supply or operating below a positive supplyis also possible as shown in Figure 24. Operating below a positivesupply can be useful in ground sourcing current sources as shownin the Applications Section.

4-36

1N4148

4.7K+12 v

+5 v

+5.7 v Vin Vout

Gnd

LP2980-ADJ

SD

7 - 16 v

10

+6 v

39K

10K

Adj 1 µF BZT52C6V2

3.3K+12 v +6.2 v

a a

Figure 22

1 µF BAT54ST

10 µF 10 µF

1K3.3 v CLK

3.3 v a

+6 v

1 µF

10 µF 10 µF

1K5 v CLK

5 v a

+8.5 v1N4148

1N4148

(500 µa max load)

(500 µa max load)

Figure 23

A.

B.


4-37

Thermocouple effectsAt any point in a circuit where dissimilar metals come in contact asmall thermocouple voltage is developed. Fortunately, the copper leadframe of a surface mount device is the same copper material as PCBetch, and the thermocouple effect is minimized. However, there aremany other places where thermocouples can be generated; for exam-ple, across a connector finger, across relay contacts, or even across aresistor! Yes, a poorly constructed resistor can show many mV/∞C ofthermocouple voltage. It has been found that external components(resistors, contacts, sockets, etc.) can create thermocouple voltagesthat exceed 10 mV/∞C. The top grade voltage reference, X60008AIS8-50, has a maximum TC of only 1 ppm/°C which is a voltage change ofonly 5µV/°C. Therefore, without proper care, passive componentscan easily create errors that exceed the TC of the X60008AIS8-50.

It must be recognized that thermocouple voltages are developed bythe difference in temperature between the two ends of dissimilarmetal junctions, and not the absolute ambient temperature. If bothends of the metal junctions are isothermal (i.e., at the same tem-perature) there is no thermocouple voltage developed. Therefore,the first rule to avoid thermocouple effects is to eliminate hot spotson a PCB (i.e. linear voltage regulators). If hot spots cannot beavoided, then the two ends of metal junctions must be oriented sothey are on isothermal lines on the PCB.

The second rule to minimize thermocouple effects is to balance thenumber of junctions in a loop so that the error voltages are cancelledor become a common mode voltage that is reduced by the CMRR ofthe op amps in the signal chain. If the number of junctions are notbalanced, then it may be necessary to create a junction by adding aseries resistor that has no effect on circuit operation but balancesthe number of junctions.

Applications

Vin Vout

Gnd GndC110 µF

C20.001 µF

X60008CIS8-50U1

1

2

4

6

R110K

Rload > 5K

-Vee = -15 v

-Vref = -5.000 v

Rload > 5 * R1/( |Vee| - 5)

Negative Reference

Vin Vout

Gnd GndC110 µF

C20.001 µF

X60008CIS8-50U1

1

2

4

6

R110K

Rload > 2.6K

-Vref = -5.000 v

Rload > 5 * R1/( Vs - 5)

Negative Reference

Vs = +24 v

with respect to +24 v

Figure 24


ApplicationsAuto-Calibrated 12 Bit Data Acquisition System

The design of a true 12 bit data acquisition is extremely difficult dueto the inaccuracies of the various components in the signal chain.Figure 25 shows a block diagram for a typical 8 input channel, 5 VFull Scale, 12 bit Data Acquisition system; a quick error budget analy-sis for this system is shown below assuming 0 – 70 ∞C operation.

Figure 25

As one can see, for a simple 12 bit Data Acquisition System using atypical architecture with high performance Integrated Circuits theaccuracy is a pretty miserable ±1%! And, this is not a comprehen-sive error analysis; for example, error for the MUX and the effects oflinearity (INL and DNL) are not included.

The Integrated Circuit vendor for the A/D Converter sidesteps thisissue by including a calibration procedure in the data sheet for thedevice. Typical application circuits show adjustment pots for zerotrim (offset) and full-scale trim (gain); the trims must be done atproduction test which does not take into account the temperaturedrift of the various components shown above. Of course, theadjustment pots can be replaced with digital pots such as the XicorX9271 so the production test process can be automated. Zero or off-set errors are easily tweaked out because with care there is a highquality zero volt source available; i.e., ground! It is more difficult tocalibrate full scale voltage because a high quality source of full scalevoltage is required; this is usually a calibration standard in the pro-duction test equipment. However, the temperature drift inaccuraciesare not calibrated out once the system leaves the factory floor.Ideally, both the zero and full scale error would be calibrated beforeevery high accuracy conversion or on a very regular basis that ismore often than changes in the ambient temperature.

Figure 26 shows a revised architecture for the Auto Calibrated DataAcquisition System shown in Figure 25.

Two of the analog inputs are used as calibration source inputs forfull scale adjust with a precision voltage reference and zero adjustwith a high quality ground. Digital potentiometers (DCPSs) con-trolled by a microprocessor are used for zero trim and full scale trim.If non-volatile DCPS are used, the Auto Calibrated Data AcquisitionSystem will maintain calibration even with the power removed.Calibration can be performed as often as required – before everyhigh precision measurement, once a day, once an hour, etc. Theuser decides how often calibration is required.

The secret of this calibration scheme is the Precision Voltage Sourcesince all the system full scale errors are referred to this device. TheXicor X60008AIS8-50 is an excellent choice for the reference sincethe initial accuracy is less than 0.4 LSB for a +5 V full scale range.Temperature drift of less than 0.3 LSB is maintained over a temper-ature range of 0 ∞C to +70 ∞C due to the low temperature coeffi-cient of 1 ppm/∞C. Relatively inaccurate components can be usedin the signal chain because their errors are calibrated out by theauto-calibration process.

The complete implementation of the Auto Calibrated DataAcquisition System is shown in the detailed schematic of Figure 27.

Two 4:1 differential MUXs (U1, U2) are used for 6 differential analoginputs. A high precision +5.000 V calibration source (X60008AIS8-50) is applied to S1A and S1B of U1 for full scale calibration. S2Aand S2B of U1 are connected to a bias voltage set at +0.6 mV which

4-38

Quick Error Budget Analysis for Figure 25

Component Gain Error Offset Error

8 : 1 Mux 0 0

Instrumentation Amp ±0.03% ±0.36 mV

≥ ±0.007%

Instrumentation Amp TC

50 ppm/°C ≥ ±0.18%

4.4 µv/°C ≥ ±0.006%

Instrumentation Amp Gain Set 0.1% 0

Instrumentation Amp Gain Set TC

10 ppm/°C ≥ ±0.04%

0

ADC + Voltage Reference

±15 LSB ≥ ±0.4%

±6 LSB ≥ ±0.15%

ADC + Voltage Reference TC

45 ppm/°C ≥±0.16%

SubTotal ofErrors ±0.91% ±0.16%

Total of Errors ±1.07%

Instrumentation Amplifier

8 A

nal

og

Inp

uts

8 : 1 Mux

A/D Converter

Voltage Reference


4-39

is ∫ LSB of a 5 V input range; this is used for zero calibration. Theremaining 6 channels of U1 and U2 are used for the analog inputs.Additional analog MUXs could be added for more input channels.Likewise, if 8 analog inputs are required, a quad analog switch couldbe added to the DA and DB outputs with the calibration sources (+5V and Gnd) applied to their inputs.

The +5.000 V calibration source is obtained from a XicorX60008AIS8-50 voltage reference. Input power for theX60008AIS8-50 is obtained by generating a +5.6 V source withdiode D1 and bias resistor R1. An output noise filter consists of C3,C4, and R2. The +0.6 mV bias voltage for zero calibration is obtainedwith R3 and R4. A –5 V reference for the zero adjustment circuit isgenerated with an inverting op amp (U5B), R5, and R6.

Applications

Figure 26


8 : 1 Mux

A/D Converter

Voltage Reference

Precision Voltage Reference

High quality ground

6 Analog Inputs

with Internal

FS Trim

Zero Trim+Vref -Vref

Digital Control

Figure 27

14V+3 V-

4 S1A5 S2A6

S3A7S4A

13 S1B12S2B11 S3B10S4B

8DA

1A0 16A12

EN

15GND

9DB

U1DG409

14 V+3 V-4 S1A5

S2A6 S3A7S4A

13S1B12 S2B11S3B10 S4B

8DA

1A0 16A12EN

15GND

9DB

U2DG409

a

a

Vin Vout

Gnd GndD1

1N4148

R14,3K

+5 v

+15 v

C2.1

C110

a

C3.01

C410

R22K

+15 v-15 v

-15 v+15 v

CH1+

CH1-

CH2+

CH2-

CH3+

CH3-

CH4+

CH4-

CH5+

CH5-

CH6+

CH6-

EN1EN2

ADR1ADR2

X60008CIS8-50

U4LT1167

R947.5K

1

2

3

4 5

67

8

R71.27K

R81.27K

+15 v

-15 v

FS ADJUSTZERO ADJUST

+5.000 v Calibration

Av = 2.034

U9X9318

R14

100KR15402

-5 v Ref

+5 v Ref

R13

200K

32

18

4

U5ALT1112

5 +

+

+

67

8

4

U5BLT1112

-15 v

Offset Adjust

R10

4990R11

5110R1251.1K

Gain Adjust

R520K

R620K

a

-5 v Ref

AinVref

AGnd

Vdd

DGnd

D0/8

D1/9

D2/10

D3/11D4

D5

D6

D7

D8

D9D10

D11

BusyL

CSL

RDL

HBEN

C6.1

C510

d

+5 v

Data

Bits

Out

Control

Lines

C8.1

C710

a

3

26

7 1

45U6

LT1007

(Av = .482 - .498)

-15 v

+15 v

LTC1273

R410

R382.5K

(.6 mv)

U3

U7

10K, 100 tap

100K, 256 tap, SPI

+5 v Ref

+15 vRh

Rw

Rl

Vcc

Gnd

U/DInc

CS-L

+5 v

Logic

a a

U8X9271T

Rh

Rw

Rl

Vcc

Vss

Hold

CS

Sck

+5 v

LogicSO

SIA0

A1WP

a

d

d12/29/03

1

2

4

6

+


An Instrumentation Amplifier (U4) converts the differential outputsfrom the MUX to a single ended output with a gain of 2.034. Thegain of the IA is set by R9 such that:

Gain = (49.4k/R9) + 1

The gain is set slightly higher than 2 so an adjustable 0.5 voltagedivider can be used passively vary the overall gain by 1 ±1% toaccount for all the errors in the signal chain. Resistor R10, R11,R12, and D-Pot U8 are an adjustable voltage divider with a gain of0.482 to 0.498; this allows the overall gain to be adjusted from 0.98to 1.02 under the control of the D-Pot U8. Since the resistors are inthe overall full scale feedback calibration loop, their tolerance or TCare not critical as long as there is adequate adjustment range.

The Ref pin of U4 is used for zero adjustments since there is a 1 : 1correspondence between the Ref pin voltage and output voltage.Resistors R13, R14, R15, and D-Pot U9 provide an adjustable voltageof –10 mV to +10 mV under the control of U9. Since the Ref pin of U4should driven by a low impedance to maintain the high commonmode rejection ratio, op amp U5B is to buffer the ±10 mV source.

The output of the adjustable 0.5 voltage divider is buffered with U6since the A/D converter, U7, requires a low impedance and fast set-tling driver. The A/D converter is a 12 bit, 300 Ks analog to digitalconverter with 12 bit parallel data outputs.

The calibration scheme is simple.

The zero calibration must be done first by selecting the +0.6 mV biasvoltage on S2 of U1. Adjustment D-Pot U9 is incremented or decre-mented until there is an even flicker of output codes 0000 00000000b and 0000 0000 0001b (i.e., the LSB flickers evenly) from theA/D converter.

The full scale calibration is done second by selecting the +5.000 Vcalibration source, X60008AIS8-50 on S1 or U1. Adjustment D-PotU8 is varied until there is an even flicker of output codes 1111 11111110b and 1111 1111 1111b (i.e., the MSB flickers evenly) from theA/D converter. To the purist, the analog input voltage should be setfor 5 V – 1.5 LSB = 4.99817 V for full scale calibration. However, tomaintain the accuracy of the X60008AIS8-50, it was decided toaccept a full scale input voltage of +5.000 V + 0.5 LSB = +5.0006 V.

It must also be noted that the +5.000 V calibration source,X60008AIS8-50 and zero source could also be applied to signal con-ditioning before the MUX stage thus calibrating out any error in thesignal conditioning circuitry. The auto-calibration scheme must beconsidered a closed feedback loop and any errors inside the feed-back loop are reduced by the gain (i.e., adjustment range) of thefeedback loop.

Auto-Calibrated 12 Bit Digital to Analog ConverterThe design of a true 12 bit Digital to Analog Converter, like thedesign of a true 12 bit data acquisition system, is extremely difficultdue to the inaccuracies of the various components in the signalchain. Figure 28 shows a block diagram for a typical 5 V Full Scale,12 bit Digital to Analog Converter; a quick error budget analysis forthis system is shown below assuming 0 – 70 ∞C operation.

As you can see, for a simple off the shelf high performanceIntegrated Circuit 12 bit D/A Converter using a typical architecture,the accuracy of ±0.42% is nowhere near 12 bit resolution of±0.02%.

Like the previous example for a 12 bit A/D Converter, the IntegratedCircuit vendor for the D/A Converter (different manufacturer!) side-steps this issue by including a calibration procedure in the datasheet for the device. Typical application circuits show adjustmentpots for zero trim (offset) and full-scale trim (gain); the trims mustbe done at production test which does not take into account thetemperature drift of the various components shown above. Ofcourse, the adjustment pots can be replaced with digital pots suchas the Xicor X9271 so the production test process can be automated.However, high precision voltage measurements must be made for

4-40

D/A Converter

Voltage Reference

Dat

a B

its

In

0 to +5 v Out

RefOut

RefIn

Internal

Quick Error Budget Analysis for Figure 28

Component Gain Error Offset Error

D/A Converter + Reference ±0.2% ±2 LSB =

±.05%

D/A Converter + Reference TC

±30 ppm/°C ≥ ±0.15%

±3 ppm/°C ≥ ±0.015%

SubTotal ofErrors ±0.35% ±0.065%

Total of Errors ±0.42%

Figure 28


4-41

both zero volts for offset errors and +5 V for full scale errors whichrequire calibration measurement standards in the production testequipment. However, the temperature drift inaccuracies are not cal-ibrated out once the system leaves the factory floor. Ideally, both thezero and full scale error would be calibrated on a very regular basisthat is more often than changes in the ambient temperature.

Figure 29 shows a revised architecture for the Auto Calibrated Digitalto Analog Converter shown in Figure 28.

The output voltage from the D/A converter is compared against ahigh quality ground for zero trim and a high accuracy precision volt-age for full scale trim. Digital potentiometers (DCPs) controlled by amicroprocessor are used for zero trim and full scale trim. If non-volatile DCPs are used, the Auto Calibrated Digital to AnalogConverter will maintain calibration even with the power removed.Calibration can be performed as often as required – before everyhigh precision measurement, once a day, once an hour, etc. Theuser decides how often calibration is required.

The secret of this calibration scheme is the Precision Voltage Sourcesince all the system full scale errors are referred to this device. TheXicor X60008AIS8-50 is an excellent choice for the reference sincethe initial accuracy is less than 0.5 LSB for a +5.0 V full scale range.Temperature drift of less than 0.3 LSB is maintained over a temper-ature range of 0 ∞C to +70 ∞C due to the low temperature coeffi-cient of 1 ppm/∞C. Relatively inaccurate components can be usedin the signal chain because their errors are calibrated out by theauto-calibration process.

The complete implementation of the Auto Calibrated Digital toAnalog Converter is shown in the detailed schematic of Figure 30.

U1 is a 12 bit parallel input D/A Converter with an internal 10 V ref-erence; laser trimmed resistors on the 20v Span and 10v Span pinsallow the user to set many output voltage ranges. A Bipolar Offsetpin provides the ability to generate bipolar output ranges such as ±5V, or this pin can be used for zero or offset adjustments. For a com-plete description of the pin settings, refer to the AD767 data sheet.While the AD767 has an internal voltage reference and factorytrimmed span resistors, the overall error is ±0.4% as illustrated inthe Error Budget shown above. Figure 30 shows an auto-calibrationtechnique to eliminate zero and full scale error sources. The D/Aconverter output voltage is compared against a +5.000 V calibrationvoltage, X60008AIS8-50 and a high quality ground for full scale andgain adjustments via digital potentiometers U7 and U8.

The +5.000 V calibration source is obtained from a Xicor X60008AIS8-50 voltage reference. Input power for the X60008AIS8-50 is obtainedby generating a +5.6 V source with diode D2 and bias resistor R8. Anoutput noise filter consists of C5, C6, and R9. A +0.6 mV bias voltagefor zero calibration is obtained with R10 and R11. A –5 V reference forthe zero adjustment circuit is generated with an inverting op amp(U4A), R12, and R13.

Applications

Figure 29

D/A Converter

Voltage Reference

0 to +5 v Out

RefOut

RefIn

DataBits

In

InternalFS Trim

3+

26

17

54

Zero Trim+Vref -Vref

Vout

Hold Capacitor

Comparator+

+

Voltage ReferencePrecision

Buffer Amplifier

Digital Control

12/30/03


The output voltage from the D/A Converter, U1 is buffered with unitygain op amp (U2A) which is configured to drive a capacitive load,C2. Resistor R1 provides isolation from the capacitive load; resistorR2 and capacitor C1 are for loop compensation. Capacitor C2 is aHold capacitor because during the calibration mode, switch S1A ofU6A disconnects the D/A Converter output voltage from the systemoutput voltage, Vout. During the calibration mode, capacitor C2stores and holds the previous D/A converter output voltage so thatthe system output voltage Vout stays constant. Op amp U2B buffersthe hold capacitor voltage. To minimize charge injection error fromthe opening of S1A of U6A, a large capacitor value is used for C2.So, during normal run mode, switch S1A of U6A is closed, and theD/A converter output voltage is stored on capacitor C2. The systemoutput voltage Vout tracks the D/A converter output voltage.

Instead of using manual adjustment potentiometers for the zero andfull scale adjustments, digital potentiometers (DCP’s) are usedunder digital control. Zero or offset errors are adjusted to zero byusing the Bipolar Offset pin of U1. D-Pot U7, resistors R14, R15, andR16 varies the Bipolar Offset pin voltage by ±10 mV.

Full scale or gain adjustments are made by modifying the Ref Outvoltage of U1 by ±1% before it is applied to the Ref In pin. TheAD7676 data sheet recommends using a 100 ohm potentiometer forthis adjustment; however, this is difficult with a D-Pot because theRef Out pin is at +10 V. Also, the wiper resistance of a D-Pot (40-200 ohms) prevents it from being used in varying a low resistance.Therefore, a scheme similar to the Auto-Calibrated Data AcquisitionSystem is used. The Ref Out voltage is divided down by two withR17 and R18; D-Pot U8 and R19 allow the divided to be adjusted by±1%. Then, the reference voltage is amplified back up by a gain of2.034 amplifier circuit, U4B, R20, and R21.

During the calibration mode, S1A of U6A is opened and the systemoutput voltage Vout remains at the previous D/A converter outputvoltage. Switch S2A of U5B is closed which applies the buffered D/Aconverter output voltage to an ultra low offset voltage comparatormade up from Instrumentation Amplifier U9 and comparator U10.Since the offset voltage of the comparator circuit is a direct errorsource, it is necessary to minimize its offset voltage; unfortunately,the lowest offset voltage comparator (LT1011) still has a maximum

4-42

C23.3 uF

U2AAD706

Vcc

Ref Out

Ref InD0

D11

CS-L

DGnd AGnd

Vee

Bip Off

Vout

SJ

10v Span

20 v Span

ad

R1100

R22.2K

C1220 pF

U2B

AD706Vout = 0 to + 5 v

+12 v -12 v

U9LT1167

R5499

1

2

3

456

7

8

R31K

R41K

Av = 100

a

R1110

R1082.5K

a(+.6 mv)

Vin Vout

Gnd GndC4.1

C310

a

C5.01

C610

R92K

X60008CIS8-50 +5.000 v Calibration

2

37

85

4 6 1

U10LT1011

R61K

D1BAT54S d

-12 v

+5 v

R71K

Comp Out

+12 v

-12 v

Cal0D2

1N4148

R84.3K

+5 v

+12 v

R16

100

a

U7X9318

R15

100K

a

-5 v Ref

+5 v Ref

R14200K

Offset Adjust

Data In

a

R174990

R185110

R1951.1K

U8X9271

a

+

+

++

+

+

U4BAD706

R20

R215110

a

FS Adjust

AD767

5360

Av=2.034

S1A

S1BD1

IN1

Cal0 = 1 for Zero CalibrationCal0 = 0 for FS Calibration

Cal

S2A

S2BD2

IN2

Cal = 0 for Calibration mode

S1A

S1BD1

IN1

aCal

a

S2A

S2BD2

IN2

ADG436

ADG436

U1

U3

U4AAD706

R13

20KR12

20K

a

U5A

U5B

U6A

U6B

10K D-Pot

100K D-Pot

Figure 30


4-43

offset voltage of 3 mV worse case. To reduce the effect of U10’s off-set voltage, a gain of 100 difference amplifier, U9 is used; the over-all effect of the comparator’s offset voltage is attenuated by 100 toonly 30 mV. To minimize the voltage swing applied to the compara-tor, a Schottky diode clamp consisting of R6 and D1 is used so theinput only swings ±0.3 V. The output from the comparator, CompOut, goes to a digital control circuit which increments or decrementsthe DCPS until a zero crossing is detected by the comparator.

There are two calibrations that must be made; first, the zero or off-set calibration is performed. S1A of U5A is closed so that +0.6 mVis applied to the comparator circuit input; the D/A Converter inputcode is set to 0000 0000 0000b. D-Pot U7 is adjusted until there isa transition on the Comp Out signal indicating that the D/A Converteroutput voltage is +0.6 mV. Second, full scale or gain calibration isperformed. S1B of U5A is closed so that +5.000 V is applied to thecomparator circuit input; the D/A Converter input code is set to 11111111 1111b. DCP U8 is adjusted until there is a transition on theComp Out signal indicating that the D/A Converter output voltage is+5.000 V. To the purist, the +5.000 V calibration voltage applied tothe comparator circuit should be set for 5 V – 1.5 LSB = 4.99817 Vfor full scale calibration. However, to maintain the accuracy of theX60008, it was decided to accept a full scale input voltage of +5.000V + 0.5 LSB = +5.0006 v.

The auto calibration scheme provides a closed feedback around theD/A converter, its internal reference voltage, and the buffer amplifi-er, U2A. The only remaining error at the system output voltage, Voutis the offset voltage of U2B (100 mV) and the charge injection lossof switch S1A of U6A (90 mV).

Digital Voltmeter Integrated Circuit Voltage Reference Integrated circuits for digital voltmeters are available from severalsemiconductor manufacturers; an example of such an IC is theMAX1494 from Maxim Integrated Products. This is a 4 1/2 digit sin-gle chip A/D Converter with LCD drivers and is intended for digitalvoltmeters, digital panel meters, etc. A 4 1/2 digit meter can resolve1 part in ±19,999 or ±.005% (±50 ppm) on a 0.2 V or 2 V full scalerange. The device has an internal voltage reference of +2.048 V, orthe user can supply an external reference. However, when even thesimplest error analysis is performed, the inaccuracy of the IC isapparent. For example, from the data sheet, the gain error is ±0.5%using an external reference of 2.048 V. The internal reference isspecified at 2.048 V ±2% with a temperature drift of 40 ppm/∞C. Ifthe internal reference was to be used for measurements, the overallerror of the reading would be ±2.5%.

The obvious solution would be to use an external 2.048 V referenceinstead of the internal reference. However, the external referencemust be very low power so the overall power budget is not jeopard-ized by the additional current of the reference device. The XicorX60008 voltage reference provides all the desired functionality –very high initial accuracy of ±0.01%, low temperature drift of 5ppm/∞C, and extremely low supply current of 0.5 mA. By using theX60008 as the external reference as shown in Figure 31, the onlyerror of the DVM measurement system is the gain error of ±0.5%.

If higher accuracy is required for the application, an auto-calibrationscheme similar to the Auto-Calibrated Data Acquisition Systemdescribed earlier in the Application Note could be used which wouldreduce the measurement error to less than ±0.02%.

Applications

AIN+

AIN-

REF+

REF-

GND

INTREF

.1 µF

Vin Vout

Gnd Gnd4.7 µF

X60008U1

2

41

6

2k

10 µF

+5 v(2.048 v)

MAX1494

(Other pins not shown for clarity)

DVM + LCD Driver IC

Figure 31


0 to 5 Amp, 1 to 50 V Active Load 10 bit ResolutionOften when testing power supplies and DC/DC converters it is help-ful to have a programmable current source for an active load. Figure32 shows a current source circuit that is capable of 0 to 5 Ampadjustable output current with 10 bits resolution (5 mA) with 50 Vcompliance voltage. The maximum simultaneous voltage and cur-rent will be limited by FET SOA considerations, the heatsink andavailable airflow. The active load is powered from a standard 9 V bat-tery; due to the very low operating current of the X60008 voltage ref-erence, the battery current is less than 650 mA for long battery life.

The Xicor X60008, U1 provides a precise +5.000 V to a voltagedivider R1 and R2 which generates +0.25 V. The output voltage fromthe wiper terminal of a Xicor digital potentiometer (D-Pot), U3 variesfrom 0 Vdc to +0.25 VDC in 250 mV increments under SPI bus con-trol. Operating power for U3 is provided by a low power linear reg-ulator with a +5 V output. Op amp U4, FET Q1, and resistor R5 area current source circuit where the output current is:

Iout = N/1023 * 0.25 v/0.05 ohms= N/1023 * 5 ampswhere N = Wiper Control Register (WCR) value in decimal

Resistor R3 provides gate isolation to prevent oscillation in the FET.Resistor R4 and capacitor C6 provide loop compensation for thecurrent source circuit.

As mentioned earlier, the maximum output current and load voltageare limited to the SOA of the FET as shown below:

In addition the FET must be attached to a large heatsink andequipped with a fan to obtain maximum output power and limitingthe FET junction temperature to a safe temperature. For example, ifthe circuit is operating at full output power (60 watts) and roomtemperature (25 ∞C), the heatsink and airflow must have a thermalresistance sink to air (qsa) of less than 1 ∞C/Watt to keep the junc-tion temperature of the FET at less than 125 ∞C.

4-44

Figure 32

3 7

4

1

52

U4LT1077

R310 Q1

R5.05

R41K

C61000 pF

C31000 pF

Vin Vo

Gnd Gnd

X60008CIS8-50

C2.1 µF 1

2

4

6

Vcc

Vss

Rh

Rl

Rw

SPI Bus Interface

X9111

10 Bit Adjustable0 to 5 amp Active Load

R147.5K

R22.49K

Iout = 0 - 5 amps

Heatsink Required

Load Voltage(1 - 50 v)

IRFZ44

(.25 v)

(55 v, 20 mohm, TO220)

9 v

C110 µF

U1

Vin Vout

GndOn/Off

C4

10 uF

U2

LP2980-5

U3

C5

+

.1 µF

2 watt

(see text)7

14

13

11

12

and control logic

1

2

3

5

Note: Maximum load current and load voltage will be

determined by FET SOA and heatsink.

(100K)

(Vdc)Output current

(Amps)

Output Power

(Watts)

3.3 V 5 Amps 16.5

5.0 V 5 Amps 25

12 V 5 Amps 60

25 V 2 Amps 50

50 V 1 Amp 50


4-45

4 to 20 mA. Two Wire Current Transmitter In industrial control systems and process control systems, 4-20 mAcurrent loops are widely used to transmit analog process data overlong distances on a factory floor or in a manufacturing complex.Current loops are used due to their noise immunity and suffer noloss of signal due to wire drops (IR losses). Over the years, currentloops have proven to be a reliable and economical way to transmitanalog data over an already installed copper wire. There are two

types of 4-20 mA current transmitters – two wire and three wire.Two wire transmitters work via a single pair of wires by modulatingthe current in the loop depending on a process variable input (tem-perature, pressure, voltage, etc.). They steal their operating powerfrom the loop power source as shown in Figure 33a. A three wire 4-20 mA current transmitter uses an external power supply for itsoperating voltage and may sink or source current depending on itsconfiguration as shown in Figure 33b and Figure 33c

Applications

Loop Supply

Loop Resistance

ProcessVariableInput

(Temperature, Pressure, etc)

4-20 ma

Two Wire

SignalCond.

Figure 33 A.

Loop Resistance



SignalCond.

SignalCond.

Loop Supply

Loop Supply

Loop Resistance 4-20 ma

Three Wire - Sourcing Current

4-20 ma

Three Wire - Sinking Current

B. C.

Figure 34

U1

R3

R2

R1

R4

Vc

Vloop

Loop Resistor

Q1

4-20 ma TransmitterConcept Diagram

Vref


The conceptual schematic diagram shown in Figure 34 is for a twowire 4-20 mA transmitter.

Operation of the circuit can best be understood by summing the cur-rents in the non-inverting input of U1:

Vc/R2 + Vref/R1 + (-Iloop)*R4/R3 = 0

Solving for Iloop:

Iloop = R3/R4 * (Vref/R1 + Vc/R2)

Summing the currents at the inverting input of U1 is not a mistake!Q1 provides an additional 180∞ of phase shift; therefore, for nega-tive feedback, it is necessary to close the loop at the inverting inputof U1 not the non-inverting input.

Notice the loop current is sensed by R4 so the quiescent current ofU1, Vref, etc. are inside the feedback loop and cause no output cur-rent error. The only current that is not accounted for is the currentin R3; typically this would be less than 0.1% FS error.

A complete schematic for the 2 wire 4-20 mA current transmitter isshown in Figure 35.

You will notice the same components and reference designations asshown in the concept diagram! The Xicor X60008 voltage referenceprovides a precise +5.000 V for Vref. Since the input voltage of theX60008 is limited to +10 V maximum, a low dropout linear regulatorU2 is used to regulate the loop voltage of 7 to 30 V to 5.6 V. Theadvantage of using a 5.6 V regulator is that it provides a well stabilizedsource of power if additional signal conditioning is required; this will

4-46

Figure 35

3

2

4 5

176U3LT1077

R5100K

D1B140

VinVout

GndFB

C34.7 µF

C24.7 µF

R7360K

R8100K

LP2951

VinVout

Gnd GndC1.001 µF

X60008CIS8-50(5.6 v)

R380.6K

R2127K

R1 1M

SD

1

347

8

R610

R4100

Control voltage0 to 2.5 v

+Vin = 7 to 30 v

Loop Resistor

(SOT223)

5.6 v Out

Q1

IRLL014N

U1 U2

4-20 mA Transmitter0 to 2.5 v Control Voltage

2

41

6

3

26

71

4 5

U3LT1077

R5100K

D1B140

VinVout

GndFB

C34.7 µF

C24.7 µF

R7360K

R8100K

LP2951

VinVout

Gnd GndC1.001 µF

X60008CIS8-50(5.6 v)

R380.6K

R2100K

R1 1M

SD

1

347

8

R610

R4100

+Vin = 7 to 30 v

Loop Resistor

(SOT223)

5.6 v Out

Q1

IRLL014N+VsVout

Gnd

LM34 10 mv/F; +5 F to +200 F

U1 U2

U4

4-20 mA TransmitterTemperature (F)

Figure 36

37

1

45

26

U3LT1077

R5100K

D1B140

VinVout

GndFBC3

4.7 µF

C24.7 µF

R7430K

R8100K

LP2951

VinVout

Gnd GndC1.001 µF

X60008CIS8-50

(6.6 v)

R380.6K

R213.3K

R1 1M

SD

1

347

8

R610

R4100

+Vin = 7 to 30 v

Loop Resistor

(SOT223)

Q1IRLL014N

U1 U2

4-20 mA TransmitterPt100 RTD Input

R9499

Q32N4403

U4ALT1490A

U4B

LT1490A

R84.99K

RTDPt100

Q22N4401

R749.9K

(1 ma)

12

3+

+

+

4

5

67

8


4-47

be demonstrated in the next application circuits for temperaturemeasurements. The output current from the +5.6 V bias supply is lim-ited to approximately 3 mA since the total current “stolen” from theloop must be less than 4 mA. Due to the exceptionally low supply cur-rent of the X60008 voltage reference, the use of a FET for Q1 (insteadof a bipolar transistor), and the low supply current of U3, the total qui-escent current of the loop electronics (U1, U2, U3, etc.) is less than250 mA! This leaves 3.75 mA available for signal conditioning circuit-ry. If lower temperature drift is required for A/D converters or otherindustrial sensors, the X60008AIS8-50 could also be used for lessthan 1 ppm/°C temperature drift.

The following circuits show several examples of using this 4-20 mAcurrent transmitter to monitor temperature with an Integrated Circuittemperature sensor (Figure 36) and a PT100 RTD (Figure 37).

Temperature in ∞F is monitored in Figure 4 with an IC temperaturesensor that provides an output voltage of 10 mV/∞F over a tempera-ture range of +5∞F to +200∞F. The loop current will vary from 4 mAto 20 mA as the temperature changes as shown in the equation below:

Iloop = 4 + 0.0806 * T (mA)

Figure 37 shows interfacing the 4-20 mA transmitter to a Pt100 RTDthat is commonly used in high precision temperature measurements.The resistance of the RTD (a = 0.00392, American standard) is 100ohms at 0∞C and varies from 60 ohms for –100∞C to 267 ohms for+450∞C. The RTD has an excitation current of 1 mA from a constantcurrent source circuit. The Xicor X60008 voltage reference performsdouble duty in this circuit; it provides the reference voltage for the 4mA offset current, and it provides a reference voltage for a 100 mAcurrent source consisting of U4B, R7, and Q2. The 100 mA outputcurrent is converted to 500 mV by R8; this voltage is referenced to the

6.6 V bias supply from U2. A precision 1 mA current source consist-ing of U4A, Q3, and R9 provides the excitation current for the RTD.The output voltage from the RTD will vary from 60 mV to 267 mV sothe loop current will vary from 7.8 mA at –100∞C to 20 mA at+450∞C. Notice that the bias voltage from U2 was increased to 6.6 Vto allow for headroom in the current source circuit.

Negative Output Voltage Or Standing the Reference on its Head! Even though the Xicor X60008 Voltage Reference is a positive 5.000V output device, it is also possible to operate it on a negative volt-age for a –5.000 V output as shown in Figure 38.

While it would seem that this configuration violates the X60008dropout voltage specification of 300 mV (i.e., the input voltage mustbe 300 mV greater than the output voltage), it must be recognizedthat this circuit is operating in a shunt mode. In the shunt mode, onlythe bottom output driver FET is active; the top side output driver FETis not active and therefore not required for circuit operation. The onlyrequirement for proper operation is that the voltage divider made upof R1 and Rload always allow 5 V between the Vout pin and Gnd pin.Thus, the load resistor Rload must satisfy the following equation:

Rload > 5 V * R1 / (|Vee| -5 )

For the example in Figure 38:

Rload > 5 V * 10k / (|-15 V| - 5 ) = 5kohms

Notice that the X60008 Voltage Reference never sees the –Vee volt-age; only R1 sees the voltage, and –Vee can be any voltage as longas R1 can handle it! For example, -Vee could be –1000 V if R1 = 1Mohm and Rload > 5 Kohm!

Applications

Figure 37

Vin Vout

Gnd GndC110 µF

C2.001 µF

X60008CIS8-50U1

1

2

4

6

R110K

Rload > 2.6K

(19V)See note above.

Rload > 5 * R1/( Vs - 5)

+

Vref = 5V

–

Negative Reference

Vs = +24 v

with respect to +24 v


Perhaps even more useful, is a voltage reference that hangs belowa positive supply rail; a good example is the Precision, Low NoiseCurrent Source circuit shown in this Application Note. Figure 39shows the configuration for a “negative” reference voltage that isreferenced to a positive supply.

In this circuit, the voltage reference output voltage is –5.000 V withrespect to +24 V. This circuit will work with any supply voltagegreater than 5 V; the only limit is the amount of voltage that R1 canwithstand. If the load current from the voltage reference is verysmall (i.e., op amp bias current), the resistor R1 can be a VERY largevalue since it must only supply the quiescent current of the X60008and the leakage current in C1. For example, in this circuit (assumingno leakage current in C1), R1 could be as large as 48 Mohms! Whilean interesting observation, this large resistor value is not practicalbecause it would take 8 minutes to charge up C1!

Figure 39

Another interesting circuit that is possible due to the ultra low sup-ply current of the X60008 is the ability to hang the reference voltagebetween any voltage, and actually put the 5.000 V reference voltageinto any point in a circuit as shown in Figure 40.

Figure 40

Operation from a Battery or Capacitor The ultra low supply current (less than .5 ma !) of the Xicor X60008voltage reference makes it a natural part for battery operated sys-tems such as handheld DVMs, portable medical monitors, etc.However, its low supply current also allows the X60008 to be oper-ated on a battery that is buried on a PCB and NEVER turned off thuseliminating any warm-up drift effects and enhancing long term sta-bility. The circuit shown in Figure 41 operates from two 12.5 mmcoin cells to provide an input voltage of 6 V.

Since the specified batteries (Panasonic BR1225-1HC) are rated at50 mAh, the battery life exceeds 10 years as shown below:

Life = 50 mAh /0 .5 mA = 100,000 hours 4166 days 11 years

Figure 41

4-48

Vin Vout

Gnd GndC110 µF

C2.001 µF

X60008CIS8-50U1

1

2

4

6

R110K

+

Vref = 5.000 V–

Vs = +100 v

R2180K

(+10 v)

(+5 v)

Vin Vout

Gnd GndC110 µF

C2.001 µF

X60008CIS8-50U1

1

2

4

6

B13 V

B23 V

B1, B2: Panasonic BR1225-1HC Coin Cell, 50 mAh

Vin Vout

Gnd GndC110 µF

C2.001 µF

X60008CIS8-50U1

1

2

4

6

R110K

Rload > 5K

-Vee = -15 V

Vref = -5.000 V

Rload > 5 * R1/( |Vee| - 5)

Negative Reference

Figure 38

Note: Extreme care should be taken in not shorting Vref to Vee. Thiswould cause 15V across VIN to GND which will damage the device.


4-49

Of course any load current on the output of the X60008 willdecrease the battery life since it will be added to the supply cur-rent….and, it takes very little load current to drastically reduce thebattery life. For example, just monitoring the reference voltage witha Digital Voltmeter with a 10 Mohm input resistance will increase thetotal battery current to 1 mA (0.5 mA + 5 V/10M), and the batterylife will be cut in half!

It must also be noted that this voltage reference circuit is a trulyfloating voltage reference – there is no “Ground” on this circuit sothe output voltage can be placed anywhere in a circuit.

It is also possible to operate the X60008 with only a capacitor supplying the input voltage during short – medium term power supplyinterruptions such as brown-outs or changing a battery as shown in Figure 42.

Figure 42

Since I(t) = C * dv/dt for a capacitor, hold-up time dt = C/I * dv. Inthis circuit, hold-up time is 10 µF /0.5 mA* (9-5.3) = 74 seconds.This is easily enough time to change the battery B1 and not requirea new warm-up period for the voltage reference. Caution must beexercised in attempting to increase the hold-up time by increasingthe capacitance of C1. Unfortunately, the leakage current of a highvalue capacitor (>100 µF) is much higher than the quiescent currentof the X60008 so the capacitor leakage current will dominate. Forexample, a 1000 µF/10 V capacitor has a leakage current of 64 mA;

the hold-up time for this capacitor would be 58 seconds. Ideally, afilm capacitor would be used for the lowest leakage current, but highvalue film capacitors are not readily available, are very expensive,and are very large.

Therefore, using a capacitor as the input voltage source for theX60008 should only be considered in short to medium hold-up timeapplications. Also, do not forget to take into account the voltage ref-erence load current as discussed in the battery application above.

Optically Isolated Voltage ReferenceAnother truly unique application for the Xicor X60008AIS8-50 volt-age reference is an optically isolated voltage reference that can floatat any point in a circuit with up to 2500 vac, rms isolation voltage.Once again, the ultra low supply current of the X60008AIS8-50makes this possible as shown in Figure 43.

The heart of this circuit is the optically coupled photodiode array,Toshiba TLP191B which will generate an open circuit output voltageof 7 V and a short circuit current of 24 mA when the input LED isoperating at 20 mA. The Thevenin equivalent of this voltage sourceis 7 V with a Thevenin resistance of 290 Kohm. Even though this isa very wimpy voltage source, it is enough to supply the 0.5 mA thatis required by the X60008AIS8-50 to operate. In fact, Q1 is operat-ed in reverse base-emitter breakdown (an excellent low current 7 V“Zener”) to clamp the X60008AIS8-50 input voltage to less that 10V; tests showed that the output voltage from the TLP191 exceeded10 V with no load on the X60008AIS8-50. Since the X60008AIS8-50load current must by sourced by the photodiode array, the load cur-rent must be less than 20 mA or greater than 250 Kohm. Also, turn-on time for this circuit is 2 seconds (or less) since capacitor C1 mustbe charged by the 24 mA from the photodiode array.

This demonstrates the “World’s First Isolated 1 ppm/°C VoltageReference” !

Applications

Vin Vout

Gnd GndC110 µF

C2.001 µF

X60008CIS8-50U1

1

2

4

6D1

BAT54

B19 v

+5.000 v

Vin Vout

Gnd GndC110 µF

C2.001 µF

X60008CIS8-50U1

1

2

4

6

ToshibaTLP191B

+5 v

R1180

Vref = 5.000 v

Q12N4401

1

3 4

6

Figure 43


APPENDIX A“Precision Voltage Reference Using EEPROM Technology”, by JimMcCreary. Available at www.Xicor.com

APPENDIX B0.1 to 10 Hz Noise Test Box with Peak to PeakDetector

Testing the 0.1 to 10 Hz output noise of a high quality reference suchas the X60008 is often a challenge since to test for 0.1 to 10 Hznoise, it is necessary to AC couple the output of the reference beforeit is applied to a high gain stage as shown in Figure 44.

Figure 44

Additionally, the high gain stage in a typical noise test circuitrequires a very low voltage noise op amp; however, low voltagenoise op amps exhibit high current noise which prevent the use ofhigh resistance values in the 0.1 Hz AC coupling filter. Appendix Bdescribes a novel voltage reference test circuit which eliminates theneed for a 0.1 Hz AC coupling network and includes a peak to peakvoltage detector. Also in Appendix B test data is shown for variousoutput filter circuits.

To effectively block noise in the 0.1 Hz - 10 Hz bandwidth, it is neces-sary to use large value capacitors and/or large value resistors. Forexample, for a one pole high pass filter with a .1 Hz corner frequencyit is necessary to use resistor and capacitor values as shown below:

While it seems attractive to use a 1000 µF capacitor and 1.6 Kohmresistor, the large leakage current of an electrolytic capacitor willgenerate a voltage across the 1.6 Kohm resistor that will gained upby the amplifier that will send the amplifier output into saturation.For example, the leakage current of a typical 1000 µF capacitor is100 mA (Panasonic VS series); an error voltage of 100 mA * 1600ohm = 160 mV is created! Reducing the capacitor value and increas-ing the resistor value does not help because while the leakage cur-rent is reduced, the resistor value is increased! For example, for a100 µF capacitor in the same Panasonic VS series, the leakage cur-rent is reduced to 10 mA, but the resistor value is increased to 16Kohm, and the same 160 mV is introduced.

Additional noise will be introduced into the measurement by the cur-rent noise of the op amp in the gain stage developing a noise voltageacross the resistor as shown in Figure 45. It is interesting to note thatthe frequency characteristics of the resulting noise voltage will beshaped by the high pass filter network. At high frequency, the capac-itor’s impedance is very low and there is no resulting voltage noise.Unfortunately, the voltage noise resulting from the current noise isshaped by the same filter characteristic as the measurement!

4-50

10 µF

160K

a

16K

1 µF

X60008Under Test

Gain = 50K.1 Hz HPF

10 Hz LPFNoise Out

Resistor (Kohms) Capacitor (µF)

160 10

16 100

1.6 1000

Figure 45

LT1028

R

CVref In

Vout

C R In

Vout Noise

===>

Current Noise Model

where In is the current noise of the LT1028

C4

.1

C51000 pF

1 4

2

6Vin

Gnd Gnd

Vout

X60008CIS8-50 DUT

R180.6K

R218.7K

LP2951CN(6.5 v)

DUT Power

Vin Vout

C2.01SD GND FB

1

3 4

8

7

+9 v

C3

10

C110

R3

2K

C610

Gnd

DUT Out

DUT GndDUT Family Board

U3LT1167

R6100

1

2

3

+

+

45

67

8

+9 v

-9 v

10

.1

10

.1

R41.27K

R51.27K

2VIN

3 NR 4GND

6VOUT5VTRM

U4LT1027HC9

1 (film)C8

.1

C7

10

+9 v

DUT Out

U5ALT1490

U5BB

R710K

R810K

.1

.1

+9 v

-9 v(-5 v)

R12 3.83K

R9

3.83K

R10249

R11 249

R1310K

1

2

34

5 +6

78

DC Balance

(+5 v)

R1316K

C101

10 Hz LPF 3 8

4

8

4

21

U6A

LT1112

56

7

U6BC1110

R14160K

R1716K

C121

10 Hz LPF

.1 Hz HPF

Vout

9 v

9 v

On/Off

+9 v

-9 v

DUT Gnd

0.1 to 10 HzNoise Tester11/11/03

R1520K

R16100

Av = 500Av = 200

Gain = 100KVout = 1 v / 10 µv Vin

+9 v

-9 v

.01

.01

U1

U2


4-51

To eliminate the problems associated with the AC coupling network(i.e., an error voltage is introduced and noise voltage is introduced),the simplest solution is to throw away the culprit – the AC couplingfilter. But now you are faced with the problem of applying a refer-ence voltage of +5 V to a gain stage of 50,000; the output of the opamp will try to go to 250,000 Vdc which of course is not very prac-tical! But, you can subtract off the DC component of the referencevoltage and leave only the noise voltage of the reference as shownin the concept diagram in Figure 46.

An instrumentation amplifier is used to subtract the VoltageReference Under Test from a Precision Low Noise Voltage Referencewith voltage noise that is much less than the noise of the VoltageReference Under Test. There are no filters in the measurement pathat this point so there are no errors associated with RC filter net-works; all of the 0.1 Hz to 10 Hz frequency shaping is done after thehigh gain stage of the instrumentation amplifier.

Figure 47 shows the complete schematic for the 0.1 to 10 Hz NoiseTester.

Overall gain for the tester is 100K so that an input 10 mV yields 1V at the output. Operating power for the Noise Tester is from two 9V “transistor radio” batteries to ensure complete isolation from theAC power line, and no ground loops when an oscilloscope is con-nected to the output. The Noise Tester is mounted in a metal chas-sis with a tight cover to eliminate pick-up to the AC power line or RFsignals such as radio or TV transmitters. Every integrated circuit isbypassed with a 10 µF and 0.1 µF capacitor. The X60008 under test(DUT) is mounted on a Family Board so different reference configu-rations can be easily tested. A linear regulator U1 sets the DUT inputvoltage to 6.5 V as set by R1 and R2.

The output voltage from the DUT is applied to the non-inverting inputof instrumentation amplifier U3. A low noise reference U4 is con-nected to the inverting input of the IA so that the low noise reference

Applications

Figure 46


Voltage Reference Under Test

Vr

+

Vcal

Vout = Gain * (Vr - Vcal)

with gain

Precision Low Noise Voltage Reference

Figure 47


output voltage is subtracted from the DUT output voltage leavingonly the noise voltage of the DUT. R6 sets the gain of the IA at 500.A DC balance circuit (U5, etc.) is shown to null out the DC differencebetween the DUT and low noise reference. In reality, the output tol-erance of both the X60008 voltage reference and LT1027 low noisereference was so low that the DC balance circuit was not really need-ed, but it is shown here for completeness.

One pole of a 10 Hz low pass filter is set with R13 and C10; U6A isa low bias current, low noise unity gain buffer. R14 and C11 are aone zero high pass filter with a corner frequency of 0.1 Hz. U6B pro-vides a gain of 200 so the total gain is 500 x 200 = 100,000.

R17 and C12 provide a second pole for the 10 Hz low pass filter. Thesecond zero for the 0.1 Hz high pass filter is set by observing theVout waveform for 10 seconds.

Voltage reference noise tests are performed with this Noise Testerthe same as any other noise test box. A short BNC cable connectsthe Noise Tester to a storage oscilloscope input. The DUT is allowedto warm up for approximately 5 minutes to allow the DUT and testbox to stabilize after turning on switch S1. Ten second test runs aremade with the storage scope to measure the peak to peak waveformover the 10 second interval.

However, this test method is somewhat subjective because the peakto peak noise reading must be made off the oscilloscope screen; itis made even more difficult if a storage scope is not available forthese readings. Figure 48 shows a pair of peak detector circuits tostore the maximum peak voltage (U1, D1, C2) and minimum peakvoltage (U2, D2, C4). A difference amplifier (U3, R6-R9) subtracts

the maximum reading and minimum reading for a DC output volt-age that is equal to the peak-peak noise voltage. The peak detectorcircuits use isolation resistors (R2, R4) and local loop compensation(R3, C1, R5, C3) to drive the heavy capacitive load of C2 and C4. Inthe test box, mechanical switches were used for S1 and S2; analogswitches could also be used if logic control is required.

To use the Peak to Peak Detector circuit with the Noise Tester, theoutput of the Noise Tester (Figure 47) is connected to Vin of Figure48. When switch S1 is placed in the Measure position, and S2 isplaced in the Track position the output voltage of U1B and U2Btracks the input voltage. To measure the peak noise voltage, S2 isplaced in the Peak position, and the output voltage of U1B (Vmax)and U2B (Vmin) detects and holds the maximum and minimum val-ues on C2 and C4. After 10 seconds, switch S1 is moved to the Holdposition, and the output voltage, Vout is measured with a DVM oroscilloscope. The voltage at Vout represents the peak to peak noisevoltage in a 0.1 Hz to 10 Hz bandwidth for the Voltage ReferenceUnder Test.

Test ResultsVarious configurations of X60008 Voltage Reference and Filterswere tested using the Noise Tester and Peak to Peak Detector. Ineach test, five test runs were made and the results averaged asshown in the following tables.

1. The noise test system and strategy were verified by using aLT1027 as the DUT so that a LT1027 was tested against aLT1027. The measured peak to peak output noise was less than3 mV indicating the test system was working properly.

4-52

Figure 48

U1ALT1013N

5

6 4

8

4

8

87

7

U1B

R11M R2

100

R3

2.2K

D11N4148

C210

.01

.01

+9 v

-9 v

U2ALT1013N

5

67

U2B

R4100

R52.2K

D21N4148 C4

10

.01

.01

+9 v

-9 v

S2

Track

Peak

Hold

S1Measure

Vin

+Peak Detect

-Peak Detect

3

2

6154

U3LT1006

.01

.01

+9 v

-9 v

Vout = Vpp

Vout = Vmin

Vout = Vmax

1

2

+

++

+

+34

8

12

34

8

C1.001

C3.001

R810K

R610K

R710K

R910K

Peak to Peak Detector


4-53

2. A sample of 10 X60008 Grade C and Grade D were tested usingan output network of .01 µF in parallel with 10 µF + 2K.

3. A sample of 2 X60008 Grade D were tested using an output net-work of 0.01 µF

4. A sample of 2 X60008 Grade D were tested using an output net-work of 0.01 µF in parallel with 10 µF + 2K. The following filterwas used.

5. A sample of 2 X60008 Grade D were tested using an outputnetwork of 0.01 µF in parallel with 10 µF + 2K. The following filterwas used.

6. A sample of 2 X60008 Grade D were tested using an output net-work of 0.01 µF in parallel with 10 µF + 2K. The following filterwas used.

Applications

Test Set-up Check:

Test Condition: LT1027 with 1 µF NR

and 4.7 µF Cout

Part ID # Grade Volts PP (µV) Average

3.0 2.7 2.5 2.6 2.7

Test Condition: Output network = .01 µF; Output filter None


5 D 36 38 38 40 36 37.6

8 D 29 32 31 31 33 31.2

Test Condition: Output filter None


5 D 39 43 37 46 39 40.8

10 D 23 28 21 23 27 24.4

12 D 38 34 34 35 32 34.6

14 D 23 20 24 22 18 21.4

8 D 30 29 30 27 31 29.4

9 C 24 25 24 30 28 26.2

6 C 22 27 22 24 27 24.4

13 C 34 29 29 34 30 31.2

16 C 29 29 33 28 31 30.0

17 C 30 30 26 28 25 27.8

100 µF

100 µF

1K

10K

Vref Out Noise Tester In

100 µF

100 µF

1K

10K

Vref Out Noise Tester In

100 µF

100 µF

10K+

100K

Vref OutNoise Tester In

LT1012

Part ID # Volts PP (µV) Average

5 40 35 32 44 35 37.2

10 20 21 22 18 22 20.6


5 18 17 20 19 19 18.6

10 14 13 10 13 11 12.2

12 17 15 13 14 19 15.6

14 10 11 10 10 9 10.0

8 12 17 15 9 12 13.0


As you can see from the Summary below, a noise reduction of 50%to 75% is achieved with the use of an output filter as shown in Test6 above.

Footnotes:1. Linear Technology Corp. LT1004 datasheet

2. Linear Technology Corp. LT1460 datasheet

3. Linear Technology Corp. LT1461 datasheet

4. Bob Widler, New Developments in IC Voltage Regulators, IEEEJournal of Solid State Circuits, Vol. SC-6, February 1971.

5. Paul Brokaw, A Simple Three-Terminal IC Bandgap VoltageReference, IEEE Journal of Solid State Circuits, Vol. SC-9,December 1974.

6. Roya Nasraty, XFETTM References, Analog Dialog.

7. Linear Technology Corp., Design Note 229, Don’t Be Fooled by Voltage Reference Long Term-Drift and Thermal Hysteresis,Jon Wright.

8. Mies van der Robe, NY Herald Tribune, June 28, 1959

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5 14 11 10 15 10 12.0

10 9 13 10 11 12 11.0

12 12 11 9 15 8 11.0

14 10 10 9 10 7 9.2

8 11 10 8 11 13 10.6

Summary: Average Volts PP ( µV)

Part ID # Test 5 10 12 14 8

No Filter 2 40.8 24.4 34.6 21.4 29.4

1.6 Hz Filter 4 37.2 20.6

.16 Hz Filter 5 18.6 12.2 15.6 10.0 13.0

.16 Hz with LT1012 Buffer

6 12.0 11.0 11.0 9.2 10.6


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List of Figures:1. Series vs shunt reference

2. Bandgap block diagram

3. Bandgap TC curve

4. Bandgap TC curve for three references

5. Curvature corrected Bandgap reference TC curve

6. Buried Zener block diagram

7. Floating gate analog reference block diagram

8. Floating gate analog reference block diagram with Vout programming

9. Bandgap TC curve

10. Bandgap TC curve TC with the Box Method

11. X60008 TC curve

12. X60008 Noise graphs

13. X60008 Noise reduction network

14. X60008 long term stability for 464 hours

15. Bad schematic example

16. Good schematic example

17. 0-5 amp active load schematic

18. 0-5 amp active load schematic with 20% from improper connections

19. Remote sensing

20. Noise test circuit block diagram

21. .1 Hz Low pass noise filter

22. Input voltage regulators

23. Charge pump for 3.3 V operation

24. Negative operation

25. ADC Block diagram

26. Auto-Cal ADC block diagram

27. Auto-Cal DAS schematic

28. DAC Block Diagram

29. Auto-Cal DAC block diagram

30. Auto-Cal DAC schematic

31. Vref for DVM schematic

32. Active Load schematic, 0 to 5 amp

33. 2 and 3 wire 4-20 mA loop transmitter

34. 2 wire 4-20 mA loop transmitter concept diagram

35. Voltage input 4-20 mA loop transmitter

36. Temperature (∞F) input 4-20 mA loop transmitter

37. RTD input 4-20 mA loop transmitter

38. Negative output voltage reference

39. Voltage reference hanging below a positive supply voltage

40. Floating voltage reference

41. Battery operation

42. Capacitor operation

43. Optically isolated voltage reference

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