1 Lecture 16: On-Chip Networks Today: on-chip networks background.
Networks in Embedded On-Chip Solutions · Research case study . Networks in embedded on-chip...
Transcript of Networks in Embedded On-Chip Solutions · Research case study . Networks in embedded on-chip...
Networks in Embedded
On-Chip Solutions
Bernd Däne, Irina Gushchina, Andriy Osadchuk,
Marcus Müller and Wolfgang Fengler
Computer Architecture and Embedded Systems Group
Ilmenau University of Technology, Germany
http://www.tu-ilmenau.de/ra
Contents
• Introduction
• Former project
• System-on-Chip technology
• Network-on-Chip
• Contributions to the design of SoC on FPGA
• Research case study
• Summary and outlook
2 Networks in embedded on-chip solutions
Introduction
Application area: Complex, fast and precise information processing
in measurement domain
3
Embedded System-on-Chip Solution with FPGA
Complex design - model based design
On-chip communication
Component reuse Organisation of data transfer
Networks in embedded on-chip solutions
Former Project: Measuring Machine
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Interface forPosition Sensors
Interface for Remote PC
Interface forImaging Sensors
Interface forActuators
inte
rna
lC
omm
unic
ati o
n S
y nch
roni
z atio
n &
Sequence Control
Image Data Compression
Sensor Data Correction
Position Control
Measurement
System:
NPMM200
• Multi axis closed loop control
Former Project: Measuring Machine
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Position Sensors
Probe
Probe Sensor
Actuator Systems
(not visible)
Object
x
z, fx, fy
y, fz
y, fy
z, fx
x, fx
Former Project: Design Methods
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Platform-independent
System Definition
Platform-specific
Development
Vendor-specific
Tool chains
Algorithm definition
Platform-specific
model
Distributed hardware
?
Software(C)
Software(C)
Software(C)
Software(C)
Targetsoftware
components
effective
component-specific
code generation
PIM PSM→
?
capturinghardwareproperties
mappingfunctional to platform
structure
expressingplatform properties
in model
defining
development platform
layer
PIM
Platform Independent Model
PSM
Platform Specific Model
Former Project: Design Methods
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Platform-specific Development
Vendor-specific
Toolchains
Prototyping
Vendor-specific
Tool chains
Distributed hardware
Software(C)
Software(C)
Software(C)
Software(C)
Targetcomponents
Platform-independentSystem Definition
Architecture Mapping
Algorithm modelAlgorithm model
codegeneration
Performanceinformation
profiling
Targetcomponent
single processingunit
Platform-speci?cmodel
Platform-speci cfi model
PIM-to-PSMtransformation
Platformstructure
model
Softwarestructure
model
mapping
Distributionmodel
Distributionmodel
codegeneration
decomposition
Partial algorithmmodel
Targetabstraction
modelelements
System-on-Chip Technology
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• FPGA – Field Programmable Gate Array
• Reconfigurable Systems-on-Chip
• Universal interfaces needed
• Scalability and high performance
• Reliability by reconfiguration and adaptive
routing algorithms
System-on-Chip Technology
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Network
Bus-based Point-to-Point Network-on-Chip
Complexity of systems Complexity of interconnections
On-Chip Communication
Network-on-Chip
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• Influenced by internet & distributed systems
• Encourage communication-centric design
• Established network technologies
• Flexible network architecture
• Packet based communication
• Decentralized control
• Better reuse of IP-cores
IP-Core
IP-Core
I/O
Memory
DSP
Router
Embedded Network
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Core
Network Interface
Routing Node
Channel
Example:
2D-mesh-topology
- Core • IP-cores, memory, I/O, …
- Routing Node • Routing & Switching
• Buffering
- Network Interface • RINI & RDNI (see next)
• Packeting / Unpacketing
- Channel • Bidirectional links
• Data lines & control
Network-on-Chip
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Network-on-Chip
Resource
Independent
Network
Interface
Resource
Dependent
Network
Interface
R
RINI
RDNI
TX
RX
RX – Receive
TX – Transmit
Network Adapter (Resource Network Interface):
Separating communication and processing
Contributions to the design of SoC on FPGA
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Network-on-chip and network-on-multiple-chips:
3D-torus network on a multi-FPGA platform
(GECKO3STACK)
Write
Out
Data Mem. 1 Read 1
In
Instructions
Processor
Data Mem. 2
Out
Read 2
In
Program Memory
Counter
Contributions to the design of SoC on FPGA
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Specialized Soft Microprocessor:
Contributions to the design of SoC on FPGA
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Off-chip SoC communication:
Research case study
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Ejector
Control Unit
Weighing
station
Production
Delivery
Weighing Cell
Requirements: • Flexibility
• Speed
• Precision
• Security
• Certifiability
Research case study
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Complex and highly efficient information processing in measurement
Electromagnetic force compensation scale
• High-speed measurements in a mechanically disturbed environment
• Higher requirements of measurement uncertainty, complexity of algorithms
• Flexible and increasing design
• Certifiable development process
Load carrierPosition detector
Digital information processing
(filter and control algorithms)
Ic ~ m
Weighing pan
Transmission lever
Coupling member
with flexure hinges
Parallel lever system
with flexure hinges
Bearing of the
transmission lever
Electrodynamic
actuator
Research case study
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to display
analog-digital converter 1
analog-digital converter 2
digital-analog converter
Softcore LiSARD
control algorithm
Hardware components
filter algorithm
Interface
FIFO DMA
FIFO DMA
FIFO DMA
FPGA
parameters
Interface Interface
Interface
parameters
memory set-upConfiguration
memoryfrom Host
set-up
to
Ho
st
to Host
Interface
FPGA-based implementation of digital data processing
Research case study
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Network-on-Chip implementation
to display
Softcore LiSARD
control algorithm
Hardware components
filter algorithm
Inter-face
Configuration memory
from Host
to Host
Interface
to
converter
from
converterInterface
FIFO DMA
from
converterInterface
Interface
FIFO DMA
FIFO DMA
to H
ost
to H
ost
Summary and outlook
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• Solutions for communication in embedded systems
• Focus on System-on-Chip realizations
• Model based design methodology
• Approach using Network-on-Chip principle
Work in progress, next goals:
• Realize and evaluate Network-on-Chip solution
• Apply Requirements Engineering principles
Main goal: Integrated design methodology
Thanks for your attention!
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