Network Synchronization Technologies Poster -...

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Network Synchronization Technologies Poster Synchronization Standards PTP/IEEE 1588v2 1588v2 General Flow State ITU-T ETSI PRC G.811 EN 300 462-6-1 SSU/BITS G.812 EN 300 462-4-1 SONET/SDH Equipment Clock G.813 EN 300 462-5-1 Types of Synchronization Time synchronization Devices synchronized to the same time information Frequency synchronization Devices having the same number of bits over a period of time Phase synchronization Devices will shift exactly at the same time from one clock pulse to another Acronyms BITS Building integrated timing supply EEC Ethernet equipment clock ESMC Ethernet synchronization messaging channel GPS Global positioning system MTIE Maximum time interval error PRC Primary reference clock PRS Primary reference source PTP Precise time protocol SEC SONET/SDH equipment clock SSU Synchronization supply unit SyncE Synchronous Ethernet TDEV Time deviation TIE Time interval error TIE Measurement Measures the phase of a clock with respect to a reference clock Measures over long periods (hours or days) Uses raw data to calculate MTIE and TDEV MTIE Measurement • Measures the maximum phase deviation over a measurement window • Predicts clock frequency stability over time PTP is a synchronization scheme that provides high clock accuracy in a packet network by continuously exchanging packets with appropriate timestamps. A grandmaster clock is a very precise clock source that generates timestamp announcements and responds to timestamp requests from boundary clocks and slave clocks. Slave/client clocks are clocks that receive synchronization from the grandmaster clock. MTIE Performance Masks Round-Trip Delay RTD = (T2 – T1) + (T4 – T3) Offset (slave clock error and one-way path delay) Offset SYNC = T2 - T1 Offset DELAY_REQ = T4 - T3 Assuming path symmetry, therefore One-Way Path Delay = RTD Slave Clock Error = (T2 - T1) - RTD Notes 1. One-way delay cannot be calculated exactly, but there is a bounded error. 2. The protocol transfers TAI (Atomic Time). UTC time is TAI + leap second offset from the announce message. Switch/Router Laser Master Clock t1 Slave Clock Data at Slave Clock Leap second offset T2 (and T1 for 1-step) T1, T2 T1, T2, T3 T1, T2, T3, T4 The process is repeated up to 128 times per second. Announce rate is lower than sync rate. Time Announce Sync (t1) Follow-up (t1) Delay_request Delay_response (t4) Time t4 t2 t3 x i Time Delay MTIE (S) = max max ( x i ) min ( x i ) 0 1 2 j i j + n −1 T (N −1) τ o N − n+1 n+j 1 i=j i=j j=1 n+j 1 S − (n −1) τ 0 t i τ o x x (t) ppj N 3 Signal Under Test TIE Measurement Device Reference Signal MTIE (0.275 x 10 -3 τ + 0.025) μs for 0.1s < τ ≤ 1000 s (10 -5 τ + 0.29) μs for τ > 1000 s Synchronous Ethernet SSM Format (ITU-T G.8264/Y.1364) Synchronous Ethernet (SyncE) SyncE is the scheme that transports frequency at the Ethernet physical layer MAC ±100 ppm ±4.6 ppm ±4.6 ppm Ethernet SyncE Line card NE Line card Clock card Clock card Line card NE NE PHY SSU Direction of clock path SSU MAC PHY MAC PHY MAC ±100 ppm Line card NE PHY EEC EEC SyncE processor SyncE processor Octet Number Size Field 1-6 6 octets Destination address = 01-80-C2-00-00-02 (hex) 7-12 6 octets Source address 13-14 2 octets Slow protocol Ethertype = 88-09 (hex) 15 1 octet Slow protocol subtype = 0A (hex) 16-18 3 octets ITU-OUI = 00-19-A7 (hex) 19-20 2 octets ITU subtype 21 4 bits Version 1 bit Event flag 3 bits Reserved 22-24 3 octets Reserved 25-1532 36-1490 octets Data and padding Last 4 4 octets FCS Clock Message SSM Code EEC1 QL-EEC1 1011 EEC2 QL-EEC2 1010 Organizational Unique Identifier 0x0019A7 Slow Protocol Subtype 0x0A 8 bits Type: 0x01 16 bits Length: 0x04 4 bits 0 (unused) 4 bits SSM code IEEE Assigned OUI and SPS QL TLV Format ESMC PDU Format SSM Message for SyncE IEEE-1588v2 Architectures Delay Request-Response Model The master and slave(s) exchange messages directly The slave is the only one that calculates the clock offset: - Mean Path Delay = [ [ T2-T1] + [ T4-T3] ] / 2 - Clock Offset = [T2-T1] – Mean Path Delay Peer-to-Peer Model Each node in the network measures the port-to-port propagation time (i.e., the link delay between two communicating ports that support the peer delay mechanism) The sum of all path delays is added to the sync message Master Sync Delay_req Delay_req Sync, Follow-up, Delay_resp Delay_resp T1, tagged T2, tagged / T1, received T3, tagged T4, received (T1), received Follow-up T4, tagged Slave M S M S Sync: T1m, (link delays) T1m Pdelay_req Pdelay_req Pdelay_req Pdelay_req Pdelay_resp Pdelay_resp Pdelay_resp Pdelay_resp T2s P1 P1 Clock offset = [T2s-T1m] - ∑ (link delays) in the sync message Applies to each leg P2 P2 Port 1 Pdelay_req PDelay_resp PDelay_resp_ follow-up T1p tagged T2p tagged T3p tagged T4p tagged (T3p-T2p) Received (T3p) Received Port 2 Port 1 Pdelay_req PDelay_resp PDelay_resp_ follow-up T2p tagged T3p tagged T1p tagged T4p tagged (T3p-T2p) received (T3p) received Port 2 M S M S Bits Number of Bytes Offset 7 6 5 4 3 2 1 0 transportSpecific messageType 1 0 reserved versionPTP 1 1 messageLength 2 2 domainNumber 1 4 reserved 1 5 flagField 2 6 correctionField 8 8 reserved 4 16 sourcePortIdentity 10 20 sequenceID 2 30 controlField 1 32 logMessageInterval 1 33 1000 100 10 1 0.1 0.01 0.01 1 100 10000 1000000 1E+08 Observation Period (s) MTIE (μs) MTIE (μs) (log scale) 0.1 0.1 1 10 100 1 K Types II, III Type I T1313260-98/d03 10 10 m 50 m 7,5 20 280 400 0.3 0.75 1 2 5 10 100 Observation Interval τ (s) (log scale) MTIE (μs) T1306500-95 10 5.0 2.0 1.0 0.25 0.1 0.1 1.0 2.5 10 20 100 400 1000 Observation Interval τ (s) MTIE Limit (μs) Observation Interval τ (s) 0.75 0.1 < τ ≤ 7.5 0.1 τ 7.5 < τ ≤ 20 2 20 < τ ≤ 400 0.005 τ 400 < τ ≤ 1000 5 1000 < τ ≤ 10 000 MTIE Limit (μs) Observation Interval τ (s) 0.25 0.1 < τ ≤ 2.5 0.1 τ 2.5 < τ ≤ 20 2 20 < τ ≤ 400 0.005 τ 400 < τ ≤ 1000 G.812-Input Wander Tolerance (MTIE) for Type I Node Clock G.813-Input Wander Tolerance (MTIE) for Option 1

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Network Synchronization Technologies Poster

Synchronization Standards

PTP/IEEE 1588v2

1588v2 General Flow State

ITU-T ETSI

PRC G.811 EN 300 462-6-1

SSU/BITS G.812 EN 300 462-4-1

SONET/SDH Equipment Clock G.813 EN 300 462-5-1

Types of Synchronization

Time synchronization Devices synchronized to the same time information

Frequency synchronization Devices having the same number of bits over a period of time

Phase synchronization Devices will shift exactly at the same time from one clock pulse to another

AcronymsBITS Building integrated timing supplyEEC Ethernet equipment clock ESMC Ethernet synchronization

messaging channel

GPS Global positioning system MTIE Maximum time interval errorPRC Primary reference clockPRS Primary reference source PTP Precise time protocol

SEC SONET/SDH equipment clockSSU Synchronization supply unitSyncE Synchronous EthernetTDEV Time deviation

TIE Time interval error

TIE Measurement• Measures the phase of

a clock with respect to a reference clock

• Measures over long periods (hours or days)

• Uses raw data to calculate MTIE and TDEV

MTIE Measurement• Measures the maximum

phase deviation over a measurement window

• Predicts clock frequency stability over time

PTP is a synchronization scheme that provides high clock accuracy in a packet network by continuously exchanging packets with appropriate timestamps.

A grandmaster clock is a very precise clock source that generates timestamp announcements and responds to timestamp requests from boundary clocks and slave clocks.

Slave/client clocks are clocks that receive synchronization from the grandmaster clock.

MTIE Performance Masks

Round-Trip Delay RTD = (T2 – T1) + (T4 – T3)

Offset (slave clock error and one-way path delay) OffsetSYNC = T2 - T1 OffsetDELAY_REQ = T4 - T3

Assuming path symmetry, therefore One-Way Path Delay = RTD Slave Clock Error = (T2 - T1) - RTD Notes

1. One-way delay cannot be calculated exactly, but there is a bounded error.

2. The protocol transfers TAI (Atomic Time). UTC time is TAI + leap second offset from the announce message.

Sw

itch/Router Laser

Master Clock

t1

Slave Clock Data atSlave Clock

Leap second offset

T2 (and T1 for 1-step)

T1, T2

T1, T2, T3

T1, T2, T3, T4

The process is repeated up to 128 times per second. Announce rate is lower than sync rate.

Time

Announce

Sync (t1)

Follow-up (t1)

Delay_request

Delay_response (t4)

Time

t4

t2

t3

xiTimeDelay

MTIE (S) = max max (xi) − min (xi)

0 1 2

j

i

j + n −1

T − (N −1) τ o

N − n+1 n+j−1

i=j i=jj=1

n+j−1

S − (n −1) τ 0

t − i τ o

x

x (t)

ppj

N

3

Signal Under Test

TIEMeasurementDevice

Reference Signal

MTIE

(0.275 x 10-3τ + 0.025) µs for 0.1s < τ ≤ 1000 s

(10-5τ + 0.29) µs for τ > 1000 s

Synchronous Ethernet SSM Format (ITU-T G.8264/Y.1364)

Synchronous Ethernet (SyncE)SyncE is the scheme that transports frequency at the Ethernet physical layer

MAC

±100 ppm

±4.6 ppm ±4.6 ppm

Ethernet

SyncE

Line card

NE

Line cardClock card Clock cardLine card

NE NE

PHY

SSU

Direction of clock path

SSU

MAC PHY MACPHY

MAC

±100 ppm

Line card

NE

PHY

EEC EECSyncE

processorSyncE

processor

Octet Number Size Field

1-6 6 octets Destination address = 01-80-C2-00-00-02 (hex)

7-12 6 octets Source address

13-14 2 octets Slow protocol Ethertype = 88-09 (hex)

15 1 octet Slow protocol subtype = 0A (hex)

16-18 3 octets ITU-OUI = 00-19-A7 (hex)

19-20 2 octets ITU subtype

21 4 bits Version

1 bit Event flag

3 bits Reserved

22-24 3 octets Reserved

25-1532 36-1490 octets

Data and padding

Last 4 4 octets FCS

Clock Message SSM Code

EEC1 QL-EEC1 1011

EEC2 QL-EEC2 1010

Organizational Unique Identifier 0x0019A7

Slow Protocol Subtype 0x0A

8 bits Type: 0x01

16 bits Length: 0x04

4 bits 0 (unused)

4 bits SSM code

IEEE Assigned OUI and SPS QL TLV Format

ESMC PDU Format SSM Message for SyncE

IEEE-1588v2 ArchitecturesDelay Request-Response Model• The master and slave(s) exchange messages directly

• The slave is the only one that calculates the clock offset:

- Mean Path Delay = [ [ T2-T1] + [ T4-T3] ] / 2

- Clock Offset = [T2-T1] – Mean Path Delay

Peer-to-Peer Model• Each node in the network measures the port-to-port propagation time (i.e., the link delay

between two communicating ports that support the peer delay mechanism)

• The sum of all path delays is added to the sync message

Master

Sync

Delay_req

Delay_req

Sync, Follow-up, Delay_resp

Delay_resp

T1, tagged

T2, tagged / T1, received

T3, tagged

T4, received

(T1), received

Follow-up

T4, tagged

Slave

Delay_req

Sync, Follow-up, Delay_resp

T2, tagged / T1, received

T4, received

(T1), received

Sync, Follow-up, Delay_resp

• Each node in the network measures the port-to-port propagation time (i.e., the link delay

M

S

M

S

Sync: T1m, ∑(link delays)

T1m

Pdelay_req

Pdelay_req

Pdelay_req

Pdelay_req

Pdelay_resp

Pdelay_resp

Pdelay_resp

Pdelay_resp

T2s

P1

P1

Clock offset = [T2s-T1m] - ∑ (link delays)in the sync message

Applies toeach leg

P2

P2

Port 1

Pdelay_req

PDelay_resp

PDelay_resp_follow-up

T1p tagged

T2p tagged

T3p tagged

T4p tagged(T3p-T2p) Received

(T3p) Received

Port 2

Port 1

Pdelay_req

PDelay_resp

PDelay_resp_follow-up

T2p tagged

T3p tagged

T1p tagged

T4p tagged(T3p-T2p) received(T3p) received

Port 2

Applies toeach leg Pdelay_respPdelay_respPdelay_resp

P1

Sync: T1m, ∑(link delays)Pdelay_req

Pdelay_req

T2s

Pdelay_req

Pdelay_reqPdelay_req

Pdelay_respPdelay_respPdelay_respPdelay_respPdelay_respPdelay_resp

Pdelay_resp

P1

T3p tagged

T1p tagged

Pdelay_respPdelay_respPdelay_respPdelay_respPdelay_respPdelay_resp

Pdelay_reqPdelay_req

Pdelay_respPdelay_respPdelay_resp

Pdelay_req

Pdelay_resp

Pdelay_req

Pdelay_respPdelay_respPdelay_respPdelay_respPdelay_respPdelay_respPdelay_respPdelay_resp

Pdelay_reqPdelay_req

Pdelay_respPdelay_resp

Pdelay_reqPdelay_req

Pdelay_respPdelay_respPdelay_respPdelay_resp

P2P2P2P2

Clock offset = [T2s-T1m] - ∑ (link delays)

P2P2P2P2

Pdelay_reqPdelay_reqPdelay_reqPdelay_reqPdelay_reqPdelay_reqPdelay_req

Pdelay_respPdelay_resp

P1

M

S

M

S

BitsNumber of Bytes Offset

7 6 5 4 3 2 1 0

transportSpecific messageType 1 0

reserved versionPTP 1 1

messageLength 2 2

domainNumber 1 4

reserved 1 5

flagField 2 6

correctionField 8 8

reserved 4 16

sourcePortIdentity 10 20

sequenceID 2 30

controlField 1 32

logMessageInterval 1 33

1000

100

10

1

0.1

0.010.01 1 100 10000 1000000 1E+08

Observation Period (s)

MTIE (µs)

MTIE (µs)(log scale)

0.10.1 1 10 100 1 K

Types II, III

Type I

T1313260-98/d03

1010 m50 m 7,5 20 280

400

0.3

0.751

2

5

10

100

Observation Interval τ (s)(log scale)

MTIE (µs)

T1306500-95

10

5.0

2.0

1.0

0.25

0.10.1 1.0 2.5 10 20 100 400 1000

Observation Interval τ (s)

MTIE Limit (µs) Observation Interval τ (s)

0.75 0.1 < τ ≤ 7.5

0.1 τ 7.5 < τ ≤ 20

2 20 < τ ≤ 400

0.005 τ 400 < τ ≤ 1000

5 1000 < τ ≤ 10 000

MTIE Limit (µs) Observation Interval τ (s)

0.25 0.1 < τ ≤ 2.5

0.1 τ 2.5 < τ ≤ 20

2 20 < τ ≤ 400

0.005 τ 400 < τ ≤ 1000

G.812-Input Wander Tolerance (MTIE) for Type I Node Clock

G.813-Input Wander Tolerance (MTIE) for Option 1

TamasiA
XL
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