rev 20180504

MPS Digital Multiphase VR Introduce

SZ FAE Lori

Mar. 2020

• Basic terminologies

• Multiphase VR control methods

• Multiphase VR current balance

• MPS multiphase VR road map

Outlines

Basic Terminologies

Phase and Rail

VR/MTP/VID/DVID/CS/APS/Loadline(droop resistor)

• VR means voltage regulator

• MTP means multiple-time programmer

• VID is same as Vref of DCDC converter

• DVID means dynamic VID

• CS means current sense

• APS means auto phase shedding

• Loadline(droop resistor) shows as picture

1.55

1.6

1.65

1.7

1.75

1.8

1.85

1.9

0.0 20.0 40.0 60.0 80.0 100.0 120.0 140.0 160.0 180.0 200.0

Ou

tpu

t V

olt

age

(V

)

Load Current (A)

VccMAX VccMIN VID1_Loadline Min V @ I_Min (V) Max V @ I_Min (V)

• SVID Intel

• SVI2/3 AMD

• OVR NVidia

• PVID early Intel/POL

• AVS Arm-base IC

• PMBUS MPS and so on

Protocols: SVID/SVI2/3/OVR/PVID/AVS/PMBUS

Multiphase VR Control Methods

• Sophisticated pole and zero adjustment during operation

• Separated non-linear loop creates undershoot or ringback during tranisent

• Voltage mode control doesn’t guarantee cycle by cycle current sharing

Typical Voltage Mode Digital Control

X1

VORTN

VOSEN

Digital PID

Remote sense

DPWMPWM

ADC

p

ss

z

s

z

s

G

1

21

11

Non-Linear Transient

Loop

• Separated non-linear loop creates undershoot or ringback during tranisent

Dual Loop COT Control

• One fast loop takes care of both steady state and load transient

• MPS patented Technology-Simple, Fast and Fully Digital.

MPS Digital COT Control

X1

VORTN

VOSENCmp

set

DA

C

DC Calibration

DA

C

VID

Digital RampRemote sense

Digital

TON

PWM

200MHz

Clock

Digital COT Control – Steady State

Digital COT Control – Load Step Up

Digital COT Control – Load Step Down

Multiphase VR Current Balance

• Zero tempco due to monolithic die current sensing

Intelli-Phase Current Sense Principle

PGND

VIN

SW

VIN 1

2

151617181921 20

SW

PGND

3

14

VCC

BST

AGND

CS

SYNC

PWM

VTEMP/FLT

11109875 6

PGND

PGND

PGND

PGND

PGND

PGND

SW

PGND

4

13

12

On-Die Current Sense Advantages

On-Die Current Sense Advantages

Current Balance Introduce

Current Balance Introduce

• Why dynamic current sharing for multiphase is difficult for voltage and current control

• In load step up mode, the leading phase would increase PWM on time dramatically, but due to PWM switching cycle delay, the lagging phase supports less current

• Huge current stress on one phase during fast load step up

Load

Current

VOUT

IL1 IL2

COMP

Huge phase current

difference

Current Balance Introduce

• Reducing PWM off time to support load step up, while PWM on time keeps constant

• PWMs are evenly distributed to each phase , so each phase carries the average current even transient

• Inherently much better dynamic current sharing than voltage and current control

IL1 IL2

Vref

VOUT

PWM1

PWM2

Fixed On

Time

Load

Current

Phase

blanking time Min off time

MPS Multiphase VR Road Map

Multiphase VR Road Map

Intel IMVP

AMD Gaming SoC

AMD Server Processor

Nvidia GPU

AI Processor

Intel Xeon Processor MP2955A7-ph/ 2-rail

VR13

MP29657-ph/ 2-rail

VR13.HC

MP29758-ph/ 2-rail

VR13.HC

MP297212-ph/ 2-rail

VR13.HC

MP28535-ph/ 2-rail

SVI2

MP28559-ph/ 2-rail

SVI2

MP285213-ph/ 2-rail

SVI2

MP2888A10-ph/ 1-rail

OVR4+

MP2886A6-ph/ 1-rail

OVR4+

MP2884A4-ph/ 1-rail

OVR4+

MP29883-ph/ 1-rail

OVR3i

MP29657-ph/ 2-rail

AVS

MP29758-ph/ 2-rail

AVS

MP285213-ph/ 2-rail

AVS

MP2949A6-ph/ 3-rail

IMVP8

MP2940A3-ph/ 1-rail

IMVP9

MP2950A6-ph/ 1-rail

IMVP9

MP28535-ph/ 2-rail

SVI2

MP29718-ph/ 2-rail

VR14Sampling

Released

MP29266-ph/ 3-rail

AVS

MP297312-ph/ 2-rail

VR14

2017 2018 2019

Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4

MP288216-ph/ 2-rail

AVS

MP28559-ph/ 2-rail

SVI2

MP285213-ph/ 2-rail

SVI2

MP29455-ph/ 2-rail

SVI2

MP2979A6-ph/ 3-rail

IMVP8

MP29785-ph/ 2-rail

AVS

MP297212-ph/ 2-rail

AVS

Thank you