MPLAB C18 C Compiler Addendum - Microchip...
270
2004 Microchip Technology Inc. DS51518A MPLAB ® C18 C COMPILER ADDENDUM
Transcript of MPLAB C18 C Compiler Addendum - Microchip...
2004 Microchip Technology Inc. DS51518A
MPLAB® C18C COMPILER
ADDENDUM
DS51518A-page ii 2004 Microchip Technology Inc.
Information contained in this publication regarding device
applications and the like is provided only for your convenience
and may be superseded by updates. It is your responsibility to
ensure that your application meets with your specifications.
MICROCHIP MAKES NO REPRESENTATIONS OR WAR-
RANTIES OF ANY KIND WHETHER EXPRESS OR IMPLIED,
WRITTEN OR ORAL, STATUTORY OR OTHERWISE,
RELATED TO THE INFORMATION, INCLUDING BUT NOT
LIMITED TO ITS CONDITION, QUALITY, PERFORMANCE,
MERCHANTABILITY OR FITNESS FOR PURPOSE.
Microchip disclaims all liability arising from this information and
its use. Use of Microchip’s products as critical components in
life support systems is not authorized except with express
written approval by Microchip. No licenses are conveyed,
implicitly or otherwise, under any Microchip intellectual property
rights.
Trademarks
The Microchip name and logo, the Microchip logo, Accuron,
dsPIC, KEELOQ, microID, MPLAB, PIC, PICmicro, PICSTART,
PRO MATE, PowerSmart, rfPIC, and SmartShunt are
registered trademarks of Microchip Technology Incorporated
in the U.S.A. and other countries.
AmpLab, FilterLab, MXDEV, MXLAB, PICMASTER, SEEVAL,
SmartSensor and The Embedded Control Solutions Company
are registered trademarks of Microchip Technology
Incorporated in the U.S.A.
Analog-for-the-Digital Age, Application Maestro, dsPICDEM,
dsPICDEM.net, dsPICworks, ECAN, ECONOMONITOR,
FanSense, FlexROM, fuzzyLAB, In-Circuit Serial
Programming, ICSP, ICEPIC, Migratable Memory, MPASM,
MPLIB, MPLINK, MPSIM, PICkit, PICDEM, PICDEM.net,
PICLAB, PICtail, PowerCal, PowerInfo, PowerMate,
PowerTool, rfLAB, rfPICDEM, Select Mode, Smart Serial,
SmartTel and Total Endurance are trademarks of Microchip
Technology Incorporated in the U.S.A. and other countries.
SQTP is a service mark of Microchip Technology Incorporated
in the U.S.A.
All other trademarks mentioned herein are property of their
respective companies.
© 2004, Microchip Technology Incorporated, Printed in the
U.S.A., All Rights Reserved.
Printed on recycled paper.
Note the following details of the code protection feature on Microchip devices:
• Microchip products meet the specification contained in their particular Microchip Data Sheet.
• Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the
intended manner and under normal conditions.
• There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our
knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data
Sheets. Most likely, the person doing so is engaged in theft of intellectual property.
• Microchip is willing to work with the customer who is concerned about the integrity of their code.
• Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not
mean that we are guaranteeing the product as “unbreakable.”
Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our
products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts
allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.
Microchip received ISO/TS-16949:2002 quality system certification for its worldwide headquarters, design and wafer fabrication facilities in Chandler and Tempe, Arizona and Mountain View, California in October 2003. The Company’s quality system processes and procedures are for its PICmicro® 8-bit MCUs, KEELOQ® code hopping devices, Serial EEPROMs, microperipherals, nonvolatile memory and analog products. In addition, Microchip’s quality system for the design and manufacture of development systems is ISO 9001:2000 certified.
MPLAB® C18 C COMPILER
USER’S GUIDE ADDENDUM
2004 Microchip Technology Inc. DS51518A-page iii
Table of Contents
Configuration Settings ................................................................................................. 5
PIC18C242............................................................................................................ 5
PIC18C252............................................................................................................ 6
PIC18C442............................................................................................................ 7
PIC18C452............................................................................................................ 8
PIC18C601............................................................................................................ 9
PIC18C658.......................................................................................................... 10
PIC18C801.......................................................................................................... 11
PIC18C858.......................................................................................................... 12
PIC18F1220 ........................................................................................................ 13
PIC18F1320 ........................................................................................................ 15
PIC18F2220 ........................................................................................................ 18
PIC18F2320 ........................................................................................................ 21
PIC18F2331 ........................................................................................................ 24
PIC18F2410 ........................................................................................................ 27
PIC18F242 .......................................................................................................... 30
PIC18F2420 ........................................................................................................ 32
PIC18F2431 ........................................................................................................ 35
PIC18F2439 ........................................................................................................ 38
PIC18F2455 ........................................................................................................ 40
PIC18F248 .......................................................................................................... 44
PIC18F2480 ........................................................................................................ 47
PIC18F2510 ........................................................................................................ 50
PIC18F2515 ........................................................................................................ 53
PIC18F252 .......................................................................................................... 56
PIC18F2520 ........................................................................................................ 58
PIC18F2525 ........................................................................................................ 62
PIC18F2539 ........................................................................................................ 65
PIC18F2550 ........................................................................................................ 67
PIC18F258 .......................................................................................................... 71
PIC18F2580 ........................................................................................................ 74
PIC18F2585 ........................................................................................................ 78
PIC18F2610 ........................................................................................................ 81
MPLAB® C18 C Compiler User’s Guide Addendum
DS51518A-page iv 2004 Microchip Technology Inc.
PIC18F2620 ........................................................................................................ 84
PIC18F2680 ........................................................................................................ 88
PIC18F4220 ........................................................................................................ 91
PIC18F4320 ........................................................................................................ 94
PIC18F4331 ........................................................................................................ 97
PIC18F4410 ...................................................................................................... 101
PIC18F442 ........................................................................................................ 103
PIC18F4420 ...................................................................................................... 106
PIC18F4431 ...................................................................................................... 109
PIC18F4439 ...................................................................................................... 112
PIC18F4455 ...................................................................................................... 114
PIC18F448 ........................................................................................................ 119
PIC18F4480 ...................................................................................................... 121
PIC18F4510 ...................................................................................................... 124
PIC18F4515 ...................................................................................................... 127
PIC18F452 ........................................................................................................ 130
PIC18F4520 ...................................................................................................... 133
PIC18F4525 ...................................................................................................... 136
PIC18F4539 ...................................................................................................... 139
PIC18F4550 ...................................................................................................... 141
PIC18F458 ........................................................................................................ 146
PIC18F4580 ...................................................................................................... 148
PIC18F4585 ...................................................................................................... 152
PIC18F4610 ...................................................................................................... 155
PIC18F4620 ...................................................................................................... 158
PIC18F4680 ...................................................................................................... 162
PIC18F6310 ...................................................................................................... 165
PIC18F6390 ...................................................................................................... 167
PIC18F6410 ...................................................................................................... 169
PIC18F6490 ...................................................................................................... 171
PIC18F64J15 .................................................................................................... 173
PIC18F6520 ...................................................................................................... 175
PIC18F6525 ...................................................................................................... 178
PIC18F6585 ...................................................................................................... 181
PIC18F65J10 .................................................................................................... 184
PIC18F65J15 .................................................................................................... 186
PIC18F6620 ...................................................................................................... 188
PIC18F6621 ...................................................................................................... 190
PIC18F6627 ...................................................................................................... 193
Table of Contents
2004 Microchip Technology Inc. DS51518A-page v
PIC18F6680 ...................................................................................................... 198
PIC18F66J10 .................................................................................................... 201
PIC18F66J15 .................................................................................................... 203
PIC18F6720 ...................................................................................................... 205
PIC18F6722 ...................................................................................................... 208
PIC18F67J10 .................................................................................................... 213
PIC18F8310 ...................................................................................................... 215
PIC18F8390 ...................................................................................................... 217
PIC18F8410 ...................................................................................................... 219
PIC18F8490 ...................................................................................................... 221
PIC18F84J15 .................................................................................................... 223
PIC18F8520 ...................................................................................................... 225
PIC18F8525 ...................................................................................................... 228
PIC18F8585 ...................................................................................................... 231
PIC18F85J10 .................................................................................................... 234
PIC18F85J15 .................................................................................................... 236
PIC18F8620 ...................................................................................................... 238
PIC18F8621 ...................................................................................................... 241
PIC18F8627 ...................................................................................................... 244
PIC18F8680 ...................................................................................................... 249
PIC18F86J10 .................................................................................................... 252
PIC18F86J15 .................................................................................................... 254
PIC18F8720 ...................................................................................................... 256
PIC18F8722 ...................................................................................................... 260
PIC18F87J10 .................................................................................................... 265
MPLAB® C18 C Compiler User’s Guide Addendum
DS51518A-page vi 2004 Microchip Technology Inc.
NOTES:
MPLAB® C18 C COMPILER
USER’S GUIDE ADDENDUM
2004 Microchip Technology Inc. DS51518A-page 1
Configuration Settings
This addendum lists the configuration settings for each of the devices supported by the
MPLAB C18 C compiler.
PIC18C242
Code Protect:
Oscillator Selection:
Osc. Switch Enable:
Power Up Timer:
Brown Out Reset:
Brown Out Voltage:
Watchdog Timer:
CP = ON Enabled
CP = OFF Disabled
OSC = LP LP
OSC = XT XT
OSC = HS HS
OSC = RC RC
OSC = EC EC-OSC2 as Clock Out
OSC = ECIO EC-OSC2 as RA6
OSC = HSPLL HS-PLL Enabled
OSC = RCIO RC-OSC2 as RA6
OSCS = ON Enabled
OSCS = OFF Disabled
PWRT = ON Enabled
PWRT = OFF Disabled
BOR = OFF Disabled
BOR = ON Enabled
BORV = 45 4.5V
BORV = 42 4.2V
BORV = 27 2.7V
BORV = 25 2.5V
WDT = OFF Disabled
WDT = ON Enabled
MPLAB® C18 C Compiler User’s Guide Addendum
DS51518A-page 2 2004 Microchip Technology Inc.
Watchdog Postscaler:
CCP2 Mux:
Stack Overflow Reset:
PIC18C252
Code Protect:
Oscillator Selection:
Osc. Switch Enable:
Power Up Timer:
Brown Out Reset:
Brown Out Voltage:
WDTPS = 1 1:1
WDTPS = 2 1:2
WDTPS = 4 1:4
WDTPS = 8 1:8
WDTPS = 16 1:16
WDTPS = 32 1:32
WDTPS = 64 1:64
WDTPS = 128 1:128
CCP2MUX = OFF Disable (RB3)
CCP2MUX = ON Enable (RC1)
STVR = OFF Disabled
STVR = ON Enabled
CP = ON Enabled
CP = OFF Disabled
OSC = LP LP
OSC = XT XT
OSC = HS HS
OSC = RC RC
OSC = EC EC-OSC2 as Clock Out
OSC = ECIO EC-OSC2 as RA6
OSC = HSPLL HS-PLL Enabled
OSC = RCIO RC-OSC2 as RA6
OSCS = ON Enabled
OSCS = OFF Disabled
PWRT = ON Enabled
PWRT = OFF Disabled
BOR = OFF Disabled
BOR = ON Enabled
BORV = 45 4.5V
BORV = 42 4.2V
BORV = 27 2.7V
BORV = 25 2.5V
Configuration Settings
2004 Microchip Technology Inc. DS51518A-page 3
Watchdog Timer:
Watchdog Postscaler:
CCP2 Mux:
Stack Overflow Reset:
PIC18C442
Code Protect:
Oscillator Selection:
Osc. Switch Enable:
Power Up Timer:
Brown Out Reset:
WDT = OFF Disabled
WDT = ON Enabled
WDTPS = 1 1:1
WDTPS = 2 1:2
WDTPS = 4 1:4
WDTPS = 8 1:8
WDTPS = 16 1:16
WDTPS = 32 1:32
WDTPS = 64 1:64
WDTPS = 128 1:128
CCP2MUX = OFF Disable (RB3)
CCP2MUX = ON Enable (RC1)
STVR = OFF Disabled
STVR = ON Enabled
CP = ON Enabled
CP = OFF Disabled
OSC = LP LP
OSC = XT XT
OSC = HS HS
OSC = RC RC
OSC = EC EC-OSC2 as Clock Out
OSC = ECIO EC-OSC2 as RA6
OSC = HSPLL HS-PLL Enabled
OSC = RCIO RC-OSC2 as RA6
OSCS = ON Enabled
OSCS = OFF Disabled
PWRT = ON Enabled
PWRT = OFF Disabled
BOR = OFF Disabled
BOR = ON Enabled
MPLAB® C18 C Compiler User’s Guide Addendum
DS51518A-page 4 2004 Microchip Technology Inc.
Brown Out Voltage:
Watchdog Timer:
Watchdog Postscaler:
CCP2 Mux:
Stack Overflow Reset:
PIC18C452
Code Protect:
Oscillator Selection:
Osc. Switch Enable:
Power Up Timer:
BORV = 45 4.5V
BORV = 42 4.2V
BORV = 27 2.7V
BORV = 25 2.5V
WDT = OFF Disabled
WDT = ON Enabled
WDTPS = 1 1:1
WDTPS = 2 1:2
WDTPS = 4 1:4
WDTPS = 8 1:8
WDTPS = 16 1:16
WDTPS = 32 1:32
WDTPS = 64 1:64
WDTPS = 128 1:128
CCP2MUX = OFF Disable (RB3)
CCP2MUX = ON Enable (RC1)
STVR = OFF Disabled
STVR = ON Enabled
CP = ON Enabled
CP = OFF Disabled
OSC = LP LP
OSC = XT XT
OSC = HS HS
OSC = RC RC
OSC = EC EC-OSC2 as Clock Out
OSC = ECIO EC-OSC2 as RA6
OSC = HSPLL HS-PLL Enabled
OSC = RCIO RC-OSC2 as RA6
OSCS = ON Enabled
OSCS = OFF Disabled
PWRT = ON Enabled
PWRT = OFF Disabled
Configuration Settings
2004 Microchip Technology Inc. DS51518A-page 5
Brown Out Reset:
Brown Out Voltage:
Watchdog Timer:
Watchdog Postscaler:
CCP2 Mux:
Stack Overflow Reset:
PIC18C601
Oscillator Selection:
Power-up Timer:
External Bus Data Width:
Watchdog Timer:
BOR = OFF Disabled
BOR = ON Enabled
BORV = 45 4.5V
BORV = 42 4.2V
BORV = 27 2.7V
BORV = 25 2.5V
WDT = OFF Disabled
WDT = ON Enabled
WDTPS = 1 1:1
WDTPS = 2 1:2
WDTPS = 4 1:4
WDTPS = 8 1:8
WDTPS = 16 1:16
WDTPS = 32 1:32
WDTPS = 64 1:64
WDTPS = 128 1:128
CCP2MUX = OFF Disable (RB3)
CCP2MUX = ON Enable (RC1)
STVR = OFF Disabled
STVR = ON Enabled
OSC = LP LP Oscillator
OSC = EC EC Oscillator
OSC = HS HS Oscillator
OSC = RC RC Oscillator
PWRT = ON Enable
PWRT = OFF Disable
BW = 8 8-bit external bus mode
BW = 16 16-bit external bus mode
WDT = OFF Disabled
WDT = ON Enabled
MPLAB® C18 C Compiler User’s Guide Addendum
DS51518A-page 6 2004 Microchip Technology Inc.
Watchdog Timer Postscale Selection:
Stack Full/Underflow RESET:
PIC18C658
Code Protect:
Oscillator Selection:
Osc. Switch Enable:
Power Up Timer:
Brown Out Reset:
Brown Out Voltage:
Watchdog Timer:
WDTPS = 1 1:1
WDTPS = 2 1:2
WDTPS = 4 1:4
WDTPS = 8 1:8
WDTPS = 16 1:16
WDTPS = 32 1:32
WDTPS = 64 1:64
WDTPS = 128 1:128
STVR = OFF Disabled
STVR = ON Enabled
CP = ON Enabled
CP = OFF Disabled
OSC = LP LP
OSC = XT XT
OSC = HS HS
OSC = RC RC
OSC = EC EC-OSC2 as Clock Out
OSC = ECIO EC-OSC2 as RA6
OSC = HSPLL HS-PLL Enabled
OSC = RCIO RC-OSC2 as RA6
OSCS = ON Enabled
OSCS = OFF Disabled
PWRT = ON Enabled
PWRT = OFF Disabled
BOR = OFF Disabled
BOR = ON Enabled
BORV = 45 4.5V
BORV = 42 4.2V
BORV = 27 2.7V
BORV = 25 2.5V
WDT = OFF Disabled
WDT = ON Enabled
Configuration Settings
2004 Microchip Technology Inc. DS51518A-page 7
Watchdog Postscaler:
Stack Overflow Reset:
PIC18C801
Oscillator Selection:
Power-up Timer:
External Bus Data Width:
Watchdog Timer:
Watchdog Timer Postscale Selection:
Stack Full/Underflow RESET:
WDTPS = 1 1:1
WDTPS = 2 1:2
WDTPS = 4 1:4
WDTPS = 8 1:8
WDTPS = 16 1:16
WDTPS = 32 1:32
WDTPS = 64 1:64
WDTPS = 128 1:128
STVR = OFF Disabled
STVR = ON Enabled
OSC = LP LP Oscillator
OSC = EC EC Oscillator
OSC = HS HS Oscillator
OSC = RC RC Oscillator
PWRT = ON Enable
PWRT = OFF Disable
BW = 8 8-bit external bus mode
BW = 16 16-bit external bus mode
WDT = OFF Disabled
WDT = ON Enabled
WDTPS = 1 1:1
WDTPS = 2 1:2
WDTPS = 4 1:4
WDTPS = 8 1:8
WDTPS = 16 1:16
WDTPS = 32 1:32
WDTPS = 64 1:64
WDTPS = 128 1:128
STVR = OFF Disabled
STVR = ON Enabled
MPLAB® C18 C Compiler User’s Guide Addendum
DS51518A-page 8 2004 Microchip Technology Inc.
PIC18C858
Code Protect:
Oscillator Selection:
Osc. Switch Enable:
Power Up Timer:
Brown Out Reset:
Brown Out Voltage:
Watchdog Timer:
Watchdog Postscaler:
Stack Overflow Reset:
CP = ON Enabled
CP = OFF Disabled
OSC = LP LP
OSC = XT XT
OSC = HS HS
OSC = RC RC
OSC = EC EC-OSC2 as Clock Out
OSC = ECIO EC-OSC2 as RA6
OSC = HSPLL HS-PLL Enabled
OSC = RCIO RC-OSC2 as RA6
OSCS = ON Enabled
OSCS = OFF Disabled
PWRT = ON Enabled
PWRT = OFF Disabled
BOR = OFF Disabled
BOR = ON Enabled
BORV = 45 4.5V
BORV = 42 4.2V
BORV = 27 2.7V
BORV = 25 2.5V
WDT = OFF Disabled
WDT = ON Enabled
WDTPS = 1 1:1
WDTPS = 2 1:2
WDTPS = 4 1:4
WDTPS = 8 1:8
WDTPS = 16 1:16
WDTPS = 32 1:32
WDTPS = 64 1:64
WDTPS = 128 1:128
STVR = OFF Disabled
STVR = ON Enabled
Configuration Settings
2004 Microchip Technology Inc. DS51518A-page 9
PIC18F1220
Oscillator Selection:
Fail Safe Clock Monitor:
Internal External Switch Over mode:
Power-Up Timer:
Brown-Out Reset:
Brown Out Voltage:
Watchdog Timer:
OSC = LP LP Oscillator
OSC = XT XT Oscillator
OSC = HS HS Oscillator
OSC = EC External Clock on OSC1, OSC2
as Fosc/4
OSC = ECIO External Clock on OSC1, OSC2
as RA6
OSC = HSPLL HS + PLL
OSC = RCIO External RC on OSC1, OSC2 as
RA6
OSC = INTIO2 Internal RC, OSC1 as RA7,
OSC2 as RA6
OSC = INTIO1 Internal RC, OSC1 as RA7,
OSC2 as Fosc/4
OSC = RC External RC on OSC1, OSC2 as
Fosc/4
FSCM = OFF Fail Safe Clock Monitor disabled
FSCM = ON Fail Safe Clock Monitor enabled
IESO = OFF Internal External Switch Over
mode disabled
IESO = ON Internal External Switch Over
mode enabled
PWRT = ON Enabled
PWRT = OFF Disabled
BOR = OFF Disabled
BOR = ON Enabled
BORV = 45 4.5V
BORV = 42 4.2V
BORV = 27 2.7V
BORV = 20 2.0V
WDT = OFF Disabled
WDT = ON Enabled
MPLAB® C18 C Compiler User’s Guide Addendum
DS51518A-page 10 2004 Microchip Technology Inc.
Watchdog Postscaler:
MCLR Enable:
Stack Full/Overflow Reset:
Low Voltage ICSP:
Background Debugger Enable:
Code Protection Block 0:
Code Protection Block 1:
Boot Block Code Protection:
Data EEPROM Code Protection:
WDTPS = 1 1:1
WDTPS = 2 1:2
WDTPS = 4 1:4
WDTPS = 8 1:8
WDTPS = 16 1:16
WDTPS = 32 1:32
WDTPS = 64 1:64
WDTPS = 128 1:128
WDTPS = 256 1:256
WDTPS = 512 1:512
WDTPS = 1024 1:1024
WDTPS = 2048 1:2048
WDTPS = 4096 1:4096
WDTPS = 8192 1:8192
WDTPS = 16384 1:16384
WDTPS = 32768 1:32768
MCLRE = OFF Disabled
MCLRE = ON Enabled
STVR = OFF Disabled
STVR = ON Enabled
LVP = OFF Disabled
LVP = ON Enabled
DEBUG = ON Enabled
DEBUG = OFF Disabled
CP0 = ON Enabled
CP0 = OFF Disabled
CP1 = ON Enabled
CP1 = OFF Disabled
CPB = ON Enabled
CPB = OFF Disabled
CPD = ON Enabled
CPD = OFF Disabled
Configuration Settings
2004 Microchip Technology Inc. DS51518A-page 11
Write Protection Block 0:
Write Protection Block 1:
Boot Block Write Protection:
Configuration Register Write Protection:
Data EEPROM Write Protection:
Table Read Protection Block 0:
Table Read Protection Block 1:
Boot Block Table Read Protection:
PIC18F1320
Oscillator Selection:
WRT0 = ON Enabled
WRT0 = OFF Disabled
WRT1 = ON Enabled
WRT1 = OFF Disabled
WRTB = ON Enabled
WRTB = OFF Disabled
WRTC = ON Enabled
WRTC = OFF Disabled
WRTD = ON Enabled
WRTD = OFF Disabled
EBTR0 = ON Enabled
EBTR0 = OFF Disabled
EBTR1 = ON Enabled
EBTR1 = OFF Disabled
EBTRB = ON Enabled
EBTRB = OFF Disabled
OSC = LP LP Oscillator
OSC = XT XT Oscillator
OSC = HS HS Oscillator
OSC = EC External Clock on OSC1, OSC2
as Fosc/4
OSC = ECIO External Clock on OSC1, OSC2
as RA6
OSC = HSPLL HS + PLL
OSC = RCIO External RC on OSC1, OSC2 as
RA6
OSC = INTIO2 Internal RC, OSC1 as RA7,
OSC2 as RA6
OSC = INTIO1 Internal RC, OSC1 as RA7,
OSC2 as Fosc/4
OSC = RC External RC on OSC1, OSC2 as
Fosc/4
MPLAB® C18 C Compiler User’s Guide Addendum
DS51518A-page 12 2004 Microchip Technology Inc.
Fail Safe Clock Monitor:
Internal External Switch Over mode:
Power-Up Timer:
Brown-Out Reset:
Brown Out Voltage:
Watchdog Timer:
Watchdog Postscaler:
MCLR Enable:
FSCM = OFF Fail Safe Clock Monitor disabled
FSCM = ON Fail Safe Clock Monitor enabled
IESO = OFF Internal External Switch Over
mode disabled
IESO = ON Internal External Switch Over
mode enabled
PWRT = ON Enabled
PWRT = OFF Disabled
BOR = OFF Disabled
BOR = ON Enabled
BORV = 45 4.5V
BORV = 42 4.2V
BORV = 27 2.7V
BORV = 20 2.0V
WDT = OFF Disabled
WDT = ON Enabled
WDTPS = 1 1:1
WDTPS = 2 1:2
WDTPS = 4 1:4
WDTPS = 8 1:8
WDTPS = 16 1:16
WDTPS = 32 1:32
WDTPS = 64 1:64
WDTPS = 128 1:128
WDTPS = 256 1:256
WDTPS = 512 1:512
WDTPS = 1024 1:1024
WDTPS = 2048 1:2048
WDTPS = 4096 1:4096
WDTPS = 8192 1:8192
WDTPS = 16384 1:16384
WDTPS = 32768 1:32768
MCLRE = OFF Disabled
MCLRE = ON Enabled
Configuration Settings
2004 Microchip Technology Inc. DS51518A-page 13
Stack Full/Overflow Reset:
Low Voltage ICSP:
Background Debugger Enable:
Code Protection Block 0:
Code Protection Block 1:
Boot Block Code Protection:
Data EEPROM Code Protection:
Write Protection Block 0:
Write Protection Block 1:
Boot Block Write Protection:
Configuration Register Write Protection:
Data EEPROM Write Protection:
Table Read Protection Block 0:
STVR = OFF Disabled
STVR = ON Enabled
LVP = OFF Disabled
LVP = ON Enabled
DEBUG = ON Enabled
DEBUG = OFF Disabled
CP0 = ON Enabled
CP0 = OFF Disabled
CP1 = ON Enabled
CP1 = OFF Disabled
CPB = ON Enabled
CPB = OFF Disabled
CPD = ON Enabled
CPD = OFF Disabled
WRT0 = ON Enabled
WRT0 = OFF Disabled
WRT1 = ON Enabled
WRT1 = OFF Disabled
WRTB = ON Enabled
WRTB = OFF Disabled
WRTC = ON Enabled
WRTC = OFF Disabled
WRTD = ON Enabled
WRTD = OFF Disabled
EBTR0 = ON Enabled
EBTR0 = OFF Disabled
MPLAB® C18 C Compiler User’s Guide Addendum
DS51518A-page 14 2004 Microchip Technology Inc.
Table Read Protection Block 1:
Boot Block Table Read Protection:
PIC18F2220
Oscillator Selection:
Fail Safe Clock Monitor:
Internal External Switch Over mode:
Power-Up Timer:
Brown-Out Reset:
Brown Out Voltage:
EBTR1 = ON Enabled
EBTR1 = OFF Disabled
EBTRB = ON Enabled
EBTRB = OFF Disabled
OSC = LP LP Oscillator
OSC = XT XT Oscillator
OSC = HS HS Oscillator
OSC = EC External Clock on OSC1, OSC2
as Fosc/4
OSC = ECIO External Clock on OSC1, OSC2
as RA6
OSC = HSPLL HS + PLL
OSC = RCIO External RC on OSC1, OSC2 as
RA6
OSC = INTIO2 Internal RC, OSC1 as RA7,
OSC2 as RA6
OSC = INTIO1 Internal RC, OSC1 as RA7,
OSC2 as Fosc/4
OSC = RC External RC on OSC1, OSC2 as
Fosc/4
FSCM = OFF Fail Safe Clock Monitor disabled
FSCM = ON Fail Safe Clock Monitor enabled
IESO = OFF Internal External Switch Over
mode disabled
IESO = ON Internal External Switch Over
mode enabled
PWRT = ON Enabled
PWRT = OFF Disabled
BOR = OFF Disabled
BOR = ON Enabled
BORV = 45 4.5V
BORV = 42 4.2V
BORV = 27 2.7V
BORV = 20 2.0V
Configuration Settings
2004 Microchip Technology Inc. DS51518A-page 15
Watchdog Timer:
Watchdog Postscaler:
MCLR Enable:
PORTB A/D Enable:
CCP2 Pin Function:
Stack Full/Overflow Reset:
Low Voltage ICSP:
Background Debugger Enable:
Code Protection Block 0:
WDT = OFF Disabled
WDT = ON Enabled
WDTPS = 1 1:1
WDTPS = 2 1:2
WDTPS = 4 1:4
WDTPS = 8 1:8
WDTPS = 16 1:16
WDTPS = 32 1:32
WDTPS = 64 1:64
WDTPS = 128 1:128
WDTPS = 256 1:256
WDTPS = 512 1:512
WDTPS = 1024 1:1024
WDTPS = 2048 1:2048
WDTPS = 4096 1:4096
WDTPS = 8192 1:8192
WDTPS = 16384 1:16384
WDTPS = 32768 1:32768
MCLRE = OFF Disabled
MCLRE = ON Enabled
PBAD = DIG Digital
PBAD = ANA Analog
CCP2MX = B3 RB3
CCP2MX = OFF RB3
CCP2MX = C1 RC1
CCP2MX = ON RC1
STVR = OFF Disabled
STVR = ON Enabled
LVP = OFF Disabled
LVP = ON Enabled
DEBUG = ON Enabled
DEBUG = OFF Disabled
CP0 = ON Enabled
CP0 = OFF Disabled
MPLAB® C18 C Compiler User’s Guide Addendum
DS51518A-page 16 2004 Microchip Technology Inc.
Code Protection Block 1:
Boot Block Code Protection:
Data EEPROM Code Protection:
Write Protection Block 0:
Write Protection Block 1:
Boot Block Write Protection:
Configuration Register Write Protection:
Data EEPROM Write Protection:
Table Read Protection Block 0:
Table Read Protection Block 1:
Boot Block Table Read Protection:
CP1 = ON Enabled
CP1 = OFF Disabled
CPB = ON Enabled
CPB = OFF Disabled
CPD = ON Enabled
CPD = OFF Disabled
WRT0 = ON Enabled
WRT0 = OFF Disabled
WRT1 = ON Enabled
WRT1 = OFF Disabled
WRTB = ON Enabled
WRTB = OFF Disabled
WRTC = ON Enabled
WRTC = OFF Disabled
WRTD = ON Enabled
WRTD = OFF Disabled
EBTR0 = ON Enabled
EBTR0 = OFF Disabled
EBTR1 = ON Enabled
EBTR1 = OFF Disabled
EBTRB = ON Enabled
EBTRB = OFF Disabled
Configuration Settings
2004 Microchip Technology Inc. DS51518A-page 17
PIC18F2320
Oscillator Selection:
Fail Safe Clock Monitor:
Internal External Switch Over mode:
Power-Up Timer:
Brown-Out Reset:
Brown Out Voltage:
Watchdog Timer:
OSC = LP LP Oscillator
OSC = XT XT Oscillator
OSC = HS HS Oscillator
OSC = EC External Clock on OSC1, OSC2
as Fosc/4
OSC = ECIO External Clock on OSC1, OSC2
as RA6
OSC = HSPLL HS + PLL
OSC = RCIO External RC on OSC1, OSC2 as
RA6
OSC = INTIO2 Internal RC, OSC1 as RA7,
OSC2 as RA6
OSC = INTIO1 Internal RC, OSC1 as RA7,
OSC2 as Fosc/4
OSC = RC External RC on OSC1, OSC2 as
Fosc/4
FSCM = OFF Fail Safe Clock Monitor disabled
FSCM = ON Fail Safe Clock Monitor enabled
IESO = OFF Internal External Switch Over
mode disabled
IESO = ON Internal External Switch Over
mode enabled
PWRT = ON Enabled
PWRT = OFF Disabled
BOR = OFF Disabled
BOR = ON Enabled
BORV = 45 4.5V
BORV = 42 4.2V
BORV = 27 2.7V
BORV = 20 2.0V
WDT = OFF Disabled
WDT = ON Enabled
MPLAB® C18 C Compiler User’s Guide Addendum
DS51518A-page 18 2004 Microchip Technology Inc.
Watchdog Postscaler:
MCLR Enable:
PORTB A/D Enable:
CCP2 Pin Function:
Stack Full/Overflow Reset:
Low Voltage ICSP:
Background Debugger Enable:
Code Protection Block 0:
Code Protection Block 1:
WDTPS = 1 1:1
WDTPS = 2 1:2
WDTPS = 4 1:4
WDTPS = 8 1:8
WDTPS = 16 1:16
WDTPS = 32 1:32
WDTPS = 64 1:64
WDTPS = 128 1:128
WDTPS = 256 1:256
WDTPS = 512 1:512
WDTPS = 1024 1:1024
WDTPS = 2048 1:2048
WDTPS = 4096 1:4096
WDTPS = 8192 1:8192
WDTPS = 16384 1:16384
WDTPS = 32768 1:32768
MCLRE = OFF Disabled
MCLRE = ON Enabled
PBAD = DIG Digital
PBAD = ANA Analog
CCP2MX = B3 RB3
CCP2MX = OFF RB3
CCP2MX = C1 RC1
CCP2MX = ON RC1
STVR = OFF Disabled
STVR = ON Enabled
LVP = OFF Disabled
LVP = ON Enabled
DEBUG = ON Enabled
DEBUG = OFF Disabled
CP0 = ON Enabled
CP0 = OFF Disabled
CP1 = ON Enabled
CP1 = OFF Disabled
Configuration Settings
2004 Microchip Technology Inc. DS51518A-page 19
Code Protection Block 2:
Code Protection Block 3:
Boot Block Code Protection:
Data EEPROM Code Protection:
Write Protection Block 0:
Write Protection Block 1:
Write Protection Block 2:
Write Protection Block 3:
Boot Block Write Protection:
Configuration Register Write Protection:
Data EEPROM Write Protection:
Table Read Protection Block 0:
Table Read Protection Block 1:
CP2 = ON Enabled
CP2 = OFF Disabled
CP3 = ON Enabled
CP3 = OFF Disabled
CPB = ON Enabled
CPB = OFF Disabled
CPD = ON Enabled
CPD = OFF Disabled
WRT0 = ON Enabled
WRT0 = OFF Disabled
WRT1 = ON Enabled
WRT1 = OFF Disabled
WRT2 = ON Enabled
WRT2 = OFF Disabled
WRT3 = ON Enabled
WRT3 = OFF Disabled
WRTB = ON Enabled
WRTB = OFF Disabled
WRTC = ON Enabled
WRTC = OFF Disabled
WRTD = ON Enabled
WRTD = OFF Disabled
EBTR0 = ON Enabled
EBTR0 = OFF Disabled
EBTR1 = ON Enabled
EBTR1 = OFF Disabled
MPLAB® C18 C Compiler User’s Guide Addendum
DS51518A-page 20 2004 Microchip Technology Inc.
Table Read Protection Block 2:
Table Read Protection Block 3:
Boot Block Table Read Protection:
PIC18F2331
Oscillator Selection:
Fail Safe Clock Monitor Enable:
Internal/External Switch-Over:
Power Up Timer:
Brown Out Reset:
Brown Out Voltage:
EBTR2 = ON Enabled
EBTR2 = OFF Disabled
EBTR3 = ON Enabled
EBTR3 = OFF Disabled
EBTRB = ON Enabled
EBTRB = OFF Disabled
OSC = LP LP
OSC = XT XT
OSC = HS HS
OSC = RC2 External RC, RA6 is CLKOUT
OSC = EC EC, RA6 is CLKOUT
OSC = ECIO EC, RA6 is I/O
OSC = HSPLL HS-PLL Enabled
OSC = RCIO External RC, RA6 is I/O
OSC = IRCIO Internal RC, RA6 & RA7 are I/O
OSC = IRC Internal RC, RA6 is CLKOUT,
RA7 is I/O
OSC = RC1 External RC, RA6 is CLKOUT
OSC = RC External RC, RA6 is CLKOUT
FCMEN = OFF Disabled
FCMEN = ON Enabled
IESO = OFF Disabled
IESO = ON Enabled
PWRTEN = ON Enabled
PWRTEN = OFF Disabled
BOREN = OFF Disabled
BOREN = ON Enabled
BORV = 45 4.5V
BORV = 42 4.2V
BORV = 27 2.7V
BORV = 20 2.0V
Configuration Settings
2004 Microchip Technology Inc. DS51518A-page 21
Watchdog Timer:
Watchdog Timer Enable Window:
Watchdog Postscaler:
Timer1 Oscillator Mux:
High-Side Transistors Polarity:
Low-Side Transistors Polarity:
PWM output pins RESET state control:
MCLR Enable:
Stack Overflow Reset:
WDTEN = OFF Disabled
WDTEN = ON Enabled
WINEN = ON Enabled
WINEN = OFF Disabled
WDPS = 1 1:1
WDPS = 2 1:2
WDPS = 4 1:4
WDPS = 8 1:8
WDPS = 16 1:16
WDPS = 32 1:32
WDPS = 64 1:64
WDPS = 128 1:128
WDPS = 256 1:256
WDPS = 512 1:512
WDPS = 1024 1:1024
WDPS = 2048 1:2048
WDPS = 4096 1:4096
WDPS = 8192 1:8192
WDPS = 16384 1:16384
WDPS = 32768 1:32768
T1OSCMX = OFF Active
T1OSCMX = ON Inactive
HPOL = LOW Active low
HPOL = HIGH Active high
LPOL = LOW Active low
LPOL = HIGH Active high
PWMPIN = ON Enabled
PWMPIN = OFF Disabled
MCLRE = OFF Disabled
MCLRE = ON Enabled
STVREN = OFF Disabled
STVREN = ON Enabled
MPLAB® C18 C Compiler User’s Guide Addendum
DS51518A-page 22 2004 Microchip Technology Inc.
Low Voltage Programming:
Background Debugger Enable:
Code Protection Block 0:
Code Protection Block 1:
Code Protection Block 2:
Code Protection Block 3:
Boot Block Code Protection:
Data EEPROM Code Protection:
Write Protection Block 0:
Write Protection Block 1:
Write Protection Block 2:
Write Protection Block 3:
Boot Block Write Protection:
LVP = OFF Disabled
LVP = ON Enabled
DEBUG = ON Enabled
DEBUG = OFF Disabled
CP0 = ON Enabled
CP0 = OFF Disabled
CP1 = ON Enabled
CP1 = OFF Disabled
CP2 = ON Enabled
CP2 = OFF Disabled
CP3 = ON Enabled
CP3 = OFF Disabled
CPB = ON Enabled
CPB = OFF Disabled
CPD = ON Enabled
CPD = OFF Disabled
WRT0 = ON Enabled
WRT0 = OFF Disabled
WRT1 = ON Enabled
WRT1 = OFF Disabled
WRT2 = ON Enabled
WRT2 = OFF Disabled
WRT3 = ON Enabled
WRT3 = OFF Disabled
WRTB = ON Enabled
WRTB = OFF Disabled
Configuration Settings
2004 Microchip Technology Inc. DS51518A-page 23
Configuration Register Write Protection:
Data EEPROM Write Protection:
Table Read Protection Block 0:
Table Read Protection Block 1:
Table Read Protection Block 2:
Table Read Protection Block 3:
Boot Block Table Read Protection:
PIC18F2410
Oscillator Selection:
Fail Safe Clock Monitor:
Internal External Osc. Switch Over:
WRTC = ON Enabled
WRTC = OFF Disabled
WRTD = ON Enabled
WRTD = OFF Disabled
EBTR0 = ON Enabled
EBTR0 = OFF Disabled
EBTR1 = ON Enabled
EBTR1 = OFF Disabled
EBTR2 = ON Enabled
EBTR2 = OFF Disabled
EBTR3 = ON Enabled
EBTR3 = OFF Disabled
EBTRB = ON Enabled
EBTRB = OFF Disabled
OSC = LP LP
OSC = XT XT
OSC = HS HS
OSC = RC RC
OSC = EC EC-OSC2 as Clock Out
OSC = ECIO6 EC-OSC2 as RA6
OSC = HSPLL HS-PLL Enabled
OSC = RCIO6 RC-OSC2 as RA6
OSC = INTIO67 INTRC-OSC2 as RA6, OSC1 as
RA7
OSC = INTIO7 INTRC-OSC2 as Clock Out,
OSC1 as RA7
FCMEN = OFF Disabled
FCMEN = ON Enabled
IESO = OFF Disabled
IESO = ON Enabled
MPLAB® C18 C Compiler User’s Guide Addendum
DS51518A-page 24 2004 Microchip Technology Inc.
Power Up Timer:
Brown Out Reset:
Brown Out Voltage:
Watchdog Timer:
Watchdog Postscaler:
MCLR Enable:
Port B A/D Enable:
CCP2 Mux:
PWRT = ON Enabled
PWRT = OFF Disabled
BOREN = OFF Disabled
BOREN = ON Enabled
BOREN = NOSLP Enabled except SLEEP,
SBOREN Disabled
BOREN = SBORDIS Enabled, SBOREN Disabled
BORV = 45 4.5V
BORV = 42 4.2V
BORV = 27 2.7V
BORV = 25 2.5V
WDT = OFF Disabled
WDT = ON Enabled
WDTPS = 1 1:1
WDTPS = 2 1:2
WDTPS = 4 1:4
WDTPS = 8 1:8
WDTPS = 16 1:16
WDTPS = 32 1:32
WDTPS = 64 1:64
WDTPS = 128 1:128
WDTPS = 256 1:256
WDTPS = 512 1:512
WDTPS = 1024 1:1024
WDTPS = 2048 1:2048
WDTPS = 4096 1:4096
WDTPS = 8192 1:8192
WDTPS = 16384 1:16384
WDTPS = 32768 1:32768
MCLRE = OFF Disabled
MCLRE = ON Enabled
PBADEN = OFF Port B<4:0> digital on RESET
PBADEN = ON Port B<4:0> analog on RESET
CCP2MX = PORTBE Muxed with RB3
CCP2MX = PORTC Muxed with RC1
Configuration Settings
2004 Microchip Technology Inc. DS51518A-page 25
Stack Overflow Reset:
Low Voltage ICSP:
Enhanced CPU Enable:
Background Debugger Enable:
Code Protection Block 0:
Code Protection Block 1:
Boot Block Code Protection:
Write Protection Block 0:
Write Protection Block 1:
Boot Block Write Protection:
Configuration Register Write Protection:
Table Read Protection Block 0:
Table Read Protection Block 1:
STVREN = OFF Disabled
STVREN = ON Enabled
LVP = OFF Disabled
LVP = ON Enabled
ENHCPU = OFF Disabled
ENHCPU = ON Enabled
DEBUG = ON Enabled
DEBUG = OFF Disabled
CP0 = ON Enabled
CP0 = OFF Disabled
CP1 = ON Enabled
CP1 = OFF Disabled
CPB = ON Enabled
CPB = OFF Disabled
WRT0 = ON Enabled
WRT0 = OFF Disabled
WRT1 = ON Enabled
WRT1 = OFF Disabled
WRTB = ON Enabled
WRTB = OFF Disabled
WRTC = ON Enabled
WRTC = OFF Disabled
EBTR0 = ON Enabled
EBTR0 = OFF Disabled
EBTR1 = ON Enabled
EBTR1 = OFF Disabled
MPLAB® C18 C Compiler User’s Guide Addendum
DS51518A-page 26 2004 Microchip Technology Inc.
Boot Block Table Read Protection:
PIC18F242
Oscillator Selection:
Osc. Switch Enable:
Power Up Timer:
Brown Out Reset:
Brown Out Voltage:
Watchdog Timer:
Watchdog Postscaler:
CCP2 Mux:
EBTRB = ON Enabled
EBTRB = OFF Disabled
OSC = LP LP
OSC = XT XT
OSC = HS HS
OSC = RC RC
OSC = EC EC-OSC2 as Clock Out
OSC = ECIO EC-OSC2 as RA6
OSC = HSPLL HS-PLL Enabled
OSC = RCIO RC-OSC2 as RA6
OSCS = ON Enabled
OSCS = OFF Disabled
PWRT = ON Enabled
PWRT = OFF Disabled
BOR = OFF Disabled
BOR = ON Enabled
BORV = 45 4.5V
BORV = 42 4.2V
BORV = 27 2.7V
BORV = 25 2.5V
WDT = OFF Disabled
WDT = ON Enabled
WDTPS = 1 1:1
WDTPS = 2 1:2
WDTPS = 4 1:4
WDTPS = 8 1:8
WDTPS = 16 1:16
WDTPS = 32 1:32
WDTPS = 64 1:64
WDTPS = 128 1:128
CCP2MUX = OFF Disable (RB3)
CCP2MUX = ON Enable (RC1)
Configuration Settings
2004 Microchip Technology Inc. DS51518A-page 27
Stack Overflow Reset:
Low Voltage ICSP:
Background Debugger Enable:
Code Protection Block 0:
Code Protection Block 1:
Boot Block Code Protection:
Data EEPROM Code Protection:
Write Protection Block 0:
Write Protection Block 1:
Boot Block Write Protection:
Configuration Register Write Protection:
Data EEPROM Write Protection:
Table Read Protection Block 0:
STVR = OFF Disabled
STVR = ON Enabled
LVP = OFF Disabled
LVP = ON Enabled
DEBUG = ON Enabled
DEBUG = OFF Disabled
CP0 = ON Enabled
CP0 = OFF Disabled
CP1 = ON Enabled
CP1 = OFF Disabled
CPB = ON Enabled
CPB = OFF Disabled
CPD = ON Enabled
CPD = OFF Disabled
WRT0 = ON Enabled
WRT0 = OFF Disabled
WRT1 = ON Enabled
WRT1 = OFF Disabled
WRTB = ON Enabled
WRTB = OFF Disabled
WRTC = ON Enabled
WRTC = OFF Disabled
WRTD = ON Enabled
WRTD = OFF Disabled
EBTR0 = ON Enabled
EBTR0 = OFF Disabled
MPLAB® C18 C Compiler User’s Guide Addendum
DS51518A-page 28 2004 Microchip Technology Inc.
Table Read Protection Block 1:
Boot Block Table Read Protection:
PIC18F2420
Oscillator Selection:
Fail Safe Clock Monitor:
Internal External Osc. Switch Over:
Power Up Timer:
Brown Out Reset:
Brown Out Voltage:
EBTR1 = ON Enabled
EBTR1 = OFF Disabled
EBTRB = ON Enabled
EBTRB = OFF Disabled
OSC = LP LP
OSC = XT XT
OSC = HS HS
OSC = RC RC
OSC = EC EC-OSC2 as Clock Out
OSC = ECIO6 EC-OSC2 as RA6
OSC = HSPLL HS-PLL Enabled
OSC = RCIO6 RC-OSC2 as RA6
OSC = INTIO67 INTRC-OSC2 as RA6, OSC1 as
RA7
OSC = INTIO7 INTRC-OSC2 as Clock Out,
OSC1 as RA7
FCMEN = OFF Disabled
FCMEN = ON Enabled
IESO = OFF Disabled
IESO = ON Enabled
PWRT = ON Enabled
PWRT = OFF Disabled
BOREN = OFF Disabled
BOREN = ON Enabled
BOREN = NOSLP Enabled except SLEEP,
SBOREN Disabled
BOREN = SBORDIS Enabled, SBOREN Disabled
BORV = 45 4.5V
BORV = 42 4.2V
BORV = 27 2.7V
BORV = 25 2.5V
Configuration Settings
2004 Microchip Technology Inc. DS51518A-page 29
Watchdog Timer:
Watchdog Postscaler:
MCLR Enable:
Port B A/D Enable:
CCP2 Mux:
Stack Overflow Reset:
Low Voltage ICSP:
Enhanced CPU Enable:
Background Debugger Enable:
WDT = OFF Disabled
WDT = ON Enabled
WDTPS = 1 1:1
WDTPS = 2 1:2
WDTPS = 4 1:4
WDTPS = 8 1:8
WDTPS = 16 1:16
WDTPS = 32 1:32
WDTPS = 64 1:64
WDTPS = 128 1:128
WDTPS = 256 1:256
WDTPS = 512 1:512
WDTPS = 1024 1:1024
WDTPS = 2048 1:2048
WDTPS = 4096 1:4096
WDTPS = 8192 1:8192
WDTPS = 16384 1:16384
WDTPS = 32768 1:32768
MCLRE = OFF Disabled
MCLRE = ON Enabled
PBADEN = OFF Port B<4:0> digital on RESET
PBADEN = ON Port B<4:0> analog on RESET
CCP2MX = PORTBE Muxed with RB3
CCP2MX = PORTC Muxed with RC1
STVREN = OFF Disabled
STVREN = ON Enabled
LVP = OFF Disabled
LVP = ON Enabled
ENHCPU = OFF Disabled
ENHCPU = ON Enabled
DEBUG = ON Enabled
DEBUG = OFF Disabled
MPLAB® C18 C Compiler User’s Guide Addendum
DS51518A-page 30 2004 Microchip Technology Inc.
Code Protection Block 0:
Code Protection Block 1:
Boot Block Code Protection:
Data EEPROM Code Protection:
Write Protection Block 0:
Write Protection Block 1:
Boot Block Write Protection:
Configuration Register Write Protection:
Data EEPROM Write Protection:
Table Read Protection Block 0:
Table Read Protection Block 1:
Boot Block Table Read Protection:
CP0 = ON Enabled
CP0 = OFF Disabled
CP1 = ON Enabled
CP1 = OFF Disabled
CPB = ON Enabled
CPB = OFF Disabled
CPD = ON Enabled
CPD = OFF Disabled
WRT0 = ON Enabled
WRT0 = OFF Disabled
WRT1 = ON Enabled
WRT1 = OFF Disabled
WRTB = ON Enabled
WRTB = OFF Disabled
WRTC = ON Enabled
WRTC = OFF Disabled
WRTD = ON Enabled
WRTD = OFF Disabled
EBTR0 = ON Enabled
EBTR0 = OFF Disabled
EBTR1 = ON Enabled
EBTR1 = OFF Disabled
EBTRB = ON Enabled
EBTRB = OFF Disabled
Configuration Settings
2004 Microchip Technology Inc. DS51518A-page 31
PIC18F2431
Oscillator Selection:
Fail Safe Clock Monitor Enable:
Internal/External Switch-Over:
Power Up Timer:
Brown Out Reset:
Brown Out Voltage:
Watchdog Timer:
Watchdog Timer Enable Window:
OSC = LP LP
OSC = XT XT
OSC = HS HS
OSC = RC2 External RC, RA6 is CLKOUT
OSC = EC EC, RA6 is CLKOUT
OSC = ECIO EC, RA6 is I/O
OSC = HSPLL HS-PLL Enabled
OSC = RCIO External RC, RA6 is I/O
OSC = IRCIO Internal RC, RA6 & RA7 are I/O
OSC = IRC Internal RC, RA6 is CLKOUT,
RA7 is I/O
OSC = RC1 External RC, RA6 is CLKOUT
OSC = RC External RC, RA6 is CLKOUT
FCMEN = OFF Disabled
FCMEN = ON Enabled
IESO = OFF Disabled
IESO = ON Enabled
PWRTEN = ON Enabled
PWRTEN = OFF Disabled
BOREN = OFF Disabled
BOREN = ON Enabled
BORV = 45 4.5V
BORV = 42 4.2V
BORV = 27 2.7V
BORV = 20 2.0V
WDTEN = OFF Disabled
WDTEN = ON Enabled
WINEN = ON Enabled
WINEN = OFF Disabled
MPLAB® C18 C Compiler User’s Guide Addendum
DS51518A-page 32 2004 Microchip Technology Inc.
Watchdog Postscaler:
Timer1 Oscillator Mux:
High-Side Transistors Polarity:
Low-Side Transistors Polarity:
PWM output pins RESET state control:
MCLR Enable:
Stack Overflow Reset:
Low Voltage Programming:
Background Debugger Enable:
WDPS = 1 1:1
WDPS = 2 1:2
WDPS = 4 1:4
WDPS = 8 1:8
WDPS = 16 1:16
WDPS = 32 1:32
WDPS = 64 1:64
WDPS = 128 1:128
WDPS = 256 1:256
WDPS = 512 1:512
WDPS = 1024 1:1024
WDPS = 2048 1:2048
WDPS = 4096 1:4096
WDPS = 8192 1:8192
WDPS = 16384 1:16384
WDPS = 32768 1:32768
T1OSCMX = OFF Active
T1OSCMX = ON Inactive
HPOL = LOW Active low
HPOL = HIGH Active high
LPOL = LOW Active low
LPOL = HIGH Active high
PWMPIN = ON Enabled
PWMPIN = OFF Disabled
MCLRE = OFF Disabled
MCLRE = ON Enabled
STVREN = OFF Disabled
STVREN = ON Enabled
LVP = OFF Disabled
LVP = ON Enabled
DEBUG = ON Enabled
DEBUG = OFF Disabled
Configuration Settings
2004 Microchip Technology Inc. DS51518A-page 33
Code Protection Block 0:
Code Protection Block 1:
Code Protection Block 2:
Code Protection Block 3:
Boot Block Code Protection:
Data EEPROM Code Protection:
Write Protection Block 0:
Write Protection Block 1:
Write Protection Block 2:
Write Protection Block 3:
Boot Block Write Protection:
Configuration Register Write Protection:
Data EEPROM Write Protection:
CP0 = ON Enabled
CP0 = OFF Disabled
CP1 = ON Enabled
CP1 = OFF Disabled
CP2 = ON Enabled
CP2 = OFF Disabled
CP3 = ON Enabled
CP3 = OFF Disabled
CPB = ON Enabled
CPB = OFF Disabled
CPD = ON Enabled
CPD = OFF Disabled
WRT0 = ON Enabled
WRT0 = OFF Disabled
WRT1 = ON Enabled
WRT1 = OFF Disabled
WRT2 = ON Enabled
WRT2 = OFF Disabled
WRT3 = ON Enabled
WRT3 = OFF Disabled
WRTB = ON Enabled
WRTB = OFF Disabled
WRTC = ON Enabled
WRTC = OFF Disabled
WRTD = ON Enabled
WRTD = OFF Disabled
MPLAB® C18 C Compiler User’s Guide Addendum
DS51518A-page 34 2004 Microchip Technology Inc.
Table Read Protection Block 0:
Table Read Protection Block 1:
Table Read Protection Block 2:
Table Read Protection Block 3:
Boot Block Table Read Protection:
PIC18F2439
Oscillator Selection:
Power Up Timer:
Brown Out Reset:
Brown Out Voltage:
Watchdog Timer:
EBTR0 = ON Enabled
EBTR0 = OFF Disabled
EBTR1 = ON Enabled
EBTR1 = OFF Disabled
EBTR2 = ON Enabled
EBTR2 = OFF Disabled
EBTR3 = ON Enabled
EBTR3 = OFF Disabled
EBTRB = ON Enabled
EBTRB = OFF Disabled
OSC = LP LP
OSC = XT XT
OSC = HS HS
OSC = RC RC
OSC = EC EC-OSC2 as Clock Out
OSC = ECIO EC-OSC2 as RA6
OSC = HSPLL HS-PLL Enabled
OSC = RCIO RC-OSC2 as RA6
PWRT = ON Enabled
PWRT = OFF Disabled
BOR = OFF Disabled
BOR = ON Enabled
BORV = 45 4.5V
BORV = 42 4.2V
BORV = 27 2.7V
BORV = 25 2.5V
WDT = OFF Disabled
WDT = ON Enabled
Configuration Settings
2004 Microchip Technology Inc. DS51518A-page 35
Watchdog Postscaler:
Stack Overflow Reset:
Low Voltage ICSP:
Background Debugger Enable:
Code Protection Block 0:
Code Protection Block 1:
Boot Block Code Protection:
Data EEPROM Code Protection:
Write Protection Block 0:
Write Protection Block 1:
Boot Block Write Protection:
WDTPS = 1 1:1
WDTPS = 2 1:2
WDTPS = 4 1:4
WDTPS = 8 1:8
WDTPS = 16 1:16
WDTPS = 32 1:32
WDTPS = 64 1:64
WDTPS = 128 1:128
STVR = OFF Disabled
STVR = ON Enabled
LVP = OFF Disabled
LVP = ON Enabled
DEBUG = ON Enabled
DEBUG = OFF Disabled
CP0 = ON Enabled
CP0 = OFF Disabled
CP1 = ON Enabled
CP1 = OFF Disabled
CPB = ON Enabled
CPB = OFF Disabled
CPD = ON Enabled
CPD = OFF Disabled
WRT0 = ON Enabled
WRT0 = OFF Disabled
WRT1 = ON Enabled
WRT1 = OFF Disabled
WRTB = ON Enabled
WRTB = OFF Disabled
MPLAB® C18 C Compiler User’s Guide Addendum
DS51518A-page 36 2004 Microchip Technology Inc.
Configuration Register Write Protection:
Data EEPROM Write Protection:
Table Read Protection Block 0:
Table Read Protection Block 1:
Boot Block Table Read Protection:
PIC18F2455
96MHz PLL Prescaler:
CPU System Clock Postscaler:
Full-Speed USB Clock Source Selection:
WRTC = ON Enabled
WRTC = OFF Disabled
WRTD = ON Enabled
WRTD = OFF Disabled
EBTR0 = ON Enabled
EBTR0 = OFF Disabled
EBTR1 = ON Enabled
EBTR1 = OFF Disabled
EBTRB = ON Enabled
EBTRB = OFF Disabled
PLLDIV = 1 No devide (4MHz input)
PLLDIV = 2 Divide by 2 (8MHz input)
PLLDIV = 3 Divide by 3 (12MHz input)
PLLDIV = 4 Divide by 4 (16MHz input)
PLLDIV = 5 Divide by 5 (20MHz input)
PLLDIV = 6 Divide by 6 (24MHz input)
PLLDIV = 10 Divide by 10 (40MHz input)
PLLDIV = 12 Divide by 12 (48MHz input)
CPUDIV = OSC1_PLL2 [OSC1/OSC2 Src: /1][96MHz
PLL Src: /2]
CPUDIV = OSC2_PLL3 [OSC1/OSC2 Src: /2][96MHz
PLL Src: /3]
CPUDIV = OSC3_PLL4 [OSC1/OSC2 Src: /3][96MHz
PLL Src: /4]
CPUDIV = OSC4_PLL6 [OSC1/OSC2 Src: /4][96MHz
PLL Src: /6]
USBDIV = 1 Clock source from OSC1/OSC2
USBDIV = 2 Clock source from 96MHz PLL/2
Configuration Settings
2004 Microchip Technology Inc. DS51518A-page 37
Oscillator Selection bits:
Fail Safe Clock Monitor:
Internal/External Switch Over:
Power Up Timer:
Brown Out Reset:
Brown Out Voltage:
FOSC = XT_XT XT oscillator, XT used by USB
FOSC = XTPLL_XT XT oscillator, PLL enabled, XT
used by USB
FOSC = ECIO_EC External clock, port function on
RA6, EC used by USB
FOSC = EC_EC External clock, CLKOUT on
RA6, EC used by USB
FOSC = ECPLLIO_EC External clock, PLL enabled,
port function on RA6, EC used
by USB
FOSC = ECPLL_EC External clock, PLL enabled,
CLKOUT on RA6, EC used by
USB
FOSC = INTOSCIO_EC Internal oscillator, port function
on RA6, EC used by USB
FOSC = INTOSC_EC Internal oscillator, CLKOUT on
RA6, EC used by USB
FOSC = INTOSC_XT Internal oscillator, XT used by
USB
FOSC = INTOSC_HS Internal oscillator, HS used by
USB
FOSC = HS HS oscillator, HS used by USB
FOSC = HSPLL_HS HS oscillator, PLL enabled, HS
used by USB
FCMEM = OFF Disabled
FCMEM = ON Enabled
IESO = OFF Disabled
IESO = ON Enabled
PWRT = ON Enabled
PWRT = OFF Disabled
BOR = OFF Disabled
BOR = SOFT Controled by SBOREN
BOR = ON_ACTIVE Enabled when the device is not
in SLEEP, SBOREN bit is dis-
abled
BOR = ON Enabled, SBOREN bit is dis-
abled
BORV = 46 4.6V
BORV = 43 4.3V
BORV = 28 2.8V
BORV = 21 2.1V
MPLAB® C18 C Compiler User’s Guide Addendum
DS51518A-page 38 2004 Microchip Technology Inc.
USB Voltage Regulator Enable:
Watchdog Timer:
Watchdog Postscaler:
MCLR Enable:
Low Power Timer1 Oscillator Enable:
Port B A/D Enable:
CCP2 Mux bit:
Stack Overflow Reset:
VREGEN = OFF Disabled
VREGEN = ON Enabled
WDT = OFF HW Disabled - SW Controlled
WDT = ON HW Enabled - SW Disabled
WDTPS = 1 1:1
WDTPS = 2 1:2
WDTPS = 4 1:4
WDTPS = 8 1:8
WDTPS = 16 1:16
WDTPS = 32 1:32
WDTPS = 64 1:64
WDTPS = 128 1:128
WDTPS = 256 1:256
WDTPS = 512 1:512
WDTPS = 1024 1:1024
WDTPS = 2048 1:2048
WDTPS = 4096 1:4096
WDTPS = 8192 1:8192
WDTPS = 16384 1:16384
WDTPS = 32768 1:32768
MCLRE = OFF Disabled
MCLRE = ON Enabled
LPT1OSC = OFF Timer1 oscillator configured for
high power
LPT1OSC = ON Timer1 oscillator configured for
low power
PBADEN = OFF PortB<4:0> pins are configured
as digital I/O on RESET
PBADEN = ON PortB<4:0> pins are configured
as analog input on RESET
CCP2MX = OFF CCP2 input/output is multi-
plexed with RB3
CCP2MX = ON CCP2 input/output is multi-
plexed with RC1
STVREN = OFF Disabled
STVREN = ON Enabled
Configuration Settings
2004 Microchip Technology Inc. DS51518A-page 39
Low Voltage ICSP:
Dedicated In-Circuit Debug/Programming Enable:
Extended Instruction Set Enable:
Background Debugger Enable:
Code Protection Block 0:
Code Protection Block 1:
Code Protection Block 2:
Code Protection Block 3:
Boot Block Code Protection:
Data EEPROM Code Protection:
Write Protection Block 0:
Write Protection Block 1:
Write Protection Block 2:
LVP = OFF Disabled
LVP = ON Enabled
ICPRT = OFF Disabled
ICPRT = ON Enabled
XINST = OFF Disabled
XINST = ON Enabled
DEBUG = ON Enabled
DEBUG = OFF Disabled
CP0 = ON Enabled
CP0 = OFF Disabled
CP1 = ON Enabled
CP1 = OFF Disabled
CP2 = ON Enabled
CP2 = OFF Disabled
CP3 = ON Enabled
CP3 = OFF Disabled
CPB = ON Enabled
CPB = OFF Disabled
CPD = ON Enabled
CPD = OFF Disabled
WRT0 = ON Enabled
WRT0 = OFF Disabled
WRT1 = ON Enabled
WRT1 = OFF Disabled
WRT2 = ON Enabled
WRT2 = OFF Disabled
MPLAB® C18 C Compiler User’s Guide Addendum
DS51518A-page 40 2004 Microchip Technology Inc.
Write Protection Block 3:
Boot Block Write Protection:
Configuration Register Write Protection:
Data EEPROM Write Protection:
Table Read Protection Block 0:
Table Read Protection Block 1:
Table Read Protection Block 2:
Table Read Protection Block 3:
Boot Block Table Read Protection:
PIC18F248
Oscillator Selection:
Osc. Switch Enable:
WRT3 = ON Enabled
WRT3 = OFF Disabled
WRTB = ON Enabled
WRTB = OFF Disabled
WRTC = ON Enabled
WRTC = OFF Disabled
WRTD = ON Enabled
WRTD = OFF Disabled
EBTR0 = ON Enabled
EBTR0 = OFF Disabled
EBTR1 = ON Enabled
EBTR1 = OFF Disabled
EBTR2 = ON Enabled
EBTR2 = OFF Disabled
EBTR3 = ON Enabled
EBTR3 = OFF Disabled
EBTRB = ON Enabled
EBTRB = OFF Disabled
OSC = LP LP
OSC = XT XT
OSC = HS HS
OSC = RC RC
OSC = EC EC-OSC2 as Clock Out
OSC = ECIO EC-OSC2 as RA6
OSC = HSPLL HS-PLL Enabled
OSC = RCIO RC-OSC2 as RA6
OSCS = ON Enabled
OSCS = OFF Disabled
Configuration Settings
2004 Microchip Technology Inc. DS51518A-page 41
Power Up Timer:
Brown Out Reset:
Brown Out Voltage:
Watchdog Timer:
Watchdog Postscaler:
Stack Overflow Reset:
Low Voltage ICSP:
Background Debugger Enable:
Code Protection Block 0:
Code Protection Block 1:
Boot Block Code Protection:
PWRT = ON Enabled
PWRT = OFF Disabled
BOR = OFF Disabled
BOR = ON Enabled
BORV = 45 4.5V
BORV = 42 4.2V
BORV = 27 2.7V
BORV = 20 2.0V
WDT = OFF Disabled
WDT = ON Enabled
WDTPS = 1 1:1
WDTPS = 2 1:2
WDTPS = 4 1:4
WDTPS = 8 1:8
WDTPS = 16 1:16
WDTPS = 32 1:32
WDTPS = 64 1:64
WDTPS = 128 1:128
STVR = OFF Disabled
STVR = ON Enabled
LVP = OFF Disabled
LVP = ON Enabled
DEBUG = ON Enabled
DEBUG = OFF Disabled
CP0 = ON Enabled
CP0 = OFF Disabled
CP1 = ON Enabled
CP1 = OFF Disabled
CPB = ON Enabled
CPB = OFF Disabled
MPLAB® C18 C Compiler User’s Guide Addendum
DS51518A-page 42 2004 Microchip Technology Inc.
Data EEPROM Code Protection:
Write Protection Block 0:
Write Protection Block 1:
Boot Block Write Protection:
Configuration Register Write Protection:
Data EEPROM Write Protection:
Table Read Protection Block 0:
Table Read Protection Block 1:
Boot Block Table Read Protection:
CPD = ON Enabled
CPD = OFF Disabled
WRT0 = ON Enabled
WRT0 = OFF Disabled
WRT1 = ON Enabled
WRT1 = OFF Disabled
WRTB = ON Enabled
WRTB = OFF Disabled
WRTC = ON Enabled
WRTC = OFF Disabled
WRTD = ON Enabled
WRTD = OFF Disabled
EBTR0 = ON Enabled
EBTR0 = OFF Disabled
EBTR1 = ON Enabled
EBTR1 = OFF Disabled
EBTRB = ON Enabled
EBTRB = OFF Disabled
Configuration Settings
2004 Microchip Technology Inc. DS51518A-page 43
PIC18F2480
Oscillator Selection bits:
Fail Safe Clock Monitor:
Internal External Osc. Switch:
Power Up Timer:
Brown Out Reset:
Brown Out Voltage:
Watchdog Timer:
OSC = LP LP
OSC = XT XT
OSC = HS HS
OSC = RC External RC with OSC2 as
divide by 4 clock out
OSC = EC EC with OSC2 as divide by 4
clock out
OSC = ECIO EC with OSC2 as RA6
OSC = HSPLL HS with HW enabled 4xPLL
OSC = RCIO External RC with OSC2 as RA6
OSC = IRCIO67 Internal RC with OSC2 as RA6
and OSC1 as RA7
OSC = IRCIO7 Internal RC with OSC1 as RA7
and OSC2 as divide by 4 clock
out
OSC = ERC1 External RC with OSC2 as
divide by 4 clock out
OSC = ERC External RC with OSC2 as
divide by 4 clock out
FCMENB = OFF Disabled
FCMENB = ON Enabled
IESOB = OFF Disabled
IESOB = ON Enabled
PWRT = ON Enabled
PWRT = OFF Disabled
BOR = OFF Disabled
BOR = SBORENCTRL Controlled by SBOREN
BOR = BOACTIVE Enabled whenever Part is Active
- SBOREN Disabled
BOR = BOHW Enabled in HW, SBOREN dis-
abled
BORV = 45 4.5V
BORV = 42 4.2V
BORV = 27 2.7V
BORV = 20 2.0V
WDT = OFF HW Disabled - SW Controlled
WDT = ON HW Enabled - SW Disabled
MPLAB® C18 C Compiler User’s Guide Addendum
DS51518A-page 44 2004 Microchip Technology Inc.
Watchdog Postscaler:
MCLR Enable:
Low Power Timer1 Oscillator:
Port B Pins Configured for A/D:
BackGround Debug:
Extended Instruction Set CPU:
Boot Block Size:
Low Voltage Programming:
WDTPS = 1 1:1
WDTPS = 2 1:2
WDTPS = 4 1:4
WDTPS = 8 1:8
WDTPS = 16 1:16
WDTPS = 32 1:32
WDTPS = 64 1:64
WDTPS = 128 1:128
WDTPS = 256 1:256
WDTPS = 512 1:512
WDTPS = 1024 1:1024
WDTPS = 2048 1:2048
WDTPS = 4096 1:4096
WDTPS = 8192 1:8192
WDTPS = 16384 1:16384
WDTPS = 32768 1:32768
MCLRE = OFF Disabled
MCLRE = ON Enabled
LPT1OSC = OFF Timer1 Low Power Oscillator
disabled
LPT1OSC = ON Timer1 Low Power Oscillator
Active
PBADEN = OFF Port B<4> and Port B<1:0> Con-
figured as Digital I/O Pins on
Reset
PBADEN = ON Port B<4> and Port B<1:0> Con-
figured as Analog Pins on Reset
DEBUG = ON Enabled
DEBUG = OFF Disabled
XINST = OFF Disabled
XINST = ON Enabled
BBSIZ = 1024 1K words (2K bytes) Boot Block
BBSIZ = 2048 2K words (4K bytes) Boot Block
LVP = OFF Disabled
LVP = ON Enabled
Configuration Settings
2004 Microchip Technology Inc. DS51518A-page 45
Stack Overflow/Underflow Reset:
Code Protection Block 0:
Code Protection Block 1:
Boot Block Code Protection:
Data EEPROM Code Protection:
Write Protection Block 0:
Write Protection Block 1:
Boot Block Write Protection:
Configuration Register Write Protection:
Data EEPROM Write Protection:
Table Read Protection Block 0:
Table Read Protection Block 1:
Boot Block Table Read Protection:
STVREN = OFF Disabled
STVREN = ON Enabled
CP0 = ON Enabled
CP0 = OFF Disabled
CP1 = ON Enabled
CP1 = OFF Disabled
CPB = ON Enabled
CPB = OFF Disabled
CPD = ON Enabled
CPD = OFF Disabled
WRT0 = ON Enabled
WRT0 = OFF Disabled
WRT1 = ON Enabled
WRT1 = OFF Disabled
WRTB = ON Enabled
WRTB = OFF Disabled
WRTC = ON Enabled
WRTC = OFF Disabled
WRTD = ON Enabled
WRTD = OFF Disabled
EBTR0 = ON Enabled
EBTR0 = OFF Disabled
EBTR1 = ON Enabled
EBTR1 = OFF Disabled
EBTRB = ON Enabled
EBTRB = OFF Disabled
MPLAB® C18 C Compiler User’s Guide Addendum
DS51518A-page 46 2004 Microchip Technology Inc.
PIC18F2510
Oscillator Selection:
Fail Safe Clock Monitor:
Internal External Osc. Switch Over:
Power Up Timer:
Brown Out Reset:
Brown Out Voltage:
Watchdog Timer:
OSC = LP LP
OSC = XT XT
OSC = HS HS
OSC = RC RC
OSC = EC EC-OSC2 as Clock Out
OSC = ECIO6 EC-OSC2 as RA6
OSC = HSPLL HS-PLL Enabled
OSC = RCIO6 RC-OSC2 as RA6
OSC = INTIO67 INTRC-OSC2 as RA6, OSC1 as
RA7
OSC = INTIO7 INTRC-OSC2 as Clock Out,
OSC1 as RA7
FCMEN = OFF Disabled
FCMEN = ON Enabled
IESO = OFF Disabled
IESO = ON Enabled
PWRT = ON Enabled
PWRT = OFF Disabled
BOREN = OFF Disabled
BOREN = ON SBOREN Enabled
BOREN = NOSLP Enabled except SLEEP,
SBOREN Disabled
BOREN = SBORDIS Enabled, SBOREN Disabled
BORV = 46 4.6V
BORV = 43 4.3V
BORV = 28 2.8V
BORV = 21 2.1V
WDT = OFF Disabled
WDT = ON Enabled
Configuration Settings
2004 Microchip Technology Inc. DS51518A-page 47
Watchdog Postscaler:
MCLR Enable:
T1 Oscillator Enable:
Port B A/D Enable:
CCP2 Mux:
Stack Overflow Reset:
Low Voltage ICSP:
XINST Enable:
Background Debugger Enable:
WDTPS = 1 1:1
WDTPS = 2 1:2
WDTPS = 4 1:4
WDTPS = 8 1:8
WDTPS = 16 1:16
WDTPS = 32 1:32
WDTPS = 64 1:64
WDTPS = 128 1:128
WDTPS = 256 1:256
WDTPS = 512 1:512
WDTPS = 1024 1:1024
WDTPS = 2048 1:2048
WDTPS = 4096 1:4096
WDTPS = 8192 1:8192
WDTPS = 16384 1:16384
WDTPS = 32768 1:32768
MCLRE = OFF Disabled
MCLRE = ON Enabled
LPT1OSC = OFF Disabled
LPT1OSC = ON Enabled
PBADEN = OFF Port B<4:0> digital on RESET
PBADEN = ON Port B<4:0> analog on RESET
CCP2MX = PORTBE Muxed with RB3
CCP2MX = PORTC Muxed with RC1
STVREN = OFF Disabled
STVREN = ON Enabled
LVP = OFF Disabled
LVP = ON Enabled
XINST = OFF Disabled
XINST = ON Enabled
DEBUG = ON Enabled
DEBUG = OFF Disabled
MPLAB® C18 C Compiler User’s Guide Addendum
DS51518A-page 48 2004 Microchip Technology Inc.
Code Protection Block 0:
Code Protection Block 1:
Code Protection Block 2:
Code Protection Block 3:
Boot Block Code Protection:
Write Protection Block 0:
Write Protection Block 1:
Write Protection Block 2:
Write Protection Block 3:
Boot Block Write Protection:
Configuration Register Write Protection:
Table Read Protection Block 0:
Table Read Protection Block 1:
CP0 = ON Enabled
CP0 = OFF Disabled
CP1 = ON Enabled
CP1 = OFF Disabled
CP2 = ON Enabled
CP2 = OFF Disabled
CP3 = ON Enabled
CP3 = OFF Disabled
CPB = ON Enabled
CPB = OFF Disabled
WRT0 = ON Enabled
WRT0 = OFF Disabled
WRT1 = ON Enabled
WRT1 = OFF Disabled
WRT2 = ON Enabled
WRT2 = OFF Disabled
WRT3 = ON Enabled
WRT3 = OFF Disabled
WRTB = ON Enabled
WRTB = OFF Disabled
WRTC = ON Enabled
WRTC = OFF Disabled
EBTR0 = ON Enabled
EBTR0 = OFF Disabled
EBTR1 = ON Enabled
EBTR1 = OFF Disabled
Configuration Settings
2004 Microchip Technology Inc. DS51518A-page 49
Table Read Protection Block 2:
Table Read Protection Block 3:
Boot Block Table Read Protection:
PIC18F2515
Oscillator Selection:
Fail Safe Clock Monitor:
Internal External Osc. Switch Over:
Power Up Timer:
Brown Out Reset:
EBTR2 = ON Enabled
EBTR2 = OFF Disabled
EBTR3 = ON Enabled
EBTR3 = OFF Disabled
EBTRB = ON Enabled
EBTRB = OFF Disabled
OSC = LP LP
OSC = XT XT
OSC = HS HS
OSC = RC RC
OSC = EC EC-OSC2 as Clock Out
OSC = ECIO6 EC-OSC2 as RA6
OSC = HSPLL HS-PLL Enabled
OSC = RCIO6 RC-OSC2 as RA6
OSC = INTIO67 INTRC-OSC2 as RA6, OSC1 as
RA7
OSC = INTIO7 INTRC-OSC2 as Clock Out,
OSC1 as RA7
FCMEN = OFF Disabled
FCMEN = ON Enabled
IESO = OFF Disabled
IESO = ON Enabled
PWRT = ON Enabled
PWRT = OFF Disabled
BOREN = OFF Disabled
BOREN = ON Enabled
BOREN = NOSLP Enabled except SLEEP,
SBOREN Disabled
BOREN = SBORDIS Enabled, SBOREN Disabled
MPLAB® C18 C Compiler User’s Guide Addendum
DS51518A-page 50 2004 Microchip Technology Inc.
Brown Out Voltage:
Watchdog Timer:
Watchdog Postscaler:
MCLR Enable:
Port B A/D Enable:
CCP2 Mux:
Stack Overflow Reset:
Low Voltage ICSP:
Enhanced CPU Enable:
BORV = 45 4.5V
BORV = 42 4.2V
BORV = 27 2.7V
BORV = 25 2.5V
WDT = OFF Disabled
WDT = ON Enabled
WDTPS = 1 1:1
WDTPS = 2 1:2
WDTPS = 4 1:4
WDTPS = 8 1:8
WDTPS = 16 1:16
WDTPS = 32 1:32
WDTPS = 64 1:64
WDTPS = 128 1:128
WDTPS = 256 1:256
WDTPS = 512 1:512
WDTPS = 1024 1:1024
WDTPS = 2048 1:2048
WDTPS = 4096 1:4096
WDTPS = 8192 1:8192
WDTPS = 16384 1:16384
WDTPS = 32768 1:32768
MCLRE = OFF Disabled
MCLRE = ON Enabled
PBADEN = OFF Port B<4:0> digital on RESET
PBADEN = ON Port B<4:0> analog on RESET
CCP2MX = PORTBE Muxed with RB3
CCP2MX = PORTC Muxed with RC1
STVREN = OFF Disabled
STVREN = ON Enabled
LVP = OFF Disabled
LVP = ON Enabled
ENHCPU = OFF Disabled
ENHCPU = ON Enabled
Configuration Settings
2004 Microchip Technology Inc. DS51518A-page 51
Background Debugger Enable:
Code Protection Block 0:
Code Protection Block 1:
Code Protection Block 2:
Boot Block Code Protection:
Write Protection Block 0:
Write Protection Block 1:
Write Protection Block 2:
Boot Block Write Protection:
Configuration Register Write Protection:
Table Read Protection Block 0:
Table Read Protection Block 1:
Table Read Protection Block 2:
DEBUG = ON Enabled
DEBUG = OFF Disabled
CP0 = ON Enabled
CP0 = OFF Disabled
CP1 = ON Enabled
CP1 = OFF Disabled
CP2 = ON Enabled
CP2 = OFF Disabled
CPB = ON Enabled
CPB = OFF Disabled
WRT0 = ON Enabled
WRT0 = OFF Disabled
WRT1 = ON Enabled
WRT1 = OFF Disabled
WRT2 = ON Enabled
WRT2 = OFF Disabled
WRTB = ON Enabled
WRTB = OFF Disabled
WRTC = ON Enabled
WRTC = OFF Disabled
EBTR0 = ON Enabled
EBTR0 = OFF Disabled
EBTR1 = ON Enabled
EBTR1 = OFF Disabled
EBTR2 = ON Enabled
EBTR2 = OFF Disabled
MPLAB® C18 C Compiler User’s Guide Addendum
DS51518A-page 52 2004 Microchip Technology Inc.
Boot Block Table Read Protection:
PIC18F252
Oscillator Selection:
Osc. Switch Enable:
Power Up Timer:
Brown Out Reset:
Brown Out Voltage:
Watchdog Timer:
Watchdog Postscaler:
CCP2 Mux:
EBTRB = ON Enabled
EBTRB = OFF Disabled
OSC = LP LP
OSC = XT XT
OSC = HS HS
OSC = RC RC
OSC = EC EC-OSC2 as Clock Out
OSC = ECIO EC-OSC2 as RA6
OSC = HSPLL HS-PLL Enabled
OSC = RCIO RC-OSC2 as RA6
OSCS = ON Enabled
OSCS = OFF Disabled
PWRT = ON Enabled
PWRT = OFF Disabled
BOR = OFF Disabled
BOR = ON Enabled
BORV = 45 4.5V
BORV = 42 4.2V
BORV = 27 2.7V
BORV = 25 2.5V
WDT = OFF Disabled
WDT = ON Enabled
WDTPS = 1 1:1
WDTPS = 2 1:2
WDTPS = 4 1:4
WDTPS = 8 1:8
WDTPS = 16 1:16
WDTPS = 32 1:32
WDTPS = 64 1:64
WDTPS = 128 1:128
CCP2MUX = OFF Disable (RB3)
CCP2MUX = ON Enable (RC1)
Configuration Settings
2004 Microchip Technology Inc. DS51518A-page 53
Stack Overflow Reset:
Low Voltage ICSP:
Background Debugger Enable:
Code Protection Block 0:
Code Protection Block 1:
Code Protection Block 2:
Code Protection Block 3:
Boot Block Code Protection:
Data EEPROM Code Protection:
Write Protection Block 0:
Write Protection Block 1:
Write Protection Block 2:
Write Protection Block 3:
STVR = OFF Disabled
STVR = ON Enabled
LVP = OFF Disabled
LVP = ON Enabled
DEBUG = ON Enabled
DEBUG = OFF Disabled
CP0 = ON Enabled
CP0 = OFF Disabled
CP1 = ON Enabled
CP1 = OFF Disabled
CP2 = ON Enabled
CP2 = OFF Disabled
CP3 = ON Enabled
CP3 = OFF Disabled
CPB = ON Enabled
CPB = OFF Disabled
CPD = ON Enabled
CPD = OFF Disabled
WRT0 = ON Enabled
WRT0 = OFF Disabled
WRT1 = ON Enabled
WRT1 = OFF Disabled
WRT2 = ON Enabled
WRT2 = OFF Disabled
WRT3 = ON Enabled
WRT3 = OFF Disabled
MPLAB® C18 C Compiler User’s Guide Addendum
DS51518A-page 54 2004 Microchip Technology Inc.
Boot Block Write Protection:
Configuration Register Write Protection:
Data EEPROM Write Protection:
Table Read Protection Block 0:
Table Read Protection Block 1:
Table Read Protection Block 2:
Table Read Protection Block 3:
Boot Block Table Read Protection:
PIC18F2520
Oscillator Selection:
Fail Safe Clock Monitor:
WRTB = ON Enabled
WRTB = OFF Disabled
WRTC = ON Enabled
WRTC = OFF Disabled
WRTD = ON Enabled
WRTD = OFF Disabled
EBTR0 = ON Enabled
EBTR0 = OFF Disabled
EBTR1 = ON Enabled
EBTR1 = OFF Disabled
EBTR2 = ON Enabled
EBTR2 = OFF Disabled
EBTR3 = ON Enabled
EBTR3 = OFF Disabled
EBTRB = ON Enabled
EBTRB = OFF Disabled
OSC = LP LP
OSC = XT XT
OSC = HS HS
OSC = RC RC
OSC = EC EC-OSC2 as Clock Out
OSC = ECIO6 EC-OSC2 as RA6
OSC = HSPLL HS-PLL Enabled
OSC = RCIO6 RC-OSC2 as RA6
OSC = INTIO67 INTRC-OSC2 as RA6, OSC1 as
RA7
OSC = INTIO7 INTRC-OSC2 as Clock Out,
OSC1 as RA7
FCMEN = OFF Disabled
FCMEN = ON Enabled
Configuration Settings
2004 Microchip Technology Inc. DS51518A-page 55
Internal External Osc. Switch Over:
Power Up Timer:
Brown Out Reset:
Brown Out Voltage:
Watchdog Timer:
Watchdog Postscaler:
MCLR Enable:
T1 Oscillator Enable:
IESO = OFF Disabled
IESO = ON Enabled
PWRT = ON Enabled
PWRT = OFF Disabled
BOREN = OFF Disabled
BOREN = ON SBOREN Enabled
BOREN = NOSLP Enabled except SLEEP,
SBOREN Disabled
BOREN = SBORDIS Enabled, SBOREN Disabled
BORV = 46 4.6V
BORV = 43 4.3V
BORV = 28 2.8V
BORV = 21 2.1V
WDT = OFF Disabled
WDT = ON Enabled
WDTPS = 1 1:1
WDTPS = 2 1:2
WDTPS = 4 1:4
WDTPS = 8 1:8
WDTPS = 16 1:16
WDTPS = 32 1:32
WDTPS = 64 1:64
WDTPS = 128 1:128
WDTPS = 256 1:256
WDTPS = 512 1:512
WDTPS = 1024 1:1024
WDTPS = 2048 1:2048
WDTPS = 4096 1:4096
WDTPS = 8192 1:8192
WDTPS = 16384 1:16384
WDTPS = 32768 1:32768
MCLRE = OFF Disabled
MCLRE = ON Enabled
LPT1OSC = OFF Disabled
LPT1OSC = ON Enabled
MPLAB® C18 C Compiler User’s Guide Addendum
DS51518A-page 56 2004 Microchip Technology Inc.
Port B A/D Enable:
CCP2 Mux:
Stack Overflow Reset:
Low Voltage ICSP:
XINST Enable:
Background Debugger Enable:
Code Protection Block 0:
Code Protection Block 1:
Code Protection Block 2:
Code Protection Block 3:
Boot Block Code Protection:
Data EEPROM Code Protection:
Write Protection Block 0:
PBADEN = OFF Port B<4:0> digital on RESET
PBADEN = ON Port B<4:0> analog on RESET
CCP2MX = PORTBE Muxed with RB3
CCP2MX = PORTC Muxed with RC1
STVREN = OFF Disabled
STVREN = ON Enabled
LVP = OFF Disabled
LVP = ON Enabled
XINST = OFF Disabled
XINST = ON Enabled
DEBUG = ON Enabled
DEBUG = OFF Disabled
CP0 = ON Enabled
CP0 = OFF Disabled
CP1 = ON Enabled
CP1 = OFF Disabled
CP2 = ON Enabled
CP2 = OFF Disabled
CP3 = ON Enabled
CP3 = OFF Disabled
CPB = ON Enabled
CPB = OFF Disabled
CPD = ON Enabled
CPD = OFF Disabled
WRT0 = ON Enabled
WRT0 = OFF Disabled
Configuration Settings
2004 Microchip Technology Inc. DS51518A-page 57
Write Protection Block 1:
Write Protection Block 2:
Write Protection Block 3:
Boot Block Write Protection:
Configuration Register Write Protection:
Data EEPROM Write Protection:
Table Read Protection Block 0:
Table Read Protection Block 1:
Table Read Protection Block 2:
Table Read Protection Block 3:
Boot Block Table Read Protection:
WRT1 = ON Enabled
WRT1 = OFF Disabled
WRT2 = ON Enabled
WRT2 = OFF Disabled
WRT3 = ON Enabled
WRT3 = OFF Disabled
WRTB = ON Enabled
WRTB = OFF Disabled
WRTC = ON Enabled
WRTC = OFF Disabled
WRTD = ON Enabled
WRTD = OFF Disabled
EBTR0 = ON Enabled
EBTR0 = OFF Disabled
EBTR1 = ON Enabled
EBTR1 = OFF Disabled
EBTR2 = ON Enabled
EBTR2 = OFF Disabled
EBTR3 = ON Enabled
EBTR3 = OFF Disabled
EBTRB = ON Enabled
EBTRB = OFF Disabled
MPLAB® C18 C Compiler User’s Guide Addendum
DS51518A-page 58 2004 Microchip Technology Inc.
PIC18F2525
Oscillator Selection:
Fail Safe Clock Monitor:
Internal External Osc. Switch Over:
Power Up Timer:
Brown Out Reset:
Brown Out Voltage:
Watchdog Timer:
OSC = LP LP
OSC = XT XT
OSC = HS HS
OSC = RC RC
OSC = EC EC-OSC2 as Clock Out
OSC = ECIO6 EC-OSC2 as RA6
OSC = HSPLL HS-PLL Enabled
OSC = RCIO6 RC-OSC2 as RA6
OSC = INTIO67 INTRC-OSC2 as RA6, OSC1 as
RA7
OSC = INTIO7 INTRC-OSC2 as Clock Out,
OSC1 as RA7
FCMEN = OFF Disabled
FCMEN = ON Enabled
IESO = OFF Disabled
IESO = ON Enabled
PWRT = ON Enabled
PWRT = OFF Disabled
BOREN = OFF Disabled
BOREN = ON Enabled
BOREN = NOSLP Enabled except SLEEP,
SBOREN Disabled
BOREN = SBORDIS Enabled, SBOREN Disabled
BORV = 45 4.5V
BORV = 42 4.2V
BORV = 27 2.7V
BORV = 25 2.5V
WDT = OFF Disabled
WDT = ON Enabled
Configuration Settings
2004 Microchip Technology Inc. DS51518A-page 59
Watchdog Postscaler:
MCLR Enable:
Port B A/D Enable:
CCP2 Mux:
Stack Overflow Reset:
Low Voltage ICSP:
Enhanced CPU Enable:
Background Debugger Enable:
Code Protection Block 0:
WDTPS = 1 1:1
WDTPS = 2 1:2
WDTPS = 4 1:4
WDTPS = 8 1:8
WDTPS = 16 1:16
WDTPS = 32 1:32
WDTPS = 64 1:64
WDTPS = 128 1:128
WDTPS = 256 1:256
WDTPS = 512 1:512
WDTPS = 1024 1:1024
WDTPS = 2048 1:2048
WDTPS = 4096 1:4096
WDTPS = 8192 1:8192
WDTPS = 16384 1:16384
WDTPS = 32768 1:32768
MCLRE = OFF Disabled
MCLRE = ON Enabled
PBADEN = OFF Port B<4:0> digital on RESET
PBADEN = ON Port B<4:0> analog on RESET
CCP2MX = PORTBE Muxed with RB3
CCP2MX = PORTC Muxed with RC1
STVREN = OFF Disabled
STVREN = ON Enabled
LVP = OFF Disabled
LVP = ON Enabled
ENHCPU = OFF Disabled
ENHCPU = ON Enabled
DEBUG = ON Enabled
DEBUG = OFF Disabled
CP0 = ON Enabled
CP0 = OFF Disabled
MPLAB® C18 C Compiler User’s Guide Addendum
DS51518A-page 60 2004 Microchip Technology Inc.
Code Protection Block 1:
Code Protection Block 2:
Boot Block Code Protection:
Data EEPROM Code Protection:
Write Protection Block 0:
Write Protection Block 1:
Write Protection Block 2:
Boot Block Write Protection:
Configuration Register Write Protection:
Data EEPROM Write Protection:
Table Read Protection Block 0:
Table Read Protection Block 1:
Table Read Protection Block 2:
CP1 = ON Enabled
CP1 = OFF Disabled
CP2 = ON Enabled
CP2 = OFF Disabled
CPB = ON Enabled
CPB = OFF Disabled
CPD = ON Enabled
CPD = OFF Disabled
WRT0 = ON Enabled
WRT0 = OFF Disabled
WRT1 = ON Enabled
WRT1 = OFF Disabled
WRT2 = ON Enabled
WRT2 = OFF Disabled
WRTB = ON Enabled
WRTB = OFF Disabled
WRTC = ON Enabled
WRTC = OFF Disabled
WRTD = ON Enabled
WRTD = OFF Disabled
EBTR0 = ON Enabled
EBTR0 = OFF Disabled
EBTR1 = ON Enabled
EBTR1 = OFF Disabled
EBTR2 = ON Enabled
EBTR2 = OFF Disabled
Configuration Settings
2004 Microchip Technology Inc. DS51518A-page 61
Boot Block Table Read Protection:
PIC18F2539
Oscillator Selection:
Power Up Timer:
Brown Out Reset:
Brown Out Voltage:
Watchdog Timer:
Watchdog Postscaler:
Stack Overflow Reset:
Low Voltage ICSP:
EBTRB = ON Enabled
EBTRB = OFF Disabled
OSC = LP LP
OSC = XT XT
OSC = HS HS
OSC = RC RC
OSC = EC EC-OSC2 as Clock Out
OSC = ECIO EC-OSC2 as RA6
OSC = HSPLL HS-PLL Enabled
OSC = RCIO RC-OSC2 as RA6
PWRT = ON Enabled
PWRT = OFF Disabled
BOR = OFF Disabled
BOR = ON Enabled
BORV = 45 4.5V
BORV = 42 4.2V
BORV = 27 2.7V
BORV = 25 2.5V
WDT = OFF Disabled
WDT = ON Enabled
WDTPS = 1 1:1
WDTPS = 2 1:2
WDTPS = 4 1:4
WDTPS = 8 1:8
WDTPS = 16 1:16
WDTPS = 32 1:32
WDTPS = 64 1:64
WDTPS = 128 1:128
STVR = OFF Disabled
STVR = ON Enabled
LVP = OFF Disabled
LVP = ON Enabled
MPLAB® C18 C Compiler User’s Guide Addendum
DS51518A-page 62 2004 Microchip Technology Inc.
Background Debugger Enable:
Code Protection Block 0:
Code Protection Block 1:
Code Protection Block 2:
Boot Block Code Protection:
Data EEPROM Code Protection:
Write Protection Block 0:
Write Protection Block 1:
Write Protection Block 2:
Boot Block Write Protection:
Configuration Register Write Protection:
Data EEPROM Write Protection:
Table Read Protection Block 0:
DEBUG = ON Enabled
DEBUG = OFF Disabled
CP0 = ON Enabled
CP0 = OFF Disabled
CP1 = ON Enabled
CP1 = OFF Disabled
CP2 = ON Enabled
CP2 = OFF Disabled
CPB = ON Enabled
CPB = OFF Disabled
CPD = ON Enabled
CPD = OFF Disabled
WRT0 = ON Enabled
WRT0 = OFF Disabled
WRT1 = ON Enabled
WRT1 = OFF Disabled
WRT2 = ON Enabled
WRT2 = OFF Disabled
WRTB = ON Enabled
WRTB = OFF Disabled
WRTC = ON Enabled
WRTC = OFF Disabled
WRTD = ON Enabled
WRTD = OFF Disabled
EBTR0 = ON Enabled
EBTR0 = OFF Disabled
Configuration Settings
2004 Microchip Technology Inc. DS51518A-page 63
Table Read Protection Block 1:
Table Read Protection Block 2:
Boot Block Table Read Protection:
PIC18F2550
96MHz PLL Prescaler:
CPU System Clock Postscaler:
Full-Speed USB Clock Source Selection:
EBTR1 = ON Enabled
EBTR1 = OFF Disabled
EBTR2 = ON Enabled
EBTR2 = OFF Disabled
EBTRB = ON Enabled
EBTRB = OFF Disabled
PLLDIV = 1 No devide (4MHz input)
PLLDIV = 2 Divide by 2 (8MHz input)
PLLDIV = 3 Divide by 3 (12MHz input)
PLLDIV = 4 Divide by 4 (16MHz input)
PLLDIV = 5 Divide by 5 (20MHz input)
PLLDIV = 6 Divide by 6 (24MHz input)
PLLDIV = 10 Divide by 10 (40MHz input)
PLLDIV = 12 Divide by 12 (48MHz input)
CPUDIV = OSC1_PLL2 [OSC1/OSC2 Src: /1][96MHz
PLL Src: /2]
CPUDIV = OSC2_PLL3 [OSC1/OSC2 Src: /2][96MHz
PLL Src: /3]
CPUDIV = OSC3_PLL4 [OSC1/OSC2 Src: /3][96MHz
PLL Src: /4]
CPUDIV = OSC4_PLL6 [OSC1/OSC2 Src: /4][96MHz
PLL Src: /6]
USBDIV = 1 Clock source from OSC1/OSC2
USBDIV = 2 Clock source from 96MHz PLL/2
MPLAB® C18 C Compiler User’s Guide Addendum
DS51518A-page 64 2004 Microchip Technology Inc.
Oscillator Selection bits:
Fail Safe Clock Monitor:
Internal/External Switch Over:
Power Up Timer:
Brown Out Reset:
Brown Out Voltage:
FOSC = XT_XT XT oscillator, XT used by USB
FOSC = XTPLL_XT XT oscillator, PLL enabled, XT
used by USB
FOSC = ECIO_EC External clock, port function on
RA6, EC used by USB
FOSC = EC_EC External clock, CLKOUT on
RA6, EC used by USB
FOSC = ECPLLIO_EC External clock, PLL enabled,
port function on RA6, EC used
by USB
FOSC = ECPLL_EC External clock, PLL enabled,
CLKOUT on RA6, EC used by
USB
FOSC = INTOSCIO_EC Internal oscillator, port function
on RA6, EC used by USB
FOSC = INTOSC_EC Internal oscillator, CLKOUT on
RA6, EC used by USB
FOSC = INTOSC_XT Internal oscillator, XT used by
USB
FOSC = INTOSC_HS Internal oscillator, HS used by
USB
FOSC = HS HS oscillator, HS used by USB
FOSC = HSPLL_HS HS oscillator, PLL enabled, HS
used by USB
FCMEM = OFF Disabled
FCMEM = ON Enabled
IESO = OFF Disabled
IESO = ON Enabled
PWRT = ON Enabled
PWRT = OFF Disabled
BOR = OFF Disabled
BOR = SOFT Controled by SBOREN
BOR = ON_ACTIVE Enabled when the device is not
in SLEEP, SBOREN bit is dis-
abled
BOR = ON Enabled, SBOREN bit is dis-
abled
BORV = 46 4.6V
BORV = 43 4.3V
BORV = 28 2.8V
BORV = 21 2.1V
Configuration Settings
2004 Microchip Technology Inc. DS51518A-page 65
USB Voltage Regulator Enable:
Watchdog Timer:
Watchdog Postscaler:
MCLR Enable:
Low Power Timer1 Oscillator Enable:
Port B A/D Enable:
CCP2 Mux bit:
Stack Overflow Reset:
VREGEN = OFF Disabled
VREGEN = ON Enabled
WDT = OFF HW Disabled - SW Controlled
WDT = ON HW Enabled - SW Disabled
WDTPS = 1 1:1
WDTPS = 2 1:2
WDTPS = 4 1:4
WDTPS = 8 1:8
WDTPS = 16 1:16
WDTPS = 32 1:32
WDTPS = 64 1:64
WDTPS = 128 1:128
WDTPS = 256 1:256
WDTPS = 512 1:512
WDTPS = 1024 1:1024
WDTPS = 2048 1:2048
WDTPS = 4096 1:4096
WDTPS = 8192 1:8192
WDTPS = 16384 1:16384
WDTPS = 32768 1:32768
MCLRE = OFF Disabled
MCLRE = ON Enabled
LPT1OSC = OFF Timer1 oscillator configured for
high power
LPT1OSC = ON Timer1 oscillator configured for
low power
PBADEN = OFF PortB<4:0> pins are configured
as digital I/O on RESET
PBADEN = ON PortB<4:0> pins are configured
as analog input on RESET
CCP2MX = OFF CCP2 input/output is multi-
plexed with RB3
CCP2MX = ON CCP2 input/output is multi-
plexed with RC1
STVREN = OFF Disabled
STVREN = ON Enabled
MPLAB® C18 C Compiler User’s Guide Addendum
DS51518A-page 66 2004 Microchip Technology Inc.
Low Voltage ICSP:
Dedicated In-Circuit Debug/Programming Enable:
Extended Instruction Set Enable:
Background Debugger Enable:
Code Protection Block 0:
Code Protection Block 1:
Code Protection Block 2:
Code Protection Block 3:
Boot Block Code Protection:
Data EEPROM Code Protection:
Write Protection Block 0:
Write Protection Block 1:
Write Protection Block 2:
LVP = OFF Disabled
LVP = ON Enabled
ICPRT = OFF Disabled
ICPRT = ON Enabled
XINST = OFF Disabled
XINST = ON Enabled
DEBUG = ON Enabled
DEBUG = OFF Disabled
CP0 = ON Enabled
CP0 = OFF Disabled
CP1 = ON Enabled
CP1 = OFF Disabled
CP2 = ON Enabled
CP2 = OFF Disabled
CP3 = ON Enabled
CP3 = OFF Disabled
CPB = ON Enabled
CPB = OFF Disabled
CPD = ON Enabled
CPD = OFF Disabled
WRT0 = ON Enabled
WRT0 = OFF Disabled
WRT1 = ON Enabled
WRT1 = OFF Disabled
WRT2 = ON Enabled
WRT2 = OFF Disabled
Configuration Settings
2004 Microchip Technology Inc. DS51518A-page 67
Write Protection Block 3:
Boot Block Write Protection:
Configuration Register Write Protection:
Data EEPROM Write Protection:
Table Read Protection Block 0:
Table Read Protection Block 1:
Table Read Protection Block 2:
Table Read Protection Block 3:
Boot Block Table Read Protection:
PIC18F258
Oscillator Selection:
Osc. Switch Enable:
WRT3 = ON Enabled
WRT3 = OFF Disabled
WRTB = ON Enabled
WRTB = OFF Disabled
WRTC = ON Enabled
WRTC = OFF Disabled
WRTD = ON Enabled
WRTD = OFF Disabled
EBTR0 = ON Enabled
EBTR0 = OFF Disabled
EBTR1 = ON Enabled
EBTR1 = OFF Disabled
EBTR2 = ON Enabled
EBTR2 = OFF Disabled
EBTR3 = ON Enabled
EBTR3 = OFF Disabled
EBTRB = ON Enabled
EBTRB = OFF Disabled
OSC = LP LP
OSC = XT XT
OSC = HS HS
OSC = RC RC
OSC = EC EC-OSC2 as Clock Out
OSC = ECIO EC-OSC2 as RA6
OSC = HSPLL HS-PLL Enabled
OSC = RCIO RC-OSC2 as RA6
OSCS = ON Enabled
OSCS = OFF Disabled
MPLAB® C18 C Compiler User’s Guide Addendum
DS51518A-page 68 2004 Microchip Technology Inc.
Power Up Timer:
Brown Out Reset:
Brown Out Voltage:
Watchdog Timer:
Watchdog Postscaler:
Stack Overflow Reset:
Low Voltage ICSP:
Background Debugger Enable:
Code Protection Block 0:
Code Protection Block 1:
Code Protection Block 2:
PWRT = ON Enabled
PWRT = OFF Disabled
BOR = OFF Disabled
BOR = ON Enabled
BORV = 45 4.5V
BORV = 42 4.2V
BORV = 27 2.7V
BORV = 20 2.0V
WDT = OFF Disabled
WDT = ON Enabled
WDTPS = 1 1:1
WDTPS = 2 1:2
WDTPS = 4 1:4
WDTPS = 8 1:8
WDTPS = 16 1:16
WDTPS = 32 1:32
WDTPS = 64 1:64
WDTPS = 128 1:128
STVR = OFF Disabled
STVR = ON Enabled
LVP = OFF Disabled
LVP = ON Enabled
DEBUG = ON Enabled
DEBUG = OFF Disabled
CP0 = ON Enabled
CP0 = OFF Disabled
CP1 = ON Enabled
CP1 = OFF Disabled
CP2 = ON Enabled
CP2 = OFF Disabled
Configuration Settings
2004 Microchip Technology Inc. DS51518A-page 69
Code Protection Block 3:
Boot Block Code Protection:
Data EEPROM Code Protection:
Write Protection Block 0:
Write Protection Block 1:
Write Protection Block 2:
Write Protection Block 3:
Boot Block Write Protection:
Configuration Register Write Protection:
Data EEPROM Write Protection:
Table Read Protection Block 0:
Table Read Protection Block 1:
Table Read Protection Block 2:
CP3 = ON Enabled
CP3 = OFF Disabled
CPB = ON Enabled
CPB = OFF Disabled
CPD = ON Enabled
CPD = OFF Disabled
WRT0 = ON Enabled
WRT0 = OFF Disabled
WRT1 = ON Enabled
WRT1 = OFF Disabled
WRT2 = ON Enabled
WRT2 = OFF Disabled
WRT3 = ON Enabled
WRT3 = OFF Disabled
WRTB = ON Enabled
WRTB = OFF Disabled
WRTC = ON Enabled
WRTC = OFF Disabled
WRTD = ON Enabled
WRTD = OFF Disabled
EBTR0 = ON Enabled
EBTR0 = OFF Disabled
EBTR1 = ON Enabled
EBTR1 = OFF Disabled
EBTR2 = ON Enabled
EBTR2 = OFF Disabled
MPLAB® C18 C Compiler User’s Guide Addendum
DS51518A-page 70 2004 Microchip Technology Inc.
Table Read Protection Block 3:
Boot Block Table Read Protection:
PIC18F2580
Oscillator Selection bits:
Fail Safe Clock Monitor:
Internal External Osc. Switch:
Power Up Timer:
Brown Out Reset:
EBTR3 = ON Enabled
EBTR3 = OFF Disabled
EBTRB = ON Enabled
EBTRB = OFF Disabled
OSC = LP LP
OSC = XT XT
OSC = HS HS
OSC = RC External RC with OSC2 as
divide by 4 clock out
OSC = EC EC with OSC2 as divide by 4
clock out
OSC = ECIO EC with OSC2 as RA6
OSC = HSPLL HS with HW enabled 4xPLL
OSC = RCIO External RC with OSC2 as RA6
OSC = IRCIO67 Internal RC with OSC2 as RA6
and OSC1 as RA7
OSC = IRCIO7 Internal RC with OSC1 as RA7
and OSC2 as divide by 4 clock
out
OSC = ERC1 External RC with OSC2 as
divide by 4 clock out
OSC = ERC External RC with OSC2 as
divide by 4 clock out
FCMENB = OFF Disabled
FCMENB = ON Enabled
IESOB = OFF Disabled
IESOB = ON Enabled
PWRT = ON Enabled
PWRT = OFF Disabled
BOR = OFF Disabled
BOR = SBORENCTRL Controlled by SBOREN
BOR = BOACTIVE Enabled whenever Part is Active
- SBOREN Disabled
BOR = BOHW Enabled in HW, SBOREN dis-
abled
Configuration Settings
2004 Microchip Technology Inc. DS51518A-page 71
Brown Out Voltage:
Watchdog Timer:
Watchdog Postscaler:
MCLR Enable:
Low Power Timer1 Oscillator:
Port B Pins Configured for A/D:
BackGround Debug:
BORV = 45 4.5V
BORV = 42 4.2V
BORV = 27 2.7V
BORV = 20 2.0V
WDT = OFF HW Disabled - SW Controlled
WDT = ON HW Enabled - SW Disabled
WDTPS = 1 1:1
WDTPS = 2 1:2
WDTPS = 4 1:4
WDTPS = 8 1:8
WDTPS = 16 1:16
WDTPS = 32 1:32
WDTPS = 64 1:64
WDTPS = 128 1:128
WDTPS = 256 1:256
WDTPS = 512 1:512
WDTPS = 1024 1:1024
WDTPS = 2048 1:2048
WDTPS = 4096 1:4096
WDTPS = 8192 1:8192
WDTPS = 16384 1:16384
WDTPS = 32768 1:32768
MCLRE = OFF Disabled
MCLRE = ON Enabled
LPT1OSC = OFF Timer1 Low Power Oscillator
disabled
LPT1OSC = ON Timer1 Low Power Oscillator
Active
PBADEN = OFF Port B<4> and Port B<1:0> Con-
figured as Digital I/O Pins on
Reset
PBADEN = ON Port B<4> and Port B<1:0> Con-
figured as Analog Pins on Reset
DEBUG = ON Enabled
DEBUG = OFF Disabled
MPLAB® C18 C Compiler User’s Guide Addendum
DS51518A-page 72 2004 Microchip Technology Inc.
Extended Instruction Set CPU:
Boot Block Size:
Low Voltage Programming:
Stack Overflow/Underflow Reset:
Code Protection Block 0:
Code Protection Block 1:
Code Protection Block 2:
Code Protection Block 3:
Boot Block Code Protection:
Data EEPROM Code Protection:
Write Protection Block 0:
Write Protection Block 1:
Write Protection Block 2:
XINST = OFF Disabled
XINST = ON Enabled
BBSIZ = 1024 1K words (2K bytes) Boot Block
BBSIZ = 2048 2K words (4K bytes) Boot Block
LVP = OFF Disabled
LVP = ON Enabled
STVREN = OFF Disabled
STVREN = ON Enabled
CP0 = ON Enabled
CP0 = OFF Disabled
CP1 = ON Enabled
CP1 = OFF Disabled
CP2 = ON Enabled
CP2 = OFF Disabled
CP3 = ON Enabled
CP3 = OFF Disabled
CPB = ON Enabled
CPB = OFF Disabled
CPD = ON Enabled
CPD = OFF Disabled
WRT0 = ON Enabled
WRT0 = OFF Disabled
WRT1 = ON Enabled
WRT1 = OFF Disabled
WRT2 = ON Enabled
WRT2 = OFF Disabled
Configuration Settings
2004 Microchip Technology Inc. DS51518A-page 73
Write Protection Block 3:
Boot Block Write Protection:
Configuration Register Write Protection:
Data EEPROM Write Protection:
Table Read Protection Block 0:
Table Read Protection Block 1:
Table Read Protection Block 2:
Table Read Protection Block 3:
Boot Block Table Read Protection:
WRT3 = ON Enabled
WRT3 = OFF Disabled
WRTB = ON Enabled
WRTB = OFF Disabled
WRTC = ON Enabled
WRTC = OFF Disabled
WRTD = ON Enabled
WRTD = OFF Disabled
EBTR0 = ON Enabled
EBTR0 = OFF Disabled
EBTR1 = ON Enabled
EBTR1 = OFF Disabled
EBTR2 = ON Enabled
EBTR2 = OFF Disabled
EBTR3 = ON Enabled
EBTR3 = OFF Disabled
EBTRB = ON Enabled
EBTRB = OFF Disabled
MPLAB® C18 C Compiler User’s Guide Addendum
DS51518A-page 74 2004 Microchip Technology Inc.
PIC18F2585
Oscillator Selection bits:
Fail Safe Clock Monitor:
Internal External Osc. Switch:
Power Up Timer:
Brown Out Reset:
Brown Out Voltage:
Watchdog Timer:
OSC = LP LP
OSC = XT XT
OSC = HS HS
OSC = RC External RC with OSC2 as
divide by 4 clock out
OSC = EC EC with OSC2 as divide by 4
clock out
OSC = ECIO EC with OSC2 as RA6
OSC = HSPLL HS with HW enabled 4xPLL
OSC = RCIO External RC with OSC2 as RA6
OSC = IRCIO67 Internal RC with OSC2 as RA6
and OSC1 as RA7
OSC = IRCIO7 Internal RC with OSC1 as RA7
and OSC2 as divide by 4 clock
out
OSC = ERC1 External RC with OSC2 as
divide by 4 clock out
OSC = ERC External RC with OSC2 as
divide by 4 clock out
FCMENB = OFF Disabled
FCMENB = ON Enabled
IESOB = OFF Disabled
IESOB = ON Enabled
PWRT = ON Enabled
PWRT = OFF Disabled
BOR = OFF Disabled
BOR = SBORENCTRL Controlled by SBOREN
BOR = BOACTIVE Enabled whenever Part is Active
- SBOREN Disabled
BOR = BOHW Enabled in HW, SBOREN dis-
abled
BORV = 45 4.5V
BORV = 42 4.2V
BORV = 27 2.7V
BORV = 20 2.0V
WDT = OFF HW Disabled - SW Controlled
WDT = ON HW Enabled - SW Disabled
Configuration Settings
2004 Microchip Technology Inc. DS51518A-page 75
Watchdog Postscaler:
MCLR Enable:
Low Power Timer1 Oscillator:
Port B Pins Configured for A/D:
BackGround Debug:
Extended Instruction Set CPU:
Boot Block Size:
Low Voltage Programming:
WDTPS = 1 1:1
WDTPS = 2 1:2
WDTPS = 4 1:4
WDTPS = 8 1:8
WDTPS = 16 1:16
WDTPS = 32 1:32
WDTPS = 64 1:64
WDTPS = 128 1:128
WDTPS = 256 1:256
WDTPS = 512 1:512
WDTPS = 1024 1:1024
WDTPS = 2048 1:2048
WDTPS = 4096 1:4096
WDTPS = 8192 1:8192
WDTPS = 16384 1:16384
WDTPS = 32768 1:32768
MCLRE = OFF Disabled
MCLRE = ON Enabled
LPT1OSC = OFF Timer1 Low Power Oscillator
disabled
LPT1OSC = ON Timer1 Low Power Oscillator
Active
PBADEN = OFF Port B<4> and Port B<1:0> Con-
figured as Digital I/O Pins on
Reset
PBADEN = ON Port B<4> and Port B<1:0> Con-
figured as Analog Pins on Reset
DEBUG = ON Enabled
DEBUG = OFF Disabled
XINST = OFF Disabled
XINST = ON Enabled
BBSIZ = 1024 1K words (2K bytes) Boot Block
BBSIZ = 2048 2K words (4K bytes) Boot Block
BBSIZ = 4096 4K words (8K bytes) Boot Block
LVP = OFF Disabled
LVP = ON Enabled
MPLAB® C18 C Compiler User’s Guide Addendum
DS51518A-page 76 2004 Microchip Technology Inc.
Stack Overflow/Underflow Reset:
Code Protection Block 0:
Code Protection Block 1:
Code Protection Block 2:
Code Protection Block 3:
Boot Block Code Protection:
Data EEPROM Code Protection:
Write Protection Block 0:
Write Protection Block 1:
Write Protection Block 2:
Write Protection Block 3:
Boot Block Write Protection:
Configuration Register Write Protection:
STVREN = OFF Disabled
STVREN = ON Enabled
CP0 = ON Enabled
CP0 = OFF Disabled
CP1 = ON Enabled
CP1 = OFF Disabled
CP2 = ON Enabled
CP2 = OFF Disabled
CP3 = ON Enabled
CP3 = OFF Disabled
CPB = ON Enabled
CPB = OFF Disabled
CPD = ON Enabled
CPD = OFF Disabled
WRT0 = ON Enabled
WRT0 = OFF Disabled
WRT1 = ON Enabled
WRT1 = OFF Disabled
WRT2 = ON Enabled
WRT2 = OFF Disabled
WRT3 = ON Enabled
WRT3 = OFF Disabled
WRTB = ON Enabled
WRTB = OFF Disabled
WRTC = ON Enabled
WRTC = OFF Disabled
Configuration Settings
2004 Microchip Technology Inc. DS51518A-page 77
Data EEPROM Write Protection:
Table Read Protection Block 0:
Table Read Protection Block 1:
Table Read Protection Block 2:
Table Read Protection Block 3:
Boot Block Table Read Protection:
PIC18F2610
Oscillator Selection:
Fail Safe Clock Monitor:
Internal External Osc. Switch Over:
Power Up Timer:
WRTD = ON Enabled
WRTD = OFF Disabled
EBTR0 = ON Enabled
EBTR0 = OFF Disabled
EBTR1 = ON Enabled
EBTR1 = OFF Disabled
EBTR2 = ON Enabled
EBTR2 = OFF Disabled
EBTR3 = ON Enabled
EBTR3 = OFF Disabled
EBTRB = ON Enabled
EBTRB = OFF Disabled
OSC = LP LP
OSC = XT XT
OSC = HS HS
OSC = RC RC
OSC = EC EC-OSC2 as Clock Out
OSC = ECIO6 EC-OSC2 as RA6
OSC = HSPLL HS-PLL Enabled
OSC = RCIO6 RC-OSC2 as RA6
OSC = INTIO67 INTRC-OSC2 as RA6, OSC1 as
RA7
OSC = INTIO7 INTRC-OSC2 as Clock Out,
OSC1 as RA7
FCMEN = OFF Disabled
FCMEN = ON Enabled
IESO = OFF Disabled
IESO = ON Enabled
PWRT = ON Enabled
PWRT = OFF Disabled
MPLAB® C18 C Compiler User’s Guide Addendum
DS51518A-page 78 2004 Microchip Technology Inc.
Brown Out Reset:
Brown Out Voltage:
Watchdog Timer:
Watchdog Postscaler:
MCLR Enable:
Port B A/D Enable:
CCP2 Mux:
Stack Overflow Reset:
BOREN = OFF Disabled
BOREN = ON Enabled
BOREN = NOSLP Enabled except SLEEP,
SBOREN Disabled
BOREN = SBORDIS Enabled, SBOREN Disabled
BORV = 45 4.5V
BORV = 42 4.2V
BORV = 27 2.7V
BORV = 25 2.5V
WDT = OFF Disabled
WDT = ON Enabled
WDTPS = 1 1:1
WDTPS = 2 1:2
WDTPS = 4 1:4
WDTPS = 8 1:8
WDTPS = 16 1:16
WDTPS = 32 1:32
WDTPS = 64 1:64
WDTPS = 128 1:128
WDTPS = 256 1:256
WDTPS = 512 1:512
WDTPS = 1024 1:1024
WDTPS = 2048 1:2048
WDTPS = 4096 1:4096
WDTPS = 8192 1:8192
WDTPS = 16384 1:16384
WDTPS = 32768 1:32768
MCLRE = OFF Disabled
MCLRE = ON Enabled
PBADEN = OFF Port B<4:0> digital on RESET
PBADEN = ON Port B<4:0> analog on RESET
CCP2MX = PORTBE Muxed with RB3
CCP2MX = PORTC Muxed with RC1
STVREN = OFF Disabled
STVREN = ON Enabled
Configuration Settings
2004 Microchip Technology Inc. DS51518A-page 79
Low Voltage ICSP:
Enhanced CPU Enable:
Background Debugger Enable:
Code Protection Block 0:
Code Protection Block 1:
Code Protection Block 2:
Code Protection Block 3:
Boot Block Code Protection:
Write Protection Block 0:
Write Protection Block 1:
Write Protection Block 2:
Write Protection Block 3:
Boot Block Write Protection:
LVP = OFF Disabled
LVP = ON Enabled
ENHCPU = OFF Disabled
ENHCPU = ON Enabled
DEBUG = ON Enabled
DEBUG = OFF Disabled
CP0 = ON Enabled
CP0 = OFF Disabled
CP1 = ON Enabled
CP1 = OFF Disabled
CP2 = ON Enabled
CP2 = OFF Disabled
CP3 = ON Enabled
CP3 = OFF Disabled
CPB = ON Enabled
CPB = OFF Disabled
WRT0 = ON Enabled
WRT0 = OFF Disabled
WRT1 = ON Enabled
WRT1 = OFF Disabled
WRT2 = ON Enabled
WRT2 = OFF Disabled
WRT3 = ON Enabled
WRT3 = OFF Disabled
WRTB = ON Enabled
WRTB = OFF Disabled
MPLAB® C18 C Compiler User’s Guide Addendum
DS51518A-page 80 2004 Microchip Technology Inc.
Configuration Register Write Protection:
Table Read Protection Block 0:
Table Read Protection Block 1:
Table Read Protection Block 2:
Table Read Protection Block 3:
Boot Block Table Read Protection:
PIC18F2620
Oscillator Selection:
Fail Safe Clock Monitor:
Internal External Osc. Switch Over:
Power Up Timer:
WRTC = ON Enabled
WRTC = OFF Disabled
EBTR0 = ON Enabled
EBTR0 = OFF Disabled
EBTR1 = ON Enabled
EBTR1 = OFF Disabled
EBTR2 = ON Enabled
EBTR2 = OFF Disabled
EBTR3 = ON Enabled
EBTR3 = OFF Disabled
EBTRB = ON Enabled
EBTRB = OFF Disabled
OSC = LP LP
OSC = XT XT
OSC = HS HS
OSC = RC RC
OSC = EC EC-OSC2 as Clock Out
OSC = ECIO6 EC-OSC2 as RA6
OSC = HSPLL HS-PLL Enabled
OSC = RCIO6 RC-OSC2 as RA6
OSC = INTIO67 INTRC-OSC2 as RA6, OSC1 as
RA7
OSC = INTIO7 INTRC-OSC2 as Clock Out,
OSC1 as RA7
FCMEN = OFF Disabled
FCMEN = ON Enabled
IESO = OFF Disabled
IESO = ON Enabled
PWRT = ON Enabled
PWRT = OFF Disabled
Configuration Settings
2004 Microchip Technology Inc. DS51518A-page 81
Brown Out Reset:
Brown Out Voltage:
Watchdog Timer:
Watchdog Postscaler:
MCLR Enable:
T1 Oscillator Enable:
Port B A/D Enable:
CCP2 Mux:
BOREN = OFF Disabled
BOREN = ON SBOREN Enabled
BOREN = NOSLP Enabled except SLEEP,
SBOREN Disabled
BOREN = SBORDIS Enabled, SBOREN Disabled
BORV = 46 4.6V
BORV = 43 4.3V
BORV = 28 2.8V
BORV = 21 2.1V
WDT = OFF Disabled
WDT = ON Enabled
WDTPS = 1 1:1
WDTPS = 2 1:2
WDTPS = 4 1:4
WDTPS = 8 1:8
WDTPS = 16 1:16
WDTPS = 32 1:32
WDTPS = 64 1:64
WDTPS = 128 1:128
WDTPS = 256 1:256
WDTPS = 512 1:512
WDTPS = 1024 1:1024
WDTPS = 2048 1:2048
WDTPS = 4096 1:4096
WDTPS = 8192 1:8192
WDTPS = 16384 1:16384
WDTPS = 32768 1:32768
MCLRE = OFF Disabled
MCLRE = ON Enabled
LPT1OSC = OFF Disabled
LPT1OSC = ON Enabled
PBADEN = OFF Port B<4:0> digital on RESET
PBADEN = ON Port B<4:0> analog on RESET
CCP2MX = PORTBE Muxed with RB3
CCP2MX = PORTC Muxed with RC1
MPLAB® C18 C Compiler User’s Guide Addendum
DS51518A-page 82 2004 Microchip Technology Inc.
Stack Overflow Reset:
Low Voltage ICSP:
XINST Enable:
Background Debugger Enable:
Code Protection Block 0:
Code Protection Block 1:
Code Protection Block 2:
Code Protection Block 3:
Boot Block Code Protection:
Data EEPROM Code Protection:
Write Protection Block 0:
Write Protection Block 1:
Write Protection Block 2:
STVREN = OFF Disabled
STVREN = ON Enabled
LVP = OFF Disabled
LVP = ON Enabled
XINST = OFF Disabled
XINST = ON Enabled
DEBUG = ON Enabled
DEBUG = OFF Disabled
CP0 = ON Enabled
CP0 = OFF Disabled
CP1 = ON Enabled
CP1 = OFF Disabled
CP2 = ON Enabled
CP2 = OFF Disabled
CP3 = ON Enabled
CP3 = OFF Disabled
CPB = ON Enabled
CPB = OFF Disabled
CPD = ON Enabled
CPD = OFF Disabled
WRT0 = ON Enabled
WRT0 = OFF Disabled
WRT1 = ON Enabled
WRT1 = OFF Disabled
WRT2 = ON Enabled
WRT2 = OFF Disabled
Configuration Settings
2004 Microchip Technology Inc. DS51518A-page 83
Write Protection Block 3:
Boot Block Write Protection:
Configuration Register Write Protection:
Data EEPROM Write Protection:
Table Read Protection Block 0:
Table Read Protection Block 1:
Table Read Protection Block 2:
Table Read Protection Block 3:
Boot Block Table Read Protection:
WRT3 = ON Enabled
WRT3 = OFF Disabled
WRTB = ON Enabled
WRTB = OFF Disabled
WRTC = ON Enabled
WRTC = OFF Disabled
WRTD = ON Enabled
WRTD = OFF Disabled
EBTR0 = ON Enabled
EBTR0 = OFF Disabled
EBTR1 = ON Enabled
EBTR1 = OFF Disabled
EBTR2 = ON Enabled
EBTR2 = OFF Disabled
EBTR3 = ON Enabled
EBTR3 = OFF Disabled
EBTRB = ON Enabled
EBTRB = OFF Disabled
MPLAB® C18 C Compiler User’s Guide Addendum
DS51518A-page 84 2004 Microchip Technology Inc.
PIC18F2680
Oscillator Selection bits:
Fail Safe Clock Monitor:
Internal External Osc. Switch:
Power Up Timer:
Brown Out Reset:
Brown Out Voltage:
Watchdog Timer:
OSC = LP LP
OSC = XT XT
OSC = HS HS
OSC = RC External RC with OSC2 as
divide by 4 clock out
OSC = EC EC with OSC2 as divide by 4
clock out
OSC = ECIO EC with OSC2 as RA6
OSC = HSPLL HS with HW enabled 4xPLL
OSC = RCIO External RC with OSC2 as RA6
OSC = IRCIO67 Internal RC with OSC2 as RA6
and OSC1 as RA7
OSC = IRCIO7 Internal RC with OSC1 as RA7
and OSC2 as divide by 4 clock
out
OSC = ERC1 External RC with OSC2 as
divide by 4 clock out
OSC = ERC External RC with OSC2 as
divide by 4 clock out
FCMENB = OFF Disabled
FCMENB = ON Enabled
IESOB = OFF Disabled
IESOB = ON Enabled
PWRT = ON Enabled
PWRT = OFF Disabled
BOR = OFF Disabled
BOR = SBORENCTRL Controlled by SBOREN
BOR = BOACTIVE Enabled whenever Part is Active
- SBOREN Disabled
BOR = BOHW Enabled in HW, SBOREN dis-
abled
BORV = 45 4.5V
BORV = 42 4.2V
BORV = 27 2.7V
BORV = 20 2.0V
WDT = OFF HW Disabled - SW Controlled
WDT = ON HW Enabled - SW Disabled
Configuration Settings
2004 Microchip Technology Inc. DS51518A-page 85
Watchdog Postscaler:
MCLR Enable:
Low Power Timer1 Oscillator:
Port B Pins Configured for A/D:
BackGround Debug:
Extended Instruction Set CPU:
Boot Block Size:
Low Voltage Programming:
WDTPS = 1 1:1
WDTPS = 2 1:2
WDTPS = 4 1:4
WDTPS = 8 1:8
WDTPS = 16 1:16
WDTPS = 32 1:32
WDTPS = 64 1:64
WDTPS = 128 1:128
WDTPS = 256 1:256
WDTPS = 512 1:512
WDTPS = 1024 1:1024
WDTPS = 2048 1:2048
WDTPS = 4096 1:4096
WDTPS = 8192 1:8192
WDTPS = 16384 1:16384
WDTPS = 32768 1:32768
MCLRE = OFF Disabled
MCLRE = ON Enabled
LPT1OSC = OFF Timer1 Low Power Oscillator
disabled
LPT1OSC = ON Timer1 Low Power Oscillator
Active
PBADEN = OFF Port B<4> and Port B<1:0> Con-
figured as Digital I/O Pins on
Reset
PBADEN = ON Port B<4> and Port B<1:0> Con-
figured as Analog Pins on Reset
DEBUG = ON Enabled
DEBUG = OFF Disabled
XINST = OFF Disabled
XINST = ON Enabled
BBSIZ = 1024 1K words (2K bytes) Boot Block
BBSIZ = 2048 2K words (4K bytes) Boot Block
BBSIZ = 4096 4K words (8K bytes) Boot Block
LVP = OFF Disabled
LVP = ON Enabled
MPLAB® C18 C Compiler User’s Guide Addendum
DS51518A-page 86 2004 Microchip Technology Inc.
Stack Overflow/Underflow Reset:
Code Protection Block 0:
Code Protection Block 1:
Code Protection Block 2:
Code Protection Block 3:
Boot Block Code Protection:
Data EEPROM Code Protection:
Write Protection Block 0:
Write Protection Block 1:
Write Protection Block 2:
Write Protection Block 3:
Boot Block Write Protection:
Configuration Register Write Protection:
STVREN = OFF Disabled
STVREN = ON Enabled
CP0 = ON Enabled
CP0 = OFF Disabled
CP1 = ON Enabled
CP1 = OFF Disabled
CP2 = ON Enabled
CP2 = OFF Disabled
CP3 = ON Enabled
CP3 = OFF Disabled
CPB = ON Enabled
CPB = OFF Disabled
CPD = ON Enabled
CPD = OFF Disabled
WRT0 = ON Enabled
WRT0 = OFF Disabled
WRT1 = ON Enabled
WRT1 = OFF Disabled
WRT2 = ON Enabled
WRT2 = OFF Disabled
WRT3 = ON Enabled
WRT3 = OFF Disabled
WRTB = ON Enabled
WRTB = OFF Disabled
WRTC = ON Enabled
WRTC = OFF Disabled
Configuration Settings
2004 Microchip Technology Inc. DS51518A-page 87
Data EEPROM Write Protection:
Table Read Protection Block 0:
Table Read Protection Block 1:
Table Read Protection Block 2:
Table Read Protection Block 3:
Boot Block Table Read Protection:
PIC18F4220
Oscillator Selection:
Fail Safe Clock Monitor:
WRTD = ON Enabled
WRTD = OFF Disabled
EBTR0 = ON Enabled
EBTR0 = OFF Disabled
EBTR1 = ON Enabled
EBTR1 = OFF Disabled
EBTR2 = ON Enabled
EBTR2 = OFF Disabled
EBTR3 = ON Enabled
EBTR3 = OFF Disabled
EBTRB = ON Enabled
EBTRB = OFF Disabled
OSC = LP LP Oscillator
OSC = XT XT Oscillator
OSC = HS HS Oscillator
OSC = EC External Clock on OSC1, OSC2
as Fosc/4
OSC = ECIO External Clock on OSC1, OSC2
as RA6
OSC = HSPLL HS + PLL
OSC = RCIO External RC on OSC1, OSC2 as
RA6
OSC = INTIO2 Internal RC, OSC1 as RA7,
OSC2 as RA6
OSC = INTIO1 Internal RC, OSC1 as RA7,
OSC2 as Fosc/4
OSC = RC External RC on OSC1, OSC2 as
Fosc/4
FSCM = OFF Fail Safe Clock Monitor disabled
FSCM = ON Fail Safe Clock Monitor enabled
MPLAB® C18 C Compiler User’s Guide Addendum
DS51518A-page 88 2004 Microchip Technology Inc.
Internal External Switch Over mode:
Power-Up Timer:
Brown-Out Reset:
Brown Out Voltage:
Watchdog Timer:
Watchdog Postscaler:
MCLR Enable:
PORTB A/D Enable:
IESO = OFF Internal External Switch Over
mode disabled
IESO = ON Internal External Switch Over
mode enabled
PWRT = ON Enabled
PWRT = OFF Disabled
BOR = OFF Disabled
BOR = ON Enabled
BORV = 45 4.5V
BORV = 42 4.2V
BORV = 27 2.7V
BORV = 20 2.0V
WDT = OFF Disabled
WDT = ON Enabled
WDTPS = 1 1:1
WDTPS = 2 1:2
WDTPS = 4 1:4
WDTPS = 8 1:8
WDTPS = 16 1:16
WDTPS = 32 1:32
WDTPS = 64 1:64
WDTPS = 128 1:128
WDTPS = 256 1:256
WDTPS = 512 1:512
WDTPS = 1024 1:1024
WDTPS = 2048 1:2048
WDTPS = 4096 1:4096
WDTPS = 8192 1:8192
WDTPS = 16384 1:16384
WDTPS = 32768 1:32768
MCLRE = OFF Disabled
MCLRE = ON Enabled
PBAD = DIG Digital
PBAD = ANA Analog
Configuration Settings
2004 Microchip Technology Inc. DS51518A-page 89
CCP2 Pin Function:
Stack Full/Overflow Reset:
Low Voltage ICSP:
Background Debugger Enable:
Code Protection Block 0:
Code Protection Block 1:
Boot Block Code Protection:
Data EEPROM Code Protection:
Write Protection Block 0:
Write Protection Block 1:
Boot Block Write Protection:
Configuration Register Write Protection:
CCP2MX = B3 RB3
CCP2MX = OFF RB3
CCP2MX = C1 RC1
CCP2MX = ON RC1
STVR = OFF Disabled
STVR = ON Enabled
LVP = OFF Disabled
LVP = ON Enabled
DEBUG = ON Enabled
DEBUG = OFF Disabled
CP0 = ON Enabled
CP0 = OFF Disabled
CP1 = ON Enabled
CP1 = OFF Disabled
CPB = ON Enabled
CPB = OFF Disabled
CPD = ON Enabled
CPD = OFF Disabled
WRT0 = ON Enabled
WRT0 = OFF Disabled
WRT1 = ON Enabled
WRT1 = OFF Disabled
WRTB = ON Enabled
WRTB = OFF Disabled
WRTC = ON Enabled
WRTC = OFF Disabled
MPLAB® C18 C Compiler User’s Guide Addendum
DS51518A-page 90 2004 Microchip Technology Inc.
Data EEPROM Write Protection:
Table Read Protection Block 0:
Table Read Protection Block 1:
Boot Block Table Read Protection:
PIC18F4320
Oscillator Selection:
Fail Safe Clock Monitor:
Internal External Switch Over mode:
Power-Up Timer:
WRTD = ON Enabled
WRTD = OFF Disabled
EBTR0 = ON Enabled
EBTR0 = OFF Disabled
EBTR1 = ON Enabled
EBTR1 = OFF Disabled
EBTRB = ON Enabled
EBTRB = OFF Disabled
OSC = LP LP Oscillator
OSC = XT XT Oscillator
OSC = HS HS Oscillator
OSC = EC External Clock on OSC1, OSC2
as Fosc/4
OSC = ECIO External Clock on OSC1, OSC2
as RA6
OSC = HSPLL HS + PLL
OSC = RCIO External RC on OSC1, OSC2 as
RA6
OSC = INTIO2 Internal RC, OSC1 as RA7,
OSC2 as RA6
OSC = INTIO1 Internal RC, OSC1 as RA7,
OSC2 as Fosc/4
OSC = RC External RC on OSC1, OSC2 as
Fosc/4
FSCM = OFF Fail Safe Clock Monitor disabled
FSCM = ON Fail Safe Clock Monitor enabled
IESO = OFF Internal External Switch Over
mode disabled
IESO = ON Internal External Switch Over
mode enabled
PWRT = ON Enabled
PWRT = OFF Disabled
Configuration Settings
2004 Microchip Technology Inc. DS51518A-page 91
Brown-Out Reset:
Brown Out Voltage:
Watchdog Timer:
Watchdog Postscaler:
MCLR Enable:
PORTB A/D Enable:
CCP2 Pin Function:
Stack Full/Overflow Reset:
BOR = OFF Disabled
BOR = ON Enabled
BORV = 45 4.5V
BORV = 42 4.2V
BORV = 27 2.7V
BORV = 20 2.0V
WDT = OFF Disabled
WDT = ON Enabled
WDTPS = 1 1:1
WDTPS = 2 1:2
WDTPS = 4 1:4
WDTPS = 8 1:8
WDTPS = 16 1:16
WDTPS = 32 1:32
WDTPS = 64 1:64
WDTPS = 128 1:128
WDTPS = 256 1:256
WDTPS = 512 1:512
WDTPS = 1024 1:1024
WDTPS = 2048 1:2048
WDTPS = 4096 1:4096
WDTPS = 8192 1:8192
WDTPS = 16384 1:16384
WDTPS = 32768 1:32768
MCLRE = OFF Disabled
MCLRE = ON Enabled
PBAD = DIG Digital
PBAD = ANA Analog
CCP2MX = B3 RB3
CCP2MX = OFF RB3
CCP2MX = C1 RC1
CCP2MX = ON RC1
STVR = OFF Disabled
STVR = ON Enabled
MPLAB® C18 C Compiler User’s Guide Addendum
DS51518A-page 92 2004 Microchip Technology Inc.
Low Voltage ICSP:
Background Debugger Enable:
Code Protection Block 0:
Code Protection Block 1:
Code Protection Block 2:
Code Protection Block 3:
Boot Block Code Protection:
Data EEPROM Code Protection:
Write Protection Block 0:
Write Protection Block 1:
Write Protection Block 2:
Write Protection Block 3:
Boot Block Write Protection:
LVP = OFF Disabled
LVP = ON Enabled
DEBUG = ON Enabled
DEBUG = OFF Disabled
CP0 = ON Enabled
CP0 = OFF Disabled
CP1 = ON Enabled
CP1 = OFF Disabled
CP2 = ON Enabled
CP2 = OFF Disabled
CP3 = ON Enabled
CP3 = OFF Disabled
CPB = ON Enabled
CPB = OFF Disabled
CPD = ON Enabled
CPD = OFF Disabled
WRT0 = ON Enabled
WRT0 = OFF Disabled
WRT1 = ON Enabled
WRT1 = OFF Disabled
WRT2 = ON Enabled
WRT2 = OFF Disabled
WRT3 = ON Enabled
WRT3 = OFF Disabled
WRTB = ON Enabled
WRTB = OFF Disabled
Configuration Settings
2004 Microchip Technology Inc. DS51518A-page 93
Configuration Register Write Protection:
Data EEPROM Write Protection:
Table Read Protection Block 0:
Table Read Protection Block 1:
Table Read Protection Block 2:
Table Read Protection Block 3:
Boot Block Table Read Protection:
PIC18F4331
Oscillator Selection:
Fail Safe Clock Monitor Enable:
WRTC = ON Enabled
WRTC = OFF Disabled
WRTD = ON Enabled
WRTD = OFF Disabled
EBTR0 = ON Enabled
EBTR0 = OFF Disabled
EBTR1 = ON Enabled
EBTR1 = OFF Disabled
EBTR2 = ON Enabled
EBTR2 = OFF Disabled
EBTR3 = ON Enabled
EBTR3 = OFF Disabled
EBTRB = ON Enabled
EBTRB = OFF Disabled
OSC = LP LP
OSC = XT XT
OSC = HS HS
OSC = RC2 External RC, RA6 is CLKOUT
OSC = EC EC, RA6 is CLKOUT
OSC = ECIO EC, RA6 is I/O
OSC = HSPLL HS-PLL Enabled
OSC = RCIO External RC, RA6 is I/O
OSC = IRCIO Internal RC, RA6 & RA7 are I/O
OSC = IRC Internal RC, RA6 is CLKOUT,
RA7 is I/O
OSC = RC1 External RC, RA6 is CLKOUT
OSC = RC External RC, RA6 is CLKOUT
FCMEN = OFF Disabled
FCMEN = ON Enabled
MPLAB® C18 C Compiler User’s Guide Addendum
DS51518A-page 94 2004 Microchip Technology Inc.
Internal/External Switch-Over:
Power Up Timer:
Brown Out Reset:
Brown Out Voltage:
Watchdog Timer:
Watchdog Timer Enable Window:
Watchdog Postscaler:
Timer1 Oscillator Mux:
High-Side Transistors Polarity:
IESO = OFF Disabled
IESO = ON Enabled
PWRTEN = ON Enabled
PWRTEN = OFF Disabled
BOREN = OFF Disabled
BOREN = ON Enabled
BORV = 45 4.5V
BORV = 42 4.2V
BORV = 27 2.7V
BORV = 20 2.0V
WDTEN = OFF Disabled
WDTEN = ON Enabled
WINEN = ON Enabled
WINEN = OFF Disabled
WDPS = 1 1:1
WDPS = 2 1:2
WDPS = 4 1:4
WDPS = 8 1:8
WDPS = 16 1:16
WDPS = 32 1:32
WDPS = 64 1:64
WDPS = 128 1:128
WDPS = 256 1:256
WDPS = 512 1:512
WDPS = 1024 1:1024
WDPS = 2048 1:2048
WDPS = 4096 1:4096
WDPS = 8192 1:8192
WDPS = 16384 1:16384
WDPS = 32768 1:32768
T1OSCMX = OFF Active
T1OSCMX = ON Inactive
HPOL = LOW Active low
HPOL = HIGH Active high
Configuration Settings
2004 Microchip Technology Inc. DS51518A-page 95
Low-Side Transistors Polarity:
PWM output pins RESET state control:
MCLR Enable:
External clock MUX bit:
PWM4 MUX bit:
SSP I/O MUX bit:
FLTA MUX bit:
Stack Overflow Reset:
Low Voltage Programming:
Background Debugger Enable:
Code Protection Block 0:
Code Protection Block 1:
Code Protection Block 2:
LPOL = LOW Active low
LPOL = HIGH Active high
PWMPIN = ON Enabled
PWMPIN = OFF Disabled
MCLRE = OFF Disabled
MCLRE = ON Enabled
EXCLKMX = RD0 MUXed with RD0
EXCLKMX = RC3 MUXed with RC3
PWM4MX = RD5 MUXed with RD5
PWM4MX = RB5 MUXed with RB5
SSPMX = RD1 SDO output muxed with RD1
SSPMX = RC7 SD0 output muxed with RC7
FLTAMX = RD4 MUXed with RD4
FLTAMX = RC1 MUXed with RC1
STVREN = OFF Disabled
STVREN = ON Enabled
LVP = OFF Disabled
LVP = ON Enabled
DEBUG = ON Enabled
DEBUG = OFF Disabled
CP0 = ON Enabled
CP0 = OFF Disabled
CP1 = ON Enabled
CP1 = OFF Disabled
CP2 = ON Enabled
CP2 = OFF Disabled
MPLAB® C18 C Compiler User’s Guide Addendum
DS51518A-page 96 2004 Microchip Technology Inc.
Code Protection Block 3:
Boot Block Code Protection:
Data EEPROM Code Protection:
Write Protection Block 0:
Write Protection Block 1:
Write Protection Block 2:
Write Protection Block 3:
Boot Block Write Protection:
Configuration Register Write Protection:
Data EEPROM Write Protection:
Table Read Protection Block 0:
Table Read Protection Block 1:
Table Read Protection Block 2:
CP3 = ON Enabled
CP3 = OFF Disabled
CPB = ON Enabled
CPB = OFF Disabled
CPD = ON Enabled
CPD = OFF Disabled
WRT0 = ON Enabled
WRT0 = OFF Disabled
WRT1 = ON Enabled
WRT1 = OFF Disabled
WRT2 = ON Enabled
WRT2 = OFF Disabled
WRT3 = ON Enabled
WRT3 = OFF Disabled
WRTB = ON Enabled
WRTB = OFF Disabled
WRTC = ON Enabled
WRTC = OFF Disabled
WRTD = ON Enabled
WRTD = OFF Disabled
EBTR0 = ON Enabled
EBTR0 = OFF Disabled
EBTR1 = ON Enabled
EBTR1 = OFF Disabled
EBTR2 = ON Enabled
EBTR2 = OFF Disabled
Configuration Settings
2004 Microchip Technology Inc. DS51518A-page 97
Table Read Protection Block 3:
Boot Block Table Read Protection:
PIC18F4410
Oscillator Selection:
Fail Safe Clock Monitor:
Internal External Osc. Switch Over:
Power Up Timer:
Brown Out Reset:
Brown Out Voltage:
EBTR3 = ON Enabled
EBTR3 = OFF Disabled
EBTRB = ON Enabled
EBTRB = OFF Disabled
OSC = LP LP
OSC = XT XT
OSC = HS HS
OSC = RC RC
OSC = EC EC-OSC2 as Clock Out
OSC = ECIO6 EC-OSC2 as RA6
OSC = HSPLL HS-PLL Enabled
OSC = RCIO6 RC-OSC2 as RA6
OSC = INTIO67 INTRC-OSC2 as RA6, OSC1 as
RA7
OSC = INTIO7 INTRC-OSC2 as Clock Out,
OSC1 as RA7
FCMEN = OFF Disabled
FCMEN = ON Enabled
IESO = OFF Disabled
IESO = ON Enabled
PWRT = ON Enabled
PWRT = OFF Disabled
BOREN = OFF Disabled
BOREN = ON Enabled
BOREN = NOSLP Enabled except SLEEP,
SBOREN Disabled
BOREN = SBORDIS Enabled, SBOREN Disabled
BORV = 45 4.5V
BORV = 42 4.2V
BORV = 27 2.7V
BORV = 25 2.5V
MPLAB® C18 C Compiler User’s Guide Addendum
DS51518A-page 98 2004 Microchip Technology Inc.
Watchdog Timer:
Watchdog Postscaler:
MCLR Enable:
Port B A/D Enable:
CCP2 Mux:
Stack Overflow Reset:
Low Voltage ICSP:
Enhanced CPU Enable:
Background Debugger Enable:
WDT = OFF Disabled
WDT = ON Enabled
WDTPS = 1 1:1
WDTPS = 2 1:2
WDTPS = 4 1:4
WDTPS = 8 1:8
WDTPS = 16 1:16
WDTPS = 32 1:32
WDTPS = 64 1:64
WDTPS = 128 1:128
WDTPS = 256 1:256
WDTPS = 512 1:512
WDTPS = 1024 1:1024
WDTPS = 2048 1:2048
WDTPS = 4096 1:4096
WDTPS = 8192 1:8192
WDTPS = 16384 1:16384
WDTPS = 32768 1:32768
MCLRE = OFF Disabled
MCLRE = ON Enabled
PBADEN = OFF Port B<4:0> digital on RESET
PBADEN = ON Port B<4:0> analog on RESET
CCP2MX = PORTBE Muxed with RB3
CCP2MX = PORTC Muxed with RC1
STVREN = OFF Disabled
STVREN = ON Enabled
LVP = OFF Disabled
LVP = ON Enabled
ENHCPU = OFF Disabled
ENHCPU = ON Enabled
DEBUG = ON Enabled
DEBUG = OFF Disabled
Configuration Settings
2004 Microchip Technology Inc. DS51518A-page 99
Code Protection Block 0:
Code Protection Block 1:
Boot Block Code Protection:
Write Protection Block 0:
Write Protection Block 1:
Boot Block Write Protection:
Configuration Register Write Protection:
Table Read Protection Block 0:
Table Read Protection Block 1:
Boot Block Table Read Protection:
PIC18F442
Oscillator Selection:
CP0 = ON Enabled
CP0 = OFF Disabled
CP1 = ON Enabled
CP1 = OFF Disabled
CPB = ON Enabled
CPB = OFF Disabled
WRT0 = ON Enabled
WRT0 = OFF Disabled
WRT1 = ON Enabled
WRT1 = OFF Disabled
WRTB = ON Enabled
WRTB = OFF Disabled
WRTC = ON Enabled
WRTC = OFF Disabled
EBTR0 = ON Enabled
EBTR0 = OFF Disabled
EBTR1 = ON Enabled
EBTR1 = OFF Disabled
EBTRB = ON Enabled
EBTRB = OFF Disabled
OSC = LP LP
OSC = XT XT
OSC = HS HS
OSC = RC RC
OSC = EC EC-OSC2 as Clock Out
OSC = ECIO EC-OSC2 as RA6
OSC = HSPLL HS-PLL Enabled
OSC = RCIO RC-OSC2 as RA6
MPLAB® C18 C Compiler User’s Guide Addendum
DS51518A-page 100 2004 Microchip Technology Inc.
Osc. Switch Enable:
Power Up Timer:
Brown Out Reset:
Brown Out Voltage:
Watchdog Timer:
Watchdog Postscaler:
CCP2 Mux:
Stack Overflow Reset:
Low Voltage ICSP:
Background Debugger Enable:
Code Protection Block 0:
OSCS = ON Enabled
OSCS = OFF Disabled
PWRT = ON Enabled
PWRT = OFF Disabled
BOR = OFF Disabled
BOR = ON Enabled
BORV = 45 4.5V
BORV = 42 4.2V
BORV = 27 2.7V
BORV = 25 2.5V
WDT = OFF Disabled
WDT = ON Enabled
WDTPS = 1 1:1
WDTPS = 2 1:2
WDTPS = 4 1:4
WDTPS = 8 1:8
WDTPS = 16 1:16
WDTPS = 32 1:32
WDTPS = 64 1:64
WDTPS = 128 1:128
CCP2MUX = OFF Disable (RB3)
CCP2MUX = ON Enable (RC1)
STVR = OFF Disabled
STVR = ON Enabled
LVP = OFF Disabled
LVP = ON Enabled
DEBUG = ON Enabled
DEBUG = OFF Disabled
CP0 = ON Enabled
CP0 = OFF Disabled
Configuration Settings
2004 Microchip Technology Inc. DS51518A-page 101
Code Protection Block 1:
Boot Block Code Protection:
Data EEPROM Code Protection:
Write Protection Block 0:
Write Protection Block 1:
Boot Block Write Protection:
Configuration Register Write Protection:
Data EEPROM Write Protection:
Table Read Protection Block 0:
Table Read Protection Block 1:
Boot Block Table Read Protection:
CP1 = ON Enabled
CP1 = OFF Disabled
CPB = ON Enabled
CPB = OFF Disabled
CPD = ON Enabled
CPD = OFF Disabled
WRT0 = ON Enabled
WRT0 = OFF Disabled
WRT1 = ON Enabled
WRT1 = OFF Disabled
WRTB = ON Enabled
WRTB = OFF Disabled
WRTC = ON Enabled
WRTC = OFF Disabled
WRTD = ON Enabled
WRTD = OFF Disabled
EBTR0 = ON Enabled
EBTR0 = OFF Disabled
EBTR1 = ON Enabled
EBTR1 = OFF Disabled
EBTRB = ON Enabled
EBTRB = OFF Disabled
MPLAB® C18 C Compiler User’s Guide Addendum
DS51518A-page 102 2004 Microchip Technology Inc.
PIC18F4420
Oscillator Selection:
Fail Safe Clock Monitor:
Internal External Osc. Switch Over:
Power Up Timer:
Brown Out Reset:
Brown Out Voltage:
Watchdog Timer:
OSC = LP LP
OSC = XT XT
OSC = HS HS
OSC = RC RC
OSC = EC EC-OSC2 as Clock Out
OSC = ECIO6 EC-OSC2 as RA6
OSC = HSPLL HS-PLL Enabled
OSC = RCIO6 RC-OSC2 as RA6
OSC = INTIO67 INTRC-OSC2 as RA6, OSC1 as
RA7
OSC = INTIO7 INTRC-OSC2 as Clock Out,
OSC1 as RA7
FCMEN = OFF Disabled
FCMEN = ON Enabled
IESO = OFF Disabled
IESO = ON Enabled
PWRT = ON Enabled
PWRT = OFF Disabled
BOREN = OFF Disabled
BOREN = ON Enabled
BOREN = NOSLP Enabled except SLEEP,
SBOREN Disabled
BOREN = SBORDIS Enabled, SBOREN Disabled
BORV = 45 4.5V
BORV = 42 4.2V
BORV = 27 2.7V
BORV = 25 2.5V
WDT = OFF Disabled
WDT = ON Enabled
Configuration Settings
2004 Microchip Technology Inc. DS51518A-page 103
Watchdog Postscaler:
MCLR Enable:
Port B A/D Enable:
CCP2 Mux:
Stack Overflow Reset:
Low Voltage ICSP:
Enhanced CPU Enable:
Background Debugger Enable:
Code Protection Block 0:
WDTPS = 1 1:1
WDTPS = 2 1:2
WDTPS = 4 1:4
WDTPS = 8 1:8
WDTPS = 16 1:16
WDTPS = 32 1:32
WDTPS = 64 1:64
WDTPS = 128 1:128
WDTPS = 256 1:256
WDTPS = 512 1:512
WDTPS = 1024 1:1024
WDTPS = 2048 1:2048
WDTPS = 4096 1:4096
WDTPS = 8192 1:8192
WDTPS = 16384 1:16384
WDTPS = 32768 1:32768
MCLRE = OFF Disabled
MCLRE = ON Enabled
PBADEN = OFF Port B<4:0> digital on RESET
PBADEN = ON Port B<4:0> analog on RESET
CCP2MX = PORTBE Muxed with RB3
CCP2MX = PORTC Muxed with RC1
STVREN = OFF Disabled
STVREN = ON Enabled
LVP = OFF Disabled
LVP = ON Enabled
ENHCPU = OFF Disabled
ENHCPU = ON Enabled
DEBUG = ON Enabled
DEBUG = OFF Disabled
CP0 = ON Enabled
CP0 = OFF Disabled
MPLAB® C18 C Compiler User’s Guide Addendum
DS51518A-page 104 2004 Microchip Technology Inc.
Code Protection Block 1:
Boot Block Code Protection:
Data EEPROM Code Protection:
Write Protection Block 0:
Write Protection Block 1:
Boot Block Write Protection:
Configuration Register Write Protection:
Data EEPROM Write Protection:
Table Read Protection Block 0:
Table Read Protection Block 1:
Boot Block Table Read Protection:
CP1 = ON Enabled
CP1 = OFF Disabled
CPB = ON Enabled
CPB = OFF Disabled
CPD = ON Enabled
CPD = OFF Disabled
WRT0 = ON Enabled
WRT0 = OFF Disabled
WRT1 = ON Enabled
WRT1 = OFF Disabled
WRTB = ON Enabled
WRTB = OFF Disabled
WRTC = ON Enabled
WRTC = OFF Disabled
WRTD = ON Enabled
WRTD = OFF Disabled
EBTR0 = ON Enabled
EBTR0 = OFF Disabled
EBTR1 = ON Enabled
EBTR1 = OFF Disabled
EBTRB = ON Enabled
EBTRB = OFF Disabled
Configuration Settings
2004 Microchip Technology Inc. DS51518A-page 105
PIC18F4431
Oscillator Selection:
Fail Safe Clock Monitor Enable:
Internal/External Switch-Over:
Power Up Timer:
Brown Out Reset:
Brown Out Voltage:
Watchdog Timer:
Watchdog Timer Enable Window:
OSC = LP LP
OSC = XT XT
OSC = HS HS
OSC = RC2 External RC, RA6 is CLKOUT
OSC = EC EC, RA6 is CLKOUT
OSC = ECIO EC, RA6 is I/O
OSC = HSPLL HS-PLL Enabled
OSC = RCIO External RC, RA6 is I/O
OSC = IRCIO Internal RC, RA6 & RA7 are I/O
OSC = IRC Internal RC, RA6 is CLKOUT,
RA7 is I/O
OSC = RC1 External RC, RA6 is CLKOUT
OSC = RC External RC, RA6 is CLKOUT
FCMEN = OFF Disabled
FCMEN = ON Enabled
IESO = OFF Disabled
IESO = ON Enabled
PWRTEN = ON Enabled
PWRTEN = OFF Disabled
BOREN = OFF Disabled
BOREN = ON Enabled
BORV = 45 4.5V
BORV = 42 4.2V
BORV = 27 2.7V
BORV = 20 2.0V
WDTEN = OFF Disabled
WDTEN = ON Enabled
WINEN = ON Enabled
WINEN = OFF Disabled
MPLAB® C18 C Compiler User’s Guide Addendum
DS51518A-page 106 2004 Microchip Technology Inc.
Watchdog Postscaler:
Timer1 Oscillator Mux:
High-Side Transistors Polarity:
Low-Side Transistors Polarity:
PWM output pins RESET state control:
MCLR Enable:
External clock MUX bit:
PWM4 MUX bit:
SSP I/O MUX bit:
WDPS = 1 1:1
WDPS = 2 1:2
WDPS = 4 1:4
WDPS = 8 1:8
WDPS = 16 1:16
WDPS = 32 1:32
WDPS = 64 1:64
WDPS = 128 1:128
WDPS = 256 1:256
WDPS = 512 1:512
WDPS = 1024 1:1024
WDPS = 2048 1:2048
WDPS = 4096 1:4096
WDPS = 8192 1:8192
WDPS = 16384 1:16384
WDPS = 32768 1:32768
T1OSCMX = OFF Active
T1OSCMX = ON Inactive
HPOL = LOW Active low
HPOL = HIGH Active high
LPOL = LOW Active low
LPOL = HIGH Active high
PWMPIN = ON Enabled
PWMPIN = OFF Disabled
MCLRE = OFF Disabled
MCLRE = ON Enabled
EXCLKMX = RD0 MUXed with RD0
EXCLKMX = RC3 MUXed with RC3
PWM4MX = RD5 MUXed with RD5
PWM4MX = RB5 MUXed with RB5
SSPMX = RD1 SDO output muxed with RD1
SSPMX = RC7 SD0 output muxed with RC7
Configuration Settings
2004 Microchip Technology Inc. DS51518A-page 107
FLTA MUX bit:
Stack Overflow Reset:
Low Voltage Programming:
Background Debugger Enable:
Code Protection Block 0:
Code Protection Block 1:
Code Protection Block 2:
Code Protection Block 3:
Boot Block Code Protection:
Data EEPROM Code Protection:
Write Protection Block 0:
Write Protection Block 1:
Write Protection Block 2:
FLTAMX = RD4 MUXed with RD4
FLTAMX = RC1 MUXed with RC1
STVREN = OFF Disabled
STVREN = ON Enabled
LVP = OFF Disabled
LVP = ON Enabled
DEBUG = ON Enabled
DEBUG = OFF Disabled
CP0 = ON Enabled
CP0 = OFF Disabled
CP1 = ON Enabled
CP1 = OFF Disabled
CP2 = ON Enabled
CP2 = OFF Disabled
CP3 = ON Enabled
CP3 = OFF Disabled
CPB = ON Enabled
CPB = OFF Disabled
CPD = ON Enabled
CPD = OFF Disabled
WRT0 = ON Enabled
WRT0 = OFF Disabled
WRT1 = ON Enabled
WRT1 = OFF Disabled
WRT2 = ON Enabled
WRT2 = OFF Disabled
MPLAB® C18 C Compiler User’s Guide Addendum
DS51518A-page 108 2004 Microchip Technology Inc.
Write Protection Block 3:
Boot Block Write Protection:
Configuration Register Write Protection:
Data EEPROM Write Protection:
Table Read Protection Block 0:
Table Read Protection Block 1:
Table Read Protection Block 2:
Table Read Protection Block 3:
Boot Block Table Read Protection:
PIC18F4439
Oscillator Selection:
Power Up Timer:
WRT3 = ON Enabled
WRT3 = OFF Disabled
WRTB = ON Enabled
WRTB = OFF Disabled
WRTC = ON Enabled
WRTC = OFF Disabled
WRTD = ON Enabled
WRTD = OFF Disabled
EBTR0 = ON Enabled
EBTR0 = OFF Disabled
EBTR1 = ON Enabled
EBTR1 = OFF Disabled
EBTR2 = ON Enabled
EBTR2 = OFF Disabled
EBTR3 = ON Enabled
EBTR3 = OFF Disabled
EBTRB = ON Enabled
EBTRB = OFF Disabled
OSC = LP LP
OSC = XT XT
OSC = HS HS
OSC = RC RC
OSC = EC EC-OSC2 as Clock Out
OSC = ECIO EC-OSC2 as RA6
OSC = HSPLL HS-PLL Enabled
OSC = RCIO RC-OSC2 as RA6
PWRT = ON Enabled
PWRT = OFF Disabled
Configuration Settings
2004 Microchip Technology Inc. DS51518A-page 109
Brown Out Reset:
Brown Out Voltage:
Watchdog Timer:
Watchdog Postscaler:
Stack Overflow Reset:
Low Voltage ICSP:
Background Debugger Enable:
Code Protection Block 0:
Code Protection Block 1:
Boot Block Code Protection:
Data EEPROM Code Protection:
BOR = OFF Disabled
BOR = ON Enabled
BORV = 45 4.5V
BORV = 42 4.2V
BORV = 27 2.7V
BORV = 25 2.5V
WDT = OFF Disabled
WDT = ON Enabled
WDTPS = 1 1:1
WDTPS = 2 1:2
WDTPS = 4 1:4
WDTPS = 8 1:8
WDTPS = 16 1:16
WDTPS = 32 1:32
WDTPS = 64 1:64
WDTPS = 128 1:128
STVR = OFF Disabled
STVR = ON Enabled
LVP = OFF Disabled
LVP = ON Enabled
DEBUG = ON Enabled
DEBUG = OFF Disabled
CP0 = ON Enabled
CP0 = OFF Disabled
CP1 = ON Enabled
CP1 = OFF Disabled
CPB = ON Enabled
CPB = OFF Disabled
CPD = ON Enabled
CPD = OFF Disabled
MPLAB® C18 C Compiler User’s Guide Addendum
DS51518A-page 110 2004 Microchip Technology Inc.
Write Protection Block 0:
Write Protection Block 1:
Boot Block Write Protection:
Configuration Register Write Protection:
Data EEPROM Write Protection:
Table Read Protection Block 0:
Table Read Protection Block 1:
Boot Block Table Read Protection:
PIC18F4455
96MHz PLL Prescaler:
WRT0 = ON Enabled
WRT0 = OFF Disabled
WRT1 = ON Enabled
WRT1 = OFF Disabled
WRTB = ON Enabled
WRTB = OFF Disabled
WRTC = ON Enabled
WRTC = OFF Disabled
WRTD = ON Enabled
WRTD = OFF Disabled
EBTR0 = ON Enabled
EBTR0 = OFF Disabled
EBTR1 = ON Enabled
EBTR1 = OFF Disabled
EBTRB = ON Enabled
EBTRB = OFF Disabled
PLLDIV = 1 No devide (4MHz input)
PLLDIV = 2 Divide by 2 (8MHz input)
PLLDIV = 3 Divide by 3 (12MHz input)
PLLDIV = 4 Divide by 4 (16MHz input)
PLLDIV = 5 Divide by 5 (20MHz input)
PLLDIV = 6 Divide by 6 (24MHz input)
PLLDIV = 10 Divide by 10 (40MHz input)
PLLDIV = 12 Divide by 12 (48MHz input)
Configuration Settings
2004 Microchip Technology Inc. DS51518A-page 111
CPU System Clock Postscaler:
Full-Speed USB Clock Source Selection:
Oscillator Selection bits:
Fail Safe Clock Monitor:
Internal/External Switch Over:
Power Up Timer:
CPUDIV = OSC1_PLL2 [OSC1/OSC2 Src: /1][96MHz
PLL Src: /2]
CPUDIV = OSC2_PLL3 [OSC1/OSC2 Src: /2][96MHz
PLL Src: /3]
CPUDIV = OSC3_PLL4 [OSC1/OSC2 Src: /3][96MHz
PLL Src: /4]
CPUDIV = OSC4_PLL6 [OSC1/OSC2 Src: /4][96MHz
PLL Src: /6]
USBDIV = 1 Clock source from OSC1/OSC2
USBDIV = 2 Clock source from 96MHz PLL/2
FOSC = XT_XT XT oscillator, XT used by USB
FOSC = XTPLL_XT XT oscillator, PLL enabled, XT
used by USB
FOSC = ECIO_EC External clock, port function on
RA6, EC used by USB
FOSC = EC_EC External clock, CLKOUT on
RA6, EC used by USB
FOSC = ECPLLIO_EC External clock, PLL enabled,
port function on RA6, EC used
by USB
FOSC = ECPLL_EC External clock, PLL enabled,
CLKOUT on RA6, EC used by
USB
FOSC = INTOSCIO_EC Internal oscillator, port function
on RA6, EC used by USB
FOSC = INTOSC_EC Internal oscillator, CLKOUT on
RA6, EC used by USB
FOSC = INTOSC_XT Internal oscillator, XT used by
USB
FOSC = INTOSC_HS Internal oscillator, HS used by
USB
FOSC = HS HS oscillator, HS used by USB
FOSC = HSPLL_HS HS oscillator, PLL enabled, HS
used by USB
FCMEM = OFF Disabled
FCMEM = ON Enabled
IESO = OFF Disabled
IESO = ON Enabled
PWRT = ON Enabled
PWRT = OFF Disabled
MPLAB® C18 C Compiler User’s Guide Addendum
DS51518A-page 112 2004 Microchip Technology Inc.
Brown Out Reset:
Brown Out Voltage:
USB Voltage Regulator Enable:
Watchdog Timer:
Watchdog Postscaler:
MCLR Enable:
Low Power Timer1 Oscillator Enable:
BOR = OFF Disabled
BOR = SOFT Controled by SBOREN
BOR = ON_ACTIVE Enabled when the device is not
in SLEEP, SBOREN bit is dis-
abled
BOR = ON Enabled, SBOREN bit is dis-
abled
BORV = 46 4.6V
BORV = 43 4.3V
BORV = 28 2.8V
BORV = 21 2.1V
VREGEN = OFF Disabled
VREGEN = ON Enabled
WDT = OFF HW Disabled - SW Controlled
WDT = ON HW Enabled - SW Disabled
WDTPS = 1 1:1
WDTPS = 2 1:2
WDTPS = 4 1:4
WDTPS = 8 1:8
WDTPS = 16 1:16
WDTPS = 32 1:32
WDTPS = 64 1:64
WDTPS = 128 1:128
WDTPS = 256 1:256
WDTPS = 512 1:512
WDTPS = 1024 1:1024
WDTPS = 2048 1:2048
WDTPS = 4096 1:4096
WDTPS = 8192 1:8192
WDTPS = 16384 1:16384
WDTPS = 32768 1:32768
MCLRE = OFF Disabled
MCLRE = ON Enabled
LPT1OSC = OFF Timer1 oscillator configured for
high power
LPT1OSC = ON Timer1 oscillator configured for
low power
Configuration Settings
2004 Microchip Technology Inc. DS51518A-page 113
Port B A/D Enable:
CCP2 Mux bit:
Stack Overflow Reset:
Low Voltage ICSP:
Dedicated In-Circuit Debug/Programming Enable:
Extended Instruction Set Enable:
Background Debugger Enable:
Code Protection Block 0:
Code Protection Block 1:
Code Protection Block 2:
Code Protection Block 3:
Boot Block Code Protection:
PBADEN = OFF PortB<4:0> pins are configured
as digital I/O on RESET
PBADEN = ON PortB<4:0> pins are configured
as analog input on RESET
CCP2MX = OFF CCP2 input/output is multi-
plexed with RB3
CCP2MX = ON CCP2 input/output is multi-
plexed with RC1
STVREN = OFF Disabled
STVREN = ON Enabled
LVP = OFF Disabled
LVP = ON Enabled
ICPRT = OFF Disabled
ICPRT = ON Enabled
XINST = OFF Disabled
XINST = ON Enabled
DEBUG = ON Enabled
DEBUG = OFF Disabled
CP0 = ON Enabled
CP0 = OFF Disabled
CP1 = ON Enabled
CP1 = OFF Disabled
CP2 = ON Enabled
CP2 = OFF Disabled
CP3 = ON Enabled
CP3 = OFF Disabled
CPB = ON Enabled
CPB = OFF Disabled
MPLAB® C18 C Compiler User’s Guide Addendum
DS51518A-page 114 2004 Microchip Technology Inc.
Data EEPROM Code Protection:
Write Protection Block 0:
Write Protection Block 1:
Write Protection Block 2:
Write Protection Block 3:
Boot Block Write Protection:
Configuration Register Write Protection:
Data EEPROM Write Protection:
Table Read Protection Block 0:
Table Read Protection Block 1:
Table Read Protection Block 2:
Table Read Protection Block 3:
Boot Block Table Read Protection:
CPD = ON Enabled
CPD = OFF Disabled
WRT0 = ON Enabled
WRT0 = OFF Disabled
WRT1 = ON Enabled
WRT1 = OFF Disabled
WRT2 = ON Enabled
WRT2 = OFF Disabled
WRT3 = ON Enabled
WRT3 = OFF Disabled
WRTB = ON Enabled
WRTB = OFF Disabled
WRTC = ON Enabled
WRTC = OFF Disabled
WRTD = ON Enabled
WRTD = OFF Disabled
EBTR0 = ON Enabled
EBTR0 = OFF Disabled
EBTR1 = ON Enabled
EBTR1 = OFF Disabled
EBTR2 = ON Enabled
EBTR2 = OFF Disabled
EBTR3 = ON Enabled
EBTR3 = OFF Disabled
EBTRB = ON Enabled
EBTRB = OFF Disabled
Configuration Settings
2004 Microchip Technology Inc. DS51518A-page 115
PIC18F448
Oscillator Selection:
Osc. Switch Enable:
Power Up Timer:
Brown Out Reset:
Brown Out Voltage:
Watchdog Timer:
Watchdog Postscaler:
Stack Overflow Reset:
Low Voltage ICSP:
OSC = LP LP
OSC = XT XT
OSC = HS HS
OSC = RC RC
OSC = EC EC-OSC2 as Clock Out
OSC = ECIO EC-OSC2 as RA6
OSC = HSPLL HS-PLL Enabled
OSC = RCIO RC-OSC2 as RA6
OSCS = ON Enabled
OSCS = OFF Disabled
PWRT = ON Enabled
PWRT = OFF Disabled
BOR = OFF Disabled
BOR = ON Enabled
BORV = 45 4.5V
BORV = 42 4.2V
BORV = 27 2.7V
BORV = 20 2.0V
WDT = OFF Disabled
WDT = ON Enabled
WDTPS = 1 1:1
WDTPS = 2 1:2
WDTPS = 4 1:4
WDTPS = 8 1:8
WDTPS = 16 1:16
WDTPS = 32 1:32
WDTPS = 64 1:64
WDTPS = 128 1:128
STVR = OFF Disabled
STVR = ON Enabled
LVP = OFF Disabled
LVP = ON Enabled
MPLAB® C18 C Compiler User’s Guide Addendum
DS51518A-page 116 2004 Microchip Technology Inc.
Background Debugger Enable:
Code Protection Block 0:
Code Protection Block 1:
Boot Block Code Protection:
Data EEPROM Code Protection:
Write Protection Block 0:
Write Protection Block 1:
Boot Block Write Protection:
Configuration Register Write Protection:
Data EEPROM Write Protection:
Table Read Protection Block 0:
Table Read Protection Block 1:
Boot Block Table Read Protection:
DEBUG = ON Enabled
DEBUG = OFF Disabled
CP0 = ON Enabled
CP0 = OFF Disabled
CP1 = ON Enabled
CP1 = OFF Disabled
CPB = ON Enabled
CPB = OFF Disabled
CPD = ON Enabled
CPD = OFF Disabled
WRT0 = ON Enabled
WRT0 = OFF Disabled
WRT1 = ON Enabled
WRT1 = OFF Disabled
WRTB = ON Enabled
WRTB = OFF Disabled
WRTC = ON Enabled
WRTC = OFF Disabled
WRTD = ON Enabled
WRTD = OFF Disabled
EBTR0 = ON Enabled
EBTR0 = OFF Disabled
EBTR1 = ON Enabled
EBTR1 = OFF Disabled
EBTRB = ON Enabled
EBTRB = OFF Disabled
Configuration Settings
2004 Microchip Technology Inc. DS51518A-page 117
PIC18F4480
Oscillator Selection bits:
Fail Safe Clock Monitor:
Internal External Osc. Switch:
Power Up Timer:
Brown Out Reset:
Brown Out Voltage:
Watchdog Timer:
OSC = LP LP
OSC = XT XT
OSC = HS HS
OSC = RC External RC with OSC2 as
divide by 4 clock out
OSC = EC EC with OSC2 as divide by 4
clock out
OSC = ECIO EC with OSC2 as RA6
OSC = HSPLL HS with HW enabled 4xPLL
OSC = RCIO External RC with OSC2 as RA6
OSC = IRCIO67 Internal RC with OSC2 as RA6
and OSC1 as RA7
OSC = IRCIO7 Internal RC with OSC1 as RA7
and OSC2 as divide by 4 clock
out
OSC = ERC1 External RC with OSC2 as
divide by 4 clock out
OSC = ERC External RC with OSC2 as
divide by 4 clock out
FCMENB = OFF Disabled
FCMENB = ON Enabled
IESOB = OFF Disabled
IESOB = ON Enabled
PWRT = ON Enabled
PWRT = OFF Disabled
BOR = OFF Disabled
BOR = SBORENCTRL Controlled by SBOREN
BOR = BOACTIVE Enabled whenever Part is Active
- SBOREN Disabled
BOR = BOHW Enabled in HW, SBOREN dis-
abled
BORV = 45 4.5V
BORV = 42 4.2V
BORV = 27 2.7V
BORV = 20 2.0V
WDT = OFF HW Disabled - SW Controlled
WDT = ON HW Enabled - SW Disabled
MPLAB® C18 C Compiler User’s Guide Addendum
DS51518A-page 118 2004 Microchip Technology Inc.
Watchdog Postscaler:
MCLR Enable:
Low Power Timer1 Oscillator:
Port B Pins Configured for A/D:
BackGround Debug:
Extended Instruction Set CPU:
Boot Block Size:
Low Voltage Programming:
WDTPS = 1 1:1
WDTPS = 2 1:2
WDTPS = 4 1:4
WDTPS = 8 1:8
WDTPS = 16 1:16
WDTPS = 32 1:32
WDTPS = 64 1:64
WDTPS = 128 1:128
WDTPS = 256 1:256
WDTPS = 512 1:512
WDTPS = 1024 1:1024
WDTPS = 2048 1:2048
WDTPS = 4096 1:4096
WDTPS = 8192 1:8192
WDTPS = 16384 1:16384
WDTPS = 32768 1:32768
MCLRE = OFF Disabled
MCLRE = ON Enabled
LPT1OSC = OFF Timer1 Low Power Oscillator
disabled
LPT1OSC = ON Timer1 Low Power Oscillator
Active
PBADEN = OFF Port B<4> and Port B<1:0> Con-
figured as Digital I/O Pins on
Reset
PBADEN = ON Port B<4> and Port B<1:0> Con-
figured as Analog Pins on Reset
DEBUG = ON Enabled
DEBUG = OFF Disabled
XINST = OFF Disabled
XINST = ON Enabled
BBSIZ = 1024 1K words (2K bytes) Boot Block
BBSIZ = 2048 2K words (4K bytes) Boot Block
LVP = OFF Disabled
LVP = ON Enabled
Configuration Settings
2004 Microchip Technology Inc. DS51518A-page 119
Stack Overflow/Underflow Reset:
Code Protection Block 0:
Code Protection Block 1:
Code Protection Block 2:
Code Protection Block 3:
Boot Block Code Protection:
Data EEPROM Code Protection:
Write Protection Block 0:
Write Protection Block 1:
Write Protection Block 2:
Write Protection Block 3:
Boot Block Write Protection:
Configuration Register Write Protection:
STVREN = OFF Disabled
STVREN = ON Enabled
CP0 = ON Enabled
CP0 = OFF Disabled
CP1 = ON Enabled
CP1 = OFF Disabled
CP2 = ON Enabled
CP2 = OFF Disabled
CP3 = ON Enabled
CP3 = OFF Disabled
CPB = ON Enabled
CPB = OFF Disabled
CPD = ON Enabled
CPD = OFF Disabled
WRT0 = ON Enabled
WRT0 = OFF Disabled
WRT1 = ON Enabled
WRT1 = OFF Disabled
WRT2 = ON Enabled
WRT2 = OFF Disabled
WRT3 = ON Enabled
WRT3 = OFF Disabled
WRTB = ON Enabled
WRTB = OFF Disabled
WRTC = ON Enabled
WRTC = OFF Disabled
MPLAB® C18 C Compiler User’s Guide Addendum
DS51518A-page 120 2004 Microchip Technology Inc.
Data EEPROM Write Protection:
Table Read Protection Block 0:
Table Read Protection Block 1:
Table Read Protection Block 2:
Table Read Protection Block 3:
Boot Block Table Read Protection:
PIC18F4510
Oscillator Selection:
Fail Safe Clock Monitor:
Internal External Osc. Switch Over:
Power Up Timer:
WRTD = ON Enabled
WRTD = OFF Disabled
EBTR0 = ON Enabled
EBTR0 = OFF Disabled
EBTR1 = ON Enabled
EBTR1 = OFF Disabled
EBTR2 = ON Enabled
EBTR2 = OFF Disabled
EBTR3 = ON Enabled
EBTR3 = OFF Disabled
EBTRB = ON Enabled
EBTRB = OFF Disabled
OSC = LP LP
OSC = XT XT
OSC = HS HS
OSC = RC RC
OSC = EC EC-OSC2 as Clock Out
OSC = ECIO6 EC-OSC2 as RA6
OSC = HSPLL HS-PLL Enabled
OSC = RCIO6 RC-OSC2 as RA6
OSC = INTIO67 INTRC-OSC2 as RA6, OSC1 as
RA7
OSC = INTIO7 INTRC-OSC2 as Clock Out,
OSC1 as RA7
FCMEN = OFF Disabled
FCMEN = ON Enabled
IESO = OFF Disabled
IESO = ON Enabled
PWRT = ON Enabled
PWRT = OFF Disabled
Configuration Settings
2004 Microchip Technology Inc. DS51518A-page 121
Brown Out Reset:
Brown Out Voltage:
Watchdog Timer:
Watchdog Postscaler:
MCLR Enable:
T1 Oscillator Enable:
Port B A/D Enable:
CCP2 Mux:
BOREN = OFF Disabled
BOREN = ON SBOREN Enabled
BOREN = NOSLP Enabled except SLEEP,
SBOREN Disabled
BOREN = SBORDIS Enabled, SBOREN Disabled
BORV = 46 4.6V
BORV = 43 4.3V
BORV = 28 2.8V
BORV = 21 2.1V
WDT = OFF Disabled
WDT = ON Enabled
WDTPS = 1 1:1
WDTPS = 2 1:2
WDTPS = 4 1:4
WDTPS = 8 1:8
WDTPS = 16 1:16
WDTPS = 32 1:32
WDTPS = 64 1:64
WDTPS = 128 1:128
WDTPS = 256 1:256
WDTPS = 512 1:512
WDTPS = 1024 1:1024
WDTPS = 2048 1:2048
WDTPS = 4096 1:4096
WDTPS = 8192 1:8192
WDTPS = 16384 1:16384
WDTPS = 32768 1:32768
MCLRE = OFF Disabled
MCLRE = ON Enabled
LPT1OSC = OFF Disabled
LPT1OSC = ON Enabled
PBADEN = OFF Port B<4:0> digital on RESET
PBADEN = ON Port B<4:0> analog on RESET
CCP2MX = PORTBE Muxed with RB3
CCP2MX = PORTC Muxed with RC1
MPLAB® C18 C Compiler User’s Guide Addendum
DS51518A-page 122 2004 Microchip Technology Inc.
Stack Overflow Reset:
Low Voltage ICSP:
XINST Enable:
Background Debugger Enable:
Code Protection Block 0:
Code Protection Block 1:
Code Protection Block 2:
Code Protection Block 3:
Boot Block Code Protection:
Write Protection Block 0:
Write Protection Block 1:
Write Protection Block 2:
Write Protection Block 3:
STVREN = OFF Disabled
STVREN = ON Enabled
LVP = OFF Disabled
LVP = ON Enabled
XINST = OFF Disabled
XINST = ON Enabled
DEBUG = ON Enabled
DEBUG = OFF Disabled
CP0 = ON Enabled
CP0 = OFF Disabled
CP1 = ON Enabled
CP1 = OFF Disabled
CP2 = ON Enabled
CP2 = OFF Disabled
CP3 = ON Enabled
CP3 = OFF Disabled
CPB = ON Enabled
CPB = OFF Disabled
WRT0 = ON Enabled
WRT0 = OFF Disabled
WRT1 = ON Enabled
WRT1 = OFF Disabled
WRT2 = ON Enabled
WRT2 = OFF Disabled
WRT3 = ON Enabled
WRT3 = OFF Disabled
Configuration Settings
2004 Microchip Technology Inc. DS51518A-page 123
Boot Block Write Protection:
Configuration Register Write Protection:
Table Read Protection Block 0:
Table Read Protection Block 1:
Table Read Protection Block 2:
Table Read Protection Block 3:
Boot Block Table Read Protection:
PIC18F4515
Oscillator Selection:
Fail Safe Clock Monitor:
Internal External Osc. Switch Over:
WRTB = ON Enabled
WRTB = OFF Disabled
WRTC = ON Enabled
WRTC = OFF Disabled
EBTR0 = ON Enabled
EBTR0 = OFF Disabled
EBTR1 = ON Enabled
EBTR1 = OFF Disabled
EBTR2 = ON Enabled
EBTR2 = OFF Disabled
EBTR3 = ON Enabled
EBTR3 = OFF Disabled
EBTRB = ON Enabled
EBTRB = OFF Disabled
OSC = LP LP
OSC = XT XT
OSC = HS HS
OSC = RC RC
OSC = EC EC-OSC2 as Clock Out
OSC = ECIO6 EC-OSC2 as RA6
OSC = HSPLL HS-PLL Enabled
OSC = RCIO6 RC-OSC2 as RA6
OSC = INTIO67 INTRC-OSC2 as RA6, OSC1 as
RA7
OSC = INTIO7 INTRC-OSC2 as Clock Out,
OSC1 as RA7
FCMEN = OFF Disabled
FCMEN = ON Enabled
IESO = OFF Disabled
IESO = ON Enabled
MPLAB® C18 C Compiler User’s Guide Addendum
DS51518A-page 124 2004 Microchip Technology Inc.
Power Up Timer:
Brown Out Reset:
Brown Out Voltage:
Watchdog Timer:
Watchdog Postscaler:
MCLR Enable:
Port B A/D Enable:
CCP2 Mux:
PWRT = ON Enabled
PWRT = OFF Disabled
BOREN = OFF Disabled
BOREN = ON Enabled
BOREN = NOSLP Enabled except SLEEP,
SBOREN Disabled
BOREN = SBORDIS Enabled, SBOREN Disabled
BORV = 45 4.5V
BORV = 42 4.2V
BORV = 27 2.7V
BORV = 25 2.5V
WDT = OFF Disabled
WDT = ON Enabled
WDTPS = 1 1:1
WDTPS = 2 1:2
WDTPS = 4 1:4
WDTPS = 8 1:8
WDTPS = 16 1:16
WDTPS = 32 1:32
WDTPS = 64 1:64
WDTPS = 128 1:128
WDTPS = 256 1:256
WDTPS = 512 1:512
WDTPS = 1024 1:1024
WDTPS = 2048 1:2048
WDTPS = 4096 1:4096
WDTPS = 8192 1:8192
WDTPS = 16384 1:16384
WDTPS = 32768 1:32768
MCLRE = OFF Disabled
MCLRE = ON Enabled
PBADEN = OFF Port B<4:0> digital on RESET
PBADEN = ON Port B<4:0> analog on RESET
CCP2MX = PORTBE Muxed with RB3
CCP2MX = PORTC Muxed with RC1
Configuration Settings
2004 Microchip Technology Inc. DS51518A-page 125
Stack Overflow Reset:
Low Voltage ICSP:
Enhanced CPU Enable:
Background Debugger Enable:
Code Protection Block 0:
Code Protection Block 1:
Code Protection Block 2:
Boot Block Code Protection:
Write Protection Block 0:
Write Protection Block 1:
Write Protection Block 2:
Boot Block Write Protection:
Configuration Register Write Protection:
STVREN = OFF Disabled
STVREN = ON Enabled
LVP = OFF Disabled
LVP = ON Enabled
ENHCPU = OFF Disabled
ENHCPU = ON Enabled
DEBUG = ON Enabled
DEBUG = OFF Disabled
CP0 = ON Enabled
CP0 = OFF Disabled
CP1 = ON Enabled
CP1 = OFF Disabled
CP2 = ON Enabled
CP2 = OFF Disabled
CPB = ON Enabled
CPB = OFF Disabled
WRT0 = ON Enabled
WRT0 = OFF Disabled
WRT1 = ON Enabled
WRT1 = OFF Disabled
WRT2 = ON Enabled
WRT2 = OFF Disabled
WRTB = ON Enabled
WRTB = OFF Disabled
WRTC = ON Enabled
WRTC = OFF Disabled
MPLAB® C18 C Compiler User’s Guide Addendum
DS51518A-page 126 2004 Microchip Technology Inc.
Table Read Protection Block 0:
Table Read Protection Block 1:
Table Read Protection Block 2:
Boot Block Table Read Protection:
PIC18F452
Oscillator Selection:
Osc. Switch Enable:
Power Up Timer:
Brown Out Reset:
Brown Out Voltage:
Watchdog Timer:
EBTR0 = ON Enabled
EBTR0 = OFF Disabled
EBTR1 = ON Enabled
EBTR1 = OFF Disabled
EBTR2 = ON Enabled
EBTR2 = OFF Disabled
EBTRB = ON Enabled
EBTRB = OFF Disabled
OSC = LP LP
OSC = XT XT
OSC = HS HS
OSC = RC RC
OSC = EC EC-OSC2 as Clock Out
OSC = ECIO EC-OSC2 as RA6
OSC = HSPLL HS-PLL Enabled
OSC = RCIO RC-OSC2 as RA6
OSCS = ON Enabled
OSCS = OFF Disabled
PWRT = ON Enabled
PWRT = OFF Disabled
BOR = OFF Disabled
BOR = ON Enabled
BORV = 45 4.5V
BORV = 42 4.2V
BORV = 27 2.7V
BORV = 25 2.5V
WDT = OFF Disabled
WDT = ON Enabled
Configuration Settings
2004 Microchip Technology Inc. DS51518A-page 127
Watchdog Postscaler:
CCP2 Mux:
Stack Overflow Reset:
Low Voltage ICSP:
Background Debugger Enable:
Code Protection Block 0:
Code Protection Block 1:
Code Protection Block 2:
Code Protection Block 3:
Boot Block Code Protection:
Data EEPROM Code Protection:
WDTPS = 1 1:1
WDTPS = 2 1:2
WDTPS = 4 1:4
WDTPS = 8 1:8
WDTPS = 16 1:16
WDTPS = 32 1:32
WDTPS = 64 1:64
WDTPS = 128 1:128
CCP2MUX = OFF Disable (RB3)
CCP2MUX = ON Enable (RC1)
STVR = OFF Disabled
STVR = ON Enabled
LVP = OFF Disabled
LVP = ON Enabled
DEBUG = ON Enabled
DEBUG = OFF Disabled
CP0 = ON Enabled
CP0 = OFF Disabled
CP1 = ON Enabled
CP1 = OFF Disabled
CP2 = ON Enabled
CP2 = OFF Disabled
CP3 = ON Enabled
CP3 = OFF Disabled
CPB = ON Enabled
CPB = OFF Disabled
CPD = ON Enabled
CPD = OFF Disabled
MPLAB® C18 C Compiler User’s Guide Addendum
DS51518A-page 128 2004 Microchip Technology Inc.
Write Protection Block 0:
Write Protection Block 1:
Write Protection Block 2:
Write Protection Block 3:
Boot Block Write Protection:
Configuration Register Write Protection:
Data EEPROM Write Protection:
Table Read Protection Block 0:
Table Read Protection Block 1:
Table Read Protection Block 2:
Table Read Protection Block 3:
Boot Block Table Read Protection:
WRT0 = ON Enabled
WRT0 = OFF Disabled
WRT1 = ON Enabled
WRT1 = OFF Disabled
WRT2 = ON Enabled
WRT2 = OFF Disabled
WRT3 = ON Enabled
WRT3 = OFF Disabled
WRTB = ON Enabled
WRTB = OFF Disabled
WRTC = ON Enabled
WRTC = OFF Disabled
WRTD = ON Enabled
WRTD = OFF Disabled
EBTR0 = ON Enabled
EBTR0 = OFF Disabled
EBTR1 = ON Enabled
EBTR1 = OFF Disabled
EBTR2 = ON Enabled
EBTR2 = OFF Disabled
EBTR3 = ON Enabled
EBTR3 = OFF Disabled
EBTRB = ON Enabled
EBTRB = OFF Disabled
Configuration Settings
2004 Microchip Technology Inc. DS51518A-page 129
PIC18F4520
Oscillator Selection:
Fail Safe Clock Monitor:
Internal External Osc. Switch Over:
Power Up Timer:
Brown Out Reset:
Brown Out Voltage:
Watchdog Timer:
OSC = LP LP
OSC = XT XT
OSC = HS HS
OSC = RC RC
OSC = EC EC-OSC2 as Clock Out
OSC = ECIO6 EC-OSC2 as RA6
OSC = HSPLL HS-PLL Enabled
OSC = RCIO6 RC-OSC2 as RA6
OSC = INTIO67 INTRC-OSC2 as RA6, OSC1 as
RA7
OSC = INTIO7 INTRC-OSC2 as Clock Out,
OSC1 as RA7
FCMEN = OFF Disabled
FCMEN = ON Enabled
IESO = OFF Disabled
IESO = ON Enabled
PWRT = ON Enabled
PWRT = OFF Disabled
BOREN = OFF Disabled
BOREN = ON SBOREN Enabled
BOREN = NOSLP Enabled except SLEEP,
SBOREN Disabled
BOREN = SBORDIS Enabled, SBOREN Disabled
BORV = 46 4.6V
BORV = 43 4.3V
BORV = 28 2.8V
BORV = 21 2.1V
WDT = OFF Disabled
WDT = ON Enabled
MPLAB® C18 C Compiler User’s Guide Addendum
DS51518A-page 130 2004 Microchip Technology Inc.
Watchdog Postscaler:
MCLR Enable:
T1 Oscillator Enable:
Port B A/D Enable:
CCP2 Mux:
Stack Overflow Reset:
Low Voltage ICSP:
XINST Enable:
Background Debugger Enable:
WDTPS = 1 1:1
WDTPS = 2 1:2
WDTPS = 4 1:4
WDTPS = 8 1:8
WDTPS = 16 1:16
WDTPS = 32 1:32
WDTPS = 64 1:64
WDTPS = 128 1:128
WDTPS = 256 1:256
WDTPS = 512 1:512
WDTPS = 1024 1:1024
WDTPS = 2048 1:2048
WDTPS = 4096 1:4096
WDTPS = 8192 1:8192
WDTPS = 16384 1:16384
WDTPS = 32768 1:32768
MCLRE = OFF Disabled
MCLRE = ON Enabled
LPT1OSC = OFF Disabled
LPT1OSC = ON Enabled
PBADEN = OFF Port B<4:0> digital on RESET
PBADEN = ON Port B<4:0> analog on RESET
CCP2MX = PORTBE Muxed with RB3
CCP2MX = PORTC Muxed with RC1
STVREN = OFF Disabled
STVREN = ON Enabled
LVP = OFF Disabled
LVP = ON Enabled
XINST = OFF Disabled
XINST = ON Enabled
DEBUG = ON Enabled
DEBUG = OFF Disabled
Configuration Settings
2004 Microchip Technology Inc. DS51518A-page 131
Code Protection Block 0:
Code Protection Block 1:
Code Protection Block 2:
Code Protection Block 3:
Boot Block Code Protection:
Data EEPROM Code Protection:
Write Protection Block 0:
Write Protection Block 1:
Write Protection Block 2:
Write Protection Block 3:
Boot Block Write Protection:
Configuration Register Write Protection:
Data EEPROM Write Protection:
CP0 = ON Enabled
CP0 = OFF Disabled
CP1 = ON Enabled
CP1 = OFF Disabled
CP2 = ON Enabled
CP2 = OFF Disabled
CP3 = ON Enabled
CP3 = OFF Disabled
CPB = ON Enabled
CPB = OFF Disabled
CPD = ON Enabled
CPD = OFF Disabled
WRT0 = ON Enabled
WRT0 = OFF Disabled
WRT1 = ON Enabled
WRT1 = OFF Disabled
WRT2 = ON Enabled
WRT2 = OFF Disabled
WRT3 = ON Enabled
WRT3 = OFF Disabled
WRTB = ON Enabled
WRTB = OFF Disabled
WRTC = ON Enabled
WRTC = OFF Disabled
WRTD = ON Enabled
WRTD = OFF Disabled
MPLAB® C18 C Compiler User’s Guide Addendum
DS51518A-page 132 2004 Microchip Technology Inc.
Table Read Protection Block 0:
Table Read Protection Block 1:
Table Read Protection Block 2:
Table Read Protection Block 3:
Boot Block Table Read Protection:
PIC18F4525
Oscillator Selection:
Fail Safe Clock Monitor:
Internal External Osc. Switch Over:
Power Up Timer:
EBTR0 = ON Enabled
EBTR0 = OFF Disabled
EBTR1 = ON Enabled
EBTR1 = OFF Disabled
EBTR2 = ON Enabled
EBTR2 = OFF Disabled
EBTR3 = ON Enabled
EBTR3 = OFF Disabled
EBTRB = ON Enabled
EBTRB = OFF Disabled
OSC = LP LP
OSC = XT XT
OSC = HS HS
OSC = RC RC
OSC = EC EC-OSC2 as Clock Out
OSC = ECIO6 EC-OSC2 as RA6
OSC = HSPLL HS-PLL Enabled
OSC = RCIO6 RC-OSC2 as RA6
OSC = INTIO67 INTRC-OSC2 as RA6, OSC1 as
RA7
OSC = INTIO7 INTRC-OSC2 as Clock Out,
OSC1 as RA7
FCMEN = OFF Disabled
FCMEN = ON Enabled
IESO = OFF Disabled
IESO = ON Enabled
PWRT = ON Enabled
PWRT = OFF Disabled
Configuration Settings
2004 Microchip Technology Inc. DS51518A-page 133
Brown Out Reset:
Brown Out Voltage:
Watchdog Timer:
Watchdog Postscaler:
MCLR Enable:
Port B A/D Enable:
CCP2 Mux:
Stack Overflow Reset:
BOREN = OFF Disabled
BOREN = ON Enabled
BOREN = NOSLP Enabled except SLEEP,
SBOREN Disabled
BOREN = SBORDIS Enabled, SBOREN Disabled
BORV = 45 4.5V
BORV = 42 4.2V
BORV = 27 2.7V
BORV = 25 2.5V
WDT = OFF Disabled
WDT = ON Enabled
WDTPS = 1 1:1
WDTPS = 2 1:2
WDTPS = 4 1:4
WDTPS = 8 1:8
WDTPS = 16 1:16
WDTPS = 32 1:32
WDTPS = 64 1:64
WDTPS = 128 1:128
WDTPS = 256 1:256
WDTPS = 512 1:512
WDTPS = 1024 1:1024
WDTPS = 2048 1:2048
WDTPS = 4096 1:4096
WDTPS = 8192 1:8192
WDTPS = 16384 1:16384
WDTPS = 32768 1:32768
MCLRE = OFF Disabled
MCLRE = ON Enabled
PBADEN = OFF Port B<4:0> digital on RESET
PBADEN = ON Port B<4:0> analog on RESET
CCP2MX = PORTBE Muxed with RB3
CCP2MX = PORTC Muxed with RC1
STVREN = OFF Disabled
STVREN = ON Enabled
MPLAB® C18 C Compiler User’s Guide Addendum
DS51518A-page 134 2004 Microchip Technology Inc.
Low Voltage ICSP:
Enhanced CPU Enable:
Background Debugger Enable:
Code Protection Block 0:
Code Protection Block 1:
Code Protection Block 2:
Boot Block Code Protection:
Data EEPROM Code Protection:
Write Protection Block 0:
Write Protection Block 1:
Write Protection Block 2:
Boot Block Write Protection:
Configuration Register Write Protection:
LVP = OFF Disabled
LVP = ON Enabled
ENHCPU = OFF Disabled
ENHCPU = ON Enabled
DEBUG = ON Enabled
DEBUG = OFF Disabled
CP0 = ON Enabled
CP0 = OFF Disabled
CP1 = ON Enabled
CP1 = OFF Disabled
CP2 = ON Enabled
CP2 = OFF Disabled
CPB = ON Enabled
CPB = OFF Disabled
CPD = ON Enabled
CPD = OFF Disabled
WRT0 = ON Enabled
WRT0 = OFF Disabled
WRT1 = ON Enabled
WRT1 = OFF Disabled
WRT2 = ON Enabled
WRT2 = OFF Disabled
WRTB = ON Enabled
WRTB = OFF Disabled
WRTC = ON Enabled
WRTC = OFF Disabled
Configuration Settings
2004 Microchip Technology Inc. DS51518A-page 135
Data EEPROM Write Protection:
Table Read Protection Block 0:
Table Read Protection Block 1:
Table Read Protection Block 2:
Boot Block Table Read Protection:
PIC18F4539
Oscillator Selection:
Power Up Timer:
Brown Out Reset:
Brown Out Voltage:
Watchdog Timer:
WRTD = ON Enabled
WRTD = OFF Disabled
EBTR0 = ON Enabled
EBTR0 = OFF Disabled
EBTR1 = ON Enabled
EBTR1 = OFF Disabled
EBTR2 = ON Enabled
EBTR2 = OFF Disabled
EBTRB = ON Enabled
EBTRB = OFF Disabled
OSC = LP LP
OSC = XT XT
OSC = HS HS
OSC = RC RC
OSC = EC EC-OSC2 as Clock Out
OSC = ECIO EC-OSC2 as RA6
OSC = HSPLL HS-PLL Enabled
OSC = RCIO RC-OSC2 as RA6
PWRT = ON Enabled
PWRT = OFF Disabled
BOR = OFF Disabled
BOR = ON Enabled
BORV = 45 4.5V
BORV = 42 4.2V
BORV = 27 2.7V
BORV = 25 2.5V
WDT = OFF Disabled
WDT = ON Enabled
MPLAB® C18 C Compiler User’s Guide Addendum
DS51518A-page 136 2004 Microchip Technology Inc.
Watchdog Postscaler:
Stack Overflow Reset:
Low Voltage ICSP:
Background Debugger Enable:
Code Protection Block 0:
Code Protection Block 1:
Code Protection Block 2:
Boot Block Code Protection:
Data EEPROM Code Protection:
Write Protection Block 0:
Write Protection Block 1:
WDTPS = 1 1:1
WDTPS = 2 1:2
WDTPS = 4 1:4
WDTPS = 8 1:8
WDTPS = 16 1:16
WDTPS = 32 1:32
WDTPS = 64 1:64
WDTPS = 128 1:128
STVR = OFF Disabled
STVR = ON Enabled
LVP = OFF Disabled
LVP = ON Enabled
DEBUG = ON Enabled
DEBUG = OFF Disabled
CP0 = ON Enabled
CP0 = OFF Disabled
CP1 = ON Enabled
CP1 = OFF Disabled
CP2 = ON Enabled
CP2 = OFF Disabled
CPB = ON Enabled
CPB = OFF Disabled
CPD = ON Enabled
CPD = OFF Disabled
WRT0 = ON Enabled
WRT0 = OFF Disabled
WRT1 = ON Enabled
WRT1 = OFF Disabled
Configuration Settings
2004 Microchip Technology Inc. DS51518A-page 137
Write Protection Block 2:
Boot Block Write Protection:
Configuration Register Write Protection:
Data EEPROM Write Protection:
Table Read Protection Block 0:
Table Read Protection Block 1:
Table Read Protection Block 2:
Boot Block Table Read Protection:
PIC18F4550
96MHz PLL Prescaler:
WRT2 = ON Enabled
WRT2 = OFF Disabled
WRTB = ON Enabled
WRTB = OFF Disabled
WRTC = ON Enabled
WRTC = OFF Disabled
WRTD = ON Enabled
WRTD = OFF Disabled
EBTR0 = ON Enabled
EBTR0 = OFF Disabled
EBTR1 = ON Enabled
EBTR1 = OFF Disabled
EBTR2 = ON Enabled
EBTR2 = OFF Disabled
EBTRB = ON Enabled
EBTRB = OFF Disabled
PLLDIV = 1 No devide (4MHz input)
PLLDIV = 2 Divide by 2 (8MHz input)
PLLDIV = 3 Divide by 3 (12MHz input)
PLLDIV = 4 Divide by 4 (16MHz input)
PLLDIV = 5 Divide by 5 (20MHz input)
PLLDIV = 6 Divide by 6 (24MHz input)
PLLDIV = 10 Divide by 10 (40MHz input)
PLLDIV = 12 Divide by 12 (48MHz input)
MPLAB® C18 C Compiler User’s Guide Addendum
DS51518A-page 138 2004 Microchip Technology Inc.
CPU System Clock Postscaler:
Full-Speed USB Clock Source Selection:
Oscillator Selection bits:
Fail Safe Clock Monitor:
Internal/External Switch Over:
Power Up Timer:
CPUDIV = OSC1_PLL2 [OSC1/OSC2 Src: /1][96MHz
PLL Src: /2]
CPUDIV = OSC2_PLL3 [OSC1/OSC2 Src: /2][96MHz
PLL Src: /3]
CPUDIV = OSC3_PLL4 [OSC1/OSC2 Src: /3][96MHz
PLL Src: /4]
CPUDIV = OSC4_PLL6 [OSC1/OSC2 Src: /4][96MHz
PLL Src: /6]
USBDIV = 1 Clock source from OSC1/OSC2
USBDIV = 2 Clock source from 96MHz PLL/2
FOSC = XT_XT XT oscillator, XT used by USB
FOSC = XTPLL_XT XT oscillator, PLL enabled, XT
used by USB
FOSC = ECIO_EC External clock, port function on
RA6, EC used by USB
FOSC = EC_EC External clock, CLKOUT on
RA6, EC used by USB
FOSC = ECPLLIO_EC External clock, PLL enabled,
port function on RA6, EC used
by USB
FOSC = ECPLL_EC External clock, PLL enabled,
CLKOUT on RA6, EC used by
USB
FOSC = INTOSCIO_EC Internal oscillator, port function
on RA6, EC used by USB
FOSC = INTOSC_EC Internal oscillator, CLKOUT on
RA6, EC used by USB
FOSC = INTOSC_XT Internal oscillator, XT used by
USB
FOSC = INTOSC_HS Internal oscillator, HS used by
USB
FOSC = HS HS oscillator, HS used by USB
FOSC = HSPLL_HS HS oscillator, PLL enabled, HS
used by USB
FCMEM = OFF Disabled
FCMEM = ON Enabled
IESO = OFF Disabled
IESO = ON Enabled
PWRT = ON Enabled
PWRT = OFF Disabled
Configuration Settings
2004 Microchip Technology Inc. DS51518A-page 139
Brown Out Reset:
Brown Out Voltage:
USB Voltage Regulator Enable:
Watchdog Timer:
Watchdog Postscaler:
MCLR Enable:
Low Power Timer1 Oscillator Enable:
BOR = OFF Disabled
BOR = SOFT Controled by SBOREN
BOR = ON_ACTIVE Enabled when the device is not
in SLEEP, SBOREN bit is dis-
abled
BOR = ON Enabled, SBOREN bit is dis-
abled
BORV = 46 4.6V
BORV = 43 4.3V
BORV = 28 2.8V
BORV = 21 2.1V
VREGEN = OFF Disabled
VREGEN = ON Enabled
WDT = OFF HW Disabled - SW Controlled
WDT = ON HW Enabled - SW Disabled
WDTPS = 1 1:1
WDTPS = 2 1:2
WDTPS = 4 1:4
WDTPS = 8 1:8
WDTPS = 16 1:16
WDTPS = 32 1:32
WDTPS = 64 1:64
WDTPS = 128 1:128
WDTPS = 256 1:256
WDTPS = 512 1:512
WDTPS = 1024 1:1024
WDTPS = 2048 1:2048
WDTPS = 4096 1:4096
WDTPS = 8192 1:8192
WDTPS = 16384 1:16384
WDTPS = 32768 1:32768
MCLRE = OFF Disabled
MCLRE = ON Enabled
LPT1OSC = OFF Timer1 oscillator configured for
high power
LPT1OSC = ON Timer1 oscillator configured for
low power
MPLAB® C18 C Compiler User’s Guide Addendum
DS51518A-page 140 2004 Microchip Technology Inc.
Port B A/D Enable:
CCP2 Mux bit:
Stack Overflow Reset:
Low Voltage ICSP:
Dedicated In-Circuit Debug/Programming Enable:
Extended Instruction Set Enable:
Background Debugger Enable:
Code Protection Block 0:
Code Protection Block 1:
Code Protection Block 2:
Code Protection Block 3:
Boot Block Code Protection:
PBADEN = OFF PortB<4:0> pins are configured
as digital I/O on RESET
PBADEN = ON PortB<4:0> pins are configured
as analog input on RESET
CCP2MX = OFF CCP2 input/output is multi-
plexed with RB3
CCP2MX = ON CCP2 input/output is multi-
plexed with RC1
STVREN = OFF Disabled
STVREN = ON Enabled
LVP = OFF Disabled
LVP = ON Enabled
ICPRT = OFF Disabled
ICPRT = ON Enabled
XINST = OFF Disabled
XINST = ON Enabled
DEBUG = ON Enabled
DEBUG = OFF Disabled
CP0 = ON Enabled
CP0 = OFF Disabled
CP1 = ON Enabled
CP1 = OFF Disabled
CP2 = ON Enabled
CP2 = OFF Disabled
CP3 = ON Enabled
CP3 = OFF Disabled
CPB = ON Enabled
CPB = OFF Disabled
Configuration Settings
2004 Microchip Technology Inc. DS51518A-page 141
Data EEPROM Code Protection:
Write Protection Block 0:
Write Protection Block 1:
Write Protection Block 2:
Write Protection Block 3:
Boot Block Write Protection:
Configuration Register Write Protection:
Data EEPROM Write Protection:
Table Read Protection Block 0:
Table Read Protection Block 1:
Table Read Protection Block 2:
Table Read Protection Block 3:
Boot Block Table Read Protection:
CPD = ON Enabled
CPD = OFF Disabled
WRT0 = ON Enabled
WRT0 = OFF Disabled
WRT1 = ON Enabled
WRT1 = OFF Disabled
WRT2 = ON Enabled
WRT2 = OFF Disabled
WRT3 = ON Enabled
WRT3 = OFF Disabled
WRTB = ON Enabled
WRTB = OFF Disabled
WRTC = ON Enabled
WRTC = OFF Disabled
WRTD = ON Enabled
WRTD = OFF Disabled
EBTR0 = ON Enabled
EBTR0 = OFF Disabled
EBTR1 = ON Enabled
EBTR1 = OFF Disabled
EBTR2 = ON Enabled
EBTR2 = OFF Disabled
EBTR3 = ON Enabled
EBTR3 = OFF Disabled
EBTRB = ON Enabled
EBTRB = OFF Disabled
MPLAB® C18 C Compiler User’s Guide Addendum
DS51518A-page 142 2004 Microchip Technology Inc.
PIC18F458
Oscillator Selection:
Osc. Switch Enable:
Power Up Timer:
Brown Out Reset:
Brown Out Voltage:
Watchdog Timer:
Watchdog Postscaler:
Stack Overflow Reset:
Low Voltage ICSP:
OSC = LP LP
OSC = XT XT
OSC = HS HS
OSC = RC RC
OSC = EC EC-OSC2 as Clock Out
OSC = ECIO EC-OSC2 as RA6
OSC = HSPLL HS-PLL Enabled
OSC = RCIO RC-OSC2 as RA6
OSCS = ON Enabled
OSCS = OFF Disabled
PWRT = ON Enabled
PWRT = OFF Disabled
BOR = OFF Disabled
BOR = ON Enabled
BORV = 45 4.5V
BORV = 42 4.2V
BORV = 27 2.7V
BORV = 20 2.0V
WDT = OFF Disabled
WDT = ON Enabled
WDTPS = 1 1:1
WDTPS = 2 1:2
WDTPS = 4 1:4
WDTPS = 8 1:8
WDTPS = 16 1:16
WDTPS = 32 1:32
WDTPS = 64 1:64
WDTPS = 128 1:128
STVR = OFF Disabled
STVR = ON Enabled
LVP = OFF Disabled
LVP = ON Enabled
Configuration Settings
2004 Microchip Technology Inc. DS51518A-page 143
Background Debugger Enable:
Code Protection Block 0:
Code Protection Block 1:
Code Protection Block 2:
Code Protection Block 3:
Boot Block Code Protection:
Data EEPROM Code Protection:
Write Protection Block 0:
Write Protection Block 1:
Write Protection Block 2:
Write Protection Block 3:
Boot Block Write Protection:
Configuration Register Write Protection:
DEBUG = ON Enabled
DEBUG = OFF Disabled
CP0 = ON Enabled
CP0 = OFF Disabled
CP1 = ON Enabled
CP1 = OFF Disabled
CP2 = ON Enabled
CP2 = OFF Disabled
CP3 = ON Enabled
CP3 = OFF Disabled
CPB = ON Enabled
CPB = OFF Disabled
CPD = ON Enabled
CPD = OFF Disabled
WRT0 = ON Enabled
WRT0 = OFF Disabled
WRT1 = ON Enabled
WRT1 = OFF Disabled
WRT2 = ON Enabled
WRT2 = OFF Disabled
WRT3 = ON Enabled
WRT3 = OFF Disabled
WRTB = ON Enabled
WRTB = OFF Disabled
WRTC = ON Enabled
WRTC = OFF Disabled
MPLAB® C18 C Compiler User’s Guide Addendum
DS51518A-page 144 2004 Microchip Technology Inc.
Data EEPROM Write Protection:
Table Read Protection Block 0:
Table Read Protection Block 1:
Table Read Protection Block 2:
Table Read Protection Block 3:
Boot Block Table Read Protection:
PIC18F4580
Oscillator Selection bits:
Fail Safe Clock Monitor:
WRTD = ON Enabled
WRTD = OFF Disabled
EBTR0 = ON Enabled
EBTR0 = OFF Disabled
EBTR1 = ON Enabled
EBTR1 = OFF Disabled
EBTR2 = ON Enabled
EBTR2 = OFF Disabled
EBTR3 = ON Enabled
EBTR3 = OFF Disabled
EBTRB = ON Enabled
EBTRB = OFF Disabled
OSC = LP LP
OSC = XT XT
OSC = HS HS
OSC = RC External RC with OSC2 as
divide by 4 clock out
OSC = EC EC with OSC2 as divide by 4
clock out
OSC = ECIO EC with OSC2 as RA6
OSC = HSPLL HS with HW enabled 4xPLL
OSC = RCIO External RC with OSC2 as RA6
OSC = IRCIO67 Internal RC with OSC2 as RA6
and OSC1 as RA7
OSC = IRCIO7 Internal RC with OSC1 as RA7
and OSC2 as divide by 4 clock
out
OSC = ERC1 External RC with OSC2 as
divide by 4 clock out
OSC = ERC External RC with OSC2 as
divide by 4 clock out
FCMENB = OFF Disabled
FCMENB = ON Enabled
Configuration Settings
2004 Microchip Technology Inc. DS51518A-page 145
Internal External Osc. Switch:
Power Up Timer:
Brown Out Reset:
Brown Out Voltage:
Watchdog Timer:
Watchdog Postscaler:
MCLR Enable:
IESOB = OFF Disabled
IESOB = ON Enabled
PWRT = ON Enabled
PWRT = OFF Disabled
BOR = OFF Disabled
BOR = SBORENCTRL Controlled by SBOREN
BOR = BOACTIVE Enabled whenever Part is Active
- SBOREN Disabled
BOR = BOHW Enabled in HW, SBOREN dis-
abled
BORV = 45 4.5V
BORV = 42 4.2V
BORV = 27 2.7V
BORV = 20 2.0V
WDT = OFF HW Disabled - SW Controlled
WDT = ON HW Enabled - SW Disabled
WDTPS = 1 1:1
WDTPS = 2 1:2
WDTPS = 4 1:4
WDTPS = 8 1:8
WDTPS = 16 1:16
WDTPS = 32 1:32
WDTPS = 64 1:64
WDTPS = 128 1:128
WDTPS = 256 1:256
WDTPS = 512 1:512
WDTPS = 1024 1:1024
WDTPS = 2048 1:2048
WDTPS = 4096 1:4096
WDTPS = 8192 1:8192
WDTPS = 16384 1:16384
WDTPS = 32768 1:32768
MCLRE = OFF Disabled
MCLRE = ON Enabled
MPLAB® C18 C Compiler User’s Guide Addendum
DS51518A-page 146 2004 Microchip Technology Inc.
Low Power Timer1 Oscillator:
Port B Pins Configured for A/D:
BackGround Debug:
Extended Instruction Set CPU:
Boot Block Size:
Low Voltage Programming:
Stack Overflow/Underflow Reset:
Code Protection Block 0:
Code Protection Block 1:
Code Protection Block 2:
Code Protection Block 3:
Boot Block Code Protection:
LPT1OSC = OFF Timer1 Low Power Oscillator
disabled
LPT1OSC = ON Timer1 Low Power Oscillator
Active
PBADEN = OFF Port B<4> and Port B<1:0> Con-
figured as Digital I/O Pins on
Reset
PBADEN = ON Port B<4> and Port B<1:0> Con-
figured as Analog Pins on Reset
DEBUG = ON Enabled
DEBUG = OFF Disabled
XINST = OFF Disabled
XINST = ON Enabled
BBSIZ = 1024 1K words (2K bytes) Boot Block
BBSIZ = 2048 2K words (4K bytes) Boot Block
LVP = OFF Disabled
LVP = ON Enabled
STVREN = OFF Disabled
STVREN = ON Enabled
CP0 = ON Enabled
CP0 = OFF Disabled
CP1 = ON Enabled
CP1 = OFF Disabled
CP2 = ON Enabled
CP2 = OFF Disabled
CP3 = ON Enabled
CP3 = OFF Disabled
CPB = ON Enabled
CPB = OFF Disabled
Configuration Settings
2004 Microchip Technology Inc. DS51518A-page 147
Data EEPROM Code Protection:
Write Protection Block 0:
Write Protection Block 1:
Write Protection Block 2:
Write Protection Block 3:
Boot Block Write Protection:
Configuration Register Write Protection:
Data EEPROM Write Protection:
Table Read Protection Block 0:
Table Read Protection Block 1:
Table Read Protection Block 2:
Table Read Protection Block 3:
Boot Block Table Read Protection:
CPD = ON Enabled
CPD = OFF Disabled
WRT0 = ON Enabled
WRT0 = OFF Disabled
WRT1 = ON Enabled
WRT1 = OFF Disabled
WRT2 = ON Enabled
WRT2 = OFF Disabled
WRT3 = ON Enabled
WRT3 = OFF Disabled
WRTB = ON Enabled
WRTB = OFF Disabled
WRTC = ON Enabled
WRTC = OFF Disabled
WRTD = ON Enabled
WRTD = OFF Disabled
EBTR0 = ON Enabled
EBTR0 = OFF Disabled
EBTR1 = ON Enabled
EBTR1 = OFF Disabled
EBTR2 = ON Enabled
EBTR2 = OFF Disabled
EBTR3 = ON Enabled
EBTR3 = OFF Disabled
EBTRB = ON Enabled
EBTRB = OFF Disabled
MPLAB® C18 C Compiler User’s Guide Addendum
DS51518A-page 148 2004 Microchip Technology Inc.
PIC18F4585
Oscillator Selection bits:
Fail Safe Clock Monitor:
Internal External Osc. Switch:
Power Up Timer:
Brown Out Reset:
Brown Out Voltage:
Watchdog Timer:
OSC = LP LP
OSC = XT XT
OSC = HS HS
OSC = RC External RC with OSC2 as
divide by 4 clock out
OSC = EC EC with OSC2 as divide by 4
clock out
OSC = ECIO EC with OSC2 as RA6
OSC = HSPLL HS with HW enabled 4xPLL
OSC = RCIO External RC with OSC2 as RA6
OSC = IRCIO67 Internal RC with OSC2 as RA6
and OSC1 as RA7
OSC = IRCIO7 Internal RC with OSC1 as RA7
and OSC2 as divide by 4 clock
out
OSC = ERC1 External RC with OSC2 as
divide by 4 clock out
OSC = ERC External RC with OSC2 as
divide by 4 clock out
FCMENB = OFF Disabled
FCMENB = ON Enabled
IESOB = OFF Disabled
IESOB = ON Enabled
PWRT = ON Enabled
PWRT = OFF Disabled
BOR = OFF Disabled
BOR = SBORENCTRL Controlled by SBOREN
BOR = BOACTIVE Enabled whenever Part is Active
- SBOREN Disabled
BOR = BOHW Enabled in HW, SBOREN dis-
abled
BORV = 45 4.5V
BORV = 42 4.2V
BORV = 27 2.7V
BORV = 20 2.0V
WDT = OFF HW Disabled - SW Controlled
WDT = ON HW Enabled - SW Disabled
Configuration Settings
2004 Microchip Technology Inc. DS51518A-page 149
Watchdog Postscaler:
MCLR Enable:
Low Power Timer1 Oscillator:
Port B Pins Configured for A/D:
BackGround Debug:
Enhanced Instruction Set CPU:
Boot Block Size:
Low Voltage Programming:
WDTPS = 1 1:1
WDTPS = 2 1:2
WDTPS = 4 1:4
WDTPS = 8 1:8
WDTPS = 16 1:16
WDTPS = 32 1:32
WDTPS = 64 1:64
WDTPS = 128 1:128
WDTPS = 256 1:256
WDTPS = 512 1:512
WDTPS = 1024 1:1024
WDTPS = 2048 1:2048
WDTPS = 4096 1:4096
WDTPS = 8192 1:8192
WDTPS = 16384 1:16384
WDTPS = 32768 1:32768
MCLRE = OFF Disabled
MCLRE = ON Enabled
LPT1OSC = OFF Timer1 Low Power Oscillator
disabled
LPT1OSC = ON Timer1 Low Power Oscillator
Active
PBADEN = OFF Port B<4> and Port B<1:0> Con-
figured as Digital I/O Pins on
Reset
PBADEN = ON Port B<4> and Port B<1:0> Con-
figured as Analog Pins on Reset
DEBUG = ON Enabled
DEBUG = OFF Disabled
XINST = OFF Disabled
XINST = ON Enabled
BBSIZ = 1024 1K words (2K bytes) Boot Block
BBSIZ = 2048 2K words (4K bytes) Boot Block
BBSIZ = 4096 4K words (8K bytes) Boot Block
LVP = OFF Disabled
LVP = ON Enabled
MPLAB® C18 C Compiler User’s Guide Addendum
DS51518A-page 150 2004 Microchip Technology Inc.
Stack Overflow/Underflow Reset:
Code Protection Block 0:
Code Protection Block 1:
Code Protection Block 2:
Code Protection Block 3:
Boot Block Code Protection:
Data EEPROM Code Protection:
Write Protection Block 0:
Write Protection Block 1:
Write Protection Block 2:
Write Protection Block 3:
Boot Block Write Protection:
Configuration Register Write Protection:
STVREN = OFF Disabled
STVREN = ON Enabled
CP0 = ON Enabled
CP0 = OFF Disabled
CP1 = ON Enabled
CP1 = OFF Disabled
CP2 = ON Enabled
CP2 = OFF Disabled
CP3 = ON Enabled
CP3 = OFF Disabled
CPB = ON Enabled
CPB = OFF Disabled
CPD = ON Enabled
CPD = OFF Disabled
WRT0 = ON Enabled
WRT0 = OFF Disabled
WRT1 = ON Enabled
WRT1 = OFF Disabled
WRT2 = ON Enabled
WRT2 = OFF Disabled
WRT3 = ON Enabled
WRT3 = OFF Disabled
WRTB = ON Enabled
WRTB = OFF Disabled
WRTC = ON Enabled
WRTC = OFF Disabled
Configuration Settings
2004 Microchip Technology Inc. DS51518A-page 151
Data EEPROM Write Protection:
Table Read Protection Block 0:
Table Read Protection Block 1:
Table Read Protection Block 2:
Table Read Protection Block 3:
Boot Block Table Read Protection:
PIC18F4610
Oscillator Selection:
Fail Safe Clock Monitor:
Internal External Osc. Switch Over:
Power Up Timer:
WRTD = ON Enabled
WRTD = OFF Disabled
EBTR0 = ON Enabled
EBTR0 = OFF Disabled
EBTR1 = ON Enabled
EBTR1 = OFF Disabled
EBTR2 = ON Enabled
EBTR2 = OFF Disabled
EBTR3 = ON Enabled
EBTR3 = OFF Disabled
EBTRB = ON Enabled
EBTRB = OFF Disabled
OSC = LP LP
OSC = XT XT
OSC = HS HS
OSC = RC RC
OSC = EC EC-OSC2 as Clock Out
OSC = ECIO6 EC-OSC2 as RA6
OSC = HSPLL HS-PLL Enabled
OSC = RCIO6 RC-OSC2 as RA6
OSC = INTIO67 INTRC-OSC2 as RA6, OSC1 as
RA7
OSC = INTIO7 INTRC-OSC2 as Clock Out,
OSC1 as RA7
FCMEN = OFF Disabled
FCMEN = ON Enabled
IESO = OFF Disabled
IESO = ON Enabled
PWRT = ON Enabled
PWRT = OFF Disabled
MPLAB® C18 C Compiler User’s Guide Addendum
DS51518A-page 152 2004 Microchip Technology Inc.
Brown Out Reset:
Brown Out Voltage:
Watchdog Timer:
Watchdog Postscaler:
MCLR Enable:
Port B A/D Enable:
CCP2 Mux:
Stack Overflow Reset:
BOREN = OFF Disabled
BOREN = ON Enabled
BOREN = NOSLP Enabled except SLEEP,
SBOREN Disabled
BOREN = SBORDIS Enabled, SBOREN Disabled
BORV = 45 4.5V
BORV = 42 4.2V
BORV = 27 2.7V
BORV = 25 2.5V
WDT = OFF Disabled
WDT = ON Enabled
WDTPS = 1 1:1
WDTPS = 2 1:2
WDTPS = 4 1:4
WDTPS = 8 1:8
WDTPS = 16 1:16
WDTPS = 32 1:32
WDTPS = 64 1:64
WDTPS = 128 1:128
WDTPS = 256 1:256
WDTPS = 512 1:512
WDTPS = 1024 1:1024
WDTPS = 2048 1:2048
WDTPS = 4096 1:4096
WDTPS = 8192 1:8192
WDTPS = 16384 1:16384
WDTPS = 32768 1:32768
MCLRE = OFF Disabled
MCLRE = ON Enabled
PBADEN = OFF Port B<4:0> digital on RESET
PBADEN = ON Port B<4:0> analog on RESET
CCP2MX = PORTBE Muxed with RB3
CCP2MX = PORTC Muxed with RC1
STVREN = OFF Disabled
STVREN = ON Enabled
Configuration Settings
2004 Microchip Technology Inc. DS51518A-page 153
Low Voltage ICSP:
Enhanced CPU Enable:
Background Debugger Enable:
Code Protection Block 0:
Code Protection Block 1:
Code Protection Block 2:
Code Protection Block 3:
Boot Block Code Protection:
Write Protection Block 0:
Write Protection Block 1:
Write Protection Block 2:
Write Protection Block 3:
Boot Block Write Protection:
LVP = OFF Disabled
LVP = ON Enabled
ENHCPU = OFF Disabled
ENHCPU = ON Enabled
DEBUG = ON Enabled
DEBUG = OFF Disabled
CP0 = ON Enabled
CP0 = OFF Disabled
CP1 = ON Enabled
CP1 = OFF Disabled
CP2 = ON Enabled
CP2 = OFF Disabled
CP3 = ON Enabled
CP3 = OFF Disabled
CPB = ON Enabled
CPB = OFF Disabled
WRT0 = ON Enabled
WRT0 = OFF Disabled
WRT1 = ON Enabled
WRT1 = OFF Disabled
WRT2 = ON Enabled
WRT2 = OFF Disabled
WRT3 = ON Enabled
WRT3 = OFF Disabled
WRTB = ON Enabled
WRTB = OFF Disabled
MPLAB® C18 C Compiler User’s Guide Addendum
DS51518A-page 154 2004 Microchip Technology Inc.
Configuration Register Write Protection:
Table Read Protection Block 0:
Table Read Protection Block 1:
Table Read Protection Block 2:
Table Read Protection Block 3:
Boot Block Table Read Protection:
PIC18F4620
Oscillator Selection:
Fail Safe Clock Monitor:
Internal External Osc. Switch Over:
Power Up Timer:
WRTC = ON Enabled
WRTC = OFF Disabled
EBTR0 = ON Enabled
EBTR0 = OFF Disabled
EBTR1 = ON Enabled
EBTR1 = OFF Disabled
EBTR2 = ON Enabled
EBTR2 = OFF Disabled
EBTR3 = ON Enabled
EBTR3 = OFF Disabled
EBTRB = ON Enabled
EBTRB = OFF Disabled
OSC = LP LP
OSC = XT XT
OSC = HS HS
OSC = RC RC
OSC = EC EC-OSC2 as Clock Out
OSC = ECIO6 EC-OSC2 as RA6
OSC = HSPLL HS-PLL Enabled
OSC = RCIO6 RC-OSC2 as RA6
OSC = INTIO67 INTRC-OSC2 as RA6, OSC1 as
RA7
OSC = INTIO7 INTRC-OSC2 as Clock Out,
OSC1 as RA7
FCMEN = OFF Disabled
FCMEN = ON Enabled
IESO = OFF Disabled
IESO = ON Enabled
PWRT = ON Enabled
PWRT = OFF Disabled
Configuration Settings
2004 Microchip Technology Inc. DS51518A-page 155
Brown Out Reset:
Brown Out Voltage:
Watchdog Timer:
Watchdog Postscaler:
MCLR Enable:
T1 Oscillator Enable:
Port B A/D Enable:
CCP2 Mux:
BOREN = OFF Disabled
BOREN = ON SBOREN Enabled
BOREN = NOSLP Enabled except SLEEP,
SBOREN Disabled
BOREN = SBORDIS Enabled, SBOREN Disabled
BORV = 46 4.6V
BORV = 43 4.3V
BORV = 28 2.8V
BORV = 21 2.1V
WDT = OFF Disabled
WDT = ON Enabled
WDTPS = 1 1:1
WDTPS = 2 1:2
WDTPS = 4 1:4
WDTPS = 8 1:8
WDTPS = 16 1:16
WDTPS = 32 1:32
WDTPS = 64 1:64
WDTPS = 128 1:128
WDTPS = 256 1:256
WDTPS = 512 1:512
WDTPS = 1024 1:1024
WDTPS = 2048 1:2048
WDTPS = 4096 1:4096
WDTPS = 8192 1:8192
WDTPS = 16384 1:16384
WDTPS = 32768 1:32768
MCLRE = OFF Disabled
MCLRE = ON Enabled
LPT1OSC = OFF Disabled
LPT1OSC = ON Enabled
PBADEN = OFF Port B<4:0> digital on RESET
PBADEN = ON Port B<4:0> analog on RESET
CCP2MX = PORTBE Muxed with RB3
CCP2MX = PORTC Muxed with RC1
MPLAB® C18 C Compiler User’s Guide Addendum
DS51518A-page 156 2004 Microchip Technology Inc.
Stack Overflow Reset:
Low Voltage ICSP:
XINST Enable:
Background Debugger Enable:
Code Protection Block 0:
Code Protection Block 1:
Code Protection Block 2:
Code Protection Block 3:
Boot Block Code Protection:
Data EEPROM Code Protection:
Write Protection Block 0:
Write Protection Block 1:
Write Protection Block 2:
STVREN = OFF Disabled
STVREN = ON Enabled
LVP = OFF Disabled
LVP = ON Enabled
XINST = OFF Disabled
XINST = ON Enabled
DEBUG = ON Enabled
DEBUG = OFF Disabled
CP0 = ON Enabled
CP0 = OFF Disabled
CP1 = ON Enabled
CP1 = OFF Disabled
CP2 = ON Enabled
CP2 = OFF Disabled
CP3 = ON Enabled
CP3 = OFF Disabled
CPB = ON Enabled
CPB = OFF Disabled
CPD = ON Enabled
CPD = OFF Disabled
WRT0 = ON Enabled
WRT0 = OFF Disabled
WRT1 = ON Enabled
WRT1 = OFF Disabled
WRT2 = ON Enabled
WRT2 = OFF Disabled
Configuration Settings
2004 Microchip Technology Inc. DS51518A-page 157
Write Protection Block 3:
Boot Block Write Protection:
Configuration Register Write Protection:
Data EEPROM Write Protection:
Table Read Protection Block 0:
Table Read Protection Block 1:
Table Read Protection Block 2:
Table Read Protection Block 3:
Boot Block Table Read Protection:
WRT3 = ON Enabled
WRT3 = OFF Disabled
WRTB = ON Enabled
WRTB = OFF Disabled
WRTC = ON Enabled
WRTC = OFF Disabled
WRTD = ON Enabled
WRTD = OFF Disabled
EBTR0 = ON Enabled
EBTR0 = OFF Disabled
EBTR1 = ON Enabled
EBTR1 = OFF Disabled
EBTR2 = ON Enabled
EBTR2 = OFF Disabled
EBTR3 = ON Enabled
EBTR3 = OFF Disabled
EBTRB = ON Enabled
EBTRB = OFF Disabled
MPLAB® C18 C Compiler User’s Guide Addendum
DS51518A-page 158 2004 Microchip Technology Inc.
PIC18F4680
Oscillator Selection bits:
Fail Safe Clock Monitor:
Internal External Osc. Switch:
Power Up Timer:
Brown Out Reset:
Brown Out Voltage:
Watchdog Timer:
OSC = LP LP
OSC = XT XT
OSC = HS HS
OSC = RC External RC with OSC2 as
divide by 4 clock out
OSC = EC EC with OSC2 as divide by 4
clock out
OSC = ECIO EC with OSC2 as RA6
OSC = HSPLL HS with HW enabled 4xPLL
OSC = RCIO External RC with OSC2 as RA6
OSC = IRCIO67 Internal RC with OSC2 as RA6
and OSC1 as RA7
OSC = IRCIO7 Internal RC with OSC1 as RA7
and OSC2 as divide by 4 clock
out
OSC = ERC1 External RC with OSC2 as
divide by 4 clock out
OSC = ERC External RC with OSC2 as
divide by 4 clock out
FCMENB = OFF Disabled
FCMENB = ON Enabled
IESOB = OFF Disabled
IESOB = ON Enabled
PWRT = ON Enabled
PWRT = OFF Disabled
BOR = OFF Disabled
BOR = SBORENCTRL Controlled by SBOREN
BOR = BOACTIVE Enabled whenever Part is Active
- SBOREN Disabled
BOR = BOHW Enabled in HW, SBOREN dis-
abled
BORV = 45 4.5V
BORV = 42 4.2V
BORV = 27 2.7V
BORV = 20 2.0V
WDT = OFF HW Disabled - SW Controlled
WDT = ON HW Enabled - SW Disabled
Configuration Settings
2004 Microchip Technology Inc. DS51518A-page 159
Watchdog Postscaler:
MCLR Enable:
Low Power Timer1 Oscillator:
Port B Pins Configured for A/D:
BackGround Debug:
Enhanced Instruction Set CPU:
Boot Block Size:
Low Voltage Programming:
WDTPS = 1 1:1
WDTPS = 2 1:2
WDTPS = 4 1:4
WDTPS = 8 1:8
WDTPS = 16 1:16
WDTPS = 32 1:32
WDTPS = 64 1:64
WDTPS = 128 1:128
WDTPS = 256 1:256
WDTPS = 512 1:512
WDTPS = 1024 1:1024
WDTPS = 2048 1:2048
WDTPS = 4096 1:4096
WDTPS = 8192 1:8192
WDTPS = 16384 1:16384
WDTPS = 32768 1:32768
MCLRE = OFF Disabled
MCLRE = ON Enabled
LPT1OSC = OFF Timer1 Low Power Oscillator
disabled
LPT1OSC = ON Timer1 Low Power Oscillator
Active
PBADEN = OFF Port B<4> and Port B<1:0> Con-
figured as Digital I/O Pins on
Reset
PBADEN = ON Port B<4> and Port B<1:0> Con-
figured as Analog Pins on Reset
DEBUG = ON Enabled
DEBUG = OFF Disabled
XINST = OFF Disabled
XINST = ON Enabled
BBSIZ = 1024 1K words (2K bytes) Boot Block
BBSIZ = 2048 2K words (4K bytes) Boot Block
BBSIZ = 4096 4K words (8K bytes) Boot Block
LVP = OFF Disabled
LVP = ON Enabled
MPLAB® C18 C Compiler User’s Guide Addendum
DS51518A-page 160 2004 Microchip Technology Inc.
Stack Overflow/Underflow Reset:
Code Protection Block 0:
Code Protection Block 1:
Code Protection Block 2:
Code Protection Block 3:
Boot Block Code Protection:
Data EEPROM Code Protection:
Write Protection Block 0:
Write Protection Block 1:
Write Protection Block 2:
Write Protection Block 3:
Boot Block Write Protection:
Configuration Register Write Protection:
STVREN = OFF Disabled
STVREN = ON Enabled
CP0 = ON Enabled
CP0 = OFF Disabled
CP1 = ON Enabled
CP1 = OFF Disabled
CP2 = ON Enabled
CP2 = OFF Disabled
CP3 = ON Enabled
CP3 = OFF Disabled
CPB = ON Enabled
CPB = OFF Disabled
CPD = ON Enabled
CPD = OFF Disabled
WRT0 = ON Enabled
WRT0 = OFF Disabled
WRT1 = ON Enabled
WRT1 = OFF Disabled
WRT2 = ON Enabled
WRT2 = OFF Disabled
WRT3 = ON Enabled
WRT3 = OFF Disabled
WRTB = ON Enabled
WRTB = OFF Disabled
WRTC = ON Enabled
WRTC = OFF Disabled
Configuration Settings
2004 Microchip Technology Inc. DS51518A-page 161
Data EEPROM Write Protection:
Table Read Protection Block 0:
Table Read Protection Block 1:
Table Read Protection Block 2:
Table Read Protection Block 3:
Boot Block Table Read Protection:
PIC18F6310
Oscillator Selection:
Fail Safe Clock Monitor:
Internal External Osc. Switch Over:
Power Up Timer:
WRTD = ON Enabled
WRTD = OFF Disabled
EBTR0 = ON Enabled
EBTR0 = OFF Disabled
EBTR1 = ON Enabled
EBTR1 = OFF Disabled
EBTR2 = ON Enabled
EBTR2 = OFF Disabled
EBTR3 = ON Enabled
EBTR3 = OFF Disabled
EBTRB = ON Enabled
EBTRB = OFF Disabled
OSC = LP LP
OSC = XT XT
OSC = HS HS
OSC = RC RC-OSC2 as Clock Out
OSC = EC EC-OSC2 as Clock Out
OSC = ECIO EC-OSC2 as RA6
OSC = HSPLL HS-PLL Enabled
OSC = RCIO RC-OSC2 as RA6
OSC = INTIO67 INTRC-OSC2 as RA6, OSC1 as
RA7
OSC = INTIO7 INTRC-OSC2 as Clock Out,
OSC1 as RA7
FCMEN = OFF Disabled
FCMEN = ON Enabled
IESO = OFF Disabled
IESO = ON Enabled
PWRT = ON Enabled
PWRT = OFF Disabled
MPLAB® C18 C Compiler User’s Guide Addendum
DS51518A-page 162 2004 Microchip Technology Inc.
Brown Out Reset:
Brown Out Voltage:
Watchdog Timer:
Watchdog Postscaler:
MCLR Enable:
Low Power Timer1 Selection:
CCP2 Mux:
BOREN = OFF Disabled
BOREN = ON SBOREN Enabled
BOREN = NOSLP Enabled except SLEEP,
SBOREN Disabled
BOREN = SBORDIS Enabled, SBOREN Disabled
BORV = 45 4.5V
BORV = 42 4.2V
BORV = 27 2.7V
BORV = 25 2.5V
WDT = OFF Disabled
WDT = ON Enabled
WDTPS = 1 1:1
WDTPS = 2 1:2
WDTPS = 4 1:4
WDTPS = 8 1:8
WDTPS = 16 1:16
WDTPS = 32 1:32
WDTPS = 64 1:64
WDTPS = 128 1:128
WDTPS = 256 1:256
WDTPS = 512 1:512
WDTPS = 1024 1:1024
WDTPS = 2048 1:2048
WDTPS = 4096 1:4096
WDTPS = 8192 1:8192
WDTPS = 16384 1:16384
WDTPS = 32768 1:32768
MCLRE = OFF Disabled
MCLRE = ON Enabled
LPT1OSC = OFF High Power, High noise immu-
nity T1OSC selected
LPT1OSC = ON Low Power, Low noise immunity
T1OSC selected
CCP2MX = PORTBE CCP2 input/output is multi-
plexed with RE7/RB3
CCP2MX = PORTC CCP2 input/output is multi-
plexed with RC1
Configuration Settings
2004 Microchip Technology Inc. DS51518A-page 163
Stack Overflow Reset:
Extended Instruction set Enable:
Background Debugger Enable:
Code Protection:
Table Read Protection Internal Memory:
PIC18F6390
Oscillator Selection:
Fail Safe Clock Monitor:
Internal External Osc. Switch Over:
Power Up Timer:
STVREN = OFF Disabled
STVREN = ON Enabled
XINST = OFF Disabled
XINST = ON Enabled
DEBUG = ON Enabled
DEBUG = OFF Disabled
CP = ON Enabled
CP = OFF Disabled
EBTR = ON Enabled
EBTR = OFF Disabled
OSC = LP LP
OSC = XT XT
OSC = HS HS
OSC = RC RC-OSC2 as Clock Out
OSC = EC EC-OSC2 as Clock Out
OSC = ECIO EC-OSC2 as RA6
OSC = HSPLL HS-PLL Enabled
OSC = RCIO RC-OSC2 as RA6
OSC = INTIO67 INTRC-OSC2 as RA6, OSC1 as
RA7
OSC = INTIO7 INTRC-OSC2 as Clock Out,
OSC1 as RA7
FCMEN = OFF Disabled
FCMEN = ON Enabled
IESO = OFF Disabled
IESO = ON Enabled
PWRT = ON Enabled
PWRT = OFF Disabled
MPLAB® C18 C Compiler User’s Guide Addendum
DS51518A-page 164 2004 Microchip Technology Inc.
Brown Out Reset:
Brown Out Voltage:
Watchdog Timer:
Watchdog Postscaler:
MCLR Enable:
Low Power Timer1 Selection:
CCP2 Mux:
BOREN = OFF Disabled
BOREN = ON SBOREN Enabled
BOREN = NOSLP Enabled except SLEEP,
SBOREN Disabled
BOREN = SBORDIS Enabled, SBOREN Disabled
BORV = 45 4.5V
BORV = 42 4.2V
BORV = 27 2.7V
BORV = 25 2.5V
WDT = OFF Disabled
WDT = ON Enabled
WDTPS = 1 1:1
WDTPS = 2 1:2
WDTPS = 4 1:4
WDTPS = 8 1:8
WDTPS = 16 1:16
WDTPS = 32 1:32
WDTPS = 64 1:64
WDTPS = 128 1:128
WDTPS = 256 1:256
WDTPS = 512 1:512
WDTPS = 1024 1:1024
WDTPS = 2048 1:2048
WDTPS = 4096 1:4096
WDTPS = 8192 1:8192
WDTPS = 16384 1:16384
WDTPS = 32768 1:32768
MCLRE = OFF Disabled
MCLRE = ON Enabled
LPT1OSC = OFF High Power, High noise immu-
nity T1OSC selected
LPT1OSC = ON Low Power, Low noise immunity
T1OSC selected
CCP2MX = PORTBE CCP2 input/output is multi-
plexed with RE7/RB3
CCP2MX = PORTC CCP2 input/output is multi-
plexed with RC1
Configuration Settings
2004 Microchip Technology Inc. DS51518A-page 165
Stack Overflow Reset:
Extended Instruction set Enable:
Background Debugger Enable:
Code Protection:
Table Read Protection Internal Memory:
PIC18F6410
Oscillator Selection:
Fail Safe Clock Monitor:
Internal External Osc. Switch Over:
Power Up Timer:
STVREN = OFF Disabled
STVREN = ON Enabled
XINST = OFF Disabled
XINST = ON Enabled
DEBUG = ON Enabled
DEBUG = OFF Disabled
CP = ON Enabled
CP = OFF Disabled
EBTR = ON Enabled
EBTR = OFF Disabled
OSC = LP LP
OSC = XT XT
OSC = HS HS
OSC = RC RC-OSC2 as Clock Out
OSC = EC EC-OSC2 as Clock Out
OSC = ECIO EC-OSC2 as RA6
OSC = HSPLL HS-PLL Enabled
OSC = RCIO RC-OSC2 as RA6
OSC = INTIO67 INTRC-OSC2 as RA6, OSC1 as
RA7
OSC = INTIO7 INTRC-OSC2 as Clock Out,
OSC1 as RA7
FCMEN = OFF Disabled
FCMEN = ON Enabled
IESO = OFF Disabled
IESO = ON Enabled
PWRT = ON Enabled
PWRT = OFF Disabled
MPLAB® C18 C Compiler User’s Guide Addendum
DS51518A-page 166 2004 Microchip Technology Inc.
Brown Out Reset:
Brown Out Voltage:
Watchdog Timer:
Watchdog Postscaler:
MCLR Enable:
Low Power Timer1 Selection:
CCP2 Mux:
BOREN = OFF Disabled
BOREN = ON SBOREN Enabled
BOREN = NOSLP Enabled except SLEEP,
SBOREN Disabled
BOREN = SBORDIS Enabled, SBOREN Disabled
BORV = 45 4.5V
BORV = 42 4.2V
BORV = 27 2.7V
BORV = 25 2.5V
WDT = OFF Disabled
WDT = ON Enabled
WDTPS = 1 1:1
WDTPS = 2 1:2
WDTPS = 4 1:4
WDTPS = 8 1:8
WDTPS = 16 1:16
WDTPS = 32 1:32
WDTPS = 64 1:64
WDTPS = 128 1:128
WDTPS = 256 1:256
WDTPS = 512 1:512
WDTPS = 1024 1:1024
WDTPS = 2048 1:2048
WDTPS = 4096 1:4096
WDTPS = 8192 1:8192
WDTPS = 16384 1:16384
WDTPS = 32768 1:32768
MCLRE = OFF Disabled
MCLRE = ON Enabled
LPT1OSC = OFF High Power, High noise immu-
nity T1OSC selected
LPT1OSC = ON Low Power, Low noise immunity
T1OSC selected
CCP2MX = PORTBE CCP2 input/output is multi-
plexed with RE7/RB3
CCP2MX = PORTC CCP2 input/output is multi-
plexed with RC1
Configuration Settings
2004 Microchip Technology Inc. DS51518A-page 167
Stack Overflow Reset:
Extended Instruction set Enable:
Background Debugger Enable:
Code Protection:
Table Read Protection Internal Memory:
PIC18F6490
Oscillator Selection:
Fail Safe Clock Monitor:
Internal External Osc. Switch Over:
Power Up Timer:
STVREN = OFF Disabled
STVREN = ON Enabled
XINST = OFF Disabled
XINST = ON Enabled
DEBUG = ON Enabled
DEBUG = OFF Disabled
CP = ON Enabled
CP = OFF Disabled
EBTR = ON Enabled
EBTR = OFF Disabled
OSC = LP LP
OSC = XT XT
OSC = HS HS
OSC = RC RC-OSC2 as Clock Out
OSC = EC EC-OSC2 as Clock Out
OSC = ECIO EC-OSC2 as RA6
OSC = HSPLL HS-PLL Enabled
OSC = RCIO RC-OSC2 as RA6
OSC = INTIO67 INTRC-OSC2 as RA6, OSC1 as
RA7
OSC = INTIO7 INTRC-OSC2 as Clock Out,
OSC1 as RA7
FCMEN = OFF Disabled
FCMEN = ON Enabled
IESO = OFF Disabled
IESO = ON Enabled
PWRT = ON Enabled
PWRT = OFF Disabled
MPLAB® C18 C Compiler User’s Guide Addendum
DS51518A-page 168 2004 Microchip Technology Inc.
Brown Out Reset:
Brown Out Voltage:
Watchdog Timer:
Watchdog Postscaler:
MCLR Enable:
Low Power Timer1 Selection:
CCP2 Mux:
BOREN = OFF Disabled
BOREN = ON SBOREN Enabled
BOREN = NOSLP Enabled except SLEEP,
SBOREN Disabled
BOREN = SBORDIS Enabled, SBOREN Disabled
BORV = 45 4.5V
BORV = 42 4.2V
BORV = 27 2.7V
BORV = 25 2.5V
WDT = OFF Disabled
WDT = ON Enabled
WDTPS = 1 1:1
WDTPS = 2 1:2
WDTPS = 4 1:4
WDTPS = 8 1:8
WDTPS = 16 1:16
WDTPS = 32 1:32
WDTPS = 64 1:64
WDTPS = 128 1:128
WDTPS = 256 1:256
WDTPS = 512 1:512
WDTPS = 1024 1:1024
WDTPS = 2048 1:2048
WDTPS = 4096 1:4096
WDTPS = 8192 1:8192
WDTPS = 16384 1:16384
WDTPS = 32768 1:32768
MCLRE = OFF Disabled
MCLRE = ON Enabled
LPT1OSC = OFF High Power, High noise immu-
nity T1OSC selected
LPT1OSC = ON Low Power, Low noise immunity
T1OSC selected
CCP2MX = PORTBE CCP2 input/output is multi-
plexed with RE7/RB3
CCP2MX = PORTC CCP2 input/output is multi-
plexed with RC1
Configuration Settings
2004 Microchip Technology Inc. DS51518A-page 169
Stack Overflow Reset:
Extended Instruction set Enable:
Background Debugger Enable:
Code Protection:
Table Read Protection Internal Memory:
PIC18F64J15
Background Debugger Enable:
Extended Instruction Set Enable:
Stack Overflow Reset:
Low Voltage ICSP:
Watchdog Timer:
Configuration Word Signature:
Code Protection:
STVREN = OFF Disabled
STVREN = ON Enabled
XINST = OFF Disabled
XINST = ON Enabled
DEBUG = ON Enabled
DEBUG = OFF Disabled
CP = ON Enabled
CP = OFF Disabled
EBTR = ON Enabled
EBTR = OFF Disabled
DEBUG = ON Enabled
DEBUG = OFF Disabled
XINST = OFF Disabled
XINST = ON Enabled
STVR = OFF Disabled
STVR = ON Enabled
LVP = OFF Disabled
LVP = ON Enabled
WDT = OFF Disabled
WDT = ON Enabled
SIGN = CLR Clear
SIGN = SET Set
CP0 = ON Enabled
CP0 = OFF Disabled
MPLAB® C18 C Compiler User’s Guide Addendum
DS51518A-page 170 2004 Microchip Technology Inc.
Fail Safe Clock Monitor:
Internal/External Switch Over:
Oscillator Selection bits:
Watchdog Postscaler:
External Bus Data Wait:
Data Bus Width Select:
Processor Mode Selection:
FCMEM = OFF Disabled
FCMEM = ON Enabled
IESO = OFF Disabled
IESO = ON Enabled
FOSC = HS HS oscillator
FOSC = HSPLL HS oscillator, Software Con-
trolled PLL
FOSC = EC External Clock
FOSC = ECPLL External Clock, Software Con-
trolled PLL
WDTPS = 1 1:1
WDTPS = 2 1:2
WDTPS = 4 1:4
WDTPS = 8 1:8
WDTPS = 16 1:16
WDTPS = 32 1:32
WDTPS = 64 1:64
WDTPS = 128 1:128
WDTPS = 256 1:256
WDTPS = 512 1:512
WDTPS = 1024 1:1024
WDTPS = 2048 1:2048
WDTPS = 4096 1:4096
WDTPS = 8192 1:8192
WDTPS = 16384 1:16384
WDTPS = 32768 1:32768
WAIT = ON Enabled
WAIT = OFF Disabled
BW = 8 8-bit external bus
BW = 16 16-bit external bus
MODE = MM Microcontroller Mode - External
bus disabled
MODE = XM12 Extended Microcontroller Mode -
12-bit address mode
MODE = XM16 Extended Microcontroller Mode -
16-bit address mode
MODE = XM20 Extended Microcontroller Mode -
20-bit address mode
Configuration Settings
2004 Microchip Technology Inc. DS51518A-page 171
External Address Bus Shift Enable:
CCP2 Mux:
PIC18F6520
Oscillator Selection:
Osc. Switch Enable:
Power Up Timer:
Brown Out Reset:
Brown Out Voltage:
Watchdog Timer:
Watchdog Postscaler:
EASHIFT = OFF External bus reflects PC value
EASHIFT = ON External bus starts at 000000h
CCP2MUX = OFF Disabled
CCP2MUX = ON Enabled
OSC = LP LP
OSC = XT XT
OSC = HS HS
OSC = RC RC-OSC2 as Clock Out
OSC = EC EC-OSC2 as Clock Out
OSC = ECIO EC-OSC2 as RA6
OSC = HSPLL HS-PLL Enabled
OSC = RCIO RC-OSC2 as RA6
OSCS = ON Enabled
OSCS = OFF Disabled
PWRT = ON Enabled
PWRT = OFF Disabled
BOR = OFF Disabled
BOR = ON Enabled
BORV = 45 4.5V
BORV = 42 4.2V
BORV = 27 2.7V
BORV = 25 2.5V
WDT = OFF Disabled
WDT = ON Enabled
WDTPS = 1 1:1
WDTPS = 2 1:2
WDTPS = 4 1:4
WDTPS = 8 1:8
WDTPS = 16 1:16
WDTPS = 32 1:32
WDTPS = 64 1:64
WDTPS = 128 1:128
MPLAB® C18 C Compiler User’s Guide Addendum
DS51518A-page 172 2004 Microchip Technology Inc.
CCP2 Mux:
Stack Overflow Reset:
Low Voltage ICSP:
Background Debugger Enable:
Code Protection Block 0:
Code Protection Block 1:
Code Protection Block 2:
Code Protection Block 3:
Boot Block Code Protection:
Data EEPROM Code Protection:
Write Protection Block 0:
Write Protection Block 1:
CCP2MUX = OFF Uses RE7
CCP2MUX = RE7 Uses RE7
CCP2MUX = ON Uses RC1
CCP2MUX = RC1 Uses RC1
STVR = OFF Disabled
STVR = ON Enabled
LVP = OFF Disabled
LVP = ON Enabled
DEBUG = ON Enabled
DEBUG = OFF Disabled
CP0 = ON Enabled
CP0 = OFF Disabled
CP1 = ON Enabled
CP1 = OFF Disabled
CP2 = ON Enabled
CP2 = OFF Disabled
CP3 = ON Enabled
CP3 = OFF Disabled
CPB = ON Enabled
CPB = OFF Disabled
CPD = ON Enabled
CPD = OFF Disabled
WRT0 = ON Enabled
WRT0 = OFF Disabled
WRT1 = ON Enabled
WRT1 = OFF Disabled
Configuration Settings
2004 Microchip Technology Inc. DS51518A-page 173
Write Protection Block 2:
Write Protection Block 3:
Boot Block Write Protection:
Configuration Register Write Protection:
Data EEPROM Write Protection:
Table Read Protection Block 0:
Table Read Protection Block 1:
Table Read Protection Block 2:
Table Read Protection Block 3:
Boot Block Table Read Protection:
WRT2 = ON Enabled
WRT2 = OFF Disabled
WRT3 = ON Enabled
WRT3 = OFF Disabled
WRTB = ON Enabled
WRTB = OFF Disabled
WRTC = ON Enabled
WRTC = OFF Disabled
WRTD = ON Enabled
WRTD = OFF Disabled
EBTR0 = ON Enabled
EBTR0 = OFF Disabled
EBTR1 = ON Enabled
EBTR1 = OFF Disabled
EBTR2 = ON Enabled
EBTR2 = OFF Disabled
EBTR3 = ON Enabled
EBTR3 = OFF Disabled
EBTRB = ON Enabled
EBTRB = OFF Disabled
MPLAB® C18 C Compiler User’s Guide Addendum
DS51518A-page 174 2004 Microchip Technology Inc.
PIC18F6525
Oscillator Selection:
Osc. Switch Enable:
Power Up Timer:
Brown Out Reset:
Brown Out Voltage:
Watchdog Timer:
OSC = LP LP
OSC = XT XT
OSC = HS HS
OSC = RC RC
OSC = EC EC-OSC2 as Clock Out
OSC = ECIO EC-OSC2 as RA6
OSC = HSPLL HS-PLL Enabled
OSC = RCIO RC-OSC2 as RA6
OSC = ECIOPLL EC-OSC2 as RA6 and PLL
OSC = ECIOSWPLL EC-OSC2 as RA6 and SW PLL
OSC = HSSWPLL HS with SW PLL
OSCS = ON Enabled
OSCS = OFF Disabled
PWRT = ON Enabled
PWRT = OFF Disabled
BOR = OFF Disabled
BOR = ON Enabled
BORV = 45 4.5V
BORV = 42 4.2V
BORV = 27 2.7V
BORV = 20 2.0V
WDT = OFF Disabled
WDT = ON Enabled
Configuration Settings
2004 Microchip Technology Inc. DS51518A-page 175
Watchdog Postscaler:
MCLR Enable:
ECCP Mux:
CCP2 Mux:
Stack Overflow Reset:
Low Voltage ICSP:
Background Debugger Enable:
Code Protection Block 0:
Code Protection Block 1:
WDTPS = 1 1:1
WDTPS = 2 1:2
WDTPS = 4 1:4
WDTPS = 8 1:8
WDTPS = 16 1:16
WDTPS = 32 1:32
WDTPS = 64 1:64
WDTPS = 128 1:128
WDTPS = 256 1:256
WDTPS = 512 1:512
WDTPS = 1024 1:1024
WDTPS = 2048 1:2048
WDTPS = 4096 1:4096
WDTPS = 8192 1:8192
WDTPS = 16384 1:16384
WDTPS = 32768 1:32768
MCLRE = OFF Disabled
MCLRE = ON Enabled
ECCPMX = PORTH Muxed with RH7:4
ECCPMX = PORTE Muxed with RE6:3
CCP2MX = PORTBE Muxed with RB3 or RE7
CCP2MX = PORTC Muxed with RC1
STVR = OFF Disabled
STVR = ON Enabled
LVP = OFF Disabled
LVP = ON Enabled
DEBUG = ON Enabled
DEBUG = OFF Disabled
CP0 = ON Enabled
CP0 = OFF Disabled
CP1 = ON Enabled
CP1 = OFF Disabled
MPLAB® C18 C Compiler User’s Guide Addendum
DS51518A-page 176 2004 Microchip Technology Inc.
Code Protection Block 2:
Boot Block Code Protection:
Data EEPROM Code Protection:
Write Protection Block 0:
Write Protection Block 1:
Write Protection Block 2:
Boot Block Write Protection:
Configuration Register Write Protection:
Data EEPROM Write Protection:
Table Read Protection Block 0:
Table Read Protection Block 1:
Table Read Protection Block 2:
Boot Block Table Read Protection:
CP2 = ON Enabled
CP2 = OFF Disabled
CPB = ON Enabled
CPB = OFF Disabled
CPD = ON Enabled
CPD = OFF Disabled
WRT0 = ON Enabled
WRT0 = OFF Disabled
WRT1 = ON Enabled
WRT1 = OFF Disabled
WRT2 = ON Enabled
WRT2 = OFF Disabled
WRTB = ON Enabled
WRTB = OFF Disabled
WRTC = ON Enabled
WRTC = OFF Disabled
WRTD = ON Enabled
WRTD = OFF Disabled
EBTR0 = ON Enabled
EBTR0 = OFF Disabled
EBTR1 = ON Enabled
EBTR1 = OFF Disabled
EBTR2 = ON Enabled
EBTR2 = OFF Disabled
EBTRB = ON Enabled
EBTRB = OFF Disabled
Configuration Settings
2004 Microchip Technology Inc. DS51518A-page 177
PIC18F6585
Oscillator Selection bits:
Osc. Switch Enable:
Power Up Timer:
Brown Out Reset:
Brown Out Voltage:
Watchdog Timer:
OSC = LP LP
OSC = XT XT
OSC = HS HS
OSC = RC RC with OSC2 as divide by 4
clock out
OSC = EC EC with OSC2 as divide by 4
clock out
OSC = ECIO EC with OSC2 as RA6
OSC = HSPLL HS with HW enabled 4xPLL
OSC = RCIO RC with OSC2 as RA6
OSC = ECIOPLL EC with OSC2 as RA6 and HW
enabled 4xPLL
OSC = ECIOSWPLL EC with OSC2 as RA6 and SW
enabled 4xPLL
OSC = HSSWPLL HS with SW enabled 4xPLL
OSCS = ON Enabled
OSCS = OFF Disabled
PWRT = ON Enabled
PWRT = OFF Disabled
BOR = OFF Disabled
BOR = ON Enabled
BORV = 45 4.5V
BORV = 42 4.2V
BORV = 27 2.7V
BORV = 20 2.0V
WDT = OFF HW Disabled - SW Controlled
WDT = ON HW Enabled - SW Disabled
MPLAB® C18 C Compiler User’s Guide Addendum
DS51518A-page 178 2004 Microchip Technology Inc.
Watchdog Postscaler:
MCLR Enable:
CCP2 Mux bit:
Stack Overflow Reset:
Low Voltage ICSP:
Background Debugger Enable:
Code Protection Block 0:
Code Protection Block 1:
Code Protection Block 2:
WDTPS = 1 1:1
WDTPS = 2 1:2
WDTPS = 4 1:4
WDTPS = 8 1:8
WDTPS = 16 1:16
WDTPS = 32 1:32
WDTPS = 64 1:64
WDTPS = 128 1:128
WDTPS = 256 1:256
WDTPS = 512 1:512
WDTPS = 1024 1:1024
WDTPS = 2048 1:2048
WDTPS = 4096 1:4096
WDTPS = 8192 1:8192
WDTPS = 16384 1:16384
WDTPS = 32768 1:32768
MCLRE = OFF Disabled
MCLRE = ON Enabled
CCP2MX = OFF CCP2 input/output is multi-
plexed with RE7
CCP2MX = ON CCP2 input/output is multi-
plexed with RC1
STVR = OFF Disabled
STVR = ON Enabled
LVP = OFF Disabled
LVP = ON Enabled
DEBUG = ON Enabled
DEBUG = OFF Disabled
CP0 = ON Enabled
CP0 = OFF Disabled
CP1 = ON Enabled
CP1 = OFF Disabled
CP2 = ON Enabled
CP2 = OFF Disabled
Configuration Settings
2004 Microchip Technology Inc. DS51518A-page 179
Boot Block Code Protection:
Data EEPROM Code Protection:
Write Protection Block 0:
Write Protection Block 1:
Write Protection Block 2:
Boot Block Write Protection:
Configuration Register Write Protection:
Data EEPROM Write Protection:
Table Read Protection Block 0:
Table Read Protection Block 1:
Table Read Protection Block 2:
Boot Block Table Read Protection:
CPB = ON Enabled
CPB = OFF Disabled
CPD = ON Enabled
CPD = OFF Disabled
WRT0 = ON Enabled
WRT0 = OFF Disabled
WRT1 = ON Enabled
WRT1 = OFF Disabled
WRT2 = ON Enabled
WRT2 = OFF Disabled
WRTB = ON Enabled
WRTB = OFF Disabled
WRTC = ON Enabled
WRTC = OFF Disabled
WRTD = ON Enabled
WRTD = OFF Disabled
EBTR0 = ON Enabled
EBTR0 = OFF Disabled
EBTR1 = ON Enabled
EBTR1 = OFF Disabled
EBTR2 = ON Enabled
EBTR2 = OFF Disabled
EBTRB = ON Enabled
EBTRB = OFF Disabled
MPLAB® C18 C Compiler User’s Guide Addendum
DS51518A-page 180 2004 Microchip Technology Inc.
PIC18F65J10
Background Debugger Enable:
Extended Instruction Set Enable:
Stack Overflow Reset:
Low Voltage ICSP:
Watchdog Timer:
Configuration Word Signature:
Code Protection:
Fail Safe Clock Monitor:
Internal/External Switch Over:
Oscillator Selection bits:
DEBUG = ON Enabled
DEBUG = OFF Disabled
XINST = OFF Disabled
XINST = ON Enabled
STVR = OFF Disabled
STVR = ON Enabled
LVP = OFF Disabled
LVP = ON Enabled
WDT = OFF Disabled
WDT = ON Enabled
SIGN = CLR Clear
SIGN = SET Set
CP0 = ON Enabled
CP0 = OFF Disabled
FCMEM = OFF Disabled
FCMEM = ON Enabled
IESO = OFF Disabled
IESO = ON Enabled
FOSC = HS HS oscillator
FOSC = HSPLL HS oscillator, Software Con-
trolled PLL
FOSC = EC External Clock
FOSC = ECPLL External Clock, Software Con-
trolled PLL
Configuration Settings
2004 Microchip Technology Inc. DS51518A-page 181
Watchdog Postscaler:
External Bus Data Wait:
Data Bus Width Select:
Processor Mode Selection:
External Address Bus Shift Enable:
CCP2 Mux:
WDTPS = 1 1:1
WDTPS = 2 1:2
WDTPS = 4 1:4
WDTPS = 8 1:8
WDTPS = 16 1:16
WDTPS = 32 1:32
WDTPS = 64 1:64
WDTPS = 128 1:128
WDTPS = 256 1:256
WDTPS = 512 1:512
WDTPS = 1024 1:1024
WDTPS = 2048 1:2048
WDTPS = 4096 1:4096
WDTPS = 8192 1:8192
WDTPS = 16384 1:16384
WDTPS = 32768 1:32768
WAIT = ON Enabled
WAIT = OFF Disabled
BW = 8 8-bit external bus
BW = 16 16-bit external bus
MODE = MM Microcontroller Mode - External
bus disabled
MODE = XM12 Extended Microcontroller Mode -
12-bit address mode
MODE = XM16 Extended Microcontroller Mode -
16-bit address mode
MODE = XM20 Extended Microcontroller Mode -
20-bit address mode
EASHIFT = OFF External bus reflects PC value
EASHIFT = ON External bus starts at 000000h
CCP2MUX = OFF Disabled
CCP2MUX = ON Enabled
MPLAB® C18 C Compiler User’s Guide Addendum
DS51518A-page 182 2004 Microchip Technology Inc.
PIC18F65J15
Background Debugger Enable:
Extended Instruction Set Enable:
Stack Overflow Reset:
Low Voltage ICSP:
Watchdog Timer:
Configuration Word Signature:
Code Protection:
Fail Safe Clock Monitor:
Internal/External Switch Over:
Oscillator Selection bits:
DEBUG = ON Enabled
DEBUG = OFF Disabled
XINST = OFF Disabled
XINST = ON Enabled
STVR = OFF Disabled
STVR = ON Enabled
LVP = OFF Disabled
LVP = ON Enabled
WDT = OFF Disabled
WDT = ON Enabled
SIGN = CLR Clear
SIGN = SET Set
CP0 = ON Enabled
CP0 = OFF Disabled
FCMEM = OFF Disabled
FCMEM = ON Enabled
IESO = OFF Disabled
IESO = ON Enabled
FOSC = HS HS oscillator
FOSC = HSPLL HS oscillator, Software Con-
trolled PLL
FOSC = EC External Clock
FOSC = ECPLL External Clock, Software Con-
trolled PLL
Configuration Settings
2004 Microchip Technology Inc. DS51518A-page 183
Watchdog Postscaler:
External Bus Data Wait:
Data Bus Width Select:
Processor Mode Selection:
External Address Bus Shift Enable:
CCP2 Mux:
WDTPS = 1 1:1
WDTPS = 2 1:2
WDTPS = 4 1:4
WDTPS = 8 1:8
WDTPS = 16 1:16
WDTPS = 32 1:32
WDTPS = 64 1:64
WDTPS = 128 1:128
WDTPS = 256 1:256
WDTPS = 512 1:512
WDTPS = 1024 1:1024
WDTPS = 2048 1:2048
WDTPS = 4096 1:4096
WDTPS = 8192 1:8192
WDTPS = 16384 1:16384
WDTPS = 32768 1:32768
WAIT = ON Enabled
WAIT = OFF Disabled
BW = 8 8-bit external bus
BW = 16 16-bit external bus
MODE = MM Microcontroller Mode - External
bus disabled
MODE = XM12 Extended Microcontroller Mode -
12-bit address mode
MODE = XM16 Extended Microcontroller Mode -
16-bit address mode
MODE = XM20 Extended Microcontroller Mode -
20-bit address mode
EASHIFT = OFF External bus reflects PC value
EASHIFT = ON External bus starts at 000000h
CCP2MUX = OFF Disabled
CCP2MUX = ON Enabled
MPLAB® C18 C Compiler User’s Guide Addendum
DS51518A-page 184 2004 Microchip Technology Inc.
PIC18F6620
Oscillator Selection:
Osc. Switch Enable:
Power Up Timer:
Brown Out Reset:
Brown Out Voltage:
Watchdog Timer:
Watchdog Postscaler:
CCP2 Mux:
Stack Overflow Reset:
OSC = LP LP
OSC = XT XT
OSC = HS HS
OSC = RC RC
OSC = EC EC-OSC2 as Clock Out
OSC = ECIO EC-OSC2 as RA6
OSC = HSPLL HS-PLL Enabled
OSC = RCIO RC-OSC2 as RA6
OSCS = ON Enabled
OSCS = OFF Disabled
PWRT = ON Enabled
PWRT = OFF Disabled
BOR = OFF Disabled
BOR = ON Enabled
BORV = 45 4.5V
BORV = 42 4.2V
BORV = 27 2.7V
BORV = 25 2.5V
WDT = OFF Disabled
WDT = ON Enabled
WDTPS = 1 1:1
WDTPS = 2 1:2
WDTPS = 4 1:4
WDTPS = 8 1:8
WDTPS = 16 1:16
WDTPS = 32 1:32
WDTPS = 64 1:64
WDTPS = 128 1:128
CCP2MUX = OFF Disabled
CCP2MUX = ON Enabled
STVR = OFF Disabled
STVR = ON Enabled
Configuration Settings
2004 Microchip Technology Inc. DS51518A-page 185
Low Voltage ICSP:
Background Debugger Enable:
Code Protection Block 0:
Code Protection Block 1:
Code Protection Block 2:
Code Protection Block 3:
Boot Block Code Protection:
Data EEPROM Code Protection:
Write Protection Block 0:
Write Protection Block 1:
Write Protection Block 2:
Write Protection Block 3:
Boot Block Write Protection:
LVP = OFF Disabled
LVP = ON Enabled
DEBUG = ON Enabled
DEBUG = OFF Disabled
CP0 = ON Enabled
CP0 = OFF Disabled
CP1 = ON Enabled
CP1 = OFF Disabled
CP2 = ON Enabled
CP2 = OFF Disabled
CP3 = ON Enabled
CP3 = OFF Disabled
CPB = ON Enabled
CPB = OFF Disabled
CPD = ON Enabled
CPD = OFF Disabled
WRT0 = ON Enabled
WRT0 = OFF Disabled
WRT1 = ON Enabled
WRT1 = OFF Disabled
WRT2 = ON Enabled
WRT2 = OFF Disabled
WRT3 = ON Enabled
WRT3 = OFF Disabled
WRTB = ON Enabled
WRTB = OFF Disabled
MPLAB® C18 C Compiler User’s Guide Addendum
DS51518A-page 186 2004 Microchip Technology Inc.
Configuration Register Write Protection:
Data EEPROM Write Protection:
Table Read Protection Block 0:
Table Read Protection Block 1:
Table Read Protection Block 2:
Table Read Protection Block 3:
Boot Block Table Read Protection:
PIC18F6621
Oscillator Selection:
Osc. Switch Enable:
Power Up Timer:
WRTC = ON Enabled
WRTC = OFF Disabled
WRTD = ON Enabled
WRTD = OFF Disabled
EBTR0 = ON Enabled
EBTR0 = OFF Disabled
EBTR1 = ON Enabled
EBTR1 = OFF Disabled
EBTR2 = ON Enabled
EBTR2 = OFF Disabled
EBTR3 = ON Enabled
EBTR3 = OFF Disabled
EBTRB = ON Enabled
EBTRB = OFF Disabled
OSC = LP LP
OSC = XT XT
OSC = HS HS
OSC = RC RC
OSC = EC EC-OSC2 as Clock Out
OSC = ECIO EC-OSC2 as RA6
OSC = HSPLL HS-PLL Enabled
OSC = RCIO RC-OSC2 as RA6
OSC = ECIOPLL EC-OSC2 as RA6 and PLL
OSC = ECIOSWPLL EC-OSC2 as RA6 and SW PLL
OSC = HSSWPLL HS with SW PLL
OSCS = ON Enabled
OSCS = OFF Disabled
PWRT = ON Enabled
PWRT = OFF Disabled
Configuration Settings
2004 Microchip Technology Inc. DS51518A-page 187
Brown Out Reset:
Brown Out Voltage:
Watchdog Timer:
Watchdog Postscaler:
MCLR Enable:
ECCP Mux:
CCP2 Mux:
Stack Overflow Reset:
Low Voltage ICSP:
BOR = OFF Disabled
BOR = ON Enabled
BORV = 45 4.5V
BORV = 42 4.2V
BORV = 27 2.7V
BORV = 20 2.0V
WDT = OFF Disabled
WDT = ON Enabled
WDTPS = 1 1:1
WDTPS = 2 1:2
WDTPS = 4 1:4
WDTPS = 8 1:8
WDTPS = 16 1:16
WDTPS = 32 1:32
WDTPS = 64 1:64
WDTPS = 128 1:128
WDTPS = 256 1:256
WDTPS = 512 1:512
WDTPS = 1024 1:1024
WDTPS = 2048 1:2048
WDTPS = 4096 1:4096
WDTPS = 8192 1:8192
WDTPS = 16384 1:16384
WDTPS = 32768 1:32768
MCLRE = OFF Disabled
MCLRE = ON Enabled
ECCPMX = PORTH Muxed with RH7:4
ECCPMX = PORTE Muxed with RE6:3
CCP2MX = PORTBE Muxed with RB3 or RE7
CCP2MX = PORTC Muxed with RC1
STVR = OFF Disabled
STVR = ON Enabled
LVP = OFF Disabled
LVP = ON Enabled
MPLAB® C18 C Compiler User’s Guide Addendum
DS51518A-page 188 2004 Microchip Technology Inc.
Background Debugger Enable:
Code Protection Block 0:
Code Protection Block 1:
Code Protection Block 2:
Code Protection Block 3:
Boot Block Code Protection:
Data EEPROM Code Protection:
Write Protection Block 0:
Write Protection Block 1:
Write Protection Block 2:
Write Protection Block 3:
Boot Block Write Protection:
Configuration Register Write Protection:
DEBUG = ON Enabled
DEBUG = OFF Disabled
CP0 = ON Enabled
CP0 = OFF Disabled
CP1 = ON Enabled
CP1 = OFF Disabled
CP2 = ON Enabled
CP2 = OFF Disabled
CP3 = ON Enabled
CP3 = OFF Disabled
CPB = ON Enabled
CPB = OFF Disabled
CPD = ON Enabled
CPD = OFF Disabled
WRT0 = ON Enabled
WRT0 = OFF Disabled
WRT1 = ON Enabled
WRT1 = OFF Disabled
WRT2 = ON Enabled
WRT2 = OFF Disabled
WRT3 = ON Enabled
WRT3 = OFF Disabled
WRTB = ON Enabled
WRTB = OFF Disabled
WRTC = ON Enabled
WRTC = OFF Disabled
Configuration Settings
2004 Microchip Technology Inc. DS51518A-page 189
Data EEPROM Write Protection:
Table Read Protection Block 0:
Table Read Protection Block 1:
Table Read Protection Block 2:
Table Read Protection Block 2:
Boot Block Table Read Protection:
PIC18F6627
Oscillator Selection:
Fail Safe Clock Monitor:
Internal External Osc. Switch Over:
Power Up Timer:
WRTD = ON Enabled
WRTD = OFF Disabled
EBTR0 = ON Enabled
EBTR0 = OFF Disabled
EBTR1 = ON Enabled
EBTR1 = OFF Disabled
EBTR2 = ON Enabled
EBTR2 = OFF Disabled
EBTR3 = ON Enabled
EBTR3 = OFF Disabled
EBTRB = ON Enabled
EBTRB = OFF Disabled
OSC = LP LP
OSC = XT XT
OSC = HS HS
OSC = RC RC
OSC = EC EC-OSC2 as Clock Out
OSC = ECIO6 EC-OSC2 as RA6
OSC = HSPLL HS-PLL Enabled
OSC = RCIO6 RC-OSC2 as RA6
OSC = INTIO67 INTRC-OSC2 as RA6, OSC1 as
RA7
OSC = INTIO7 INTRC-OSC2 as Clock Out,
OSC1 as RA7
FCMEN = OFF Disabled
FCMEN = ON Enabled
IESO = OFF Disabled
IESO = ON Enabled
PWRT = ON Enabled
PWRT = OFF Disabled
MPLAB® C18 C Compiler User’s Guide Addendum
DS51518A-page 190 2004 Microchip Technology Inc.
Brown Out Reset:
Brown Out Voltage:
Watchdog Timer:
Watchdog Postscaler:
Processor Mode Selection:
External Bus Address Width:
BOREN = OFF Disabled
BOREN = ON SBOREN Enabled
BOREN = NOSLP Enabled except SLEEP,
SBOREN Disabled
BOREN = SBORDIS Enabled, SBOREN Disabled
BORV = 46 4.5V
BORV = 43 4.2V
BORV = 28 2.7V
BORV = 21 2.0V
WDT = OFF Disabled
WDT = ON Enabled
WDTPS = 1 1:1
WDTPS = 2 1:2
WDTPS = 4 1:4
WDTPS = 8 1:8
WDTPS = 16 1:16
WDTPS = 32 1:32
WDTPS = 64 1:64
WDTPS = 128 1:128
WDTPS = 256 1:256
WDTPS = 512 1:512
WDTPS = 1024 1:1024
WDTPS = 2048 1:2048
WDTPS = 4096 1:4096
WDTPS = 8192 1:8192
WDTPS = 16384 1:16384
WDTPS = 32768 1:32768
MODE = EM Extended Microcontroller Mode
MODE = MPB Microprocessor with Boot Block
Mode
MODE = MP Microprocessor Mode
MODE = MC Microcontroller Mode
ADDRBW = ADDR8BIT 8 Bit Address Bus
ADDRBW = ADDR12BIT 12 Bit Address Bus
ADDRBW = ADDR16BIT 16 Bit Address Bus
ADDRBW = ADDR20BIT 20 Bit Address Bus
Configuration Settings
2004 Microchip Technology Inc. DS51518A-page 191
External Bus Data Width:
External Bus Data Wait:
MCLR Enable:
T1 Oscillator Enable:
ECCP Mux:
ECCP2 Mux:
Stack Overflow Reset:
Low Voltage ICSP:
Boot Block Size:
XINST Enable:
Background Debugger Enable:
Code Protection Block 0:
Code Protection Block 1:
DATABW = DATA8BIT 8 Bit Data Bus
DATABW = DATA16BIT 16 Bit Data Bus
WAIT = ON Enabled
WAIT = OFF Disabled
MCLRE = OFF Disabled
MCLRE = ON Enabled
LPT1OSC = OFF Disabled
LPT1OSC = ON Enabled
ECCPMX = PORTH Muxed with RH7:4
ECCPMX = PORTE Muxed with RE6:3
ECCP2MX = PORTBE Muxed with RB3
ECCP2MX = PORTC Muxed with RC1
STVREN = OFF Disabled
STVREN = ON Enabled
LVP = OFF Disabled
LVP = ON Enabled
BBSIZ = BB2K 2Kb Boot Block
BBSIZ = BB4K 4Kb Boot Block
BBSIZ = BB8K 8Kb Boot Block
XINST = OFF Disabled
XINST = ON Enabled
DEBUG = ON Enabled
DEBUG = OFF Disabled
CP0 = ON Enabled
CP0 = OFF Disabled
CP1 = ON Enabled
CP1 = OFF Disabled
MPLAB® C18 C Compiler User’s Guide Addendum
DS51518A-page 192 2004 Microchip Technology Inc.
Code Protection Block 2:
Code Protection Block 3:
Code Protection Block 4:
Code Protection Block 5:
Boot Block Code Protection:
Data EEPROM Code Protection:
Write Protection Block 0:
Write Protection Block 1:
Write Protection Block 2:
Write Protection Block 3:
Write Protection Block 4:
Write Protection Block 5:
Boot Block Write Protection:
CP2 = ON Enabled
CP2 = OFF Disabled
CP3 = ON Enabled
CP3 = OFF Disabled
CP4 = ON Enabled
CP4 = OFF Disabled
CP5 = ON Enabled
CP5 = OFF Disabled
CPB = ON Enabled
CPB = OFF Disabled
CPD = ON Enabled
CPD = OFF Disabled
WRT0 = ON Enabled
WRT0 = OFF Disabled
WRT1 = ON Enabled
WRT1 = OFF Disabled
WRT2 = ON Enabled
WRT2 = OFF Disabled
WRT3 = ON Enabled
WRT3 = OFF Disabled
WRT4 = ON Enabled
WRT4 = OFF Disabled
WRT5 = ON Enabled
WRT5 = OFF Disabled
WRTB = ON Enabled
WRTB = OFF Disabled
Configuration Settings
2004 Microchip Technology Inc. DS51518A-page 193
Configuration Register Write Protection:
Data EEPROM Write Protection:
Table Read Protection Block 0:
Table Read Protection Block 1:
Table Read Protection Block 2:
Table Read Protection Block 3:
Table Read Protection Block 4:
Table Read Protection Block 5:
Boot Block Table Read Protection:
WRTC = ON Enabled
WRTC = OFF Disabled
WRTD = ON Enabled
WRTD = OFF Disabled
EBTR0 = ON Enabled
EBTR0 = OFF Disabled
EBTR1 = ON Enabled
EBTR1 = OFF Disabled
EBTR2 = ON Enabled
EBTR2 = OFF Disabled
EBTR3 = ON Enabled
EBTR3 = OFF Disabled
EBTR4 = ON Enabled
EBTR4 = OFF Disabled
EBTR5 = ON Enabled
EBTR5 = OFF Disabled
EBTRB = ON Enabled
EBTRB = OFF Disabled
MPLAB® C18 C Compiler User’s Guide Addendum
DS51518A-page 194 2004 Microchip Technology Inc.
PIC18F6680
Oscillator Selection bits:
Osc. Switch Enable:
Power Up Timer:
Brown Out Reset:
Brown Out Voltage:
Watchdog Timer:
OSC = LP LP
OSC = XT XT
OSC = HS HS
OSC = RC RC with OSC2 as divide by 4
clock out
OSC = EC EC with OSC2 as divide by 4
clock out
OSC = ECIO EC with OSC2 as RA6
OSC = HSPLL HS with HW enabled 4xPLL
OSC = RCIO RC with OSC2 as RA6
OSC = ECIOPLL EC with OSC2 as RA6 and HW
enabled 4xPLL
OSC = ECIOSWPLL EC with OSC2 as RA6 and SW
enabled 4xPLL
OSC = HSSWPLL HS with SW enabled 4xPLL
OSCS = ON Enabled
OSCS = OFF Disabled
PWRT = ON Enabled
PWRT = OFF Disabled
BOR = OFF Disabled
BOR = ON Enabled
BORV = 45 4.5V
BORV = 42 4.2V
BORV = 27 2.7V
BORV = 20 2.0V
WDT = OFF HW Disabled - SW Controlled
WDT = ON HW Enabled - SW Disabled
Configuration Settings
2004 Microchip Technology Inc. DS51518A-page 195
Watchdog Postscaler:
MCLR Enable:
CCP2 Mux bit:
Stack Overflow Reset:
Low Voltage ICSP:
Background Debugger Enable:
Code Protection Block 0:
Code Protection Block 1:
Code Protection Block 2:
WDTPS = 1 1:1
WDTPS = 2 1:2
WDTPS = 4 1:4
WDTPS = 8 1:8
WDTPS = 16 1:16
WDTPS = 32 1:32
WDTPS = 64 1:64
WDTPS = 128 1:128
WDTPS = 256 1:256
WDTPS = 512 1:512
WDTPS = 1024 1:1024
WDTPS = 2048 1:2048
WDTPS = 4096 1:4096
WDTPS = 8192 1:8192
WDTPS = 16384 1:16384
WDTPS = 32768 1:32768
MCLRE = OFF Disabled
MCLRE = ON Enabled
CCP2MX = OFF CCP2 input/output is multi-
plexed with RE7
CCP2MX = ON CCP2 input/output is multi-
plexed with RC1
STVR = OFF Disabled
STVR = ON Enabled
LVP = OFF Disabled
LVP = ON Enabled
DEBUG = ON Enabled
DEBUG = OFF Disabled
CP0 = ON Enabled
CP0 = OFF Disabled
CP1 = ON Enabled
CP1 = OFF Disabled
CP2 = ON Enabled
CP2 = OFF Disabled
MPLAB® C18 C Compiler User’s Guide Addendum
DS51518A-page 196 2004 Microchip Technology Inc.
Code Protection Block 3:
Boot Block Code Protection:
Data EEPROM Code Protection:
Write Protection Block 0:
Write Protection Block 1:
Write Protection Block 2:
Write Protection Block 3:
Boot Block Write Protection:
Configuration Register Write Protection:
Data EEPROM Write Protection:
Table Read Protection Block 0:
Table Read Protection Block 1:
Table Read Protection Block 2:
CP3 = ON Enabled
CP3 = OFF Disabled
CPB = ON Enabled
CPB = OFF Disabled
CPD = ON Enabled
CPD = OFF Disabled
WRT0 = ON Enabled
WRT0 = OFF Disabled
WRT1 = ON Enabled
WRT1 = OFF Disabled
WRT2 = ON Enabled
WRT2 = OFF Disabled
WRT3 = ON Enabled
WRT3 = OFF Disabled
WRTB = ON Enabled
WRTB = OFF Disabled
WRTC = ON Enabled
WRTC = OFF Disabled
WRTD = ON Enabled
WRTD = OFF Disabled
EBTR0 = ON Enabled
EBTR0 = OFF Disabled
EBTR1 = ON Enabled
EBTR1 = OFF Disabled
EBTR2 = ON Enabled
EBTR2 = OFF Disabled
Configuration Settings
2004 Microchip Technology Inc. DS51518A-page 197
Table Read Protection Block 3:
Boot Block Table Read Protection:
PIC18F66J10
Background Debugger Enable:
Extended Instruction Set Enable:
Stack Overflow Reset:
Low Voltage ICSP:
Watchdog Timer:
Configuration Word Signature:
Code Protection:
Fail Safe Clock Monitor:
Internal/External Switch Over:
EBTR3 = ON Enabled
EBTR3 = OFF Disabled
EBTRB = ON Enabled
EBTRB = OFF Disabled
DEBUG = ON Enabled
DEBUG = OFF Disabled
XINST = OFF Disabled
XINST = ON Enabled
STVR = OFF Disabled
STVR = ON Enabled
LVP = OFF Disabled
LVP = ON Enabled
WDT = OFF Disabled
WDT = ON Enabled
SIGN = CLR Clear
SIGN = SET Set
CP0 = ON Enabled
CP0 = OFF Disabled
FCMEM = OFF Disabled
FCMEM = ON Enabled
IESO = OFF Disabled
IESO = ON Enabled
MPLAB® C18 C Compiler User’s Guide Addendum
DS51518A-page 198 2004 Microchip Technology Inc.
Oscillator Selection bits:
Watchdog Postscaler:
External Bus Data Wait:
Data Bus Width Select:
Processor Mode Selection:
External Address Bus Shift Enable:
CCP2 Mux:
FOSC = HS HS oscillator
FOSC = HSPLL HS oscillator, Software Con-
trolled PLL
FOSC = EC External Clock
FOSC = ECPLL External Clock, Software Con-
trolled PLL
WDTPS = 1 1:1
WDTPS = 2 1:2
WDTPS = 4 1:4
WDTPS = 8 1:8
WDTPS = 16 1:16
WDTPS = 32 1:32
WDTPS = 64 1:64
WDTPS = 128 1:128
WDTPS = 256 1:256
WDTPS = 512 1:512
WDTPS = 1024 1:1024
WDTPS = 2048 1:2048
WDTPS = 4096 1:4096
WDTPS = 8192 1:8192
WDTPS = 16384 1:16384
WDTPS = 32768 1:32768
WAIT = ON Enabled
WAIT = OFF Disabled
BW = 8 8-bit external bus
BW = 16 16-bit external bus
MODE = MM Microcontroller Mode - External
bus disabled
MODE = XM12 Extended Microcontroller Mode -
12-bit address mode
MODE = XM16 Extended Microcontroller Mode -
16-bit address mode
MODE = XM20 Extended Microcontroller Mode -
20-bit address mode
EASHIFT = OFF External bus reflects PC value
EASHIFT = ON External bus starts at 000000h
CCP2MUX = OFF Disabled
CCP2MUX = ON Enabled
Configuration Settings
2004 Microchip Technology Inc. DS51518A-page 199
PIC18F66J15
Background Debugger Enable:
Extended Instruction Set Enable:
Stack Overflow Reset:
Low Voltage ICSP:
Watchdog Timer:
Configuration Word Signature:
Code Protection:
Fail Safe Clock Monitor:
Internal/External Switch Over:
Oscillator Selection bits:
DEBUG = ON Enabled
DEBUG = OFF Disabled
XINST = OFF Disabled
XINST = ON Enabled
STVR = OFF Disabled
STVR = ON Enabled
LVP = OFF Disabled
LVP = ON Enabled
WDT = OFF Disabled
WDT = ON Enabled
SIGN = CLR Clear
SIGN = SET Set
CP0 = ON Enabled
CP0 = OFF Disabled
FCMEM = OFF Disabled
FCMEM = ON Enabled
IESO = OFF Disabled
IESO = ON Enabled
FOSC = HS HS oscillator
FOSC = HSPLL HS oscillator, Software Con-
trolled PLL
FOSC = EC External Clock
FOSC = ECPLL External Clock, Software Con-
trolled PLL
MPLAB® C18 C Compiler User’s Guide Addendum
DS51518A-page 200 2004 Microchip Technology Inc.
Watchdog Postscaler:
External Bus Data Wait:
Data Bus Width Select:
Processor Mode Selection:
External Address Bus Shift Enable:
CCP2 Mux:
WDTPS = 1 1:1
WDTPS = 2 1:2
WDTPS = 4 1:4
WDTPS = 8 1:8
WDTPS = 16 1:16
WDTPS = 32 1:32
WDTPS = 64 1:64
WDTPS = 128 1:128
WDTPS = 256 1:256
WDTPS = 512 1:512
WDTPS = 1024 1:1024
WDTPS = 2048 1:2048
WDTPS = 4096 1:4096
WDTPS = 8192 1:8192
WDTPS = 16384 1:16384
WDTPS = 32768 1:32768
WAIT = ON Enabled
WAIT = OFF Disabled
BW = 8 8-bit external bus
BW = 16 16-bit external bus
MODE = MM Microcontroller Mode - External
bus disabled
MODE = XM12 Extended Microcontroller Mode -
12-bit address mode
MODE = XM16 Extended Microcontroller Mode -
16-bit address mode
MODE = XM20 Extended Microcontroller Mode -
20-bit address mode
EASHIFT = OFF External bus reflects PC value
EASHIFT = ON External bus starts at 000000h
CCP2MUX = OFF Disabled
CCP2MUX = ON Enabled
Configuration Settings
2004 Microchip Technology Inc. DS51518A-page 201
PIC18F6720
Oscillator Selection:
Osc. Switch Enable:
Power Up Timer:
Brown Out Reset:
Brown Out Voltage:
Watchdog Timer:
Watchdog Postscaler:
CCP2 Mux:
Stack Overflow Reset:
OSC = LP LP
OSC = XT XT
OSC = HS HS
OSC = RC RC
OSC = EC EC-OSC2 as Clock Out
OSC = ECIO EC-OSC2 as RA6
OSC = HSPLL HS-PLL Enabled
OSC = RCIO RC-OSC2 as RA6
OSCS = ON Enabled
OSCS = OFF Disabled
PWRT = ON Enabled
PWRT = OFF Disabled
BOR = OFF Disabled
BOR = ON Enabled
BORV = 45 4.5V
BORV = 42 4.2V
BORV = 27 2.7V
BORV = 25 2.5V
WDT = OFF Disabled
WDT = ON Enabled
WDTPS = 1 1:1
WDTPS = 2 1:2
WDTPS = 4 1:4
WDTPS = 8 1:8
WDTPS = 16 1:16
WDTPS = 32 1:32
WDTPS = 64 1:64
WDTPS = 128 1:128
CCP2MUX = OFF Disabled
CCP2MUX = ON Enabled
STVR = OFF Disabled
STVR = ON Enabled
MPLAB® C18 C Compiler User’s Guide Addendum
DS51518A-page 202 2004 Microchip Technology Inc.
Low Voltage ICSP:
Background Debugger Enable:
Code Protection Block 0:
Code Protection Block 1:
Code Protection Block 2:
Code Protection Block 3:
Code Protection Block 4:
Code Protection Block 5:
Code Protection Block 6:
Code Protection Block 7:
Boot Block Code Protection:
Data EEPROM Code Protection:
Write Protection Block 0:
LVP = OFF Disabled
LVP = ON Enabled
DEBUG = ON Enabled
DEBUG = OFF Disabled
CP0 = ON Enabled
CP0 = OFF Disabled
CP1 = ON Enabled
CP1 = OFF Disabled
CP2 = ON Enabled
CP2 = OFF Disabled
CP3 = ON Enabled
CP3 = OFF Disabled
CP4 = ON Enabled
CP4 = OFF Disabled
CP5 = ON Enabled
CP5 = OFF Disabled
CP6 = ON Enabled
CP6 = OFF Disabled
CP7 = ON Enabled
CP7 = OFF Disabled
CPB = ON Enabled
CPB = OFF Disabled
CPD = ON Enabled
CPD = OFF Disabled
WRT0 = ON Enabled
WRT0 = OFF Disabled
Configuration Settings
2004 Microchip Technology Inc. DS51518A-page 203
Write Protection Block 1:
Write Protection Block 2:
Write Protection Block 3:
Write Protection Block 4:
Write Protection Block 5:
Write Protection Block 6:
Write Protection Block 7:
Boot Block Write Protection:
Configuration Register Write Protection:
Data EEPROM Write Protection:
Table Read Protection Block 0:
Table Read Protection Block 1:
Table Read Protection Block 2:
WRT1 = ON Enabled
WRT1 = OFF Disabled
WRT2 = ON Enabled
WRT2 = OFF Disabled
WRT3 = ON Enabled
WRT3 = OFF Disabled
WRT4 = ON Enabled
WRT4 = OFF Disabled
WRT5 = ON Enabled
WRT5 = OFF Disabled
WRT6 = ON Enabled
WRT6 = OFF Disabled
WRT7 = ON Enabled
WRT7 = OFF Disabled
WRTB = ON Enabled
WRTB = OFF Disabled
WRTC = ON Enabled
WRTC = OFF Disabled
WRTD = ON Enabled
WRTD = OFF Disabled
EBTR0 = ON Enabled
EBTR0 = OFF Disabled
EBTR1 = ON Enabled
EBTR1 = OFF Disabled
EBTR2 = ON Enabled
EBTR2 = OFF Disabled
MPLAB® C18 C Compiler User’s Guide Addendum
DS51518A-page 204 2004 Microchip Technology Inc.
Table Read Protection Block 3:
Table Read Protection Block 4:
Table Read Protection Block 5:
Table Read Protection Block 6:
Table Read Protection Block 7:
Boot Block Table Read Protection:
PIC18F6722
Oscillator Selection:
Fail Safe Clock Monitor:
Internal External Osc. Switch Over:
Power Up Timer:
EBTR3 = ON Enabled
EBTR3 = OFF Disabled
EBTR4 = ON Enabled
EBTR4 = OFF Disabled
EBTR5 = ON Enabled
EBTR5 = OFF Disabled
EBTR6 = ON Enabled
EBTR6 = OFF Disabled
EBTR7 = ON Enabled
EBTR7 = OFF Disabled
EBTRB = ON Enabled
EBTRB = OFF Disabled
OSC = LP LP
OSC = XT XT
OSC = HS HS
OSC = RC RC
OSC = EC EC-OSC2 as Clock Out
OSC = ECIO6 EC-OSC2 as RA6
OSC = HSPLL HS-PLL Enabled
OSC = RCIO6 RC-OSC2 as RA6
OSC = INTIO67 INTRC-OSC2 as RA6, OSC1 as
RA7
OSC = INTIO7 INTRC-OSC2 as Clock Out,
OSC1 as RA7
FCMEN = OFF Disabled
FCMEN = ON Enabled
IESO = OFF Disabled
IESO = ON Enabled
PWRT = ON Enabled
PWRT = OFF Disabled
Configuration Settings
2004 Microchip Technology Inc. DS51518A-page 205
Brown Out Reset:
Brown Out Voltage:
Watchdog Timer:
Watchdog Postscaler:
Processor Mode Selection:
External Bus Address Width:
BOREN = OFF Disabled
BOREN = ON SBOREN Enabled
BOREN = NOSLP Enabled except SLEEP,
SBOREN Disabled
BOREN = SBORDIS Enabled, SBOREN Disabled
BORV = 46 4.5V
BORV = 43 4.2V
BORV = 28 2.7V
BORV = 21 2.0V
WDT = OFF Disabled
WDT = ON Enabled
WDTPS = 1 1:1
WDTPS = 2 1:2
WDTPS = 4 1:4
WDTPS = 8 1:8
WDTPS = 16 1:16
WDTPS = 32 1:32
WDTPS = 64 1:64
WDTPS = 128 1:128
WDTPS = 256 1:256
WDTPS = 512 1:512
WDTPS = 1024 1:1024
WDTPS = 2048 1:2048
WDTPS = 4096 1:4096
WDTPS = 8192 1:8192
WDTPS = 16384 1:16384
WDTPS = 32768 1:32768
MODE = EM Extended Microcontroller Mode
MODE = MPB Microprocessor with Boot Block
Mode
MODE = MP Microprocessor Mode
MODE = MC Microcontroller Mode
ADDRBW = ADDR8BIT 8 Bit Address Bus
ADDRBW = ADDR12BIT 12 Bit Address Bus
ADDRBW = ADDR16BIT 16 Bit Address Bus
ADDRBW = ADDR20BIT 20 Bit Address Bus
MPLAB® C18 C Compiler User’s Guide Addendum
DS51518A-page 206 2004 Microchip Technology Inc.
External Bus Data Width:
External Bus Data Wait:
MCLR Enable:
T1 Oscillator Enable:
ECCP Mux:
ECCP2 Mux:
Stack Overflow Reset:
Low Voltage ICSP:
Boot Block Size:
XINST Enable:
Background Debugger Enable:
Code Protection Block 0:
Code Protection Block 1:
DATABW = DATA8BIT 8 Bit Data Bus
DATABW = DATA16BIT 16 Bit Data Bus
WAIT = ON Enabled
WAIT = OFF Disabled
MCLRE = OFF Disabled
MCLRE = ON Enabled
LPT1OSC = OFF Disabled
LPT1OSC = ON Enabled
ECCPMX = PORTH Muxed with RH7:4
ECCPMX = PORTE Muxed with RE6:3
ECCP2MX = PORTBE Muxed with RB3
ECCP2MX = PORTC Muxed with RC1
STVREN = OFF Disabled
STVREN = ON Enabled
LVP = OFF Disabled
LVP = ON Enabled
BBSIZ = BB2K 2Kb Boot Block
BBSIZ = BB4K 4Kb Boot Block
BBSIZ = BB8K 8Kb Boot Block
XINST = OFF Disabled
XINST = ON Enabled
DEBUG = ON Enabled
DEBUG = OFF Disabled
CP0 = ON Enabled
CP0 = OFF Disabled
CP1 = ON Enabled
CP1 = OFF Disabled
Configuration Settings
2004 Microchip Technology Inc. DS51518A-page 207
Code Protection Block 2:
Code Protection Block 3:
Code Protection Block 4:
Code Protection Block 5:
Code Protection Block 6:
Code Protection Block 7:
Boot Block Code Protection:
Data EEPROM Code Protection:
Write Protection Block 0:
Write Protection Block 1:
Write Protection Block 2:
Write Protection Block 3:
Write Protection Block 4:
CP2 = ON Enabled
CP2 = OFF Disabled
CP3 = ON Enabled
CP3 = OFF Disabled
CP4 = ON Enabled
CP4 = OFF Disabled
CP5 = ON Enabled
CP5 = OFF Disabled
CP6 = ON Enabled
CP6 = OFF Disabled
CP7 = ON Enabled
CP7 = OFF Disabled
CPB = ON Enabled
CPB = OFF Disabled
CPD = ON Enabled
CPD = OFF Disabled
WRT0 = ON Enabled
WRT0 = OFF Disabled
WRT1 = ON Enabled
WRT1 = OFF Disabled
WRT2 = ON Enabled
WRT2 = OFF Disabled
WRT3 = ON Enabled
WRT3 = OFF Disabled
WRT4 = ON Enabled
WRT4 = OFF Disabled
MPLAB® C18 C Compiler User’s Guide Addendum
DS51518A-page 208 2004 Microchip Technology Inc.
Write Protection Block 5:
Write Protection Block 6:
Write Protection Block 7:
Boot Block Write Protection:
Configuration Register Write Protection:
Data EEPROM Write Protection:
Table Read Protection Block 0:
Table Read Protection Block 1:
Table Read Protection Block 2:
Table Read Protection Block 3:
Table Read Protection Block 4:
Table Read Protection Block 5:
Table Read Protection Block 6:
WRT5 = ON Enabled
WRT5 = OFF Disabled
WRT6 = ON Enabled
WRT6 = OFF Disabled
WRT7 = ON Enabled
WRT7 = OFF Disabled
WRTB = ON Enabled
WRTB = OFF Disabled
WRTC = ON Enabled
WRTC = OFF Disabled
WRTD = ON Enabled
WRTD = OFF Disabled
EBTR0 = ON Enabled
EBTR0 = OFF Disabled
EBTR1 = ON Enabled
EBTR1 = OFF Disabled
EBTR2 = ON Enabled
EBTR2 = OFF Disabled
EBTR3 = ON Enabled
EBTR3 = OFF Disabled
EBTR4 = ON Enabled
EBTR4 = OFF Disabled
EBTR5 = ON Enabled
EBTR5 = OFF Disabled
EBTR6 = ON Enabled
EBTR6 = OFF Disabled
Configuration Settings
2004 Microchip Technology Inc. DS51518A-page 209
Table Read Protection Block 7:
Boot Block Table Read Protection:
PIC18F67J10
Background Debugger Enable:
Extended Instruction Set Enable:
Stack Overflow Reset:
Low Voltage ICSP:
Watchdog Timer:
Configuration Word Signature:
Code Protection:
Fail Safe Clock Monitor:
Internal/External Switch Over:
EBTR7 = ON Enabled
EBTR7 = OFF Disabled
EBTRB = ON Enabled
EBTRB = OFF Disabled
DEBUG = ON Enabled
DEBUG = OFF Disabled
XINST = OFF Disabled
XINST = ON Enabled
STVR = OFF Disabled
STVR = ON Enabled
LVP = OFF Disabled
LVP = ON Enabled
WDT = OFF Disabled
WDT = ON Enabled
SIGN = CLR Clear
SIGN = SET Set
CP0 = ON Enabled
CP0 = OFF Disabled
FCMEM = OFF Disabled
FCMEM = ON Enabled
IESO = OFF Disabled
IESO = ON Enabled
MPLAB® C18 C Compiler User’s Guide Addendum
DS51518A-page 210 2004 Microchip Technology Inc.
Oscillator Selection bits:
Watchdog Postscaler:
External Bus Data Wait:
Data Bus Width Select:
Processor Mode Selection:
External Address Bus Shift Enable:
CCP2 Mux:
FOSC = HS HS oscillator
FOSC = HSPLL HS oscillator, Software Con-
trolled PLL
FOSC = EC External Clock
FOSC = ECPLL External Clock, Software Con-
trolled PLL
WDTPS = 1 1:1
WDTPS = 2 1:2
WDTPS = 4 1:4
WDTPS = 8 1:8
WDTPS = 16 1:16
WDTPS = 32 1:32
WDTPS = 64 1:64
WDTPS = 128 1:128
WDTPS = 256 1:256
WDTPS = 512 1:512
WDTPS = 1024 1:1024
WDTPS = 2048 1:2048
WDTPS = 4096 1:4096
WDTPS = 8192 1:8192
WDTPS = 16384 1:16384
WDTPS = 32768 1:32768
WAIT = ON Enabled
WAIT = OFF Disabled
BW = 8 8-bit external bus
BW = 16 16-bit external bus
MODE = MM Microcontroller Mode - External
bus disabled
MODE = XM12 Extended Microcontroller Mode -
12-bit address mode
MODE = XM16 Extended Microcontroller Mode -
16-bit address mode
MODE = XM20 Extended Microcontroller Mode -
20-bit address mode
EASHIFT = OFF External bus reflects PC value
EASHIFT = ON External bus starts at 000000h
CCP2MUX = OFF Disabled
CCP2MUX = ON Enabled
Configuration Settings
2004 Microchip Technology Inc. DS51518A-page 211
PIC18F8310
Oscillator Selection:
Fail Safe Clock Monitor:
Internal External Osc. Switch Over:
Power Up Timer:
Brown Out Reset:
Brown Out Voltage:
Watchdog Timer:
OSC = LP LP
OSC = XT XT
OSC = HS HS
OSC = RC RC-OSC2 as Clock Out
OSC = EC EC-OSC2 as Clock Out
OSC = ECIO EC-OSC2 as RA6
OSC = HSPLL HS-PLL Enabled
OSC = RCIO RC-OSC2 as RA6
OSC = INTIO67 INTRC-OSC2 as RA6, OSC1 as
RA7
OSC = INTIO7 INTRC-OSC2 as Clock Out,
OSC1 as RA7
FCMEN = OFF Disabled
FCMEN = ON Enabled
IESO = OFF Disabled
IESO = ON Enabled
PWRT = ON Enabled
PWRT = OFF Disabled
BOREN = OFF Disabled
BOREN = ON SBOREN Enabled
BOREN = NOSLP Enabled except SLEEP,
SBOREN Disabled
BOREN = SBORDIS Enabled, SBOREN Disabled
BORV = 45 4.5V
BORV = 42 4.2V
BORV = 27 2.7V
BORV = 25 2.5V
WDT = OFF Disabled
WDT = ON Enabled
MPLAB® C18 C Compiler User’s Guide Addendum
DS51518A-page 212 2004 Microchip Technology Inc.
Watchdog Postscaler:
Processor Mode Selection:
External Data Bus Width:
External Bus Data Wait:
MCLR Enable:
Low Power Timer1 Selection:
CCP2 Mux:
WDTPS = 1 1:1
WDTPS = 2 1:2
WDTPS = 4 1:4
WDTPS = 8 1:8
WDTPS = 16 1:16
WDTPS = 32 1:32
WDTPS = 64 1:64
WDTPS = 128 1:128
WDTPS = 256 1:256
WDTPS = 512 1:512
WDTPS = 1024 1:1024
WDTPS = 2048 1:2048
WDTPS = 4096 1:4096
WDTPS = 8192 1:8192
WDTPS = 16384 1:16384
WDTPS = 32768 1:32768
PM = EM Extended Microcontroller Mode
PM = MPB Microprocessor with Boot Block
Mode
PM = MP Microprocessor Mode
PM = MC Microcontroller Mode
BW = 8 8-Bit External Data Bus Width
BW = 16 16-Bit External Data Bus Width
WAIT = ON Enabled
WAIT = OFF Disabled
MCLRE = OFF Disabled
MCLRE = ON Enabled
LPT1OSC = OFF High Power, High noise immu-
nity T1OSC selected
LPT1OSC = ON Low Power, Low noise immunity
T1OSC selected
CCP2MX = PORTBE CCP2 input/output is multi-
plexed with RE7/RB3
CCP2MX = PORTC CCP2 input/output is multi-
plexed with RC1
Configuration Settings
2004 Microchip Technology Inc. DS51518A-page 213
Stack Overflow Reset:
Extended Instruction set Enable:
Background Debugger Enable:
Code Protection:
Table Read Protection Internal Memory:
PIC18F8390
Oscillator Selection:
Fail Safe Clock Monitor:
Internal External Osc. Switch Over:
Power Up Timer:
STVREN = OFF Disabled
STVREN = ON Enabled
XINST = OFF Disabled
XINST = ON Enabled
DEBUG = ON Enabled
DEBUG = OFF Disabled
CP = ON Enabled
CP = OFF Disabled
EBTR = ON Enabled
EBTR = OFF Disabled
OSC = LP LP
OSC = XT XT
OSC = HS HS
OSC = RC RC-OSC2 as Clock Out
OSC = EC EC-OSC2 as Clock Out
OSC = ECIO EC-OSC2 as RA6
OSC = HSPLL HS-PLL Enabled
OSC = RCIO RC-OSC2 as RA6
OSC = INTIO67 INTRC-OSC2 as RA6, OSC1 as
RA7
OSC = INTIO7 INTRC-OSC2 as Clock Out,
OSC1 as RA7
FCMEN = OFF Disabled
FCMEN = ON Enabled
IESO = OFF Disabled
IESO = ON Enabled
PWRT = ON Enabled
PWRT = OFF Disabled
MPLAB® C18 C Compiler User’s Guide Addendum
DS51518A-page 214 2004 Microchip Technology Inc.
Brown Out Reset:
Brown Out Voltage:
Watchdog Timer:
Watchdog Postscaler:
MCLR Enable:
Low Power Timer1 Selection:
CCP2 Mux:
BOREN = OFF Disabled
BOREN = ON SBOREN Enabled
BOREN = NOSLP Enabled except SLEEP,
SBOREN Disabled
BOREN = SBORDIS Enabled, SBOREN Disabled
BORV = 45 4.5V
BORV = 42 4.2V
BORV = 27 2.7V
BORV = 25 2.5V
WDT = OFF Disabled
WDT = ON Enabled
WDTPS = 1 1:1
WDTPS = 2 1:2
WDTPS = 4 1:4
WDTPS = 8 1:8
WDTPS = 16 1:16
WDTPS = 32 1:32
WDTPS = 64 1:64
WDTPS = 128 1:128
WDTPS = 256 1:256
WDTPS = 512 1:512
WDTPS = 1024 1:1024
WDTPS = 2048 1:2048
WDTPS = 4096 1:4096
WDTPS = 8192 1:8192
WDTPS = 16384 1:16384
WDTPS = 32768 1:32768
MCLRE = OFF Disabled
MCLRE = ON Enabled
LPT1OSC = OFF High Power, High noise immu-
nity T1OSC selected
LPT1OSC = ON Low Power, Low noise immunity
T1OSC selected
CCP2MX = PORTBE CCP2 input/output is multi-
plexed with RE7/RB3
CCP2MX = PORTC CCP2 input/output is multi-
plexed with RC1
Configuration Settings
2004 Microchip Technology Inc. DS51518A-page 215
Stack Overflow Reset:
Extended Instruction set Enable:
Background Debugger Enable:
Code Protection:
Table Read Protection Internal Memory:
PIC18F8410
Oscillator Selection:
Fail Safe Clock Monitor:
Internal External Osc. Switch Over:
Power Up Timer:
STVREN = OFF Disabled
STVREN = ON Enabled
XINST = OFF Disabled
XINST = ON Enabled
DEBUG = ON Enabled
DEBUG = OFF Disabled
CP = ON Enabled
CP = OFF Disabled
EBTR = ON Enabled
EBTR = OFF Disabled
OSC = LP LP
OSC = XT XT
OSC = HS HS
OSC = RC RC-OSC2 as Clock Out
OSC = EC EC-OSC2 as Clock Out
OSC = ECIO EC-OSC2 as RA6
OSC = HSPLL HS-PLL Enabled
OSC = RCIO RC-OSC2 as RA6
OSC = INTIO67 INTRC-OSC2 as RA6, OSC1 as
RA7
OSC = INTIO7 INTRC-OSC2 as Clock Out,
OSC1 as RA7
FCMEN = OFF Disabled
FCMEN = ON Enabled
IESO = OFF Disabled
IESO = ON Enabled
PWRT = ON Enabled
PWRT = OFF Disabled
MPLAB® C18 C Compiler User’s Guide Addendum
DS51518A-page 216 2004 Microchip Technology Inc.
Brown Out Reset:
Brown Out Voltage:
Watchdog Timer:
Watchdog Postscaler:
Processor Mode Selection:
External Data Bus Width:
External Bus Data Wait:
BOREN = OFF Disabled
BOREN = ON SBOREN Enabled
BOREN = NOSLP Enabled except SLEEP,
SBOREN Disabled
BOREN = SBORDIS Enabled, SBOREN Disabled
BORV = 45 4.5V
BORV = 42 4.2V
BORV = 27 2.7V
BORV = 25 2.5V
WDT = OFF Disabled
WDT = ON Enabled
WDTPS = 1 1:1
WDTPS = 2 1:2
WDTPS = 4 1:4
WDTPS = 8 1:8
WDTPS = 16 1:16
WDTPS = 32 1:32
WDTPS = 64 1:64
WDTPS = 128 1:128
WDTPS = 256 1:256
WDTPS = 512 1:512
WDTPS = 1024 1:1024
WDTPS = 2048 1:2048
WDTPS = 4096 1:4096
WDTPS = 8192 1:8192
WDTPS = 16384 1:16384
WDTPS = 32768 1:32768
PM = EM Extended Microcontroller Mode
PM = MPB Microprocessor with Boot Block
Mode
PM = MP Microprocessor Mode
PM = MC Microcontroller Mode
BW = 8 8-Bit External Data Bus Width
BW = 16 16-Bit External Data Bus Width
WAIT = ON Enabled
WAIT = OFF Disabled
Configuration Settings
2004 Microchip Technology Inc. DS51518A-page 217
MCLR Enable:
Low Power Timer1 Selection:
CCP2 Mux:
Stack Overflow Reset:
Extended Instruction set Enable:
Background Debugger Enable:
Code Protection:
Table Read Protection Internal Memory:
PIC18F8490
Oscillator Selection:
MCLRE = OFF Disabled
MCLRE = ON Enabled
LPT1OSC = OFF High Power, High noise immu-
nity T1OSC selected
LPT1OSC = ON Low Power, Low noise immunity
T1OSC selected
CCP2MX = PORTBE CCP2 input/output is multi-
plexed with RE7/RB3
CCP2MX = PORTC CCP2 input/output is multi-
plexed with RC1
STVREN = OFF Disabled
STVREN = ON Enabled
XINST = OFF Disabled
XINST = ON Enabled
DEBUG = ON Enabled
DEBUG = OFF Disabled
CP = ON Enabled
CP = OFF Disabled
EBTR = ON Enabled
EBTR = OFF Disabled
OSC = LP LP
OSC = XT XT
OSC = HS HS
OSC = RC RC-OSC2 as Clock Out
OSC = EC EC-OSC2 as Clock Out
OSC = ECIO EC-OSC2 as RA6
OSC = HSPLL HS-PLL Enabled
OSC = RCIO RC-OSC2 as RA6
OSC = INTIO67 INTRC-OSC2 as RA6, OSC1 as
RA7
OSC = INTIO7 INTRC-OSC2 as Clock Out,
OSC1 as RA7
MPLAB® C18 C Compiler User’s Guide Addendum
DS51518A-page 218 2004 Microchip Technology Inc.
Fail Safe Clock Monitor:
Internal External Osc. Switch Over:
Power Up Timer:
Brown Out Reset:
Brown Out Voltage:
Watchdog Timer:
Watchdog Postscaler:
MCLR Enable:
FCMEN = OFF Disabled
FCMEN = ON Enabled
IESO = OFF Disabled
IESO = ON Enabled
PWRT = ON Enabled
PWRT = OFF Disabled
BOREN = OFF Disabled
BOREN = ON SBOREN Enabled
BOREN = NOSLP Enabled except SLEEP,
SBOREN Disabled
BOREN = SBORDIS Enabled, SBOREN Disabled
BORV = 45 4.5V
BORV = 42 4.2V
BORV = 27 2.7V
BORV = 25 2.5V
WDT = OFF Disabled
WDT = ON Enabled
WDTPS = 1 1:1
WDTPS = 2 1:2
WDTPS = 4 1:4
WDTPS = 8 1:8
WDTPS = 16 1:16
WDTPS = 32 1:32
WDTPS = 64 1:64
WDTPS = 128 1:128
WDTPS = 256 1:256
WDTPS = 512 1:512
WDTPS = 1024 1:1024
WDTPS = 2048 1:2048
WDTPS = 4096 1:4096
WDTPS = 8192 1:8192
WDTPS = 16384 1:16384
WDTPS = 32768 1:32768
MCLRE = OFF Disabled
MCLRE = ON Enabled
Configuration Settings
2004 Microchip Technology Inc. DS51518A-page 219
Low Power Timer1 Selection:
CCP2 Mux:
Stack Overflow Reset:
Extended Instruction set Enable:
Background Debugger Enable:
Code Protection:
Table Read Protection Internal Memory:
PIC18F84J15
Background Debugger Enable:
Extended Instruction Set Enable:
Stack Overflow Reset:
Low Voltage ICSP:
Watchdog Timer:
LPT1OSC = OFF High Power, High noise immu-
nity T1OSC selected
LPT1OSC = ON Low Power, Low noise immunity
T1OSC selected
CCP2MX = PORTBE CCP2 input/output is multi-
plexed with RE7/RB3
CCP2MX = PORTC CCP2 input/output is multi-
plexed with RC1
STVREN = OFF Disabled
STVREN = ON Enabled
XINST = OFF Disabled
XINST = ON Enabled
DEBUG = ON Enabled
DEBUG = OFF Disabled
CP = ON Enabled
CP = OFF Disabled
EBTR = ON Enabled
EBTR = OFF Disabled
DEBUG = ON Enabled
DEBUG = OFF Disabled
XINST = OFF Disabled
XINST = ON Enabled
STVR = OFF Disabled
STVR = ON Enabled
LVP = OFF Disabled
LVP = ON Enabled
WDT = OFF Disabled
WDT = ON Enabled
MPLAB® C18 C Compiler User’s Guide Addendum
DS51518A-page 220 2004 Microchip Technology Inc.
Configuration Word Signature:
Code Protection:
Fail Safe Clock Monitor:
Internal/External Switch Over:
Oscillator Selection bits:
Watchdog Postscaler:
External Bus Data Wait:
Data Bus Width Select:
SIGN = CLR Clear
SIGN = SET Set
CP0 = ON Enabled
CP0 = OFF Disabled
FCMEM = OFF Disabled
FCMEM = ON Enabled
IESO = OFF Disabled
IESO = ON Enabled
FOSC = HS HS oscillator
FOSC = HSPLL HS oscillator, Software Con-
trolled PLL
FOSC = EC External Clock
FOSC = ECPLL External Clock, Software Con-
trolled PLL
WDTPS = 1 1:1
WDTPS = 2 1:2
WDTPS = 4 1:4
WDTPS = 8 1:8
WDTPS = 16 1:16
WDTPS = 32 1:32
WDTPS = 64 1:64
WDTPS = 128 1:128
WDTPS = 256 1:256
WDTPS = 512 1:512
WDTPS = 1024 1:1024
WDTPS = 2048 1:2048
WDTPS = 4096 1:4096
WDTPS = 8192 1:8192
WDTPS = 16384 1:16384
WDTPS = 32768 1:32768
WAIT = ON Enabled
WAIT = OFF Disabled
BW = 8 8-bit external bus
BW = 16 16-bit external bus
Configuration Settings
2004 Microchip Technology Inc. DS51518A-page 221
Processor Mode Selection:
External Address Bus Shift Enable:
ECCP Mux:
CCP2 Mux:
PIC18F8520
Oscillator Selection:
Osc. Switch Enable:
Power Up Timer:
Brown Out Reset:
Brown Out Voltage:
MODE = MM Microcontroller Mode - External
bus disabled
MODE = XM12 Extended Microcontroller Mode -
12-bit address mode
MODE = XM16 Extended Microcontroller Mode -
16-bit address mode
MODE = XM20 Extended Microcontroller Mode -
20-bit address mode
EASHIFT = OFF External bus reflects PC value
EASHIFT = ON External bus starts at 000000h
ECCPMUX = OFF Disabled
ECCPMUX = ON Enabled
CCP2MUX = OFF Disabled
CCP2MUX = ON Enabled
OSC = LP LP
OSC = XT XT
OSC = HS HS
OSC = RC RC-OSC2 as Clock Out
OSC = EC EC-OSC2 as Clock Out
OSC = ECIO EC-OSC2 as RA6
OSC = HSPLL HS-PLL Enabled
OSC = RCIO RC-OSC2 as RA6
OSCS = ON Enabled
OSCS = OFF Disabled
PWRT = ON Enabled
PWRT = OFF Disabled
BOR = OFF Disabled
BOR = ON Enabled
BORV = 45 4.5V
BORV = 42 4.2V
BORV = 27 2.7V
BORV = 25 2.5V
MPLAB® C18 C Compiler User’s Guide Addendum
DS51518A-page 222 2004 Microchip Technology Inc.
Watchdog Timer:
Watchdog Postscaler:
Processor Mode Selection:
External Bus Data Wait:
CCP2 Mux:
Stack Overflow Reset:
Low Voltage ICSP:
Background Debugger Enable:
Code Protection Block 0:
Code Protection Block 1:
WDT = OFF Disabled
WDT = ON Enabled
WDTPS = 1 1:1
WDTPS = 2 1:2
WDTPS = 4 1:4
WDTPS = 8 1:8
WDTPS = 16 1:16
WDTPS = 32 1:32
WDTPS = 64 1:64
WDTPS = 128 1:128
MODE = EM Extended Microcontroller Mode
MODE = MPB Microprocessor with Boot Block
Mode
MODE = MP Microprocessor Mode
MODE = MC Microcontroller Mode
WAIT = ON Enabled
WAIT = OFF Disabled
CCP2MUX = OFF Uses RE7
CCP2MUX = RE7 Uses RE7
CCP2MUX = ON Uses RC1
CCP2MUX = RC1 Uses RC1
STVR = OFF Disabled
STVR = ON Enabled
LVP = OFF Disabled
LVP = ON Enabled
DEBUG = ON Enabled
DEBUG = OFF Disabled
CP0 = ON Enabled
CP0 = OFF Disabled
CP1 = ON Enabled
CP1 = OFF Disabled
Configuration Settings
2004 Microchip Technology Inc. DS51518A-page 223
Code Protection Block 2:
Code Protection Block 3:
Boot Block Code Protection:
Data EEPROM Code Protection:
Write Protection Block 0:
Write Protection Block 1:
Write Protection Block 2:
Write Protection Block 3:
Boot Block Write Protection:
Configuration Register Write Protection:
Data EEPROM Write Protection:
Table Read Protection Block 0:
Table Read Protection Block 1:
CP2 = ON Enabled
CP2 = OFF Disabled
CP3 = ON Enabled
CP3 = OFF Disabled
CPB = ON Enabled
CPB = OFF Disabled
CPD = ON Enabled
CPD = OFF Disabled
WRT0 = ON Enabled
WRT0 = OFF Disabled
WRT1 = ON Enabled
WRT1 = OFF Disabled
WRT2 = ON Enabled
WRT2 = OFF Disabled
WRT3 = ON Enabled
WRT3 = OFF Disabled
WRTB = ON Enabled
WRTB = OFF Disabled
WRTC = ON Enabled
WRTC = OFF Disabled
WRTD = ON Enabled
WRTD = OFF Disabled
EBTR0 = ON Enabled
EBTR0 = OFF Disabled
EBTR1 = ON Enabled
EBTR1 = OFF Disabled
MPLAB® C18 C Compiler User’s Guide Addendum
DS51518A-page 224 2004 Microchip Technology Inc.
Table Read Protection Block 2:
Table Read Protection Block 3:
Boot Block Table Read Protection:
PIC18F8525
Oscillator Selection:
Osc. Switch Enable:
Power Up Timer:
Brown Out Reset:
Brown Out Voltage:
Watchdog Timer:
EBTR2 = ON Enabled
EBTR2 = OFF Disabled
EBTR3 = ON Enabled
EBTR3 = OFF Disabled
EBTRB = ON Enabled
EBTRB = OFF Disabled
OSC = LP LP
OSC = XT XT
OSC = HS HS
OSC = RC RC
OSC = EC EC-OSC2 as Clock Out
OSC = ECIO EC-OSC2 as RA6
OSC = HSPLL HS-PLL Enabled
OSC = RCIO RC-OSC2 as RA6
OSC = ECIOPLL EC-OSC2 as RA6 and PLL
OSC = ECIOSWPLL EC-OSC2 as RA6 and SW PLL
OSC = HSSWPLL HS with SW PLL
OSCS = ON Enabled
OSCS = OFF Disabled
PWRT = ON Enabled
PWRT = OFF Disabled
BOR = OFF Disabled
BOR = ON Enabled
BORV = 45 4.5V
BORV = 42 4.2V
BORV = 27 2.7V
BORV = 20 2.0V
WDT = OFF Disabled
WDT = ON Enabled
Configuration Settings
2004 Microchip Technology Inc. DS51518A-page 225
Watchdog Postscaler:
Processor Mode Selection:
External Bus Data Wait:
MCLR Enable:
ECCP Mux:
CCP2 Mux:
Stack Overflow Reset:
Low Voltage ICSP:
WDTPS = 1 1:1
WDTPS = 2 1:2
WDTPS = 4 1:4
WDTPS = 8 1:8
WDTPS = 16 1:16
WDTPS = 32 1:32
WDTPS = 64 1:64
WDTPS = 128 1:128
WDTPS = 256 1:256
WDTPS = 512 1:512
WDTPS = 1024 1:1024
WDTPS = 2048 1:2048
WDTPS = 4096 1:4096
WDTPS = 8192 1:8192
WDTPS = 16384 1:16384
WDTPS = 32768 1:32768
MODE = EM Extended Microcontroller Mode
MODE = MPB Microprocessor with Boot Block
Mode
MODE = MP Microprocessor Mode
MODE = MC Microcontroller Mode
WAIT = ON Enabled
WAIT = OFF Disabled
MCLRE = OFF Disabled
MCLRE = ON Enabled
ECCPMX = PORTH Muxed with RH7:4
ECCPMX = PORTE Muxed with RE6:3
CCP2MX = PORTBE Muxed with RB3 or RE7
CCP2MX = PORTC Muxed with RC1
STVR = OFF Disabled
STVR = ON Enabled
LVP = OFF Disabled
LVP = ON Enabled
MPLAB® C18 C Compiler User’s Guide Addendum
DS51518A-page 226 2004 Microchip Technology Inc.
Background Debugger Enable:
Code Protection Block 0:
Code Protection Block 1:
Code Protection Block 2:
Boot Block Code Protection:
Data EEPROM Code Protection:
Write Protection Block 0:
Write Protection Block 1:
Write Protection Block 2:
Boot Block Write Protection:
Configuration Register Write Protection:
Data EEPROM Write Protection:
Table Read Protection Block 0:
DEBUG = ON Enabled
DEBUG = OFF Disabled
CP0 = ON Enabled
CP0 = OFF Disabled
CP1 = ON Enabled
CP1 = OFF Disabled
CP2 = ON Enabled
CP2 = OFF Disabled
CPB = ON Enabled
CPB = OFF Disabled
CPD = ON Enabled
CPD = OFF Disabled
WRT0 = ON Enabled
WRT0 = OFF Disabled
WRT1 = ON Enabled
WRT1 = OFF Disabled
WRT2 = ON Enabled
WRT2 = OFF Disabled
WRTB = ON Enabled
WRTB = OFF Disabled
WRTC = ON Enabled
WRTC = OFF Disabled
WRTD = ON Enabled
WRTD = OFF Disabled
EBTR0 = ON Enabled
EBTR0 = OFF Disabled
Configuration Settings
2004 Microchip Technology Inc. DS51518A-page 227
Table Read Protection Block 1:
Table Read Protection Block 2:
Boot Block Table Read Protection:
PIC18F8585
Oscillator Selection bits:
Osc. Switch Enable:
Power Up Timer:
Brown Out Reset:
Brown Out Voltage:
Watchdog Timer:
EBTR1 = ON Enabled
EBTR1 = OFF Disabled
EBTR2 = ON Enabled
EBTR2 = OFF Disabled
EBTRB = ON Enabled
EBTRB = OFF Disabled
OSC = LP LP
OSC = XT XT
OSC = HS HS
OSC = RC RC with OSC2 as divide by 4
clock out
OSC = EC EC with OSC2 as divide by 4
clock out
OSC = ECIO EC with OSC2 as RA6
OSC = HSPLL HS with HW enabled 4xPLL
OSC = RCIO RC with OSC2 as RA6
OSC = ECIOPLL EC with OSC2 as RA6 and HW
enabled 4xPLL
OSC = ECIOSWPLL EC with OSC2 as RA6 and SW
enabled 4xPLL
OSC = HSSWPLL HS with SW enabled 4xPLL
OSCS = ON Enabled
OSCS = OFF Disabled
PWRT = ON Enabled
PWRT = OFF Disabled
BOR = OFF Disabled
BOR = ON Enabled
BORV = 45 4.5V
BORV = 42 4.2V
BORV = 27 2.7V
BORV = 20 2.0V
WDT = OFF HW Disabled - SW Controlled
WDT = ON HW Enabled - SW Disabled
MPLAB® C18 C Compiler User’s Guide Addendum
DS51518A-page 228 2004 Microchip Technology Inc.
Watchdog Postscaler:
Processor Mode Selection:
External Bus Data Wait:
MCLR Enable:
CCP2 Mux bit:
Stack Overflow Reset:
Low Voltage ICSP:
Background Debugger Enable:
WDTPS = 1 1:1
WDTPS = 2 1:2
WDTPS = 4 1:4
WDTPS = 8 1:8
WDTPS = 16 1:16
WDTPS = 32 1:32
WDTPS = 64 1:64
WDTPS = 128 1:128
WDTPS = 256 1:256
WDTPS = 512 1:512
WDTPS = 1024 1:1024
WDTPS = 2048 1:2048
WDTPS = 4096 1:4096
WDTPS = 8192 1:8192
WDTPS = 16384 1:16384
WDTPS = 32768 1:32768
MODE = EM Extended Microcontroller Mode
MODE = MPB Microprocessor with Boot Block
Mode
MODE = MP Microprocessor Mode
MODE = MC Microcontroller Mode
WAIT = ON Enabled
WAIT = OFF Disabled
MCLRE = OFF Disabled
MCLRE = ON Enabled
CCP2MX = OFF CCP2 input/output is multi-
plexed with RE7
CCP2MX = ON CCP2 input/output is multi-
plexed with RC1
STVR = OFF Disabled
STVR = ON Enabled
LVP = OFF Disabled
LVP = ON Enabled
DEBUG = ON Enabled
DEBUG = OFF Disabled
Configuration Settings
2004 Microchip Technology Inc. DS51518A-page 229
Code Protection Block 0:
Code Protection Block 1:
Code Protection Block 2:
Boot Block Code Protection:
Data EEPROM Code Protection:
Write Protection Block 0:
Write Protection Block 1:
Write Protection Block 2:
Boot Block Write Protection:
Configuration Register Write Protection:
Data EEPROM Write Protection:
Table Read Protection Block 0:
Table Read Protection Block 1:
CP0 = ON Enabled
CP0 = OFF Disabled
CP1 = ON Enabled
CP1 = OFF Disabled
CP2 = ON Enabled
CP2 = OFF Disabled
CPB = ON Enabled
CPB = OFF Disabled
CPD = ON Enabled
CPD = OFF Disabled
WRT0 = ON Enabled
WRT0 = OFF Disabled
WRT1 = ON Enabled
WRT1 = OFF Disabled
WRT2 = ON Enabled
WRT2 = OFF Disabled
WRTB = ON Enabled
WRTB = OFF Disabled
WRTC = ON Enabled
WRTC = OFF Disabled
WRTD = ON Enabled
WRTD = OFF Disabled
EBTR0 = ON Enabled
EBTR0 = OFF Disabled
EBTR1 = ON Enabled
EBTR1 = OFF Disabled
MPLAB® C18 C Compiler User’s Guide Addendum
DS51518A-page 230 2004 Microchip Technology Inc.
Table Read Protection Block 2:
Boot Block Table Read Protection:
PIC18F85J10
Background Debugger Enable:
Extended Instruction Set Enable:
Stack Overflow Reset:
Low Voltage ICSP:
Watchdog Timer:
Configuration Word Signature:
Code Protection:
Fail Safe Clock Monitor:
Internal/External Switch Over:
EBTR2 = ON Enabled
EBTR2 = OFF Disabled
EBTRB = ON Enabled
EBTRB = OFF Disabled
DEBUG = ON Enabled
DEBUG = OFF Disabled
XINST = OFF Disabled
XINST = ON Enabled
STVR = OFF Disabled
STVR = ON Enabled
LVP = OFF Disabled
LVP = ON Enabled
WDT = OFF Disabled
WDT = ON Enabled
SIGN = CLR Clear
SIGN = SET Set
CP0 = ON Enabled
CP0 = OFF Disabled
FCMEM = OFF Disabled
FCMEM = ON Enabled
IESO = OFF Disabled
IESO = ON Enabled
Configuration Settings
2004 Microchip Technology Inc. DS51518A-page 231
Oscillator Selection bits:
Watchdog Postscaler:
External Bus Data Wait:
Data Bus Width Select:
Processor Mode Selection:
External Address Bus Shift Enable:
ECCP Mux:
FOSC = HS HS oscillator
FOSC = HSPLL HS oscillator, Software Con-
trolled PLL
FOSC = EC External Clock
FOSC = ECPLL External Clock, Software Con-
trolled PLL
WDTPS = 1 1:1
WDTPS = 2 1:2
WDTPS = 4 1:4
WDTPS = 8 1:8
WDTPS = 16 1:16
WDTPS = 32 1:32
WDTPS = 64 1:64
WDTPS = 128 1:128
WDTPS = 256 1:256
WDTPS = 512 1:512
WDTPS = 1024 1:1024
WDTPS = 2048 1:2048
WDTPS = 4096 1:4096
WDTPS = 8192 1:8192
WDTPS = 16384 1:16384
WDTPS = 32768 1:32768
WAIT = ON Enabled
WAIT = OFF Disabled
BW = 8 8-bit external bus
BW = 16 16-bit external bus
MODE = MM Microcontroller Mode - External
bus disabled
MODE = XM12 Extended Microcontroller Mode -
12-bit address mode
MODE = XM16 Extended Microcontroller Mode -
16-bit address mode
MODE = XM20 Extended Microcontroller Mode -
20-bit address mode
EASHIFT = OFF External bus reflects PC value
EASHIFT = ON External bus starts at 000000h
ECCPMUX = OFF Disabled
ECCPMUX = ON Enabled
MPLAB® C18 C Compiler User’s Guide Addendum
DS51518A-page 232 2004 Microchip Technology Inc.
CCP2 Mux:
PIC18F85J15
Background Debugger Enable:
Extended Instruction Set Enable:
Stack Overflow Reset:
Low Voltage ICSP:
Watchdog Timer:
Configuration Word Signature:
Code Protection:
Fail Safe Clock Monitor:
Internal/External Switch Over:
Oscillator Selection bits:
CCP2MUX = OFF Disabled
CCP2MUX = ON Enabled
DEBUG = ON Enabled
DEBUG = OFF Disabled
XINST = OFF Disabled
XINST = ON Enabled
STVR = OFF Disabled
STVR = ON Enabled
LVP = OFF Disabled
LVP = ON Enabled
WDT = OFF Disabled
WDT = ON Enabled
SIGN = CLR Clear
SIGN = SET Set
CP0 = ON Enabled
CP0 = OFF Disabled
FCMEM = OFF Disabled
FCMEM = ON Enabled
IESO = OFF Disabled
IESO = ON Enabled
FOSC = HS HS oscillator
FOSC = HSPLL HS oscillator, Software Con-
trolled PLL
FOSC = EC External Clock
FOSC = ECPLL External Clock, Software Con-
trolled PLL
Configuration Settings
2004 Microchip Technology Inc. DS51518A-page 233
Watchdog Postscaler:
External Bus Data Wait:
Data Bus Width Select:
Processor Mode Selection:
External Address Bus Shift Enable:
ECCP Mux:
CCP2 Mux:
WDTPS = 1 1:1
WDTPS = 2 1:2
WDTPS = 4 1:4
WDTPS = 8 1:8
WDTPS = 16 1:16
WDTPS = 32 1:32
WDTPS = 64 1:64
WDTPS = 128 1:128
WDTPS = 256 1:256
WDTPS = 512 1:512
WDTPS = 1024 1:1024
WDTPS = 2048 1:2048
WDTPS = 4096 1:4096
WDTPS = 8192 1:8192
WDTPS = 16384 1:16384
WDTPS = 32768 1:32768
WAIT = ON Enabled
WAIT = OFF Disabled
BW = 8 8-bit external bus
BW = 16 16-bit external bus
MODE = MM Microcontroller Mode - External
bus disabled
MODE = XM12 Extended Microcontroller Mode -
12-bit address mode
MODE = XM16 Extended Microcontroller Mode -
16-bit address mode
MODE = XM20 Extended Microcontroller Mode -
20-bit address mode
EASHIFT = OFF External bus reflects PC value
EASHIFT = ON External bus starts at 000000h
ECCPMUX = OFF Disabled
ECCPMUX = ON Enabled
CCP2MUX = OFF Disabled
CCP2MUX = ON Enabled
MPLAB® C18 C Compiler User’s Guide Addendum
DS51518A-page 234 2004 Microchip Technology Inc.
PIC18F8620
Oscillator Selection:
Osc. Switch Enable:
Power Up Timer:
Brown Out Reset:
Brown Out Voltage:
Watchdog Timer:
Watchdog Postscaler:
Processor Mode Selection:
OSC = LP LP
OSC = XT XT
OSC = HS HS
OSC = RC RC
OSC = EC EC-OSC2 as Clock Out
OSC = ECIO EC-OSC2 as RA6
OSC = HSPLL HS-PLL Enabled
OSC = RCIO RC-OSC2 as RA6
OSCS = ON Enabled
OSCS = OFF Disabled
PWRT = ON Enabled
PWRT = OFF Disabled
BOR = OFF Disabled
BOR = ON Enabled
BORV = 45 4.5V
BORV = 42 4.2V
BORV = 27 2.7V
BORV = 25 2.5V
WDT = OFF Disabled
WDT = ON Enabled
WDTPS = 1 1:1
WDTPS = 2 1:2
WDTPS = 4 1:4
WDTPS = 8 1:8
WDTPS = 16 1:16
WDTPS = 32 1:32
WDTPS = 64 1:64
WDTPS = 128 1:128
MODE = EM Extended Microcontroller Mode
MODE = MPB Microprocessor with Boot Block
Mode
MODE = MP Microprocessor Mode
MODE = MC Microcontroller Mode
Configuration Settings
2004 Microchip Technology Inc. DS51518A-page 235
External Bus Data Wait:
CCP2 Mux:
Stack Overflow Reset:
Low Voltage ICSP:
Background Debugger Enable:
Code Protection Block 0:
Code Protection Block 1:
Code Protection Block 2:
Code Protection Block 3:
Boot Block Code Protection:
Data EEPROM Code Protection:
Write Protection Block 0:
Write Protection Block 1:
WAIT = ON Enabled
WAIT = OFF Disabled
CCP2MUX = OFF Disabled
CCP2MUX = ON Enabled
STVR = OFF Disabled
STVR = ON Enabled
LVP = OFF Disabled
LVP = ON Enabled
DEBUG = ON Enabled
DEBUG = OFF Disabled
CP0 = ON Enabled
CP0 = OFF Disabled
CP1 = ON Enabled
CP1 = OFF Disabled
CP2 = ON Enabled
CP2 = OFF Disabled
CP3 = ON Enabled
CP3 = OFF Disabled
CPB = ON Enabled
CPB = OFF Disabled
CPD = ON Enabled
CPD = OFF Disabled
WRT0 = ON Enabled
WRT0 = OFF Disabled
WRT1 = ON Enabled
WRT1 = OFF Disabled
MPLAB® C18 C Compiler User’s Guide Addendum
DS51518A-page 236 2004 Microchip Technology Inc.
Write Protection Block 2:
Write Protection Block 3:
Boot Block Write Protection:
Configuration Register Write Protection:
Data EEPROM Write Protection:
Table Read Protection Block 0:
Table Read Protection Block 1:
Table Read Protection Block 2:
Table Read Protection Block 3:
Boot Block Table Read Protection:
WRT2 = ON Enabled
WRT2 = OFF Disabled
WRT3 = ON Enabled
WRT3 = OFF Disabled
WRTB = ON Enabled
WRTB = OFF Disabled
WRTC = ON Enabled
WRTC = OFF Disabled
WRTD = ON Enabled
WRTD = OFF Disabled
EBTR0 = ON Enabled
EBTR0 = OFF Disabled
EBTR1 = ON Enabled
EBTR1 = OFF Disabled
EBTR2 = ON Enabled
EBTR2 = OFF Disabled
EBTR3 = ON Enabled
EBTR3 = OFF Disabled
EBTRB = ON Enabled
EBTRB = OFF Disabled
Configuration Settings
2004 Microchip Technology Inc. DS51518A-page 237
PIC18F8621
Oscillator Selection:
Osc. Switch Enable:
Power Up Timer:
Brown Out Reset:
Brown Out Voltage:
Watchdog Timer:
OSC = LP LP
OSC = XT XT
OSC = HS HS
OSC = RC RC
OSC = EC EC-OSC2 as Clock Out
OSC = ECIO EC-OSC2 as RA6
OSC = HSPLL HS-PLL Enabled
OSC = RCIO RC-OSC2 as RA6
OSC = ECIOPLL EC-OSC2 as RA6 and PLL
OSC = ECIOSWPLL EC-OSC2 as RA6 and SW PLL
OSC = HSSWPLL HS with SW PLL
OSCS = ON Enabled
OSCS = OFF Disabled
PWRT = ON Enabled
PWRT = OFF Disabled
BOR = OFF Disabled
BOR = ON Enabled
BORV = 45 4.5V
BORV = 42 4.2V
BORV = 27 2.7V
BORV = 20 2.0V
WDT = OFF Disabled
WDT = ON Enabled
MPLAB® C18 C Compiler User’s Guide Addendum
DS51518A-page 238 2004 Microchip Technology Inc.
Watchdog Postscaler:
Processor Mode Selection:
External Bus Data Wait:
MCLR Enable:
ECCP Mux:
CCP2 Mux:
Stack Overflow Reset:
Low Voltage ICSP:
WDTPS = 1 1:1
WDTPS = 2 1:2
WDTPS = 4 1:4
WDTPS = 8 1:8
WDTPS = 16 1:16
WDTPS = 32 1:32
WDTPS = 64 1:64
WDTPS = 128 1:128
WDTPS = 256 1:256
WDTPS = 512 1:512
WDTPS = 1024 1:1024
WDTPS = 2048 1:2048
WDTPS = 4096 1:4096
WDTPS = 8192 1:8192
WDTPS = 16384 1:16384
WDTPS = 32768 1:32768
MODE = EM Extended Microcontroller Mode
MODE = MPB Microprocessor with Boot Block
Mode
MODE = MP Microprocessor Mode
MODE = MC Microcontroller Mode
WAIT = ON Enabled
WAIT = OFF Disabled
MCLRE = OFF Disabled
MCLRE = ON Enabled
ECCPMX = PORTH Muxed with RH7:4
ECCPMX = PORTE Muxed with RE6:3
CCP2MX = PORTBE Muxed with RB3 or RE7
CCP2MX = PORTC Muxed with RC1
STVR = OFF Disabled
STVR = ON Enabled
LVP = OFF Disabled
LVP = ON Enabled
Configuration Settings
2004 Microchip Technology Inc. DS51518A-page 239
Background Debugger Enable:
Code Protection Block 0:
Code Protection Block 1:
Code Protection Block 2:
Code Protection Block 3:
Boot Block Code Protection:
Data EEPROM Code Protection:
Write Protection Block 0:
Write Protection Block 1:
Write Protection Block 2:
Write Protection Block 3:
Boot Block Write Protection:
Configuration Register Write Protection:
DEBUG = ON Enabled
DEBUG = OFF Disabled
CP0 = ON Enabled
CP0 = OFF Disabled
CP1 = ON Enabled
CP1 = OFF Disabled
CP2 = ON Enabled
CP2 = OFF Disabled
CP3 = ON Enabled
CP3 = OFF Disabled
CPB = ON Enabled
CPB = OFF Disabled
CPD = ON Enabled
CPD = OFF Disabled
WRT0 = ON Enabled
WRT0 = OFF Disabled
WRT1 = ON Enabled
WRT1 = OFF Disabled
WRT2 = ON Enabled
WRT2 = OFF Disabled
WRT3 = ON Enabled
WRT3 = OFF Disabled
WRTB = ON Enabled
WRTB = OFF Disabled
WRTC = ON Enabled
WRTC = OFF Disabled
MPLAB® C18 C Compiler User’s Guide Addendum
DS51518A-page 240 2004 Microchip Technology Inc.
Data EEPROM Write Protection:
Table Read Protection Block 0:
Table Read Protection Block 1:
Table Read Protection Block 2:
Table Read Protection Block 3:
Boot Block Table Read Protection:
PIC18F8627
Oscillator Selection:
Fail Safe Clock Monitor:
Internal External Osc. Switch Over:
Power Up Timer:
WRTD = ON Enabled
WRTD = OFF Disabled
EBTR0 = ON Enabled
EBTR0 = OFF Disabled
EBTR1 = ON Enabled
EBTR1 = OFF Disabled
EBTR2 = ON Enabled
EBTR2 = OFF Disabled
EBTR3 = ON Enabled
EBTR3 = OFF Disabled
EBTRB = ON Enabled
EBTRB = OFF Disabled
OSC = LP LP
OSC = XT XT
OSC = HS HS
OSC = RC RC
OSC = EC EC-OSC2 as Clock Out
OSC = ECIO6 EC-OSC2 as RA6
OSC = HSPLL HS-PLL Enabled
OSC = RCIO6 RC-OSC2 as RA6
OSC = INTIO67 INTRC-OSC2 as RA6, OSC1 as
RA7
OSC = INTIO7 INTRC-OSC2 as Clock Out,
OSC1 as RA7
FCMEN = OFF Disabled
FCMEN = ON Enabled
IESO = OFF Disabled
IESO = ON Enabled
PWRT = ON Enabled
PWRT = OFF Disabled
Configuration Settings
2004 Microchip Technology Inc. DS51518A-page 241
Brown Out Reset:
Brown Out Voltage:
Watchdog Timer:
Watchdog Postscaler:
Processor Mode Selection:
External Bus Address Width:
BOREN = OFF Disabled
BOREN = ON SBOREN Enabled
BOREN = NOSLP Enabled except SLEEP,
SBOREN Disabled
BOREN = SBORDIS Enabled, SBOREN Disabled
BORV = 46 4.5V
BORV = 43 4.2V
BORV = 28 2.7V
BORV = 21 2.0V
WDT = OFF Disabled
WDT = ON Enabled
WDTPS = 1 1:1
WDTPS = 2 1:2
WDTPS = 4 1:4
WDTPS = 8 1:8
WDTPS = 16 1:16
WDTPS = 32 1:32
WDTPS = 64 1:64
WDTPS = 128 1:128
WDTPS = 256 1:256
WDTPS = 512 1:512
WDTPS = 1024 1:1024
WDTPS = 2048 1:2048
WDTPS = 4096 1:4096
WDTPS = 8192 1:8192
WDTPS = 16384 1:16384
WDTPS = 32768 1:32768
MODE = EM Extended Microcontroller Mode
MODE = MPB Microprocessor with Boot Block
Mode
MODE = MP Microprocessor Mode
MODE = MC Microcontroller Mode
ADDRBW = ADDR8BIT 8 Bit Address Bus
ADDRBW = ADDR12BIT 12 Bit Address Bus
ADDRBW = ADDR16BIT 16 Bit Address Bus
ADDRBW = ADDR20BIT 20 Bit Address Bus
MPLAB® C18 C Compiler User’s Guide Addendum
DS51518A-page 242 2004 Microchip Technology Inc.
External Bus Data Width:
External Bus Data Wait:
MCLR Enable:
T1 Oscillator Enable:
ECCP Mux:
ECCP2 Mux:
Stack Overflow Reset:
Low Voltage ICSP:
Boot Block Size:
XINST Enable:
Background Debugger Enable:
Code Protection Block 0:
Code Protection Block 1:
DATABW = DATA8BIT 8 Bit Data Bus
DATABW = DATA16BIT 16 Bit Data Bus
WAIT = ON Enabled
WAIT = OFF Disabled
MCLRE = OFF Disabled
MCLRE = ON Enabled
LPT1OSC = OFF Disabled
LPT1OSC = ON Enabled
ECCPMX = PORTH Muxed with RH7:4
ECCPMX = PORTE Muxed with RE6:3
ECCP2MX = PORTBE Muxed with RB3
ECCP2MX = PORTC Muxed with RC1
STVREN = OFF Disabled
STVREN = ON Enabled
LVP = OFF Disabled
LVP = ON Enabled
BBSIZ = BB2K 2Kb Boot Block
BBSIZ = BB4K 4Kb Boot Block
BBSIZ = BB8K 8Kb Boot Block
XINST = OFF Disabled
XINST = ON Enabled
DEBUG = ON Enabled
DEBUG = OFF Disabled
CP0 = ON Enabled
CP0 = OFF Disabled
CP1 = ON Enabled
CP1 = OFF Disabled
Configuration Settings
2004 Microchip Technology Inc. DS51518A-page 243
Code Protection Block 2:
Code Protection Block 3:
Code Protection Block 4:
Code Protection Block 5:
Boot Block Code Protection:
Data EEPROM Code Protection:
Write Protection Block 0:
Write Protection Block 1:
Write Protection Block 2:
Write Protection Block 3:
Write Protection Block 4:
Write Protection Block 5:
Boot Block Write Protection:
CP2 = ON Enabled
CP2 = OFF Disabled
CP3 = ON Enabled
CP3 = OFF Disabled
CP4 = ON Enabled
CP4 = OFF Disabled
CP5 = ON Enabled
CP5 = OFF Disabled
CPB = ON Enabled
CPB = OFF Disabled
CPD = ON Enabled
CPD = OFF Disabled
WRT0 = ON Enabled
WRT0 = OFF Disabled
WRT1 = ON Enabled
WRT1 = OFF Disabled
WRT2 = ON Enabled
WRT2 = OFF Disabled
WRT3 = ON Enabled
WRT3 = OFF Disabled
WRT4 = ON Enabled
WRT4 = OFF Disabled
WRT5 = ON Enabled
WRT5 = OFF Disabled
WRTB = ON Enabled
WRTB = OFF Disabled
MPLAB® C18 C Compiler User’s Guide Addendum
DS51518A-page 244 2004 Microchip Technology Inc.
Configuration Register Write Protection:
Data EEPROM Write Protection:
Table Read Protection Block 0:
Table Read Protection Block 1:
Table Read Protection Block 2:
Table Read Protection Block 3:
Table Read Protection Block 4:
Table Read Protection Block 5:
Boot Block Table Read Protection:
WRTC = ON Enabled
WRTC = OFF Disabled
WRTD = ON Enabled
WRTD = OFF Disabled
EBTR0 = ON Enabled
EBTR0 = OFF Disabled
EBTR1 = ON Enabled
EBTR1 = OFF Disabled
EBTR2 = ON Enabled
EBTR2 = OFF Disabled
EBTR3 = ON Enabled
EBTR3 = OFF Disabled
EBTR4 = ON Enabled
EBTR4 = OFF Disabled
EBTR5 = ON Enabled
EBTR5 = OFF Disabled
EBTRB = ON Enabled
EBTRB = OFF Disabled
Configuration Settings
2004 Microchip Technology Inc. DS51518A-page 245
PIC18F8680
Oscillator Selection bits:
Osc. Switch Enable:
Power Up Timer:
Brown Out Reset:
Brown Out Voltage:
Watchdog Timer:
OSC = LP LP
OSC = XT XT
OSC = HS HS
OSC = RC RC with OSC2 as divide by 4
clock out
OSC = EC EC with OSC2 as divide by 4
clock out
OSC = ECIO EC with OSC2 as RA6
OSC = HSPLL HS with HW enabled 4xPLL
OSC = RCIO RC with OSC2 as RA6
OSC = ECIOPLL EC with OSC2 as RA6 and HW
enabled 4xPLL
OSC = ECIOSWPLL EC with OSC2 as RA6 and SW
enabled 4xPLL
OSC = HSSWPLL HS with SW enabled 4xPLL
OSCS = ON Enabled
OSCS = OFF Disabled
PWRT = ON Enabled
PWRT = OFF Disabled
BOR = OFF Disabled
BOR = ON Enabled
BORV = 45 4.5V
BORV = 42 4.2V
BORV = 27 2.7V
BORV = 20 2.0V
WDT = OFF HW Disabled - SW Controlled
WDT = ON HW Enabled - SW Disabled
MPLAB® C18 C Compiler User’s Guide Addendum
DS51518A-page 246 2004 Microchip Technology Inc.
Watchdog Postscaler:
Processor Mode Selection:
External Bus Data Wait:
MCLR Enable:
CCP2 Mux bit:
Stack Overflow Reset:
Low Voltage ICSP:
Background Debugger Enable:
WDTPS = 1 1:1
WDTPS = 2 1:2
WDTPS = 4 1:4
WDTPS = 8 1:8
WDTPS = 16 1:16
WDTPS = 32 1:32
WDTPS = 64 1:64
WDTPS = 128 1:128
WDTPS = 256 1:256
WDTPS = 512 1:512
WDTPS = 1024 1:1024
WDTPS = 2048 1:2048
WDTPS = 4096 1:4096
WDTPS = 8192 1:8192
WDTPS = 16384 1:16384
WDTPS = 32768 1:32768
MODE = EM Extended Microcontroller Mode
MODE = MPB Microprocessor with Boot Block
Mode
MODE = MP Microprocessor Mode
MODE = MC Microcontroller Mode
WAIT = ON Enabled
WAIT = OFF Disabled
MCLRE = OFF Disabled
MCLRE = ON Enabled
CCP2MX = OFF CCP2 input/output is multi-
plexed with RE7
CCP2MX = ON CCP2 input/output is multi-
plexed with RC1
STVR = OFF Disabled
STVR = ON Enabled
LVP = OFF Disabled
LVP = ON Enabled
DEBUG = ON Enabled
DEBUG = OFF Disabled
Configuration Settings
2004 Microchip Technology Inc. DS51518A-page 247
Code Protection Block 0:
Code Protection Block 1:
Code Protection Block 2:
Code Protection Block 3:
Boot Block Code Protection:
Data EEPROM Code Protection:
Write Protection Block 0:
Write Protection Block 1:
Write Protection Block 2:
Write Protection Block 3:
Boot Block Write Protection:
Configuration Register Write Protection:
Data EEPROM Write Protection:
CP0 = ON Enabled
CP0 = OFF Disabled
CP1 = ON Enabled
CP1 = OFF Disabled
CP2 = ON Enabled
CP2 = OFF Disabled
CP3 = ON Enabled
CP3 = OFF Disabled
CPB = ON Enabled
CPB = OFF Disabled
CPD = ON Enabled
CPD = OFF Disabled
WRT0 = ON Enabled
WRT0 = OFF Disabled
WRT1 = ON Enabled
WRT1 = OFF Disabled
WRT2 = ON Enabled
WRT2 = OFF Disabled
WRT3 = ON Enabled
WRT3 = OFF Disabled
WRTB = ON Enabled
WRTB = OFF Disabled
WRTC = ON Enabled
WRTC = OFF Disabled
WRTD = ON Enabled
WRTD = OFF Disabled
MPLAB® C18 C Compiler User’s Guide Addendum
DS51518A-page 248 2004 Microchip Technology Inc.
Table Read Protection Block 0:
Table Read Protection Block 1:
Table Read Protection Block 2:
Table Read Protection Block 3:
Boot Block Table Read Protection:
PIC18F86J10
Background Debugger Enable:
Extended Instruction Set Enable:
Stack Overflow Reset:
Low Voltage ICSP:
Watchdog Timer:
Configuration Word Signature:
Code Protection:
EBTR0 = ON Enabled
EBTR0 = OFF Disabled
EBTR1 = ON Enabled
EBTR1 = OFF Disabled
EBTR2 = ON Enabled
EBTR2 = OFF Disabled
EBTR3 = ON Enabled
EBTR3 = OFF Disabled
EBTRB = ON Enabled
EBTRB = OFF Disabled
DEBUG = ON Enabled
DEBUG = OFF Disabled
XINST = OFF Disabled
XINST = ON Enabled
STVR = OFF Disabled
STVR = ON Enabled
LVP = OFF Disabled
LVP = ON Enabled
WDT = OFF Disabled
WDT = ON Enabled
SIGN = CLR Clear
SIGN = SET Set
CP0 = ON Enabled
CP0 = OFF Disabled
Configuration Settings
2004 Microchip Technology Inc. DS51518A-page 249
Fail Safe Clock Monitor:
Internal/External Switch Over:
Oscillator Selection bits:
Watchdog Postscaler:
External Bus Data Wait:
Data Bus Width Select:
Processor Mode Selection:
FCMEM = OFF Disabled
FCMEM = ON Enabled
IESO = OFF Disabled
IESO = ON Enabled
FOSC = HS HS oscillator
FOSC = HSPLL HS oscillator, Software Con-
trolled PLL
FOSC = EC External Clock
FOSC = ECPLL External Clock, Software Con-
trolled PLL
WDTPS = 1 1:1
WDTPS = 2 1:2
WDTPS = 4 1:4
WDTPS = 8 1:8
WDTPS = 16 1:16
WDTPS = 32 1:32
WDTPS = 64 1:64
WDTPS = 128 1:128
WDTPS = 256 1:256
WDTPS = 512 1:512
WDTPS = 1024 1:1024
WDTPS = 2048 1:2048
WDTPS = 4096 1:4096
WDTPS = 8192 1:8192
WDTPS = 16384 1:16384
WDTPS = 32768 1:32768
WAIT = ON Enabled
WAIT = OFF Disabled
BW = 8 8-bit external bus
BW = 16 16-bit external bus
MODE = MM Microcontroller Mode - External
bus disabled
MODE = XM12 Extended Microcontroller Mode -
12-bit address mode
MODE = XM16 Extended Microcontroller Mode -
16-bit address mode
MODE = XM20 Extended Microcontroller Mode -
20-bit address mode
MPLAB® C18 C Compiler User’s Guide Addendum
DS51518A-page 250 2004 Microchip Technology Inc.
External Address Bus Shift Enable:
ECCP Mux:
CCP2 Mux:
PIC18F86J15
Background Debugger Enable:
Extended Instruction Set Enable:
Stack Overflow Reset:
Low Voltage ICSP:
Watchdog Timer:
Configuration Word Signature:
Code Protection:
Fail Safe Clock Monitor:
Internal/External Switch Over:
EASHIFT = OFF External bus reflects PC value
EASHIFT = ON External bus starts at 000000h
ECCPMUX = OFF Disabled
ECCPMUX = ON Enabled
CCP2MUX = OFF Disabled
CCP2MUX = ON Enabled
DEBUG = ON Enabled
DEBUG = OFF Disabled
XINST = OFF Disabled
XINST = ON Enabled
STVR = OFF Disabled
STVR = ON Enabled
LVP = OFF Disabled
LVP = ON Enabled
WDT = OFF Disabled
WDT = ON Enabled
SIGN = CLR Clear
SIGN = SET Set
CP0 = ON Enabled
CP0 = OFF Disabled
FCMEM = OFF Disabled
FCMEM = ON Enabled
IESO = OFF Disabled
IESO = ON Enabled
Configuration Settings
2004 Microchip Technology Inc. DS51518A-page 251
Oscillator Selection bits:
Watchdog Postscaler:
External Bus Data Wait:
Data Bus Width Select:
Processor Mode Selection:
External Address Bus Shift Enable:
ECCP Mux:
FOSC = HS HS oscillator
FOSC = HSPLL HS oscillator, Software Con-
trolled PLL
FOSC = EC External Clock
FOSC = ECPLL External Clock, Software Con-
trolled PLL
WDTPS = 1 1:1
WDTPS = 2 1:2
WDTPS = 4 1:4
WDTPS = 8 1:8
WDTPS = 16 1:16
WDTPS = 32 1:32
WDTPS = 64 1:64
WDTPS = 128 1:128
WDTPS = 256 1:256
WDTPS = 512 1:512
WDTPS = 1024 1:1024
WDTPS = 2048 1:2048
WDTPS = 4096 1:4096
WDTPS = 8192 1:8192
WDTPS = 16384 1:16384
WDTPS = 32768 1:32768
WAIT = ON Enabled
WAIT = OFF Disabled
BW = 8 8-bit external bus
BW = 16 16-bit external bus
MODE = MM Microcontroller Mode - External
bus disabled
MODE = XM12 Extended Microcontroller Mode -
12-bit address mode
MODE = XM16 Extended Microcontroller Mode -
16-bit address mode
MODE = XM20 Extended Microcontroller Mode -
20-bit address mode
EASHIFT = OFF External bus reflects PC value
EASHIFT = ON External bus starts at 000000h
ECCPMUX = OFF Disabled
ECCPMUX = ON Enabled
MPLAB® C18 C Compiler User’s Guide Addendum
DS51518A-page 252 2004 Microchip Technology Inc.
CCP2 Mux:
PIC18F8720
Oscillator Selection:
Osc. Switch Enable:
Power Up Timer:
Brown Out Reset:
Brown Out Voltage:
Watchdog Timer:
Watchdog Postscaler:
CCP2MUX = OFF Disabled
CCP2MUX = ON Enabled
OSC = LP LP
OSC = XT XT
OSC = HS HS
OSC = RC RC
OSC = EC EC-OSC2 as Clock Out
OSC = ECIO EC-OSC2 as RA6
OSC = HSPLL HS-PLL Enabled
OSC = RCIO RC-OSC2 as RA6
OSCS = ON Enabled
OSCS = OFF Disabled
PWRT = ON Enabled
PWRT = OFF Disabled
BOR = OFF Disabled
BOR = ON Enabled
BORV = 45 4.5V
BORV = 42 4.2V
BORV = 27 2.7V
BORV = 25 2.5V
WDT = OFF Disabled
WDT = ON Enabled
WDTPS = 1 1:1
WDTPS = 2 1:2
WDTPS = 4 1:4
WDTPS = 8 1:8
WDTPS = 16 1:16
WDTPS = 32 1:32
WDTPS = 64 1:64
WDTPS = 128 1:128
Configuration Settings
2004 Microchip Technology Inc. DS51518A-page 253
Processor Mode Selection:
External Bus Data Wait:
CCP2 Mux:
Stack Overflow Reset:
Low Voltage ICSP:
Background Debugger Enable:
Code Protection Block 0:
Code Protection Block 1:
Code Protection Block 2:
Code Protection Block 3:
Code Protection Block 4:
Code Protection Block 5:
MODE = EM Extended Microcontroller Mode
MODE = MPB Microprocessor with Boot Block
Mode
MODE = MP Microprocessor Mode
MODE = MC Microcontroller Mode
WAIT = ON Enabled
WAIT = OFF Disabled
CCP2MUX = OFF Disabled
CCP2MUX = ON Enabled
STVR = OFF Disabled
STVR = ON Enabled
LVP = OFF Disabled
LVP = ON Enabled
DEBUG = ON Enabled
DEBUG = OFF Disabled
CP0 = ON Enabled
CP0 = OFF Disabled
CP1 = ON Enabled
CP1 = OFF Disabled
CP2 = ON Enabled
CP2 = OFF Disabled
CP3 = ON Enabled
CP3 = OFF Disabled
CP4 = ON Enabled
CP4 = OFF Disabled
CP5 = ON Enabled
CP5 = OFF Disabled
MPLAB® C18 C Compiler User’s Guide Addendum
DS51518A-page 254 2004 Microchip Technology Inc.
Code Protection Block 6:
Code Protection Block 7:
Boot Block Code Protection:
Data EEPROM Code Protection:
Write Protection Block 0:
Write Protection Block 1:
Write Protection Block 2:
Write Protection Block 3:
Write Protection Block 4:
Write Protection Block 5:
Write Protection Block 6:
Write Protection Block 7:
Boot Block Write Protection:
CP6 = ON Enabled
CP6 = OFF Disabled
CP7 = ON Enabled
CP7 = OFF Disabled
CPB = ON Enabled
CPB = OFF Disabled
CPD = ON Enabled
CPD = OFF Disabled
WRT0 = ON Enabled
WRT0 = OFF Disabled
WRT1 = ON Enabled
WRT1 = OFF Disabled
WRT2 = ON Enabled
WRT2 = OFF Disabled
WRT3 = ON Enabled
WRT3 = OFF Disabled
WRT4 = ON Enabled
WRT4 = OFF Disabled
WRT5 = ON Enabled
WRT5 = OFF Disabled
WRT6 = ON Enabled
WRT6 = OFF Disabled
WRT7 = ON Enabled
WRT7 = OFF Disabled
WRTB = ON Enabled
WRTB = OFF Disabled
Configuration Settings
2004 Microchip Technology Inc. DS51518A-page 255
Configuration Register Write Protection:
Data EEPROM Write Protection:
Table Read Protection Block 0:
Table Read Protection Block 1:
Table Read Protection Block 2:
Table Read Protection Block 3:
Table Read Protection Block 4:
Table Read Protection Block 5:
Table Read Protection Block 6:
Table Read Protection Block 7:
Boot Block Table Read Protection:
WRTC = ON Enabled
WRTC = OFF Disabled
WRTD = ON Enabled
WRTD = OFF Disabled
EBTR0 = ON Enabled
EBTR0 = OFF Disabled
EBTR1 = ON Enabled
EBTR1 = OFF Disabled
EBTR2 = ON Enabled
EBTR2 = OFF Disabled
EBTR3 = ON Enabled
EBTR3 = OFF Disabled
EBTR4 = ON Enabled
EBTR4 = OFF Disabled
EBTR5 = ON Enabled
EBTR5 = OFF Disabled
EBTR6 = ON Enabled
EBTR6 = OFF Disabled
EBTR7 = ON Enabled
EBTR7 = OFF Disabled
EBTRB = ON Enabled
EBTRB = OFF Disabled
MPLAB® C18 C Compiler User’s Guide Addendum
DS51518A-page 256 2004 Microchip Technology Inc.
PIC18F8722
Oscillator Selection:
Fail Safe Clock Monitor:
Internal External Osc. Switch Over:
Power Up Timer:
Brown Out Reset:
Brown Out Voltage:
Watchdog Timer:
OSC = LP LP
OSC = XT XT
OSC = HS HS
OSC = RC RC
OSC = EC EC-OSC2 as Clock Out
OSC = ECIO6 EC-OSC2 as RA6
OSC = HSPLL HS-PLL Enabled
OSC = RCIO6 RC-OSC2 as RA6
OSC = INTIO67 INTRC-OSC2 as RA6, OSC1 as
RA7
OSC = INTIO7 INTRC-OSC2 as Clock Out,
OSC1 as RA7
FCMEN = OFF Disabled
FCMEN = ON Enabled
IESO = OFF Disabled
IESO = ON Enabled
PWRT = ON Enabled
PWRT = OFF Disabled
BOREN = OFF Disabled
BOREN = ON SBOREN Enabled
BOREN = NOSLP Enabled except SLEEP,
SBOREN Disabled
BOREN = SBORDIS Enabled, SBOREN Disabled
BORV = 46 4.5V
BORV = 43 4.2V
BORV = 28 2.7V
BORV = 21 2.0V
WDT = OFF Disabled
WDT = ON Enabled
Configuration Settings
2004 Microchip Technology Inc. DS51518A-page 257
Watchdog Postscaler:
Processor Mode Selection:
External Bus Address Width:
External Bus Data Width:
External Bus Data Wait:
MCLR Enable:
T1 Oscillator Enable:
ECCP Mux:
WDTPS = 1 1:1
WDTPS = 2 1:2
WDTPS = 4 1:4
WDTPS = 8 1:8
WDTPS = 16 1:16
WDTPS = 32 1:32
WDTPS = 64 1:64
WDTPS = 128 1:128
WDTPS = 256 1:256
WDTPS = 512 1:512
WDTPS = 1024 1:1024
WDTPS = 2048 1:2048
WDTPS = 4096 1:4096
WDTPS = 8192 1:8192
WDTPS = 16384 1:16384
WDTPS = 32768 1:32768
MODE = EM Extended Microcontroller Mode
MODE = MPB Microprocessor with Boot Block
Mode
MODE = MP Microprocessor Mode
MODE = MC Microcontroller Mode
ADDRBW = ADDR8BIT 8 Bit Address Bus
ADDRBW = ADDR12BIT 12 Bit Address Bus
ADDRBW = ADDR16BIT 16 Bit Address Bus
ADDRBW = ADDR20BIT 20 Bit Address Bus
DATABW = DATA8BIT 8 Bit Data Bus
DATABW = DATA16BIT 16 Bit Data Bus
WAIT = ON Enabled
WAIT = OFF Disabled
MCLRE = OFF Disabled
MCLRE = ON Enabled
LPT1OSC = OFF Disabled
LPT1OSC = ON Enabled
ECCPMX = PORTH Muxed with RH7:4
ECCPMX = PORTE Muxed with RE6:3
MPLAB® C18 C Compiler User’s Guide Addendum
DS51518A-page 258 2004 Microchip Technology Inc.
ECCP2 Mux:
Stack Overflow Reset:
Low Voltage ICSP:
Boot Block Size:
XINST Enable:
Background Debugger Enable:
Code Protection Block 0:
Code Protection Block 1:
Code Protection Block 2:
Code Protection Block 3:
Code Protection Block 4:
Code Protection Block 5:
Code Protection Block 6:
ECCP2MX = PORTBE Muxed with RB3
ECCP2MX = PORTC Muxed with RC1
STVREN = OFF Disabled
STVREN = ON Enabled
LVP = OFF Disabled
LVP = ON Enabled
BBSIZ = BB2K 2Kb Boot Block
BBSIZ = BB4K 4Kb Boot Block
BBSIZ = BB8K 8Kb Boot Block
XINST = OFF Disabled
XINST = ON Enabled
DEBUG = ON Enabled
DEBUG = OFF Disabled
CP0 = ON Enabled
CP0 = OFF Disabled
CP1 = ON Enabled
CP1 = OFF Disabled
CP2 = ON Enabled
CP2 = OFF Disabled
CP3 = ON Enabled
CP3 = OFF Disabled
CP4 = ON Enabled
CP4 = OFF Disabled
CP5 = ON Enabled
CP5 = OFF Disabled
CP6 = ON Enabled
CP6 = OFF Disabled
Configuration Settings
2004 Microchip Technology Inc. DS51518A-page 259
Code Protection Block 7:
Boot Block Code Protection:
Data EEPROM Code Protection:
Write Protection Block 0:
Write Protection Block 1:
Write Protection Block 2:
Write Protection Block 3:
Write Protection Block 4:
Write Protection Block 5:
Write Protection Block 6:
Write Protection Block 7:
Boot Block Write Protection:
Configuration Register Write Protection:
CP7 = ON Enabled
CP7 = OFF Disabled
CPB = ON Enabled
CPB = OFF Disabled
CPD = ON Enabled
CPD = OFF Disabled
WRT0 = ON Enabled
WRT0 = OFF Disabled
WRT1 = ON Enabled
WRT1 = OFF Disabled
WRT2 = ON Enabled
WRT2 = OFF Disabled
WRT3 = ON Enabled
WRT3 = OFF Disabled
WRT4 = ON Enabled
WRT4 = OFF Disabled
WRT5 = ON Enabled
WRT5 = OFF Disabled
WRT6 = ON Enabled
WRT6 = OFF Disabled
WRT7 = ON Enabled
WRT7 = OFF Disabled
WRTB = ON Enabled
WRTB = OFF Disabled
WRTC = ON Enabled
WRTC = OFF Disabled
MPLAB® C18 C Compiler User’s Guide Addendum
DS51518A-page 260 2004 Microchip Technology Inc.
Data EEPROM Write Protection:
Table Read Protection Block 0:
Table Read Protection Block 1:
Table Read Protection Block 2:
Table Read Protection Block 3:
Table Read Protection Block 4:
Table Read Protection Block 5:
Table Read Protection Block 6:
Table Read Protection Block 7:
Boot Block Table Read Protection:
WRTD = ON Enabled
WRTD = OFF Disabled
EBTR0 = ON Enabled
EBTR0 = OFF Disabled
EBTR1 = ON Enabled
EBTR1 = OFF Disabled
EBTR2 = ON Enabled
EBTR2 = OFF Disabled
EBTR3 = ON Enabled
EBTR3 = OFF Disabled
EBTR4 = ON Enabled
EBTR4 = OFF Disabled
EBTR5 = ON Enabled
EBTR5 = OFF Disabled
EBTR6 = ON Enabled
EBTR6 = OFF Disabled
EBTR7 = ON Enabled
EBTR7 = OFF Disabled
EBTRB = ON Enabled
EBTRB = OFF Disabled
Configuration Settings
2004 Microchip Technology Inc. DS51518A-page 261
PIC18F87J10
Background Debugger Enable:
Extended Instruction Set Enable:
Stack Overflow Reset:
Low Voltage ICSP:
Watchdog Timer:
Configuration Word Signature:
Code Protection:
Fail Safe Clock Monitor:
Internal/External Switch Over:
Oscillator Selection bits:
DEBUG = ON Enabled
DEBUG = OFF Disabled
XINST = OFF Disabled
XINST = ON Enabled
STVR = OFF Disabled
STVR = ON Enabled
LVP = OFF Disabled
LVP = ON Enabled
WDT = OFF Disabled
WDT = ON Enabled
SIGN = CLR Clear
SIGN = SET Set
CP0 = ON Enabled
CP0 = OFF Disabled
FCMEM = OFF Disabled
FCMEM = ON Enabled
IESO = OFF Disabled
IESO = ON Enabled
FOSC = HS HS oscillator
FOSC = HSPLL HS oscillator, Software Con-
trolled PLL
FOSC = EC External Clock
FOSC = ECPLL External Clock, Software Con-
trolled PLL
MPLAB® C18 C Compiler User’s Guide Addendum
DS51518A-page 262 2004 Microchip Technology Inc.
Watchdog Postscaler:
External Bus Data Wait:
Data Bus Width Select:
Processor Mode Selection:
External Address Bus Shift Enable:
ECCP Mux:
CCP2 Mux:
WDTPS = 1 1:1
WDTPS = 2 1:2
WDTPS = 4 1:4
WDTPS = 8 1:8
WDTPS = 16 1:16
WDTPS = 32 1:32
WDTPS = 64 1:64
WDTPS = 128 1:128
WDTPS = 256 1:256
WDTPS = 512 1:512
WDTPS = 1024 1:1024
WDTPS = 2048 1:2048
WDTPS = 4096 1:4096
WDTPS = 8192 1:8192
WDTPS = 16384 1:16384
WDTPS = 32768 1:32768
WAIT = ON Enabled
WAIT = OFF Disabled
BW = 8 8-bit external bus
BW = 16 16-bit external bus
MODE = MM Microcontroller Mode - External
bus disabled
MODE = XM12 Extended Microcontroller Mode -
12-bit address mode
MODE = XM16 Extended Microcontroller Mode -
16-bit address mode
MODE = XM20 Extended Microcontroller Mode -
20-bit address mode
EASHIFT = OFF External bus reflects PC value
EASHIFT = ON External bus starts at 000000h
ECCPMUX = OFF Disabled
ECCPMUX = ON Enabled
CCP2MUX = OFF Disabled
CCP2MUX = ON Enabled
Configuration Settings
2004 Microchip Technology Inc. DS51518A-page 263
NOTES:
DS51518A-page 264 2004 Microchip Technology Inc.
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Denmark - BallerupTel: 45-4420-9895
Fax: 45-4420-9910
France - MassyTel: 33-1-69-53-63-20
Fax: 33-1-69-30-90-79
Germany - IsmaningTel: 49-89-627-144-0
Fax: 49-89-627-144-44
Italy - Milan Tel: 39-0331-742611
Fax: 39-0331-466781
Netherlands - Drunen
Tel: 31-416-690399
Fax: 31-416-690340
England - BerkshireTel: 44-118-921-5869
Fax: 44-118-921-5820
WORLDWIDE SALES AND SERVICE
09/27/04
