More on Microcodewilliams.comp.ncat.edu/COMP375/Microcode2.pdf · Follow the Fetch/Execute Cycle...
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More on Microcode COMP375 Computer Architecture and Organization
Transcript of More on Microcodewilliams.comp.ncat.edu/COMP375/Microcode2.pdf · Follow the Fetch/Execute Cycle...
More onMicrocode
COMP375 Computer Architecture and Organization
“A well installed microcode bug will be
almost impossible to detect.”
Ken Thompson
Microcode Assignment
• Microcode homework is due by 1:00pm (start of class) on Wednesday, October 2, 2019
Implementing Machine Language
• Each machine language instruction is implemented by a series of microcode steps
• Each instruction uses common microcode steps to fetch the instruction and increment the program counter
• The microcode directs simple hardware
Table and Switches
bus
IR
IR
adr
bus
resu
lt
bus
bus
AL
U
bus
opr
nd
bus
PC
PC
bus
bus
R1
R1
bus
bus
R2
R2
bus
bus
MA
R
bus
M
B
R
M
B
R
bus
ALU
func
Mem
func
X X
Memory Read
• Copy the address to read into the Memory Address Register
• Tell the memory system to “READ”. This only starts the read which will take several cycles
• A following microcode instruction must “WAIT” until the read is complete
• Copy the data from the Memory Buffer Register to the desired register or ALU
Memory Read
0 47
1 12354
2 18
3 72
4 12214
…
FFFFFFFF 14
MAR 3 ? MBR
memory
Memory Read
0 47
1 12354
2 18
3 72
4 12214
…
FFFFFFFF 14
MAR 3 ? MBR
memory
Memory Read
0 47
1 12354
2 18
3 72
4 12214
…
FFFFFFFF 14
MAR 3 72 MBR
memory
Memory Write
• Copy the address to be written into the Memory Address Register
• Copy the data into the Memory Buffer Register
• Tell the memory system to “WRITE”. This only starts the write which will take several cycles
• A future microcode instruction must “WAIT” before doing another memory function
Memory Write
0 47
1 12354
2 18
3 72
4 12214
…
FFFFFFFF 14
MAR 4 91 MBR
memory
Memory Write
0 47
1 12354
2 18
3 72
4 91
…
FFFFFFFF 14
MAR 4 91 MBR
memory
Metric System
Peta 1015 250
Tera 1012 240
Giga 109 230
Mega 106 220
Kilo 103 210
milli 10-3
micro 10-6 μnano 10-9
pico 10-12
femto 10-15
• It is very useful to know the metric
prefixes
Calculating the Length of a Cycle
• Consider a machine with a 2.0 GHz clock
– 2.0 Giga cycles / second
– 2.0 x 109 cycles / second
• To calculate the length of a cycle (seconds / cycle):
• 𝑠𝑒𝑐/𝑐𝑦𝑐𝑙𝑒 =1
𝑐𝑦𝑐𝑙𝑒𝑠/𝑠𝑒𝑐=
1
2.0×109= 5.0 x 10-10 = 0.5 nsec
Optimizing Microcode
• In general, each microcode step takes one cycle
• The more microcode steps required, the longer an instruction will take to execute
• The value on the bus can be copied into multiple registers
• Instead of copying A to B then B to C, the value in A can be copied to both B and C
• Unrelated microcode steps can be executed before waiting for a memory access to complete
Instruction Fetch &Program Counter Increment
bus
IR
IR
adr
bus
res
ult
bus
bus
A
L
U
bus
opr
nd
bus
PC
PC
bus
bus
R1
R1
bus
bus
R2
R2
bus
bus
MA
R
bus
M
B
R
M
B
R
bus
A
L
U
fun
Mem
func
X X read
wait
X X
X X inc
X X
Instruction Fetch &Program Counter Increment
bus
IR
IR
adr
bus
res
ult
bus
bus
A
L
U
bus
opr
nd
bus
PC
PC
bus
bus
R1
R1
bus
bus
R2
R2
bus
bus
MA
R
bus
M
B
R
M
B
R
bus
A
L
U
fun
Mem
func
X X X inc read
X X wait
X X
Combining steps to reduce total time
Remember!
• The three lines of microcode required to fetch an instruction and increment the program counter are common to all instructions
• These three lines will appear on the next exam and maybe even the final exam
In one microcode step
A. Multiple registers can put their value on the bus
B. The value on the bus can be copied to multiple registers
C. All of the above
D. None of the above
Follow the Fetch/Execute Cycle
• The steps of the fetch/execute cycle are reflected in the microcode
1. Read the instruction from memory
2. Increment the program counter
3. Get the operands
4. Execute the instruction
5. Save the results
Add Immediateadd R1, number
Immediate Addressing
bus
IR
IR
adr
bus
res
ult
bus
bus
A
L
U
bus
opr
nd
bus
PC
PC
bus
bus
R1
R1
bus
bus
R2
R2
bus
bus
MA
R
bus
M
B
R
M
B
R
bus
A
L
U
fun
Mem
func
X X
X X add
X X
The instruction fetch and program counter increment are not shown.
number in address field
Unconditional Jump Instruction
bu
s
IR
IR
adr
bus
res
ult
bus
bus
A
L
U
bus
opr
nd
bus
PC
PC
bus
bus
R1
R1
bus
bus
R2
R2
bus
bus
M
A
R
bus
M
B
R
M
B
R
bus
ALU
func
Mem
func
X X
• A jump instruction rarely accesses memory
The instruction fetch and program counter increment are not shown.
jmp rabbit
Try It
Subtract R1, cow
• Subtract the value in the memory location cow from the value in R1 and save the result in R1
Simple CPU
Subtract R1, cow
Instruction fetch not shown
bu
s
IR
IR
adr
bus
res
ult
bus
bus
A
L
U
bus
opr
nd
bus
PC
PC
bus
bus
R1
R1
bus
bus
R2
R2
bus
bus
M
A
R
bus
M
B
R
M
B
R
bus
ALU
func
Mem
func
X X read
X X wait
X X sub
X X
Microcode Steps
• A microcode step is executed each clock cycle
• For each microcode step, the next line of the microcode store is read
• The microcode data determines the state of the switches connecting registers to the bus
Opcode Determines Microcode Steps
• After the microcode steps to fetch the instruction and increment the program counter, the next microcode step executed depends on the opcode of the instruction
• Most of our microcode will ignore the opcode and just concentrate on one instruction at a time
Where is the Microcode kept?
A. RAM
B. Cache
C. ROM in CPU
D. Registers
Try It
add R1, [R2]
Add to R1 the value in memorywhose address is in R2
add R1, [R2]
Instruction fetch not shown
bus
IR
IR
adr
bus
resu
lt
bus
bus
A
L
U
bus
opr
nd
bus
PC
PC
bus
bus
R1
R1
bus
bus
R2
R2
bus
bus
MA
R
bus
M
B
R
M
B
R
bus
A
L
U
fun
Mem
func
X X read
X X wait
X X add
X X
Internal CPU Bus
• Only one register can put its value on the bus at a time
• The value on the bus can be copied into many registers at the same time
Computing Addresses
• Some addressing modes require the CPU to add values to get the memory address
• The data’s memory address with register indirect with offset addressing is the sum of the instruction address field and a register
• Addition is done in the ALU
• The components of the address need to be moved to the ALU for addition before being moved to the Memory Address Register
Addressing and Microcode
• The addressing mode of an instruction has a significant impact on the microcode
• The microcode for all two operand arithmetic instructions is the same. The instruction opcode determines what arithmetic function is performed
• Our simple class microcode specifies the arithmetic function
Addressing modes
• immediate
• register
• memory direct
• register indirect
• register indirect with offset
• displacement
Immediate
• The data is part of the instruction
• Immediate data items are read-only
• There is usually a size limit
Instruction
data register
address
data
memory
Immediate AddressingThe data is in the address field of the instruction
bus
IR
IR
adr
bus
resu
lt
bus
bus
A
L
U
bus
opr
nd
bus
PC
PC
bus
bus
R1
R1
bus
bus
R2
R2
bus
bus
MA
R
bus
M
B
R
M
B
R
bus
ALU
func
Mem
func
X X
Register
• The data is in a CPU register
• The instruction might indicate which register
Instruction
data register
address
data
memory
Register AddressingThe data is in a CPU register.
bus
IR
IR
adr
bus
resu
lt
bus
bus
A
L
U
bus
opr
nd
bus
PC
PC
bus
bus
R1
R1
bus
bus
R2
R2
bus
bus
MA
R
bus
M
B
R
M
B
R
bus
ALU
func
Mem
func
X X
Try It
• On the worksheet,
add R1, R2
• Add R1 and R2 and put the result back in R1
• Show the instruction fetch and PC increment
Talk to the students next to you for assistance
add R1, R2
Instruction fetch not shown
bus
IR
IR
adr
bus
resu
lt
bus
bus
A
L
U
bus
opr
nd
bus
PC
PC
bus
bus
R1
R1
bus
bus
R2
R2
bus
bus
MA
R
bus
M
B
R
M
B
R
bus
A
L
U
fun
Mem
func
X X
X X add
X X
Memory Direct
• The data is in memory
• The instruction contains the address of the memory location
Instruction
data register
address
data
memory
Memory Direct AddressingThe data is in memory
bus
IR
IR
adr
bus
resu
lt
bus
bus
A
L
U
bus
opr
nd
bus
PC
PC
bus
bus
R1
R1
bus
bus
R2
R2
bus
bus
MA
R
bus
M
B
R
M
B
R
bus
ALU
func
Mem
func
X X read
wait
X X
Register Indirect
• The address of the data is in a CPU register
• Useful if the address is calculated
Instruction
data register
address
data
memory
Register Indirect AddressingThe memory address comes from a register (assume R2)
bus
IR
IR
adr
bus
resu
lt
bus
bus
A
L
U
bus
opr
nd
bus
PC
PC
bus
bus
R1
R1
bus
bus
R2
R2
bus
bus
MA
R
bus
M
B
R
M
B
R
bus
ALU
func
Mem
func
X X read
wait
X X
Register Indirect with Offset
• The address of the data is the sum of the instruction offset field and a register value
• Useful when addressing an array
Instruction
data register
address
data
memory
Register Indirect with OffsetThe data is in memory.
You have to add the value in a register to the address field
bus
IR
IR
adr
bus
resu
lt
bus
bus
A
L
U
bus
opr
nd
bus
PC
PC
bus
bus
R1
R1
bus
bus
R2
R2
bus
bus
MA
R
bus
M
B
R
M
B
R
bus
ALU
func
Mem
func
X X
X X add
X X read
wait
X X
Jump InstructionJump to the address given in the instruction
Direct Addressing
bus
IR
IR
adr
bus
resu
lt
bus
bus
A
L
U
bus
opr
nd
bus
PC
PC
bus
bus
R1
R1
bus
bus
R2
R2
bus
bus
MA
R
bus
M
B
R
M
B
R
bus
ALU
func
Mem
func
X X
Displacement
• The address is the sum of the instruction address field and the program counter
• Used for short jumps
Instruction
Program Counter
address
instruction
memory
Try It
• On the worksheet, write the microcode to implement a short jump that uses displacement addressing relative to the program counter
jump SHORT 5
Displacement AddressingThe address is the sum of the instruction address field and
the PC
Used for jump instructions. No memory access.
bus
IR
IR
adr
bus
resu
lt
bus
bus
A
L
U
bus
opr
nd
bus
PC
PC
bus
bus
R1
R1
bus
bus
R2
R2
bus
bus
MA
R
bus
M
B
R
M
B
R
bus
ALU
func
Mem
func
X X
X X add
X X
Stack Operations• Push and Pop use the stack
• A stack pointer always contains the address of the top of stack
• Same as register indirect but the stack register is incremented or decremented
Instruction
Stack Register
address
instruction
memory
Stack Addressing
Push R1Assume R2 is the stack pointer
Increment the address in R2 then store R1 at that address
bus
IR
IR
adr
bus
resu
lt
bus
bus
A
L
U
bus
opr
nd
bus
PC
PC
bus
bus
R1
R1
bus
bus
R2
R2
bus
bus
MA
R
bus
M
B
R
M
B
R
bus
ALU
func
Mem
func
X X inc
X X X
X X write
wait
Arithmetic
• Most arithmetic instructions have the steps
– Copy something into the operand reg
– Put a value on the bus and do it
– Copy the result register someplace
• In a more realistic system, the ALU function would be determined by the opcode of the instruction
Microcode Assignment
• Microcode homework is due by 1:00pm (start of class) on Wednesday, October 2, 2019
