Modeling and Robust Control Design for Distributed Maximum ... · Acknowledgements I gratefully...

Modeling and Robust Control Design for DistributedMaximum Power Point Tracking in Photovoltaic Systems

by

Audrey Kertesz

A thesis submitted in conformity with the requirementsfor the degree of Master of Applied Science

Graduate Department of Electrical and Computer EngineeringUniversity of Toronto

Copyright © 2012 by Audrey Kertesz

Abstract

Modeling and Robust Control Design for Distributed Maximum Power Point Tracking

in Photovoltaic Systems

Audrey Kertesz

Master of Applied Science

Graduate Department of Electrical and Computer Engineering

University of Toronto

2012

Photovoltaic installations in urban areas operate under uneven lighting conditions.

For such a system to achieve its peak efficiency, each solar panel is connected in se-

ries through a micro-converter, a dc-dc converter that performs per-panel distributed

maximum power point tracking (DMPPT). The objective of this thesis is to design a

compensator for the DMPPT micro-converter. A novel, systematic approach to plant

modeling is presented for this system, together with a framework for characterizing the

plant’s uncertainty. A robust control design procedure based on linear matrix inequal-

ities is then proposed. In addition to designing for robust performance, this procedure

ensures the stability of the time-varying system. The proposed modeling and control

design methods are demonstrated for an example rooftop photovoltaic installation. The

system and the designed compensator are tested in simulations. Simulation results show

satisfactory performance over a range of operating conditions, and the simulated system

is shown to track the maximum power point of every panel.

ii

Acknowledgements

I gratefully acknowledge my supervisors, Bruce Francis and Olivier Trescases, for

their wisdom, guidance and support over the past two years. I am deeply indebted to

Professor Francis for his immense knowledge and boundless patience, and to Professor

Trescases for sharing his creative ideas and practical expertise. Each offered a unique

perspective on my research, and both have been wonderful mentors to me.

I thank my colleagues in the control and power electronics groups for their cama-

raderie, and for their willingness to be pestered with questions. My particular thanks

go to Shahab, for sharing his technical expertise, and to Karla, for countless fascinating

discussions.

This work would not have been possible without the unconditional support of my

family. I wholeheartedly thank my parents, for their love and understanding, and my

fiancé, for making my life easy when the going was difficult.

Finally, I thank NSERC, OGS, Alberta Education, and the University of Toronto

ECE Department for providing financial support.

iii

Contents

1 Introduction 1

2 Background 5

2.1 Maximum Power Point Tracking . . . . . . . . . . . . . . . . . . . . . . . 5

2.1.1 MPPT algorithms . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

2.1.2 Direct perturb and reference command MPPT . . . . . . . . . . . 8

2.2 Distributed MPPT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

2.2.1 Micro-converters and micro-inverters . . . . . . . . . . . . . . . . 10

2.3 Control Challenge . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

2.3.1 Double loop control structure . . . . . . . . . . . . . . . . . . . . 13

2.4 Statement of Objective . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

2.5 Running Example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

3 System Components 16

3.1 Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

3.2 Power Converter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

3.2.1 Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

3.2.2 Linearization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

3.2.3 Parameter values . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

3.3 Solar Panel . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

3.3.1 Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

iv

3.3.2 Linearization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

3.3.3 Parameter fitting . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

3.4 Inverter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

3.4.1 Principle of operation . . . . . . . . . . . . . . . . . . . . . . . . . 26

3.4.2 Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29

3.4.3 Linearization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32

3.4.4 Parameter values . . . . . . . . . . . . . . . . . . . . . . . . . . . 34

4 Plant Model 35

4.1 SISO System Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36

4.1.1 Plant uncertainty . . . . . . . . . . . . . . . . . . . . . . . . . . 37

4.2 Load Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37

4.2.1 Derivation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38

4.2.2 A module’s output impedance . . . . . . . . . . . . . . . . . . . . 40

4.2.3 Simplifying the series output impedances . . . . . . . . . . . . . . 44

4.2.4 Neglecting the inverter dynamics . . . . . . . . . . . . . . . . . . 46

4.3 Plant Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48

4.3.1 Uncertain parameters . . . . . . . . . . . . . . . . . . . . . . . . . 49

4.3.2 Disturbances . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54

5 Compensator Design 55

5.1 Robust Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56

5.1.1 Theoretical background . . . . . . . . . . . . . . . . . . . . . . . . 57

5.2 Polytopic Covering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62

5.2.1 Covering the module parameter uncertainty set . . . . . . . . . . 63

5.3 Control Synthesis . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65

5.3.1 Controller structure . . . . . . . . . . . . . . . . . . . . . . . . . . 67

5.3.2 Linear matrix inequalities . . . . . . . . . . . . . . . . . . . . . . 69

v

5.4 Practical Design Example . . . . . . . . . . . . . . . . . . . . . . . . . . 71

5.4.1 Direct synthesis . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72

5.4.2 Single plant synthesis . . . . . . . . . . . . . . . . . . . . . . . . . 72

5.4.3 Analysis of the obtained controller . . . . . . . . . . . . . . . . . 73

5.5 Discussion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78

6 Simulations 80

6.1 Tracking and disturbance rejection . . . . . . . . . . . . . . . . . . . . . 80

6.2 Simulation of DMPPT system operation . . . . . . . . . . . . . . . . . . 85

7 Conclusions and Future Work 88

7.1 Limitations and Future Work . . . . . . . . . . . . . . . . . . . . . . . . 89

Bibliography 91

A Supplementary proofs 99

A.1 Local power optimization is equivalent to global power optimization . . . 99

A.2 Error bound of averaged PWM . . . . . . . . . . . . . . . . . . . . . . . 104

A.3 Unimodal characteristic of solar arrays . . . . . . . . . . . . . . . . . . . 105

A.4 Controllability of the augmented system . . . . . . . . . . . . . . . . . . 106

B Converter design 109

B.1 DMPPT module boost converter . . . . . . . . . . . . . . . . . . . . . . 109

B.2 Inverter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 112

C Algorithms 116

C.1 Photovoltaic parameter fitting . . . . . . . . . . . . . . . . . . . . . . . . 116

C.2 Polytopic covering in 2D . . . . . . . . . . . . . . . . . . . . . . . . . . . 118

vi

List of Tables

3.1 Converter parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

3.2 Fitted panel parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

3.3 Inverter parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34

4.1 Constraint equations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50

4.2 Load parameter uncertainty . . . . . . . . . . . . . . . . . . . . . . . . . 53

5.1 Polytopic covering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65

5.2 Single plant synthesis parameters . . . . . . . . . . . . . . . . . . . . . . 73

6.1 Sample test conditions for simulations . . . . . . . . . . . . . . . . . . . . 82

B.1 Components selected for micro-converter . . . . . . . . . . . . . . . . . . 112

C.1 Datasheet values for the SW 240 mono solar panel . . . . . . . . . . . . . 117

vii

List of Figures

1.1 Cumulative installed grid-connected and off-grid PV power in reporting

countries [1]. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2

2.1 (a) I-V and (b) P-V curves of the SW 240 mono solar panel [2]. . . . . . 6

2.2 A simple grid-connected solar array. . . . . . . . . . . . . . . . . . . . . . 6

2.3 Maximum power point tracking feedback loop. . . . . . . . . . . . . . . . 7

2.4 Two MPPT architectures: (a) direct perturbation and (b) reference com-

mand to compensator. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

2.5 Distributed maximum power point tracking: (a) a simple MPPT system

showing multiple series-connected PV panels, (b) a micro-converter sys-

tem, and (c) a micro-inverter system. . . . . . . . . . . . . . . . . . . . 11

3.1 Block diagram representation of the micro-converter system. . . . . . . . 17

3.2 A boost converter with capacitive input filter . . . . . . . . . . . . . . . . 18

3.3 Block diagram illustration of the averaging approximation: (a) signal flow

in the physical device, (b) introduction of the averaging operator, and (c)

final model. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

3.4 Circuit diagram model of a solar cell. . . . . . . . . . . . . . . . . . . . . 23

3.5 A simple grid-tie inverter and its control system. . . . . . . . . . . . . . . 26

3.6 A capacitor decoupling an ideal DC power source from an ideal AC power

sink. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27

viii

3.7 Simplified inverter model. . . . . . . . . . . . . . . . . . . . . . . . . . . 30

3.8 Frequency domain model of the simplified inverter. . . . . . . . . . . . . 33

3.9 Block diagram representation of the simplified inverter model, neglecting

the sinusoidal disturbance: (a) nonlinear and (b) small-signal models. . . 33

4.1 Block diagram of a single DMPPT model. . . . . . . . . . . . . . . . . . 36

4.2 Double loop control structure of a DMPPT module. . . . . . . . . . . . . 37

4.3 The load of a DMPPT module. . . . . . . . . . . . . . . . . . . . . . . . 38

4.4 Model of the load impedance of a DMPPT module. . . . . . . . . . . . . 39

4.5 An open-loop DMPPT module. . . . . . . . . . . . . . . . . . . . . . . . 41

4.6 Block diagram of a compensated DMPPT module. . . . . . . . . . . . . . 42

4.7 An ideal DMPPT module. . . . . . . . . . . . . . . . . . . . . . . . . . . 43

4.8 An ideal DMPPT module with output capacitor. . . . . . . . . . . . . . 43

4.9 (a) Output impedances Zout of modules sharing a common string current,

(b) worst case approximation error of∑6 Zout,k in Monte Carlo experiments. 45

4.10 The load impedance and its constituent terms: (a) typical operating con-

ditions, (b) worst-case operating conditions. . . . . . . . . . . . . . . . . 47

4.11 Small-signal schematic of plant model. . . . . . . . . . . . . . . . . . . . 48

4.12 Uncertainty region of the converter and panel in terms of high-level pa-

rameters: (a) physical constraints, (b) boost ratio constraints, (c) panel

constraints, (d) all constraints. . . . . . . . . . . . . . . . . . . . . . . . . 51

5.1 Projection of P1 ⊂ R4 into its 2D coordinate planes. . . . . . . . . . . . . 64

5.2 DMPPT module with severed ESC loop. . . . . . . . . . . . . . . . . . . 66

5.3 Integral control with full state feedback. . . . . . . . . . . . . . . . . . . 68

5.4 Real part of the slowest closed-loop system eigenvalue, plotted against the

open-loop zero position. . . . . . . . . . . . . . . . . . . . . . . . . . . . 76

5.5 Worst case agreement of Zout(s) and Zapr(s). . . . . . . . . . . . . . . . 78

ix

6.1 Compensated DMPPT module simulation model. . . . . . . . . . . . . . 81

6.2 Reference tracking simulation results: (a) d′1 and (b) vs1 . . . . . . . . . 83

6.3 String current disturbance rejection simulation results: (a) d′1 and (b) vs1 83

6.4 Irradiance disturbance rejection simulation results: (a) d′1 and (b) vs1 . . 84

6.5 Illustration of variable time P&O . . . . . . . . . . . . . . . . . . . . . . 85

6.6 Distributed MPPT simulation results. . . . . . . . . . . . . . . . . . . . . 86

6.7 Maximum power point tracking of module 1. . . . . . . . . . . . . . . . . 87

A.1 Passive sign convention. . . . . . . . . . . . . . . . . . . . . . . . . . . . 100

A.2 Solar cell I-V characteristic. . . . . . . . . . . . . . . . . . . . . . . . . . 105

B.1 Inverter control system: a) schematic diagram, b) block diagram. . . . . 114

C.1 Illustration of the 2D optimal covering algorithm. . . . . . . . . . . . . . 119

C.2 Output of the 2D polytopic covering algorithm. . . . . . . . . . . . . . . 120

x

Chapter 1

Introduction

Solar energy shows great promise as a renewable energy resource; it is clean, abundant,

and inexhaustible. In the space of ninety minutes, enough sunlight strikes the earth’s

surface to fuel the world’s energy needs for a full year [3].

Photovoltaics (PV) are semiconductor devices that convert solar energy into usable

electrical energy. Recent years have witnessed a dramatic increase in the world’s installed

photovoltaic capacity, illustrated in figure 1.1. This trend is expected to continue as the

production costs of solar panels fall.

Photovoltaic power systems fall into three broad categories: off-grid, centralized grid-

connected, and decentralized grid-connected installations.

Grid-connected systems account for over 95% of current PV power generation ca-

pacity [1]. In these installations, harvested solar power is fed directly into the electrical

utility grid. A key benefit of grid-connected PV is that peak power output tends to coin-

cide with peak electricity demand, offsetting daily and seasonal fluctuations in electricity

consumption. Decentralized grid-connected installations can be built close to popula-

tion centers. Small-scale rooftop and building-integrated photovoltaic installations are

increasingly found in urban areas, thanks in part to government-sponsored incentives [1].

Urban solar installations pose unique engineering challenges. A typical solar panel

1

Chapter 1. Introduction 2

Figure 1.1: Cumulative installed grid-connected and off-grid PV power in reporting coun-tries [1].

has a terminal voltage of around 30 V. For grid-connected applications, it is usual to

connect several panels together in series to increase the terminal voltage of the array.

However, mismatches in the level of incident solar radiation, or irradiance, received by

series-connected solar panels can decrease the efficiency of the installation. In urban

environments, uneven shading conditions, reflections, panel surface debris, and differences

in panel orientation make such mismatches unavoidable. The string mismatch problem

is the focus of this thesis. As we shall see, power electronic devices play a critical

role in ensuring that the maximum available power is harvested from any photovoltaic

installation.

Several researchers [4–9] have proposed solving the mismatch problem by introducing

“micro-converters,” individual per-panel dc-dc power converters. The resulting “smart”

solar modules operate autonomously to correct the effects of mismatch [8]. However,

some of the control challenges inherent in this solution have been widely overlooked.

Micro-converter controllers must be robust to uncertain operating conditions, and


must contend with the dynamic coupling between series-connected modules. Control

design methods that have been previously applied to this problem are ad hoc, and may

not address these challenges explicitly.

In this thesis, systematic modeling and control design procedures for per-panel dc-dc

converters are developed. It is intended that these or similar techniques will be applied

by power electronics designers for solar applications.

The original contributions of the thesis include:

1. A technique for modeling the apparent load of a single micro-converter connected

in a grid-connected string of micro-converters.

2. A framework for modeling the plant uncertainty for the purpose of micro-converter

control design.

3. Applying LMI-based control design techniques to the micro-converter control prob-

lem.

The thesis has been written so as to be accessible to readers versed either in control

theory or power electronics. As such, the reader will encounter some familiar concepts

explained in detail; this is for the benefit of readers from a different area of expertise.

Chapter 2 provides background information on solar power and the role of power

electronic devices in PV installations. The concept of “mismatch” is fully explained, the

function of micro-converters is discussed, and a brief literature review is provided. At

this point, it is possible to define our control problem more concretely. The chapter ends

by introducing a running example of a rooftop solar installation that will be used to

illustrate modeling and control design throughout the thesis.

Models of each of the PV and power electronic devices that make up a small scale grid-

connected solar installation are derived in chapter 3. These models are used in chapter

4 to devise a simplified plant model appropriate for control design. Key challenges are


modeling the converter load from the perspective of a single module and creating a

structured description of the system’s uncertainty.

The proposed control synthesis procedure is described in chapter 5. The procedure

uses modern robust control techniques and draws on the theory of systems subject to

uncertain time-varying parameters. The resulting controller is then tested in full system

simulations, the results of which are presented in chapter 6.

Chapter 2

Background

The reader is assumed to be familiar with the basics of power electronics: dc-dc switched

mode converter topologies, pulse width modulation (PWM), and duty cycle. An intro-

duction to these topics is provided in [10].

A reader unfamiliar with power electronics may also consult chapter 3, in which

mathematical models of the devices are derived.

2.1 Maximum Power Point Tracking

A solar panel is modeled as a memoryless circuit element. The I-V characteristic of a

solar panel is highly nonlinear, as figure 2.1 illustrates. A panel’s I-V curve depends on

the irradiance, measured in W/m2, and the temperature at which it operates. These

characteristics also change somewhat over the lifetime of the device.

As shown, the power produced by the panel is highly dependend on its position on

the I-V curve. The operating point (voltage and current) at which the panel achieves its

maximum power is called the maximum power point (MPP). As evident in figure 2.1,

the position of the MPP depends on the irradiance and temperature of the panel. For

optimal energy harvesting, a solar panel should always be operated at MPP.

Figure 2.2 shows a high-level diagram of a simple grid-connected PV installation.

5

Chapter 2. Background 6

1000 W/m2

700 W/m2

300 W/m260°C 25°C

I (A)

V (V)

10

5

040200

(a)

P (W)

V (V)

250

125

040200

1000 W/m2

700 W/m2

300 W/m2

60°C 25°C

(b)

Figure 2.1: (a) I-V and (b) P-V curves of the SW 240 mono solar panel [2].

Arrows beginning on filled and open circles represent voltage and current measurements

respectively1. The PV array consists of identical solar panels connected in series and

parallel. The array’s I-V characteristic is a scaled version of figure 2.1. The system’s

load is a dc-ac converter, or inverter, that interfaces the DC solar power source to the

AC utility grid. The photovoltaic source and its load are connected through a dc-dc

converter.

vi

u

Photovoltaic

array

DC-DC

converter

DC-AC

inverter

Utility

grid

Photovoltaic

array

DC-DC

converter

DC-AC

converter

MPPT

control

Figure 2.2: A simple grid-connected solar array.

The role of the dc-dc converter here is analogous to an ideal AC transformer: It

transforms voltages and currents to match the source to the load. The conversion ratio

of the dc-dc converter, analogous to the turns ratio of an AC transformer, must be selected

1The diagram shows a block diagram together with an electric circuit. By convention, a block drawnin heavy lines represents an electrical device, and a heavy line connecting two such blocks representsan electrical connection. A block drawn in thin lines is a block diagram component, and a thin arrowrepresents signal flow.


Plant

v

MPPT

control

i

i

v

u

v

Figure 2.3: Maximum power point tracking feedback loop.

such that the PV array operates at its MPP. This is the task of the maximum power

point tracking (MPPT) controller, which adjusts the converter duty ratio to optimize the

PV array power.

The maximum power point tracking controller takes the PV array current i and

voltage v as its inputs, and produces a control signal u, the duty cycle of the dc-dc

converter.

2.1.1 MPPT algorithms

Figure 2.3 shows the MPPT controller in a feedback loop. The “plant” block models the

PV installation of figure 2.2 from input u to output v. We take for granted that this

plant has stable dynamics. The nonlinear relationship between the PV array’s voltage

and current is shown explicitly.

An enormous body of work on MPPT control exists in the power electronics litera-

ture [11,12]. The majority of algorithms use a periodic sampling approach and are imple-

mented digitally, although some continuous-time MPPT controllers are reported [13,14].

The simplest and most widely used MPP tracker is “perturb and observe” (P&O), a

discrete hill-climbing algorithm. This MPPT controller “climbs” the photovoltaic array’s

P-V curve by manipulating the converter duty cycle u. This is possible because the

equilibrium map from u to v can be shown to be monotonic [15].

The input signals v and i are sampled at t = k∆t, k = 0, 1, 2 . . .. We will use the

convention v(kt) = v[k] for the sampled signals. The PV array power is computed for


each sample; p[k] = v[k]i[k].

At every time step, u changes by a fixed constant ∆u. The direction of the change is

determined by the change in power since the last sample. For k ≥ 1, u is determined by

the equation

u[k + 1] = u[k] + sgn(p[k]− p[k − 1]

u[k]− u[k − 1]

)∆u, (2.1)

where sgn(·) is the sign function, with sgn(0) := 0.

For the algorithm to be effective, the wait time, ∆t, must be sufficiently long to

allow the circuit transient to settle to a new equilibrium. The optimization of the P&O

parameters ∆u and ∆t are discussed in [16]. Many proposed improvements to the P&O

algorithm employ time-varying ∆u and ∆t to improve the resolution and speed of the

algorithm.

The MPPT algorithm is a simple one-dimensional application of extremum seeking

control (ESC). Extremum seeking controllers are studied rigorously in the control liter-

ature; see for example [17–19]. Like P&O, these algorithms require that the dynamical

system being optimized be stable and that its dynamics be “fast” relative to that of the

extremum seeker.

2.1.2 Direct perturb and reference command MPPT

The architecture of the MPPT control block in figure 2.3 can have one of two structures

[20], which are illustrated in figure 2.42. To avoid confusion between the MPPT block and

the MPPT algorithm, we will henceforth refer to the MPPT algorithm as the extremum

seeking controller.

In figure 2.4a, the ESC controls the converter duty cycle directly, as in equation (2.1).

In figure 2.4b, the ESC instead outputs a reference voltage vref . A compensator adjusts

the converter duty cycle u to track the reference signal. This MPPT structure employs a

2Signals entering a summation junction are positive unless indicated with a negative sign.


pESC

u

vi

(a)

CompensatorESC

p

u

vi

vref−

e

(b)

Figure 2.4: Two MPPT architectures: (a) direct perturbation and (b) reference commandto compensator.

control double loop, as the ESC acts on the closed loop system formed by the compensator

and the rest of the system.

The double loop structure has been advocated by several authors. Femia et al. [21]

discuss its advantages. Consider figure 2.3 with the MPPT control block of figure 2.4b,

and sever the ESC from the loop. With a well-designed compensator, the system from

vref to v will have much faster dynamics than the system from u to v. This allows the

ESC to employ a shorter interval ∆t, so the system converges more rapidly to optimal

power.

A second advantage concerns the inverter. As explained in section §3.4, the inverter

introduces a disturbance at 120 Hz into our MPPT system. This disturbance causes an

undesired oscillation in v, which may “confuse” the ESC, delaying its convergence to the

MPP. Once reached, voltage oscillations about the MPP will also reduce the harvested

power [22]. However, the 120 Hz disturbance is attenuated by a compensator having

sufficiently high bandwidth.

From the perspective of inverter design, this improved disturbance rejection is ben-

eficial because the system can tolerate a larger amplitude disturbance. This frees the

inverter designer to use a smaller DC link capacitor, the reduction of which has been a

focus of recent literature [22,23]. The DC link capacitor is an expensive and failure-prone

inverter component; by reducing the needed capacitance, a designer can select a superior

capacitor technology.

Although the tracker can command either the panel voltage or current, a system that


issues a voltage reference will show less sensitivity to irradiance changes [6].

2.2 Distributed MPPT

Consider figure 2.5a, which depicts n series-connected solar panels in a simple grid-

connected PV installation. In an urban environment, these n panels may not all receive

the same irradiance. Differences may arise due to partial shading, different panel orien-

tations, or reflections from nearby buildings.

Since these panels are series connected, they share a common current. If the panels’

I-V characteristics are not identical, then some panels will be forced to operate away

from their respective maximum power points.

The power harvested using a single dc-dc converter with centralized MPPT is less

than what could be achieved if each panel were locally optimized and the resulting panel

powers summed. Depending on the installation, it is estimated that 10 - 30% of the

available energy yield is lost due to mismatch [24,25].

2.2.1 Micro-converters and micro-inverters

Figure 2.5b shows the same installation with a dedicated dc-dc converter assigned to every

panel. This “micro-converter” system configuration was first suggested by Walker and

Sernia [4]. Many researchers in the power electronics community have since contributed

Utility

grid

Solar

panel 2

Solar

panel n

DC-DC

converter

DC-AC

inverter

Solar

panel 1

(a)


n

Solar

panel 2

Solar

panel n

Solar

panel 1

DC-DC

converter 2

DC-DC

converter n

DC-DC

converter 1

Utility

gridDC-AC

inverter

(b)

DC-DC

converter 1

DC-DC

converter 2

DC-DC

converter nn

n

Solar

panel 2

Solar

panel n

Solar

panel 1

DC-DC

converter 2

DC-DC

converter n

DC-DC

converter 1 DC-DC

converter 1

DC-DC

converter 2

DC-DC

converter n

n

DC-AC

converter 2

DC-AC

converter n

DC-AC

converter 1

Utility

grid

(c)

Figure 2.5: Distributed maximum power point tracking: (a) a simple MPPT systemshowing multiple series-connected PV panels, (b) a micro-converter system, and (c) amicro-inverter system.

[5–9] and commercial versions have recently been brought to market [26,27]. If the micro-

converters are lossless and capable of achieving any positive conversion ratio, then it can

be shown that local per-panel optimization will recover all of the energy otherwise lost

due to mismatch. A proof is presented in appendix §A.1.

Another solution to the mismatch problem, shown in figure 2.5c, assigns a dedicated

dc-dc converter and dc-ac converter3 to every panel in a configuration dubbed “micro-

inverter”. This too has received much attention in the literature [28–30], and the concept

has been commercialized [31,32].

Compared to the micro-inverter architecture, the micro-converter architecture re-

quires fewer components, has lower overall system cost, and is more efficient. However,

3In micro-inverters, these two functions can be performed in single-stage, using an isolated topology.


the micro-inverter architecture offers some practical advantages: It is easier to install,

eliminates the high voltage DC bus, and eliminates the central inverter, which makes the

system modular and flexible. This thesis considers the micro-converter architecture.

The ability to perform maximum power point tracking at the individual panel level

is called “distributed” maximum power point tracking (DMPPT). It is worth noting that

DMPPT could be performed at still finer levels of granularity than the panel level, a

possibility discussed in [24].

2.3 Control Challenge

The building block of micro-converter distributed MPPT is the DMPPT module, which

consists of panel, micro-converter, and controller.

Distributed MPPT using micro-converters is a more challenging problem than central

MPPT, because the series-connected modules are coupled. To illustrate, suppose that the

system in figure 2.5b is operating with every panel at its respective MPP, when one of the

panels is suddenly shaded. Its local MPP tracker responds by changing the conversion

ratio of its micro-converter. The apparent load that is seen by each of the remaining

modules changes as a result, and they are perturbed from their respective maximum

power points. In the context of figure 2.3, a local MPP tracker will not see a monotonic

equilibrium map from u to v.

A multi-input, multi-output or distributed control structure could mitigate this ef-

fect. This would require that all of the modules communicate continuously, but dedicated

wiring for this purpose would be costly and impractical. The possibility of power-line

communication (PLC) in a micro-converter system is discussed in [5], and several com-

merical micro-converters transmit data wirelessly to a recording station [26,27]. However,

these systems are designed for sporadic communication.

A DMPPT system with autonomous, non-communicating micro-converters is modu-


lar, extensible, easy to install, and requires no additional wiring [8].

2.3.1 Double loop control structure

The solution to the problem of coupled DMPPT, proposed in [7] and [8], is to give the

DMPPT module’s local controller the double loop structure of figure 2.4b. In this case,

the ESC output is vref , now a reference voltage for that module’s solar panel. Since the

panel’s MPP voltage is not affected by changes elsewhere, the local ESC is disassociated

from the DMPPT system’s complexities.

The double loop control structure can confer this benefit only if the inner loop com-

pensator is able to track the ESC reference voltage despite the time-varying dynamics of

the module’s apparent load.

Literature review Few authors have discussed compensator design for the DMPPT

module.

Femia et al. [7] analyze the stability of a system of series-connected DMPPT modules

having a double-loop control structure. The analysis neglects the extremum seeker and

focuses on the coupled dynamics of the micro-converters connected in series. To the

author’s knowledge, no other paper has addressed this topic.

For this analysis, [7] presents a boost micro-converter together with a type 3 analog

compensator (a PID controller with two added high frequency poles). The details of the

compensator design and performance are not discussed. The inverter is modeled as a

Thévenin equivalent circuit having a small resistance; this model is consistent with the

ideal voltage source model of the inverter that is common in the literature, as for example

in [21,33].

Linares et al. [8, 34] design a non-inverting buck-boost micro-converter. Their work

is the first to explicitly state the benefit of a double loop control structure in decoupling

the MPPT functions of neighboring DMPPT modules. A low bandwidth PI controller is


chosen for the inner loop compensator; the same compensator is used in both buck-mode

and boost-mode operation. The selection of the controller parameters is not discussed in

detail.

Linares et al. use a dynamical inverter model in simulations. The inverter is modeled

as a block that adjusts its current to maintain a fixed voltage across its terminals; this

is achieved by integral control.

One of the most important considerations for the inner loop compensator is robust-

ness, since it must stabilize the system for multiple converter conversion ratios and op-

erating conditions. The question of robustness is briefly addressed in [21], in which the

double loop control structure is proposed for a central MPPT system (i.e., figure 2.2).

As the dc-dc converter in this system is connected to a fixed DC voltage inverter, the

plant contains only one uncertain parameter.

Nowhere in the literature is the question of robustness and parameter uncertainty

discussed for DMPPT systems, in which both the micro-converter’s output voltage and

conversion ratio vary in time.

2.4 Statement of Objective

The objective of this thesis is to develop a systematic modeling procedure for the DMPPT

system described, and to propose a method of control synthesis for the inner loop com-

pensator. The compensator should be compatible with any extremum seeking scheme.

For simplicity, we will assume that all of the series-connected DMPPT modules have

the same solar panel model, and identical converters and controllers.

The compensated DMPPT module must be able to make the solar panel’s terminal

voltage track the MPPT reference voltage. It must do so despite disturbances in the

common string current, which result from the operation of neighboring modules and the

inverter. The module must fulfill these objectives regardless of its operating point. The


compensator must therefore be robust to variable parameters, such as the conversion

ratio, the output voltage, and the panel characteristic.

A precise statement of the control specifications is deferred until section §5.3.

2.5 Running Example

The modeling and control design procedures will be illustrated with a running example

of a grid-tied rooftop PV installation. The installation consists of between six and ten

solar panels4, dedicated per-panel micro-converters, and a 2.5 kW single-stage inverter.

The micro-converters have a boost topology, chosen in our example for simplicity.

Boost converters are common in DMPPT applications [5–7]; however, many modern

DMPPT module designs use a non-inverting buck-boost topology for improved power

harvesting [8, 24, 27]. The non-inverting buck-boost converter’s three operating modes

(buck mode, boost mode and pass-through mode) allow it to achieve a wider range of

conversion ratios than a boost converter while maintaining a high efficiency.

The components of the example PV installation are described in detail in chapter 3.

4Small installations of six to ten panels are common, since the resulting series string voltage of 180 -300 V is within the MPP range of typical two-stage inverters; see for example [35].

Chapter 3

System Components

The first step in control design is to create a mathematical model of the plant. In this

chapter, we derive models of each of the three electrical devices in a DMPPT system:

the dc-dc converter, the solar panel, and the inverter.

3.1 Block Diagram

We begin by expressing the high level circuit diagram of figure 2.5b in block diagram

form. The system depicted in figure 2.5b is an interconnection of electrical subsystems,

each of which is either a one-port or a two-port device. In order to reduce an electrical

subsystem to an input-output block, we assign to each port an input (either current or

voltage) and the corresponding output. In general the choice will be arbitrary; however,

it may be motivated by exigencies of the interconnections, or by the structure of the

subsystem itself. The procedure is analogous to the modeling of linear circuits as two-

port networks.

The resulting block diagram is shown in figure 3.1. The photovoltaic modules and

the grid-tied inverter are one-port devices; the dc-dc converters are two-port devices.

Each dc-dc converter has a control input, d′i, around which the control system will be

designed. In the following sections, we derive mathematical models for each of the three

16

Chapter 3. System Components 17

block types.

Inverter

Converter 1

PV 1

vstringConverter 2

PV 2

vsn

Converter n

PV n

isn

d'n

vonion

d'n

vs2is2

vo2io2

d'2

vs1is1

vo1io1

d'1

istring

Figure 3.1: Block diagram representation of the micro-converter system.

3.2 Power Converter

A dc-dc power converter is an electronic power processing device that functions by com-

mutating between two or more circuit configurations.

Figure 3.2 shows a synchronous boost converter with a capacitive input filter. A boost

converter has a voltage converter ratio M = vovs≥ 1. It is called “synchronous” because

the switches S1 and S2 are controlled always to be complementary. Let usw(t) be the

switch position function, which takes only binary values 0, 1. When usw(t) = 0, S1 is

closed and S2 is open, and when usw(t) = 1, S1 is open and S2 is closed.


C2C1

L

is

−

+

v

io

−

+

−

+

vs

−

+

vo

iL

S1

S2

C1vC2

Figure 3.2: A boost converter with capacitive input filter

The goal of the system is to regulate one of the four port quantities (vs, is, vo, io).

The converter is controlled through usw(t).

3.2.1 Model

Explicit two-port models of dc-dc converters are unusual in the power electronics litera-

ture, in which it is common to model the source as an ideal voltage source and the load as

a resistor. Since a solar panel does not resemble an ideal voltage source, it is convenient

to derive a two-port converter model. A similar approach is advocated by Suntio in [36].

We assign the port variables (is, io) as inputs and (vs, vo) as outputs, a choice made

necessary by the input and output capacitors. Their voltages must be assigned as outputs

if we are to obtain a proper state model of the device.

The boost converter of figure 3.2 contains only ideal switches and reactive elements.

In reality, transistor switches and reactive components are not perfectly lossless. A more

realistic model of the converter includes a series parasitic resistance for every switch and

reactance. We will neglect these parasitics in our model, but revisit them when the

controller is tested in simulations; see section §6.2.

3.2.1.1 Nonlinear switching model

To derive a model of the boost converter, we fix the positions of the switches and obtain

the differential equation model of the resulting circuit using Kirchhoff’s laws. The two

models are then combined into a single model parametrized by usw(t).

The reference directions of the converter port currents and voltages are indicated in


figure 3.2. When S1 is closed and S2 is open,

C1dvC1

dt= is − iL

LdiLdt

= vC1

C2dvC2

dt= −io.

(3.1)

When S1 is open and S2 is closed,

C1dvC1

dt= is − iL

LdiLdt

= vC1 − vC2

C2dvC2

dt= iL − io.

(3.2)

The switching converter model is thus

C1dvC1

dt=is − iL

LdiLdt

=vC1 − vC2usw

C2dvC2

dt=iLusw − io.

(3.3)

The signal usw(t) is generated by a controller, design techniques for which are dis-

cussed in [10] and [37]. We confine ourselves to the class of controllers for which usw(t)

is generated by a fixed frequency pulse width modulator (PWM).

3.2.1.2 Averaging

It is convenient to neglect the switching nature of the converter in our model. By applying

the method of state space averaging, first introduced by Middlebrook and Cuk in [38], we

replace the binary usw(t) in (3.3) with the continuous signal d′(t). The signal d′(t) takes

values on the closed interval [0, 1]; its relationship to usw(t) will be explained shortly.


Thus, we obtain the non-switching nonlinear model

C1dvC1

dt=is − iL

LdiLdt

=vC1 − vC2d′

C2dvC2

dt=iLd

′ − io.

(3.4)

The symbol d′ is chosen for consistency with the power electronics literature, where by

convention the duty ratio of S1 is called d and its complement d′ = 1− d.

The use of state-space averaging has been extensively justified in the literature [37].

The averaged model is correct in the limit of infinite switching frequency; a rigorous

treatment can be found in [39] and [40].

Practically speaking, the averaged model has limitations. An empirical rule of thumb

is that the averaged converter model is valid up to half the switching frequency fs [10].

State space averaging is illustrated in figure 3.3. A controller generates a continuous

signal uc(t), which is pulse-width modulated at frequency fs to generate the input usw

to the switching model (3.3) of the converter. We introduce the non-causal averaging

operator

Tave : u 7→ v, v(t) =1

Ts

ˆ Ts+t

t

u(τ)dτ,

where Ts = 1fs

is the switching period. The fictitious averaging block is depicted in

dotted lines in figure 3.3b. The converter is replaced with system (3.4), which has the

same dynamics as the switching model but takes the continuous input d′.

In power electronics it is convention to equate d′ and uc as in figure 3.3c. In doing so,

we approximate the averaging operator as the “inverse” of the PWM operator. This idea

has intuitive appeal provided that the signal uc changes slowly relative to the sampling

period Ts. Our intuition is justified in appendix §A.2, which proves that for uniform pulse

width modulation, under mild assumptions on uc, |d′(t)− uc(t)| can be made arbitrarily

small by choosing Ts sufficiently small.


PWMCompensatorusw Converter

(switching)

uc

(a)

PWMCompensator Averageusw d' Converter

(nonswitching)

uc

(b)

Compensatord' Converter

(nonswitching)

(c)

Figure 3.3: Block diagram illustration of the averaging approximation: (a) signal flow inthe physical device, (b) introduction of the averaging operator, and (c) final model.

3.2.2 Linearization

System (3.4) exhibits a continuum of equilibria (VC1 , IL, VC2) with D′ =VC1

VC2∈ (0, 1].

A linearized model can be constructed by taking the Taylor series expansion about any

such equilibrium. The resulting linear model1 has state x = (vC1 , iL, vC2), control input

u = d′, deviation port currents w = (is, io). and output y = (vs, vo):

C1 0 0

0 L 0

0 0 C2

︸︷︷︸

K

x =

0 −1 0

1 0 −D′

0 D′ 0

︸︷︷︸

KA

x+

0

−VC2

IL

︸︷︷︸

KBu

u+

1 0

0 0

0 −1

︸︷︷︸

KBw

w

y =

1 0 0

0 0 1

︸︷︷︸

C

x.

(3.5)

The converter’s boost ratio, M = VoVs, is equal to 1

D′ .

1When discussing signals in a linearized system, we will adopt the following convention: For a signalv, its steady state value is denoted by V and its small-signal component is denoted by v, where v = V +v.


3.2.3 Parameter values

The design parameters of the boost converter in our running example are presented in

table 3.1. Their selection is explained in appendix §B.1.

Table 3.1: Converter parametersParameter Value

fs 250 kHz

L 40 µH

C1 10 µF

C2 40 µF

IL,min 1.18 A

The synchronous PWM switching described and modeled in this section is called con-

tinuous conduction mode (CCM). If IL < IL,min, we assume that the converter operates

using a different switching pattern, as explained in appendix §B.1. It is typical for power

electronic devices to use a different switching mode for low power operation [41, 42]. In

our running example, we will consider only converter operation with IL > IL,min.

The design procedures described in chapters 4 and 5 can, if necessary, be modified to

accommodate more complex mode boundaries definitions.

3.3 Solar Panel

A solar panel is made up of PV cells, the basic building block of photovoltaics. A single

PV cell produces a current of several amps at a voltage of around 0.5 V. In a solar panel,

many PV cells are connected in series to provide a more usable terminal voltage. An

introduction to the physics of solar cells can be found in [43].


3.3.1 Model

The ideal photovoltaic cell is modeled as an ideal current source in parallel with a silicon

diode [43, 44]. A more realistic model of the solar cell includes the parasitic effects of

leakage currents (Rp) and resistive electrical contacts (Rs), as shown in figure 3.42.

Ipv

Ideal cell

Rp

Rs i

−

+

v

Figure 3.4: Circuit diagram model of a solar cell.

The relationship between the cell’s current and voltage, easily derived via the Schock-

ley diode equation, is

Ipv − I0

(exp

(q(v +Rsi)

akBT

)− 1

)− v +Rsi

Rp

− i = 0. (3.6)

Here Ipv (A) is the current of the fictitious internal ideal current source, I0 (A) is the

reverse diode saturation current, T (K) is the absolute temperature of the cell, q is the

fundamental charge, kB is the Boltzmann constant and a ∈ [1, 2] is the diode ideality

factor. The current Ipv is proportional to the irradiance, G (W/m2), incident on the

surface of the cell [43]. Model parameters for real solar cells are selected by curve fitting

experimental I-V data.

A solar panel is composed of ns series-connected solar cells. Typical I-V characteristics

of a solar panel operating under different irradiance levels are shown in figure 2.1. The

panel characteristic can be modeled using a modified version of equation (3.6) [44], in

which a is replaced by nsa and Rp and Rs are interpreted as parasitic resistances at the

2The dynamics of the PV cell’s junction capacitance are assumed to be so fast as to be negligible.


panel level,

αG− I0

(exp

(q(v +Rsi)

nsakBT

)− 1

)− v +Rsi

Rp

− i = 0. (3.7)

In equation (3.7), the proportionality Ipv ∝ G is made explicit in the constant α. Some

authors [44, 45] also include an empirical temperature correction for Ipv; we neglect it

here but note that it would not be difficult to incorporate.

If the panel’s cells are unevenly illuminated, then equation (3.7) can hold only ap-

proximately. Nevertheless, it can be shown that the P-V characteristic of the panel

is unimodal under uneven irradiance, and therefore that extremum seeking methods of

MPPT remain effective. A simple proof is given in appendix §A.3. Note that this result

does not hold if the panel includes bypass diodes, which are connected across substrings of

cells in many solar panels. In this case, a multimodal power characteristic may result [46];

we will neglect this effect.

Equation (3.7) describes a one-to-one relation between i and v, parametrized by G

and T . However, the function fG,T : i 7→ v cannot be expressed in closed form. One can

evaluate it numerically via the Lambert W function [47].

3.3.2 Linearization

The panel model of equation (3.7) is a memoryless nonlinearity. The implicit function

can be linearized by taking the Taylor series expansion of equation (3.7), h(i, v, G, T ) = 0,

about a point (I, V,G0, T0). This yields kii + kvv + kGG + kT T = 0, where ki, kv, kG

and kT are the Taylor coefficients evaluated at the equilibrium. The small-signal model

of the panel is

i = −kvkiv −

(kGkiG+

kTkiT

)= −R−1

pv v + ipv. (3.8)

If G and T remain constant, the panel’s small-signal model is resistive; a negative sign

appears because i and v were assigned using the active sign convention. Perturbations

in G and T are modeled as a disturbance current ipv in parallel with resistor Rpv.


3.3.3 Parameter fitting

A solar panel datasheet provides the MPP voltage Vmpp and current Impp, the short circuit

current Isc, and the open circuit voltage Voc of the panel under industry standard test

conditions (STC) of G = 1000 W/m2 and T = 25°C. Since highly specialized equipment

is required to replicate these conditions experimentally, the parameters of equation (3.7)

must be determined using the manufacturer’s provided data.

The algorithm proposed by Villalva et al. [44] is widely used to fit the parameters of

equation (3.7) to the datasheet values. However, when applied to the SW 250 mono, the

algorithm returns a negative value for Rp regardless of the initial choice of α ∈ [1, 2]. In

order to produce a viable curve fit, the algorithm described in appendix §C.1 was used

to compute the fitted parameter values shown in table 3.2.

Table 3.2: Fitted panel parametersParameter Value Unit

α 8.290×10−3 Am2W−1

Io 7.451×10−9 A

Rp 4112 Ω

Rs 0.2327 Ω

a 1.170 -

ns 60 -

3.4 Inverter

An inverter is a dc-ac power converter. We will consider a single phase, single stage

inverter appropriate for a small scale PV installation.

The inverter is a complex device, the design of which is complicated by the require-

ments of regional power utility standards. This section introduces one of the conceptually

simplest inverter topologies. However, inverter design and control remain an active area

of research.


This section presents a simplified, topology-independent model of the inverter as seen

from the DC side.

3.4.1 Principle of operation

Figure 3.5 shows a simple grid-tie inverter, which consists of a DC-link capacitor and a

switching power converter, connected to the utility grid. The objective of this inverter

is to present itself to the grid as a unity power factor source3. This requirement is

tantamount to ensuring that the inverter’s output current iout is sinusoidal and phase-

locked to the grid voltage vgrid. The utility grid is modeled as an ideal AC voltage source4.

The control system includes two sensors, a DC link voltage sensor and an inverter output

current sensor, and actuates by modulating the duty cycle u of the power converter.

−u

Utility

grid

Inner loop

controller

Bridge

converter

ei

iout

Outer loop

controller

vstring

−

Vdcev

ωtcos

irefipeak

DC-link

capacitor

istring

−

+

vgrid

−

+

resembles

Figure 3.5: A simple grid-tie inverter and its control system.

The following subsections describe the functions of the DC-link capacitor and of the

3However, some modern inverters can be programmed to provide reactive power to the grid.4This model neglects grid disturbances. These would ultimately appear as output current distur-

bances in the micro-converter model, to which the compensator of chapter 5 is designed to be robust.


switching converter.

DC-link capacitor Consider the power balance of an ideal (lossless) grid-tie inverter.

The output power waveform of the inverter oscillates at twice the grid frequency, since

pout(t) = vgrid(t)iout(t) = (Vgrid cosωt)(Iout cosωt) = 12VgridIout(1 + cos 2ωt). (3.9)

Here Vgrid (V) is the peak value of the grid voltage waveform, Iout (A) is the peak value

of the inverter output current waveform, and ω (rad/s) is the grid frequency.

The input power to the inverter comes from a DC source, the PV array. The de-

coupling of the DC power source from the AC power sink is performed by the DC-link

capacitor. The capacitor alternately stores and releases into the inverter the deficit and

surplus power delivered by the PV array.

To analyze the DC-link capacitor in a simplified context, figure 3.6 shows a decou-

pling capacitor separating an ideal DC power source from an ideal AC power sink. An

ideal power source is a fictitious element having the memoryless terminal characteristic

i(t)v(t) = p(t). The reference directions for voltage and current are shown in the figure.

v

−

+

P

ic

−P (1 + cos2ωt)

Figure 3.6: A capacitor decoupling an ideal DC power source from an ideal AC powersink.

The system of figure 3.6 exhibits a periodic steady state when the average power

drawn by the AC sink equals the power supplied by the DC source. From Tellegen’s

theorem we have

−v(t)ic(t) + P − P (1 + cos 2ωt) = 0. (3.10)


When the capacitor’s terminal characteristic, ic = Cv, is substituted into equa-

tion (3.10), the resulting differential equation can be solved analytically:

Cvv + P cos 2ωt = 0

⇒ C

ˆ t

0

vvdt+ P

ˆ t

0

cos 2ωt = 0

⇒ 1

2C[v(t)2 − v(0)2

]+P

2ωsin 2ωt = 0.

(3.11)

An inverter is always designed to operate with its initial voltage v(0)2 PωC

, so we use

this assumption to solve equation (3.11). The capacitor voltage exhibits a periodic ripple,

v(t) =

√v(0)2 − P

ωCsin 2ωt. (3.12)

We can approximate equation (3.12) by taking the Taylor series expansion of f(x) =√x

about x = v(0)2, and treating PωC

sin 2ωt as a perturbation ∆x. Since v(0)2 PωC

, the

ripple waveform is approximately sinusoidal. The amplitude of the ripple is inversely

proportional to the size of the decoupling capacitor:

v(t) ' v(0)− 1

2v(0)

P

ωCsin 2ωt. (3.13)

In a PV system, the ripple propagates through to the terminals of the PV modules.

The PV voltage oscillation is undesirable because it may interfere with MPPT, and

because oscillations around the MPP reduce the harvested power. For these reasons, we

would prefer a large capacitor to minimize DC-link voltage ripple.

However, the capacitor is one of the most expensive components of the inverter. The

capacitor also has the shortest lifespan of any of the inverter’s electronic components,

and often requires replacement during the inverter’s service life [22]. The trend in recent

years has been towards smaller DC-link capacitors and more ripple-tolerant systems on

both the inverter and PV sides [48, 49], which allows designers to use less failure-prone


capacitor technologies.

Power converter The converter of figure 3.5 is shown enclosed in dotted lines. In

principle, any converter topology capable of achieving both positive and negative con-

version ratios could be used in place of the full-bridge converter shown. A sinusoidally

varying output current is produced by modulating the converter duty ratio u.

The full-bridge inverter can achieve conversion ratios in the range [-1,1]. In order to

function correctly, it requires that the DC-link voltage be maintained above Vgrid; this is

true of most inverter topologies.

Control system The inverter of figure 3.5 has the double control loop structure com-

mon to all inverters. The inner loop controller regulates the duty cycle of the bridge

converter to achieve a sinusoidal output current. The reference waveform iref for this

inner loop is produced by a phase-locked loop (not shown), which tracks the grid voltage

to ensure unity power factor. The amplitude of the sinusoidal reference waveform is set

by the slower outer control loop.

The outer control loop maintains the power balance between the DC and AC ports

of the inverter, which it achieves by regulating the capacitor voltage to a preset reference

value. For example, if the capacitor voltage is increasing, the power produced by the PV

array exceeds the average power injected into the grid by the inverter. The controller

responds by increasing iref to restore the power balance.

The slow outer loop is almost universally implemented using a linear controller [22],

most commonly a PI controller.

3.4.2 Model

For solar applications, the inverter is often modeled as an ideal voltage source [7, 33],

since the outer control loop regulates vstring to a constant reference voltage Vdc. Although

appealingly simple, this model neglects the dynamics of the inverter.


Constructing a dynamical model of the inverter based on figure 3.5 would result

in a complex, topology-dependent model. As will be shown in chapter 4, this level of

complexity is unnecessary for our purposes. Instead, we propose a simplified, topology-

independent inverter model.

The inverter’s dynamics are dominated by the large input capacitor and by the slow

outer control loop. We assume that the inner loop controller of figure 3.5 is very fast,

so that the inverter output current tracks iref perfectly. If we further assume that the

output current is phase-locked to the grid, then the inverter model can be simplified to

that of figure 3.7.

The full bridge converter, the utility grid, and the fast inner control loop have been

replaced by an ideal controlled power sink. In figure 3.7, the power consumed by the

ideal controlled power sink, which is represented by a diamond, is pinv(t)(1 + cos 2ωt).

The outer control loop modulates pinv. This is equivalent to modulating the amplitude

of the grid phase-locked reference current in figure 3.5.

Outer loop

controller

vstring

−

Vdcev

2ωt1 + cospinv

DC-link

capacitor

resr

Cinv−

+

ic

vc

iinvistring

Figure 3.7: Simplified inverter model.

In figure 3.7, a parasitic equivalent series resistor, resr, has been added to the capaci-

tor. The addition of resr, a feature of all physical capacitors, does not significantly affect


the inverter’s dynamics. We introduce it as a mathematical convenience: Including the

parasitic resistance allows us to model the inverter from input vstring to output istring

using state space notation. The equations of the simplified inverter of figure 3.7 are

vc =vstring − icresr

istring =ic + iinv

ic =Cinvdvcdt

vstringiinv =pinv(1 + cos 2ωt).

(3.14)

We assume that the linear controller that generates pinv has a proper transfer function.

Note that the control law must include an integrator. Its state space model is

ξ =Aξ +B(Vdc − vstring)

pinv =Cξ +D(Vdc − vstring),(3.15)

where ξ ∈ Rn is the state and (A,B,C,D) are matrices of appropriate dimension.

By rearranging equations (3.14) and (3.15), we can express the simplified inverter

model as a nonlinear dynamical system

x =f(x, u)

y =h(x, u, t),

in which the function f is, in fact, linear. Let the state x = (vc, ξ), the input u =

(vstring, Vdc), and the output y = istring. We obtain the equations

vc =1

resrCinv(vstring − vc)

ξ =Aξ +B(Vdc − vstring)

istring =1

resr(vstring − vc) +

Cξ +D(Vdc − vstring)vstring

(1 + cos 2ωt).

(3.16)


These equations are valid only for vstring > Vgrid. We will assume throughout the thesis

that the inverter remains within its valid operating region.

3.4.3 Linearization

Equation (3.16) describes the simplified inverter as a time-varying nonlinear system. Al-

though the system of figure 3.7 has no static equilibria from an input-output perspective,

its state equation is linear time invariant.

Motivated by this observation, we extract the time-varying component, cos 2ωt, from

equation (3.16) and treat it as an exogenous disturbance input α. This yields a time-

invariant system of the form

x =f(x, u)

y =h(x, [u, α]),

(3.17)

which can be linearized about an equilibrium of the set (x, u, α)|f(x, u) = 0, α = 0.

Equilibria will have vc = vstring and, since the controller contains an integrator, vstring =

Vdc. A continuum of equilibria exist, corresponding to different steady-state values of the

inverter input port current istring.

The linearized system has the form

x =Alx+Blu

y =Clx+Dlu+Dαα,

(3.18)

where (Al, Cl) are constant matrices and (Bl, Dl, Dα) are constants. We assume that Vdc

is a constant, so vdc = 0 does not appear in the linearization. The linearized inverter

model has form shown in figure 3.8; the sinusoidal disturbance enters the model as an

output perturbation.

It remains to find the admittance transfer function Yinv(s). It is simple and intuitive


Yinvv i

2ωt Dα cos

~ ~

Figure 3.8: Frequency domain model of the simplified inverter.

to do so in the frequency domain.

If we set resr = 0 and neglect the cos 2wt disturbance term, equations (3.14) can be

interpreted in block diagram form as shown in figure 3.9b. By linearizing this block about

the equilibrium with vstring = Vdc and pinv = P , the small-signal model of figure 3.9b is

obtained.

−

Vdc

Gcv

i

sCinv

ev

ic

iinv

pinv×

÷

(a)

−Gcv~

i~

1

Vref

Vref

−P2

sCinv

(b)

Figure 3.9: Block diagram representation of the simplified inverter model, neglecting thesinusoidal disturbance: (a) nonlinear and (b) small-signal models.

We assume the outer loop controller to be a PI of the form Gc(s) = −(kP + kIs

). The

negative sign appears because the controller should respond to a positive error signal by

decreasing the reference power. Thus, we obtain

Yinv(s) =istring(s)

vstring(s)=CinvVdcs

2 + (kP − Istring)s+ kIVdcs

, (3.19)


where Istring is the equilibrium inverter input port current, Istring = PVdc

.

Finally, we determine the constantDα of equation (3.18), through which the sinusoidal

disturbance perturbs the output. By linearizing the output equation (3.16), we obtain

Dα = PVdc

.

The output impedance of the inverter is further discussed in section §4.2.4.

3.4.4 Parameter values

The parameter values of the simplified inverter of figure 3.7 are presented in table 3.3.

The selection of these parameters is explained in appendix §B.2.

Table 3.3: Inverter parametersParameter Value

Vdc 400 V

Cinv 450 µF

kp 18

kI 450

Chapter 4

Plant Model

In the previous section, the model derived based on figure 3.1 is a multi-input multi-

output (MIMO) system. Given a string of n DMPPT modules, the control inputs are

the n duty ratios, and the outputs are the respective output powers of the n solar panels.

Since the DMPPT modules should be autonomous and non-communicating, we are

constrained to design local MPPT controllers. Each (d′i, vsi) pair will have an independent

controller, and since modules are interchangeable, each controller is identical.

This input-output paired structure prompts us to approach the problem as a single-

input single-output (SISO) control design, designating as disturbances those signals aris-

ing from the cross-coupling of the paired inputs and outputs. These interactions can

be ignored provided that the coupling signals are weak [50]. The problem of controlling

the output vsi via manipulation of the input d′i is analogous to a communication channel

subject to crosstalk from neighboring channels.

The double loop control structure of figure 2.4b, if properly designed, can enforce this

“weak coupling” condition.

Our objective in this chapter is to obtain a plant model from the perspective of the

inner loop compensator.

35

Chapter 4. Plant Model 36

4.1 SISO System Model

Figure 4.1 shows a block diagram of a single DMPPT module with its double loop

control structure. The subscript i has been dropped for clarity. The ESC issues a

reference voltage command to the inner loop, which modulates the duty cycle of the dc-

dc converter to ensure that the solar panel’s terminal voltage tracks this reference. The

ESC input (p) and output (vref ) depend only on the characteristic of the panel shown,

which is independent of the rest of the DMPPT system.

In order to design the inner loop compensator, we must model the behavior of the

“plant” from input d′ to output vs.

The models of the converter and PV blocks in figure 4.1 were derived in sections §3.2

and §3.3 respectively. The load block models the remainder of the system of figure 3.1,

i.e., the neighboring modules and the inverter, as it appears from the output port of the

DMPPT module. The MPPT controller consists of the ESC and compensator blocks.

vs

Converter

PV

is

d'

vo

Load

io

Compensator

− vrefe

vs

ESCp

Figure 4.1: Block diagram of a single DMPPT model.

The sections that follow reduce figure 4.1 to the feedback control design problem of

figure 4.2. The PV, converter, and load blocks must be combined to derive a plant model

for control design.


Plantd'

Compensator

− vrefe

vs

PlantESC

pp

vs

Figure 4.2: Double loop control structure of a DMPPT module.

4.1.1 Plant uncertainty

The models of the converter, solar panel, and inverter from chapter 2 are all functions of

the system’s operating conditions. The panel’s I-V characteristic depends on irradiance

and temperature; its linearization depends on the operating voltage. The converter’s

linearized model is parametrized by the equilibrium input and state parameters. The

inverter’s linearized model is a function of the string current. The plant perceived by the

inner loop compensator will be a function of these operating conditions.

Our objective is to design a robust compensator that operates effectively under all

possible operating conditions. At the modeling stage, it is necessary to quantify this vari-

ability in the plant. Of the operating conditions mentioned, some (e.g., panel irradiance

and temperature) are unmeasured, while others (e.g., converter state) have dedicated

sensors. Without distinguishing whether plant variability arises due to measured or un-

measured parameters, we will refer to plant variability as “uncertainty.” We characterize

plant uncertainty by defining the set of admissible plant models to which the plant, under

any normal operating conditions, must belong.

4.2 Load Model

The challenge of modeling the plant of figure 4.2 lies in the DMPPT module’s load: We

must find a model for the DMPPT system as it appears from the output port of a single

module.


Invertervstring

voiioi

vonion

istring

Module n

Module 1io1 vo1

Figure 4.3: The load of a DMPPT module.

Consider figure 4.3, in which the “module” blocks represent DMPPT modules oper-

ating in closed loop. The ith module has been severed from the loop. Its load, the load

of figure 4.1, is the system from voi to ioi.

The DMPPT literature has little to say on the subject of load modeling. Femia et

al. [7] present a small-signal model of a compensated DMPPT module. The module is

modeled with an “inverter” load: a voltage source with a small parasitic resistance. The

paper goes on to analyze the transfer functions of the system that results when two such

modules are connected in series. However, this approach does not provide a useful load

model for compensator design.

In this section, we derive and simplify a load model for a single DMPPT module.

4.2.1 Derivation

The load of the ith DMPPT module clearly depends on the remaining n − 1 modules.

Since all of the modules are identical, we can obtain models of the “module” blocks of

figure 4.3 from figure 4.1. To do so, we sever the “load” block and model the closed-loop

system from io to vo.

Define the closed-loop output impedance of a DMPPT model, Zout, as the transfer

function from −io to vo in figure 4.1. We take the negative small-signal current to respect


the convention for output impedance, for which the current flow into the positive port

terminal is taken as the reference direction. The current io is defined as the current

flowing out of the micro-converter, as shown in figure 3.2.

The load seen at the output port of the ith DMPPT module is computed from fig-

ure 4.4.

Yinv

−Zout1

io2

ion−Zout,n

io1~

vo1~

vo2~ vstring

~~

~von~

istring~

Figure 4.4: Model of the load impedance of a DMPPT module.

Lemma 1. The transfer function from voi to ioi is

Yload,i(s) :=ioi(s)

voi(s)=

1

Zinv(s) +∑n

k 6=i Zout,k(s), (4.1)

where Zinv(s) = Yinv(s)−1.

Proof. The proof follows immediately from the block diagram of figure 4.4:

ioi = Yinv(voi −∑k 6=i

Zout,k iok)

= Yinv(voi −∑k 6=i

Zout,k istring)

ioi =Yinv

1 + Yinv∑

k 6=i Zout,kvoi

=1

Zinv +∑

k 6=i Zout,kvoi.


This result matches the intuition derived from circuit theory: The transfer function

of the apparent load of the ith DMPPT module is the series combination of the output

impedances of the remaining modules and the inverter.

It remains only to find the module output impedance Zout. Unfortunately, Zout is a

function of the compensator that we have yet to design. The plant of figure 4.2, for which

we seek a model, is a function of the very compensator that we need to design for it.

Two potential solutions to the compensator-dependent plant suggest themselves.

• Accommodate this dependence in the control design procedure. For example, we

could design the compensator by an iterative approach. At each iteration, the plant

model is updated to reflect the most recent compensator design; a new compensator

is then synthesized based on the updated plant. Such an approach raises many

questions. Would the procedure converge? If so, would it converge to a unique

compensator, independent of the initial choice of compensator?

• Simplify the plant model in a way that eliminates its dependence on the undesigned

compensator. Such an approximation is acceptable if the plant model can be shown

to have low sensitivity to the compensator design.

We opt for the latter approach.

4.2.2 A module’s output impedance

This section derives the transfer function, Zout, from io to vo in figure 4.5.

The dynamics of the outer ESC loop are much slower than the dynamics of the inner

compensator loop. In deriving Zout, we will disregard the dynamics of the ESC. Since

Zout is ultimately to be used to derive the plant model for the design of the compensator,

we assume that slow dynamics of the ESC loops of neighboring modules can be modeled

as disturbances in the plant.


Converter

~d'

Rpv

Panel

~ipv

~is io

−

+

vs

−

+

~

~

vo~

Figure 4.5: An open-loop DMPPT module.

The model of the connected panel and micro-converter is illustrated in figure 4.5.

Linearized models of these devices are given by equation (3.8) and equation (3.5) respec-

tively. The small-signal linearized panel is a resistor Rpv, with the disturbance current

source ipv modeling irradiance and temperature changes.

The resulting system has state x = (vC1 , iL, vC2) and input u = d′. The panel distur-

bance current ipv and the deviation port current io are modeled by w = (ipv, io). The

outputs are vs and vo:C1 0 0

0 L 0

0 0 C2

︸︷︷︸

K

x =

− 1Rpv

−1 0

1 0 −D′

0 D′ 0

︸︷︷︸

KA

x+

0

−VC2

IL

︸︷︷︸

KBu

u+

1 0

0 0

0 −1

︸︷︷︸

KBw

w

y =

1 0 0

0 0 1

︸︷︷︸

C

x.

(4.2)

Recall D′ is the equilibrium duty ratio of the boost converter and (VC2 , IL) are elements of

the converter’s equilibrium state vector. In the subsequent analysis, we will assume that

the panel’s I-V characteristic does not change with time, i.e., the disturbance ipv = 0.

Consider the transfer matrix of system (4.2) from (−io, d′) to (vo, vs), and define it as


Gmodule =

G11 G12

G21 G22

. (4.3)

Figure 4.6 shows a block diagram of a compensated DMPPT module, where the com-

pensator has transfer function K.

−io~

vo~

d'~

G11G21

G12G22

K

vs~

Figure 4.6: Block diagram of a compensated DMPPT module.

Closing the control loop around d′ and vs via K performs a linear fractional transfor-

mation on Gmodule. The resulting transfer function from −io to vo is

Zout = G11 +G12K

1−G22KG21.

If we assume that the compensator has a wide bandwidth, such that over all relevant

frequencies |G22K| 1, this expression can be simplified to

Zout ≈ G11 −G12G21

G22

. (4.4)

Finally, by using equation (4.2) in equation (4.4), we obtain an expression for the

closed-loop output impedance of a DMPPT module,

Zout(s) ≈Vo

ILD′ + C2Vos. (4.5)


Intuition It is helpful to have an intuitive understanding of equation (4.5). The ideal

DMPPT module of figure 4.7 resembles an ideal power source. If the voltage across the

solar panel is maintained by an ideal compensator at a fixed Vref , the panel provides

a fixed current Is. Adding an ideal DC transformer gives our hypothetical module the

output characteristic voio = VrefIs := P .

−

+~Vref

Is

Photovoltaic

array

Ideal

converter

−

+

Vo + vo

PV

module Io + io

~

Figure 4.7: An ideal DMPPT module.

However, like the inverter of section §3.4, the output impedance of a real boost con-

verter is dominated at high frequencies by its output capacitor. Still assuming ideal

compensation, we might better model the DMPPT module as an ideal power source in

parallel with a capacitor, as in figure 4.8.

vo

−

+

P

io

C2

ip

Figure 4.8: An ideal DMPPT module with output capacitor.

The output impedance of the model of figure 4.8 is equivalent to that of a resistor in

parallel with a capacitor, since a linearized ideal power source has a resistive small-signal

characteristic. Respecting the reference current directions of figure 4.8 and disregarding

the dynamics of the capacitor,

Vo + vo =−PIp + ip

≈ Vo +P

I2o︸︷︷︸

Req

ip.


It can be shown that the Zout of equation (4.5) is models the ideal DMPPT module of

figure 4.8:

Zout(s) =Vo

ILD′ + C2Vos

=1

ILVo

VsVo

+ C2s

=V 2o

ILVs|| 1

C2s

=V 2o

P︸︷︷︸Req

|| 1

C2s︸︷︷︸C2

.

Wide bandwidth assumption In deriving equation (4.5), it was assumed that the

(undesigned) compensator was ideal, in the sense that the loop gain |G22K| 1. In any

real control system, however, the loop gain must roll off at some frequency. In order for

equation (4.4) to hold, the loop gain need only remain high until the transfer functions

G12 and G21 roll off.

Intuitively speaking, the assumption |G22K| 1 is tantamount to modeling the

DMPPT module as in figure 4.8. Above the corner frequency ω = ReqC2, the capacitor

dominates the module’s output impedance. For the model of equation (4.5) to be valid,

only below the corner frequency must the loop gain be sufficiently high that the DMPPT

module resembles an ideal power source.

4.2.3 Simplifying the series output impedances

The load impedance of equation (4.1) contains two terms: the output impedance of n−1

DMPPT modules in series, and the inverter impedance.

As we have shown, the output impedance of a single DMPPT module resembles a

resistor Req = PI2string

in parallel with the capacitor C2. The output impedances of several

modules in a hypothetical string are shown in figure 4.9a.

Since every module in the string has an identical output capacitor, their impedances

appear the same at high frequency. Furthermore, since all modules share a common


−40

−20

0

20

40

Magnitude (

dB

)

101

102

103

104

105

−90

−45

0

Phase (

deg)

Frequency (Hz)

300 W

50 W

100 W

(a)

−10

0

10

20

30

40

Magnitude (

dB

)

101

102

103

104

105

−90

−45

0

Phase (

deg)

Frequency (Hz)

sum

approximation

(b)

Figure 4.9: (a) Output impedances Zout of modules sharing a common string current, (b)worst case approximation error of

∑6 Zout,k in Monte Carlo experiments.

string current, the corner frequency ω = ReqC2 depends only on the module power.

The fact that the output impedances of modules in a string will have similar corner

frequencies prompts us to make the following simplification:

n∑k 6=i

Zout,k =n∑k 6=i

(Pk

I2string

|| 1

C2s

)≈∑n

k 6=i Pk

I2string

|| n− 1

C2s. (4.6)

Equation (4.6) approximates the sum of several first order transfer functions (with similar

corner frequencies) by a single first order transfer function. This approximation derives

from the “algebra on the graph” technique used to estimate circuit transfer functions [10].

A Monte Carlo experiment was run to determine a worst case approximation error for

six modules with their powers ranging from 50 W to 300 W. The worst approximation

result in 1000 experiments is shown in figure 4.9b; the approximation remains good.


4.2.4 Neglecting the inverter dynamics

It is common practice in the literature to model the inverter as a voltage source with

sinusoidal disturbance component [21, 33], neglecting its dynamics. In the case of dis-

tributed MPPT, the impedance of the load (equation (4.1)) is comprised of two terms,

the inverter impedance and the impedances of the neighboring modules. In this section,

we will demonstrate that the inverter output impedance is much smaller in magnitude

than the second term.

A simplified expression for the combined impedance of the neighboring modules is

given by equation (4.6). The output characteristic of the inverter is given by figure 3.8

and equation (3.19). Neglecting, for the moment, the additive sinusoidal disturbance of

figure 3.8, the inverter impedance is

Zinv(s) =Vdcs

CinvVdcs2 + (kP − Istring)s+ kI. (4.7)

Equation (4.7) is a function of the string current, which is proportional to the total

system power, Istring = ΣPk

Vdc. The impedance of the neighboring modules is likewise a

function of the string current and the power of the n− 1 neighboring modules.

At low frequencies, the origin zero of equation (4.7) makes the inverter’s output

impedance small; intuitively, this is the action of the outer loop controller, which seeks

to make the inverter resemble an ideal voltage source. At high frequencies, the inverter’s

output impedance is dominated by the DC link capacitor. Since this capacitor is much

larger than the modules’ output capacitors (C2), at high frequency the inverter impedance

is negligible relative to that of the neighboring modules1.

Figure 4.10a shows the Bode plot of Zload,eq, Zinv and the simplified∑n

k 6=i Zout,k under

typical operating conditions. The irradiance is G = 800 W/m2 uniformly across all

1At sufficiently high frequencies, an electrolytic capacitor’s equivalent series inductance will beginto dominate its frequency response [51]. However, we assume that the inverter is designed to have lowimpedance in the frequency range of interest.


panels, there are n = 6 panels in the string, and every panel operates at its MPP. The

contribution of Zinv to Zload,eq is small, noticeable on the plot only near the poles of Zinv.

Figure 4.10b shows the same Bode plot under operating conditions contrived to maximize

the contribution of Zinv to Zload,eq. This “worst case” condition occurs when the string

current is maximum, which maximizes the peak magnitude of Zinv while minimizing the

low frequency magnitude of∑n

k 6=i Zout,k. Even so, the contribution of Zinv to Zload,eq

remains modest.

−40

−20

0

20

40

60

Magnitude (

dB

)

10−1

100

101

102

103

104

−90

−45

0

45

90

Phase (

deg)

Frequency (Hz)

Zinv

Zload,eq

Zout,kΣ

(a)

−40

−20

0

20

40

Magnitude (

dB

)

10−1

100

101

102

103

104

105

−90

−45

0

45

90

Phase (

deg)

Frequency (Hz)

Zinv

Zload,eq

Zout,kΣ

(b)

Figure 4.10: The load impedance and its constituent terms: (a) typical operating condi-tions, (b) worst-case operating conditions.

We will therefore neglect the dynamics (Zinv) of the inverter in the simplified load

model. Our final expression for the load model is thus

Zload,eq = Zinv +n∑k 6=i

Zout,k ≈∑n

k 6=i Pk

I2string︸︷︷︸Rload

|| n− 1

C2s︸︷︷︸Cload

. (4.8)

However, the sinusoidal disturbance of figure 3.8 cannot be neglected. The inverter

produces a 120 Hz disturbance, which appears additively in the linearized model. Since

the sinusoid is an eigenfunction of any linear time-invariant system, we can model this


effect as an additive disturbance to the load current. Since the inverter is nonlinear, the

disturbance current will also have frequency content at harmonics of 120 Hz [22].

In the following section, this periodic disturbance current is encompassed in the dis-

turbance input id.

4.3 Plant Model

The final plant model is obtained by terminating the output port of the panel source

converter, equation (4.2), with the simplified load, equation (4.8). In the absence of

disturbances, the small-signal linearized model of the panel is the resistor Rpv, while that

of the load is the parallel combination of capacitor Cload and resistor Rload. Figure 4.11

shows the small-signal schematic of the linear plant model.

~

Cload Rloadid

C2

Switch

network

~d'

C1Rpv

L

LoadPanel

~ipv

Figure 4.11: Small-signal schematic of plant model.

The model has state x = (vC1 , iL, vC2), control signal u = d′ and disturbance w =(ipv id

); the output of interest is the panel voltage vs. The model is

C1 0 0

0 L 0

0 0 C2 + Cload

︸︷︷︸

Keq

x =

− 1Rpv

−1 0

1 0 −D′

0 D′ − 1Rload

︸︷︷︸

KeqA

x+

0

−VC2

IL

︸︷︷︸

KeqBu

u+

1 0

0 0

0 −1

︸︷︷︸

KeqBw

w

y =

[1 0 0

]︸︷︷︸

C

x.

(4.9)


4.3.1 Uncertain parameters

The linearized dynamical model of equation (4.9) is a function of parameters R−1pv , IL,

D′, VC2 , R−1load and Cload, which vary with the system’s operating conditions.

Define the parameter vector pM = (R−1pv , IL,D

′, VC2 , R−1load, Cload). Our objective is to

define a set P ⊂ R6 such that, in all conceivable circumstances, the DMPPT module’s

parameters pM lie in P . The compensator must be robust to uncertainty of pM within

P , which we call the parameter uncertainty set. The set P should not be conservative:

The larger the uncertainty, the more difficult the control design problem [52].

In order to define P , the designer must consider the constraints on a DMPPTmodule’s

operation, making assumptions as necessary. The operating constraints considered will

likely include

• an assumed upper bound on panel irradiance, G ∈ [0, Gmax],

• an assumed range of panel operating temperatures, T ∈ [Tmin, Tmax],

• the range of permissible conversion ratios, M ∈ [Mmin,Mmax],

• the range of permissible panel reference voltages, Vs ∈ [Vs,min, Vs,max],

• the range of possible output voltage, Vo ∈ [Vo,min, Vo,max],

• the limits of continuous conduction mode operation, and

• the expected number of modules per string, n ∈ [nmin, nmax].

The constraints should fully encompass the DMPPT module’s potential operating con-

ditions, while keeping conservatism to a minimum.

The remainder of this section illustrates the process of defining the parameter uncer-

tainty set for our running example.


4.3.1.1 Converter and panel uncertainty

The parameters R−1pv , IL, D′, and VC2 of the a DMPPT module can be fully characterized

as functions of panel irradiance G, panel temperature T , panel voltage Vs, and output

voltage Vo. Let pM1 = (R−1pv , IL, D

′, VC2).

Together G, T and Vs establish the operating point of the panel. The incremental

resistance Rpv and panel current Is are calculated from equations (3.7) and (3.8). At

equilibrium, the inductor current IL is equal to Is.

The equilibrium duty ratio of the boost converter is D′ = VsVo, and the equilibrium

VC2 = Vo.

Constraints on G, Vs and Vo for the example installation are presented in table 4.1.

The CCM mode boundary from chapter 3 is expressed as a constraint on IL, which is a

function of (G, T, Vs). For simplicity, we will assume a constant operating temperature;

doing so allows us to visualize the constraint set as a region in 3D. Temperature bounds

could easily be accommodated in section (a) of table 4.1.

Table 4.1: Constraint equationsConstraint equation Description

(a)

0 < G ≤ 1250W/m2 Assumed maximum is 25% higher than STC conditions

28.2 V ≤ Vs ≤ 31.1 VMinimum tracker command voltage is 0.5 V below theMPP voltage corresponding to IL,minMaximum tracker command voltage is 0.5 V greaterthan Vmpp at 1250W/m2

0 < Vo ≤ 100 V Constrained by the rated voltage of the switches andoutput capacitor

(b) Vs ≤ Vo ≤ 3VsFor the boost converter, M ≥ 1

For efficiency reasons, we constrain M ≤ 3

(c) Vs ≤ Voc(G)Maximum (open circuit) panel voltage is a function ofG

(d) IL ≥ IL,minAssumed boundary for standard operation incontinuous conduction mode


G

Vs

Vo

(a)G

Vs

Vo

(b)G

Vs

Vo

(c)

G

Vs

Vo

(d)

Figure 4.12: Uncertainty region of the converter and panel in terms of high-level param-eters: (a) physical constraints, (b) boost ratio constraints, (c) panel constraints, (d) allconstraints.

The function Voc(·) can be approximated accurately by [43]

Voc(G) ≈ n

(akT

q

)ln

(αG

Io+ 1

), (4.10)

the variables of which are defined in section §3.3.

Assuming a constant STC temperature of 25°C, figure 4.12d illustrates the permissible

operating points of the module in (G, Vs, Vo) coordinates. The volume of figure 4.12d

was obtained by intersecting figures 4.12a, 4.12b and 4.12c, each of which depicts the

corresponding constraint equations from table 4.1. The constraint on IL is not depicted.


4.3.1.2 Load uncertainty

The parameters Rload and Cload of the ith module depend almost exclusively on the

remaining n − 1 modules. As they are nearly independent of pM1, Rload and Cload can

be treated separately without introducing conservatism. Let pM2 = (R−1load, Cload). If

pM1 ∈ P1 and pM2 ∈ P2, the module parameter uncertainty set P is generated by taking

the Cartesian product P = P1 × P2.

Observing that Istring = ΣkPk

Vdc, from equation (4.8) we derive the expressions

Rload =

∑nk 6=i Pk

I2string

=

∑nk 6=i Pk

(∑

k Pk)2V

2dc

Cload =C2

n− 1.

(4.11)

The apparent load capacitance, Cload, depends only on the number of modules n. Since

the total power∑

k Pk does depends on the power of the ith module, the range of Rload

is a weak function of Vs and IL. However, the conservatism introduced by ignoring this

dependence and treating Rload separately from the remaining parameters is negligible.

Treatment of load capacitor When equation (4.9) is expressed in standard state

space form, x = Ax+Buu+Bww, Cload is the only parameter to enter through Keq, and

renders the model nonlinear it its parameters. Such multiplicative nonlinearity can be

accommodated in the control design [53,54], but at the expense of additional conservatism

at the uncertainty modeling stage.

In the small-signal model shown in figure 4.11, Cload appears in parallel with the

converter output capacitor C2. The equivalent output capacitor is

Ceq = C2 + Cload =n

n− 1C2.

The DMPPT modules in our sample installation must function in a string of six to ten

modules; Ceq can be between 1.11 and 1.2 times C2. Since the plant model has been found


to show little sensitivity to slight differences in Ceq, we will neglect it in our uncertainty

model and simply take Cload = 0.15 × C2 = 6µF. The performance of the compensator

will be verified over the proper range of Ceq in chapter 5.

Should the designer wish to model Cload explicitly for uncertainty in n, methods of

accommodating the multiplicative nonlinearity are discussed in [53,55] and in [54].

Treatment of load resistor We seek the minimum and maximum possible values of

Rload under standard operating conditions. Let the module in question be the ith in a

string of n modules.

From equation (4.11), minimum Rload occurs when every panel in the string outputs its

maximum possible power. This maximum power corresponds to the assumed maximum

irradiance from table 4.1; we have Pmax = 300 W when G = 1250 W/m2. Maximum

Rload will occur when the string current is minimum. Under the operating conditions of

table 4.1, the ith module must have IL ≥ 1.18 A and M ≤ 3; it follows that Istring ≥13IL,min . The total string power is

∑k Pk = VdcIstring. The maximum Rload is thus given

by

max (Rload) =Vdc(

13IL,min

)− IL,minVs,min(

13IL,min

)2 ,

which is independent of n.

Table 4.2 gives the values of Cload and the uncertainty range of Rload, for n between

six and ten. We will design the compensator to be robust to Rload in the union of these

intervals, Rload ∈ [48 Ω, 801 Ω].

Table 4.2: Load parameter uncertaintyn Cload min(Rload) max(Rload)

6 8.00 µF 74.1 Ω 801Ω

7 6.67 µF 65.3 Ω 801Ω

8 5.71 µF 58.3 Ω 801Ω

9 5.00 µF 52.7 Ω 801Ω

10 4.44 µF 48.0 Ω 801Ω


4.3.2 Disturbances

Disturbance currents ipv and id model perturbations in the panel current and string

current respectively.

4.3.2.1 Panel disturbance

In section §3.3, ipv is shown to arise from fluctuations in G and T away from the values

about which the panel was linearized. Practically speaking, these changes are known

to occur slowly relative to the dynamics of the system. A study performed by the

Electric Power Research Institute [56] measured the rate of irradiance change due to

cloud passages, and report values between 60 and 150 W/m2/s. Changes in G due to

changing reflections or shading patterns are likely to be slower.

To give a rough estimate of the system dynamics, the 5% settling time of the controlled

DMPPT system in chapter 5 ranges from 0.2 to 30 ms. The constant kGki

in equation (3.8)

is approximately equal to α ≈ 8 × 10−3 (table 3.2); in the space of 10 ms, we expect∣∣ipv∣∣ < 12 mA.

Temperature changes occur cyclically over the course of the day; the panel temper-

ature will also change in response to a change in irradiance. These changes occur on a

slower timescale than changes in G.

We will assume that ipv can be modeled as a constant disturbance of comparatively

small magnitude.

4.3.2.2 String current disturbance

The string disturbance id will contain a constant component, as Istring changes with the

total output power of the system. The inverter contributes a current disturbance with

frequency content at 120 Hz and its harmonics. Since the DMPPT modules are coupled

through the common string current, the transient behavior of neighboring modules also

contributes to id.

Chapter 5

Compensator Design

The double loop control design problem of figure 4.2 should be approached in two stages.

In this chapter, we sever the outer ESC loop and design the compensator to ensure the

stability and performance of the inner loop alone.

The justification for severing the outer loop comes from the control literature. Let

Σ denote the system from vref to p in figure 4.2, the dynamics of which depend on

the inner closed loop. This Σ is the ESC’s plant. The stability of Σ is a necessary

condition for most, if not all, extremum seeking controllers [17–19]. Since extremum

seeking algorithms are based on a separation of time scales, intuitively, the ESC must

“wait” for the transients of Σ to settle. The settling time of Σ limits the convergence rate

of the ESC.

This chapter describes a procedure for micro-converter compensator design that takes

parameter uncertainty into account. The inner control loop must guarantee robust stabil-

ity, ensure rapid settling times, and enforce the assumption of weak inter-module coupling

from chapter 4.

55

Chapter 5. Compensator Design 56

5.1 Robust Control

The design of a SISO compensator for the DMPPT module of figure 4.1 is in essence

a nonlinear servomechanism problem with robustness and disturbance rejection require-

ments. This is in general an unsolved problem. The plant uncertainty in the nonlinear

model arises from the panel’s unknown I-V characteristic and the uncertain nature of the

load. Recall from chapter 4 that a module’s load is the rest of the DMPPT system, as

seen from that module’s output port. Disturbances result from real-time changes in the

panel and load characteristics.

Although power electronic devices are nonlinear, they are often controlled by linear

controllers. As speed and low power consumption are compulsory, the simplicity of a

linear controller makes it the best choice for many applications [10]. Linear controllers

are effective, provided that the system does not deviate too far from the equilibrium at

which the controller was designed.

In chapter 4, we derived a linearized model of the DMPPT module together with a

simplified load. This model is parametrized by the vector

pM = (R−1pv , IL,D

′, VC2 , R−1load, Cload).

Parameters R−1pv , R

−1load and Cload describe our uncertainty about the panel and load char-

acteristics in the nonlinear system. Parameters IL, D′ and VC2 describe the equilibrium

point at which the micro-converter was linearized; our uncertainty in these parameters

arises from the linearization of a nonlinear system. Disturbances resulting from panel

and load changes are modeled by ipv and id.

The compensator that we design must be robust to uncertainty in pM ∈ P , the

boundaries of which were defined in section §4.3.1. However, pM is not only uncertain; it

is actually time-varying. Over the course of normal operation, changes in the reference

voltage, string current, and irradiance will cause both the converter equilibrium and the


characteristics of the panel and load to vary.

We will use tools from both robust and linear parameter-varying (LPV) control theory

in our approach. The output regulation of nonlinear systems under different operating

conditions is a common application of LPV [54, 57]. Furthermore, this class of methods

has successfully been applied to nonlinear power converters; see for example [53,55,58].

Control design will be performed in a linear matrix inequality (LMI) framework, in

which control objectives are expressed as a constrained linear optimization problem and

solved for numerically by efficient algorithms. This is an appealing approach to the

DMPPT compensator problem for several reasons.

• The LMI framework provides flexibility in specifying control objectives; it is possible

to mix H2, H∞, and pole-placement objectives [59].

• LMIs accommodate complex, highly structured descriptions of parametric uncer-

tainty.

• LMIs are used in LPV control design. Design techniques exist that will guarantee

stability for arbitrarily fast variations of pM within the parameter uncertainty set

P [54].

5.1.1 Theoretical background

This section briefly introduces key theorems of LMI robust control and LPV system

theory. The notation used in this section is independent of that used in the remainder of

the thesis.

5.1.1.1 Linear matrix inequalities

An excellent, practical introduction to the use of LMIs in control design can be found

in [52].

Consider the linear time-invariant system


x(t) = Ax(t) +Buu(t) +Bww(t)

z(t) = Cx(t) +Duu(t) +Dww(t),

(5.1)

where x(t) ∈ Rn, u(t) ∈ Rm, w(t) ∈ R, z(t) ∈ R are defined for t ≥ 0 and A, Bu, Bw,

C, Du, Dw are constant matrices of appropriate dimension. For simplicity, we assume a

scalar disturbance w and output z.

Let u(t) = Fx(t) be a state feedback control law for system (5.1). Define the closed

loop system

x(t) = Aclx(t) +Bww(t)

z(t) = Cclx(t) +Dww(t),

(5.2)

where Acl = A+BuF and Ccl = C +DuF .

If M is a square matrix, we write M < 0 if M is negative definite.

Theorem 1 (Lyapunov). The origin x = 0 of system (5.2) is exponentially stable if and

only if there exists a positive definite matrix P such that

ATclP + PAcl < 0. (5.3)

Theorem 2. System (5.1) can be rendered stable by linear state feedback if and only if

there exist a positive definite matrix W and a matrix Y such that

AW +WAT +BuY + Y TBTu < 0. (5.4)

In this case a linear state feedback controller that stabilizes (5.1) is given by u = Fx with

F = YW−1.

If we let P = W−1, the proof of theorem 2 follows immediately from theorem 1.

Condition (5.4) is stated in terms ofW and Y , rather than P and F , so that the resulting

inequality is linear in its matrix variables. The remaining theorems will be stated in the


“control design” form of theorem 2.

Pole placement LMIs were first presented in [59]. The following is a simplified state-

ment of a more general theorem proven in that paper.

Consider the region of the complex plane D = a+ jb | a < −α, |a+ jb| < ρ where

α, ρ are positive constants. We say that system (5.1) is D-stabilizable if there exists an

F such that all of the eigenvalues of Acl lie in D.

Theorem 3. System (5.1) is D-stabilizable if and only if there exist a positive definite

matrix W and a matrix Y such that

AW +WAT +BuY + Y TBTu + 2αW < 0 −ρW WAT + Y TBu

AW +BuY −ρW

< 0.(5.5)

In this case a feedback controller is given by u = Fx with F = YW−1.

The H∞ norm of a transfer function T (s) is defined as ‖T‖∞ = maxω |T (jω)|. The

following theorem [60] guarantees a maximum H∞ norm on the transfer function Twz(s)

from w to z in system (5.1).

Theorem 4. Given γ > 0, system (5.1) can be rendered stable by state feedback, with

‖Twz‖∞ < γ, if and only if there exist a positive definite matrix W and a matrix Y such

that AW +WAT +BuY + Y TBT

u Bw WCT + Y TDTu

BTw −γI Dw

CW +DuY Dw −γI

< 0. (5.6)

In this case, a feedback controller is given by u = Fx with F = YW−1.

The satisfaction of either the pole placement or H∞ LMI guarantees system stability.

It is easy to show that matrices W and Y satisfying (5.5) or (5.6) will also satisfy (5.4).


To synthesize a controller satisfying the H∞ performance and pole placement con-

straints, LMIs (5.5) and (5.6) are solved simultaneously. It should be noted that the

existence of W and Y satisfying both LMIs is a sufficient, but not a necessary, condition

for the existence of a linear state feedback controller with the desired performance. This

design procedure will therefore be somewhat conservative [59].

5.1.1.2 Linear parameter-varying systems

Many important results of LPV system theory are presented and explained in [54]. Unless

otherwise noted, definitions and theorems in this section are adapted from [54].

Definition 1. A linear parameter-varying system has the form

x (t) = A (p(t))x(t), (5.7)

where t ∈ [0,∞), x(t) ∈ Rn, and A(·) is a continuous matrix-valued function of dimension

n × n. The parameter vector p(·) is a piecewise-continuous function with the property

that p(t) ∈ P ⊂ Rq for all nonegative t, where P is a compact subset of Rq .

The existence and uniqueness of solutions to equation (5.7) are established in [54].

Definition 2. The matrix function A(·) is said to be quadratically stable in P if there

exists a positive definite matrix P ∈ Rn×n such that for all p ∈ P,

A (p)T P + PA (p) < 0. (5.8)

Theorem 5. If A(·) is quadratically stable in P, then the origin of system (5.7) is

exponentially stable.

The proof is presented in [54]. Theorem 5 gives a sufficient condition for an LPV

system to be stable for arbitrarily fast changes of p within P .


Now, consider a system of the form

x (t) = A (p(t))x(t) +B (p(t))u (t) , (5.9)

where u(t) ∈ Rm is the control input and A(·) and B(·) are continuous matrix functions

of suitable dimension.

Definition 3. The matrix pair (A(·), B(·)) is quadratically stabilizable in P by state

feedback if there exist a positive definite matrix W and a matrix Y such that, for all

p ∈ P,

A(p)W +WA(p)T +Bu(p)Y + Y TBu(p)T < 0. (5.10)

If W and Y are found to satisfy inequality (5.10), it can be verified that the feedback

u = Fx with F = YW−1 renders (A (·) +B (·)F ) quadratically stable in P . It has been

shown that one can find a parameter dependent F (·), such that (A (·) +B (·)F (·)) is

quadratically stable in P only if (A(·), B(·)) is quadratically stabilizable by static state

feedback [61].

For a matrix function A(·) to be quadratically stable in a non-finite set P , the Lya-

punov stability condition (5.8) must be satisfied at an infinite number of points. There

is a special class of matrix functions for which quadratic stability can be demonstrated

by satisfying a finite number of LMIs.

Definition 4. Matrix function A(·) is said to be polytopic if A(p) takes values in a fixed

polytope of matrices with vertices A1, . . . , Ak, i.e., for all p ∈ P ,

A(p) ∈ Co A1, . . . , Ak :=

k∑i=1

αiAi : αi ≥ 0,k∑i−1

αi = 1

.

Theorem 6. A polytopic A(·) is quadratically stable if and only if there exists a positive

definite P such that

ATi P + PAi < 0, i = 1, . . . k. (5.11)


To study system (5.9), we introduce the concept of polytopic covering [54,62].

Definition 5. Consider a set S1, . . . , Sk of n by n+m matrices. The set S1, . . . , Sk

is a polytopic covering of the matrix pair (A(·), B(·)) over P if, for all p ∈ P,

[A(p) B(p)

]∈ Co S1, . . . , Sk .

Polytopic covering provides a practical test for the exponential stability of an LPV

system. Consider a candidate feedback controller u = Fx for system (5.9), and let

S1, . . . , Sk be a polytopic covering of (A(·), B(·)) in (5.9). We can construct a polytopic

matrix function from S1, . . . , Sk and the feedback matrix F . The quadratic stability of

this matrix function is a sufficient condition for the exponential stability of system (5.9).

5.2 Polytopic Covering

Equation (4.9) implies a mapping from the parameter uncertainty vector pM to a state

space model described by system matrix S = [ A Bu Bw ]. We define the uncertainty

set U as the image of P under the implied mapping from pM to S.

To obtain a polytopic covering for our DMPPT system (4.9), we require vertices

S1, . . . , Sk such that Co S1, . . . , Sk ⊃ U . We would like for the covering not to be

too conservative; i.e., Co S1, . . . , Sk\U should be small. At the same time, since the

number of LMIs that must be solved simultaneously is proportional to k, we prefer that

k be small.

Recall that the system matrices S ∈ U are affine linear functions of the parameter

vector pM = (R−1pv , IL,D

′, VC2 , R−1load, Cload). If Q = p1, . . . , pk is a finite set of points

such that Co p1, . . . , pk ⊃ P , by linearity it must be that Co m(p1), . . . ,m(pk) ⊃ U .

Our problem is thus reduced to a geometric one: We must find a vertex set Q in R6 such

that CoQ ⊃ P . We will call such a Q a polytopic covering of P .


The proposed approach to finding Q is numerical. A very large but finite number of

points in P will be used for computation in place of P itself. Although using a finite

number of points is not ideal, the smooth shape of P reassures us that no part will

inadvertently be “left out” of the covering.

Procedures for obtaining a polytopic covering of U without resorting to numerical

techniques are provided in [63] and [62]. However, these procedures assume a hyperrect-

angular P and a generic nonlinear mapping from pM to S, which renders them cumber-

some to adapt to our problem.

5.2.1 Covering the module parameter uncertainty set

In was shown in section §4.3.1 that the parameters R−1pv , D′, VC2 , and IL were effectively

independent of R−1load and Cload. As previously, let pM1 = (R−1

pv , IL,D′, VC2) ∈ P1 and

pM2 = (R−1load, Cload) ∈ P2, where P = P1 × P2. Let Q1 and Q2 be polytopic coverings of

P1 and P2 respectively. Then Q1 × Q2 is a polytopic covering of P . This approach to

covering is no more conservative than covering P directly.

5.2.1.1 Covering P1

We wish to generate a polytopic covering of P1 using k1 vertices. For a given k1, how do

we find the optimal vertex set?

We define the optimalQ1 as the k1-vertex polytope having the smallest possible hyper-

volume while still covering P1. Hypervolume is a surrogate measure of the conservatism

of the covering. Since some parameter vectors pM1 yield more problematic plants than

others, the effect of conservative covering may be more detrimenal for control design in

some regions than in others [52]. As we do not know where “problem regions” might lie,

our chosen measure of optimality weights all regions equally.

The hypervolume of a given polytope in arbitrary dimensional space can be found

using the quickhull algorithm [64], software for which is freely available.


The problem of finding the optimal covering polytope in four dimensions is a difficult

one. To simplify it, we will seek an optimal prismatic polytope oriented along the

parameter axes. In four dimensions, a prismatic polytope is the Cartesian product of

two two-dimensional polygons. The polytope is convex if its “bases” are convex. This

higher dimensional analogy of a prism is sometimes referred to as a “proprism” [65].

Figure 5.1 shows the projection of P1 onto its six 2D coordinate planes. An optimal

convex polygon covering of each of these shapes is found using the algorithm described

in appendix §C.2.

Three different prismatic polytopes can be generated from the resulting six convex

polygons. Of the three, the polytope generated by the Cartesian product of the (R−1pv , IL)

and (D′, Vo) polygons has the smallest hypervolume.

IL

D'

Vo

0

10

0

0

50

100

0.5

1

0

0

50

100

0.5

1

0

50

100

IL D'Rpv-1

0 0.2 0.4

0 0.2 0.4

0 0.2 0.4

0 10

0 10

0 0.5 1

Figure 5.1: Projection of P1 ⊂ R4 into its 2D coordinate planes.

Table 5.1 analyzes the quality of the proposed covering. The hypervolume of the

convex hull of P1 represents a lower bound on the achievable hypervolume of Q1, since

the optimal 4D covering of P1 converges to the convex hull as the number of vertices


Table 5.1: Polytopic coveringCovering Volume Ratio

4D, ideal 15.2 1

2D Cartesian product, ideal 20.0 1.3

2D Cartesian product, actual 21.6 1.4

Hyperrectangle 141.8 9.3

approaches infinity. The best achievable prismatic covering has a hypervolume equal

to the product of the areas of the convex hulls of the (R−1pv , IL) and (D′, Vo) shapes of

figure 5.1. Four and five points were used to cover the (R−1pv , IL) and (D′, Vo) shapes

respectively, for a total of twenty vertices in Q1. The resulting polytopic covering has a

hypervolume only 1.4 times that of the lower bound.

By comparison, the simplest approach to polytopic covering is to cover the uncertainty

set with a hyperrectangle. We can do this by finding the minimum and maximum values

of each parameter of pM1 over P1, and combining them to form 24 vertices. This approach,

which is used in [53], results in a more conservative covering as shown in table 5.1.

5.2.1.2 Covering P2

Covering P2 is much simpler. Since we approximate Cload as fixed, we need only consider

the uncertainty interval of R−1load. The vertex set Q2 contains only two elements.

Taking the Cartesian product Q = Q1 × Q2 yields a polytopic covering of P using

forty vertices.

5.3 Control Synthesis

The specifications for the DMPPT module’s inner loop controller are formally stated

and discussed below. The reader should refer to figure 5.2, a block diagram of the

compensated DMPPT module with the ESC loop severed.

Specifications 1 - 5 concern robust performance; the closed loop system must meet


vs

Converter

PV

is

d'

vo

Load

io

Compensator

−

Vrefe

vs

Figure 5.2: DMPPT module with severed ESC loop.

these specifications for any pM ∈ P of the parametrized uncertain system (4.9). The final

specification concerns the stability of the system in the linear parameter-varying sense.

Specification 1 (Reference tracking). The panel voltage vs must asymptotically track a

constant voltage reference Vref .

The reference signal generated by the MPP tracker will, of course, be time-varying.

However, the satisfaction of this objective guarantees the existence of an extremum seek-

ing controller for the outer loop [17].

Specification 2 (Minimize settling time). Given the satisfaction of all other objectives,

the real part of the slowest eigenvalue of the closed-loop system should be minimized.

The time constant τ with which vs converges to Vref limits the rate of convergence of

the maximum power point tracker. The settling time of vs should be as short as possible

to ensure effective power harvesting under changing light conditions.

Specification 3 (Disturbance rejection). Let γd be a positive constant. The magnitude

of the transfer function Tidvs(s) from id to vs should be H∞ norm bounded; ‖Tidvs‖∞ < γd.

Furthermore, Tidvs(0) should be zero.


The module must reject the string current disturbance id. Good disturbance rejection

is imperative to ensure that inter-module coupling is weak and to minimize the 120 Hz

ripple in the panel voltage. An appropriate value for the performance parameter γd is

determined in the next section.

Specification 4 (Bandlimit the control input). The transfer functions Tidd′(s), from id

to d′, and Tvrefd′(s), from vref to d′, must roll off at or before f = 110fs.

The boost converter model derived in section §3.2 neglects the switching nature of

the converter. Since the averaged model is inaccurate above 12fs, the control signal d′

should be bandlimited with cutoff frequency below 12fs. It is common practice in power

electronic design to roll off the control signal at 110fs [10].

Specification 5 (Limit the control effort). The transfer functions Tidd′(s) and Tvrefd′(s)

should be H∞ norm bounded by positive constants γc1 and γc2 respectively.

The control signal d′ has unmodeled saturation limits at 0 and 1. The controller

design should ensure loop gains sufficiently modest to avoid saturating the control input.

Appropriate values for performance parameters γc1 and γc2 are determined in the next

section.

Specification 6 (Quadratic stability). The closed loop matrix Acl(pM) should be quadrat-

ically stable over P.

Although specification (3) guarantees the stability of the closed loop system at every

fixed pM ∈ P , a stronger condition is necessary for the stability of the LPV system.

5.3.1 Controller structure

The structure of the proposed controller is integral control with full state feedback, il-

lustrated in figure 5.3. State feedback is appropriate for this design since the converter

state (VC1 , IL, VC2) is fully sensed. The input voltage VC1and inductor current IL must be


measured for maximum power point tracking. It is customary to place the current sensor

to measure IL, rather than the panel current directly, because inductor current monitor-

ing for device protection is universal in commercial converters. The converter must also

sense the output voltage VC2 in order to protect its switches from overvoltages [7].

The integrator is necessary to meet the reference tracking and constant disturbance

rejection specifications 1 and 3. Integral control also ensures the rejection of the constant

disturbance ipv.

−

rukI

s

F

xC yx = Ax + Buu + Bww = + +

w

e uI

Figure 5.3: Integral control with full state feedback.

The plant model in figure 5.3 is system (4.9), in which A and Bu are functions of the

parameter pM . The system of figure 5.3 can be written as

x

e

=

A 0

−C 0

︸︷︷︸

Aaug

x

e

+

Bu

0

︸︷︷︸Bu,aug

u+

Bw

0

︸︷︷︸Bw,aug

w +

0

1

︸︷︷︸Bref

r

y =

[C 0

]︸︷︷︸

Caug

x

e

,(5.12)

where r = Vref and u = Fx+kIe. It is shown in appendix §A.4 that (Aaug(pM), Bu,aug(pM))

is controllable for all pM ∈ P . We must design the 1× 4 gain matrix Faug =

[F kI

]to satisfy the control objectives.


5.3.2 Linear matrix inequalities

Specifications 2-5 can be expressed in LMI form by applying theorem 3, theorem 4 and

definition 3. To guarantee that all of these objectives are met simultaneously, and for all

plants parametrized by pM ∈ P , it is sufficient to find W > 0 and Y that simultaneously

satisfy all LMIs below. In this case, the quadratic stability is automatically guaranteed.

Disturbance rejection Let z1 = y in figure 5.3. We impose an H∞ bound γd on the

magnitude of the transfer function from w = id to z1 = vs. We thus require matrices

W > 0 and Y such that, for all pi ∈ Q,

Aaug(pi)W +WAaug(pi)

T +Bu,aug(pi)Y + Y TBu,aug(pi)T Bw,aug WCT

aug

BTw,aug −γdI 0

CaugW 0 −γdI

< 0.

(5.13)

It remains to choose γd.

Although the frequency content of id is not known exactly, simulations demonstrate

that the inverter ripple dominates id. We select γd to ensure that the resulting panel

ripple voltage is less than 1% of Vs.

In sections §4.2.2 and §4.2.3, we showed that the string behaves as an ideal power

source at lower frequencies. Accordingly, the inverter ripple voltage can be found using

equation (3.12). A good estimate of the string current is thus

istring(t) =Pstringvstring(t)

=Pstring√

V 2dc −

Pstring

ωCinvsin 2ωt

.

Taking the Taylor series expansion about Istring =Pstring

Vdc, we obtain

istring(t) ≈ Istring +P 2string

2V 3dcωCinv

sin 2ωt.


If the system operates at full power Pstring = 2500 W, the ripple current magnitude is

0.285 A. Since Vs ≈ 30 V, we require γd < 1.

Limit the control effort Let z2 = u in figure 5.3, which physically represents d′. We

impose H∞ bounds γc1 and γc2 on the magnitudes of the transfer functions from the

load disturbance id to z2 = d′ and from r to z2, respectively. The control effort exerted

for disturbance rejection has been found in simulation to be much greater than that

exerted for reference tracking. To minimize the number of simultaneous LMIs that must

be solved, only γc1 will be considered. The LMI of theorem 4 is applied by substituting

Faug = YW−1 for C. For all pi ∈ Q, we require

Aaug(pi)W +WATaug(pi) +Bu,aug(pi)Y + Y TBT

u,aug(pi) Bw,aug Y T

BTw,aug −γc1I 0

Y 0 −γc1I

< 0. (5.14)

Again, it remains to choose γc1. This parameter should not be chosen too conservatively.

It has been found that the worst performance coincides with low power operation oper-

ation; in this case the inverter ripple current is likely to be much less than the 0.285 A

calculated. We will therefore design γc1 to keep the ripple on d′ to less than the absolute

worst case magnitude of 0.15, for which we require γc1 < 0.5.

Bandlimit the control input We will design indirectly for transfer function roll-off

before f = 110fs by constraining the magnitude of the system’s closed loop poles.

Consider a strictly proper, stable transfer function T (s) and a positive constant ρ.

Suppose that the poles of T (s) have magnitudes less than ρ. It is clear that if the

magnitudes of the zeroes of T (s) are also less than ρ, then |T (jω)| will roll off with a

minimum slope of -20 dB/dec beyond ω = ρ. In general, since T (s) is strictly proper, we

expect the upper envelope of |T (jω)| to decrease beyond ω > ρ.

Approximately bandlimiting the control input d′ by ensuring that the system closed-


loop poles have magnitudes less that ρ = 2π10fs is a common strategy in power electronic

design [66].

The closed-loop poles of strictly proper transfer functions Tidd′(s) and Tvrefd′(s) will

have magnitudes less than ρ if, for all pi ∈ Q,

−ρW WATaug(pi) + Y TBu,aug(pi)

Aaug(pi)W +Bu,aug(pi)Y −ρW

< 0. (5.15)

Since∥∥Tvrefd′∥∥∞ < γc1 and ‖Tidd′‖∞ is also bounded, transfer function roll-off beyond ρ

ensures upper bounds on∣∣Tvrefd′(jω)

∣∣ and |Tidd′(jω)| for all ω > πfs.

Minimize settling time The settling time of vs should be made as small as possible

while respecting the other constraints. We therefore wish to minimize α such that, for

all pi ∈ Q,

Aaug(pi)W +WATaug(pi) +Bu,aug(pi)Y + Y TBTu,aug(pi) + 2αW < 0. (5.16)

5.4 Practical Design Example

The controller was designed using MATLAB’s Robust Control Toolbox, which contains an

LMI toolset [62]. The toolset allows the user to enter LMIs in matrix form, automatically

converts these LMIs into a constrained linear optimization problem, and solves it using

an interior point algorithm.

The LMI toolset supports LMI feasibility and optimization problems. In a feasibility

problem, the algorithm determines whether the LMI constraints are feasible; i.e., it looks

for matrix variables (e.g., W, Y ) that satisfy the LMIs. In an optimization problem, a

linear function of the matrix variables is minimized subject to LMI constraints. A more

detailed explanation of LMI problems can be found in [52].

Although we would like to minimize α in LMI (5.16), α and W cannot both be


considered as variables or the inequality becomes bilinear. We must therefore choose a

constant α0 and solve the resulting LMI feasibility problem. The minimum α can be

found by performing a bisection search.

The small values of the inductances and capacitances in power electronics problems

are known to cause numerical difficulties in many algorithms. To circumvent these issues,

the normalization procedure recommended by Sira-Ramirez [37] is applied to the system

matrices.

5.4.1 Direct synthesis

When LMI constraints (5.13)-(5.16) are applied to each pi ∈ Q, a system of 160 LMIs

results. A 161th LMI is needed to express the constraint W > 0.

This LMI feasibility problem was not found to be solvable for any value of α0. The

direct synthesis procedure was repeated using a somewhat more conservative covering

with only 24 vertices; this problem too was found to be infeasible.

The failure of direct synthesis does not imply that no controller satisfying the spec-

ifications exists, as the design procedure is conservative. Possible remedies to this con-

servatism are discussed in section §5.5.

5.4.2 Single plant synthesis

We next attempt to meet the specifications by designing a controller explicitly for a single

plant. A single parameter vector pM0 ∈ P is chosen, and the direct synthesis procedure

is used to find a controller that meets specifications 1 - 5 for that particular plant. The

initial choice of pM0 is arbitrary, but should be near the “center” of P .

The resulting controller is then applied to the remaining plants in the uncertainty set,

and its performance is studied using a Monte Carlo approach. Several thousand plants

are chosen at random and tested to verify whether specifications 1 - 5 are met.

This process is repeated for different pM0 and α0. By trial and error, it was possible


to find a controller with satisfactory performance over the subset of P that excluded the

lowest values of IL < 2 A.

To satisfy specification 6, we must verify the quadratic stability of the closed-loop

system matrices. We require a matrix P > 0 such that, for all pi ∈ Q,

(Aaug(pi) +Bu,aug(pi)Faug)TP + P (Aaug(pi) +Bu,aug(pi)Faug) < 0. (5.17)

Quadratic stability could be shown for the subset of P that excluded IL < 2 A.

Although the trial and error procedure requires greater effort on the part of the

designer, finding the first satisfactory controller took no more than a few attempts.

5.4.3 Analysis of the obtained controller

The state feedback controller

Faug =

[−0.012 0.051 −0.007 616.5

]

was obtained by synthesizing a controller for the plant with parameters shown in table 5.2.

These parameters correspond to a DMPPT module operating at its maximum power

point with G = 1000 W/m2, a conversion ratio of two, and an equivalent load resistance

of 300 Ω. This choice of pM0 was found to work well by trial and error.

Table 5.2: Single plant synthesis parametersParameter Value

R−1pv 0.2504 Ω−1

IL 7.804 A

D′ 0.500

VC2 61.20 V

R−1load 0.0033 Ω−1

Cload 6 µF


Closed-loop performance was analyzed for 100,000 randomly generated plants in U .

Each plant was obtained by randomly selecting (G, Vs, Vo) satisfying the constraints in

table 4.1, an n ∈ 6, 7, 8, 9, 10, and Rload according to table 4.2. Performance metrics

were computed for each plant.

5.4.3.1 Specifications and performance metrics

Disturbance rejection Specification 3, ‖Tidvs‖∞ < γd = 1, was met for all plants

tested. Values of ‖Tidvs‖∞ ranged from 0.0001 to 0.8.

Control effort Specification 5, ‖Tidd′‖∞ < γc1 = 0.5, was not met for all plants.

Values of ‖Tidd′‖∞ ranged from 0.066 to 0.78. However, plants that failed this test were

concentrated in one region of U ; the test was passed by all plants having IL > 1.94 A.

Bandlimit The magnitude of the closed loop eigenvalues of all plants tested was smaller

than ρ = 2π10fs, as requried. To verify that specification 4 was indeed met, the roll-off of

transfer function Tidd′(s) beyond ω = ρ was tested for each plant.

The transfer function Ttest(s) = γc1ρs

was constructed, for which |Ttest(jρ)| = γc1.

The roll-off condition is |Tidd′(jω)| < |Ttest(jω)| for all ω > ρ, which must hold if

‖Tidd′/Ttest‖∞ < 1 . This was found to be the case, with computed H∞ norms rang-

ing from 1.9×10−3 to 9.5×10−3.

Settling time The real part of the slowest closed loop eigenvalue ranged from

-127 s−1 to -8930 s−1. If we suppose that this slow pole dominates the system response,

this corresponds to worst and best case 10% settling times of 18 ms and 0.26 ms, in the

absence of disturbances.

The location of the slow pole can be partially explained by considering the structure

of the system. Recall that the unaugmented plant shown in figure 5.3 is modeled by

equation (4.9). Its open loop transfer function, from u = d′ to y = vs, can be shown to


have a single, minimum-phase zero at

z =ILD

′ + VoR−1load

C2Vo.

Sever the integral control loop of figure 5.3 and let P (s) be the transfer function from uI

to y:

P (s) = C (sI − (A+BuF ))−1Bu.

The poles of system (4.9) are moved by the state feedback u = Fx. However, state

feedback has no effect on the position of the system zero [50], so z is also a zero of P (s)1.

Consider the closed-loop pole locations of the full system of figure 5.3 for a fixed F .

By root locus, as the integral gain kI approaches infinity, one of the closed-loop poles

approaches z. If kI is “high”, we expect to find a closed-loop pole close to z.

Figure 5.4 shows a scatterplot of the open-loop zero location versus the real part of

the slowest closed-loop eigenvalue for the 100,000 test plants, plotted on logarithmic axes.

The conjectured correlation is evident.

Could the closed-loop pole locations of the slowest systems be improved by using a

parameter-dependent feedback matrix Faug(pM)? Ten plants with z < 500 were randomly

selected, and a compensator was designed for each individual plant using the LMI design

procedure. The slowest eigenvalues of the resulting closed-loop systems were improved

only incrementally (<1%) compared to the original Faug compensator. This suggests that

slow poles are unavoidable under certain operating conditions.

Quadratic stability The quadratic stability of the closed-loop system matrix

Aaug(·) +Bu,aug(·)F was tested using equation (5.17) for the polytopic system. It was

not possible to demonstrate quadratic stability for all of P ; however, it was demonstrated

for the subset of P with IL ≥ 2 A.

1We assume that the zero has not been canceled.


−104

−103

−102

−104

−103

−102

zero position

real( s

low

est eig

envalu

e )

Figure 5.4: Real part of the slowest closed-loop system eigenvalue, plotted against theopen-loop zero position.

Polytopic coverings of the matrices of system (5.12) were generated again using the

n-specific values of Cload given in table 4.2. For each n, quadratic stability could be

demonstrated for the subset of P with IL ≥ 2 A.

5.4.3.2 Verifying earlier assumptions

Effect of the load capacitor As n varies from 6 to 10 in the example installation,

the equivalent load capacitor Cload ranges from 8 µF to 4.44 µF. In section §4.3.1, we

assumed that the closed-loop system performance would be insensitive to this variation.

To test this assumption, 1000 random plants were generated. The closed loop perfor-

mance metrics of each plant were computed twice: first with Cload = 8 µF, and second

with Cload = 4.44 µF. Pairwise comparison showed only small variations between plants.

In general, the first set of plants had slighly better disturbance rejection characteristics


and slightly slower responses when compared to the second.

Output impedance In section §4.2.2, the output impedance of a compensated DMPPT

module was calculated by making assumptions about the compensator performance. The

validity of equation (4.5) for Zout should be verified for the closed-loop system.

Consider the unterminated, uncompensated DMPPT module shown in figure 4.5. Let

Aut and Bu,ut be the matrices from the unterminated DMPPT model (4.2). Assuming

constant vref and ipv = 0, the dynamics of the compensated module are given by

x

e

=

Aut 0

−Cvs 0

+

Bu,ut

0

Faug x

e

+

Bio

0

iovo =

[Cvo 0

] x

e

,(5.18)

where x(t) ∈ R3 is the converter state, e is the error Vref − vs and

Cvs =

[1 0 0

], Cvo =

[0 0 1

], Bio =

[0 0 −1

]T.

For each of the 100,000 plants tested, the transfer function Zout(s) from io to vo was

computed from (5.18), and the approximated output impedance Zapx(s) was computed

from equation (4.5).

To analyze the difference between Zout(s) and Zapx(s), for each plant we compute

numerically ˆ ∞0

|Zout(jω)− Zapr(jω)|2 dω.

This “figure of merit” for the plants tested ranged from 4×10−9 to 5×103. Figure 5.5

shows Bode plots of Zout(s) and Zapx(s) for the worst case plant by this measure. The

two transfer functions are very similar even in this case, justifying our use of Zapr(s) in

the design process.


−20

0

20

Magnitude (

dB

)

100

101

102

103

104

105

90

135

180P

hase (

deg)

Frequency (Hz)

Zapr

Zout

Figure 5.5: Worst case agreement of Zout(s) and Zapr(s).

5.5 Discussion

The DMPPT compensator design problem was approached using tools from LMI and

LPV theory. Pole placement and H∞ performance constraints on the closed-loop system

were imposed using LMIs, and system uncertainty was accounted for by imposing these

constraints at each vertex of a polytopic uncertainty model.

When the proposed design approach was applied to the example PV installation, the

resulting system of LMIs was found to be unsolvable. However, the design approach is

conservative; its failure to generate a compensator does not imply that none exists. The

LMI constraints were found to be feasible when control design was attempted for a single

plant model without uncertainty.

At this point, the designer could proceed in several ways.

1. Attempt to find a compensator than meets specifications over all or most of U

by iteratively designing a controller for a single point, and testing it for multiple

plants. This is in essence a trial and error process.


2. Separate U into polytopic sub-regions, and perform the design procedure for each

sub-region. Several region-specific compensators will result; these can be gain-

scheduled to provide satisfactory performance over all of U .

3. An entirely different control design procedure from the one proposed could be used.

In our design example, the first approach yielded a satisfactory solution over a large

subset of U , excluding only those plants having IL < 2 A. The resulting compensator

was also shown to render the closed-loop LPV system stable over the reduced uncertainty

set.

The sub-region based approach was abandoned when analysis demonstrated that

a gain-scheduled compensator would not have significant performance advantages over

a fixed-gain compensator. The added complexity of a gain-scheduled design was not

warranted in this example, but may be applicable in other cases.

Other control design approaches are also possible. For instance, a solution could be

attempted using classical robustH∞ and µ-synthesis techniques. However, these methods

impose more limiting uncertainty structures than the LMI approach. Were they applied,

it is likely that considerable conservatism would be introduced at the modeling stage.

It is also worth noting that the “design and verify” approach, in which a controller is

designed for a single plant model and then tested for many, can be used in conjunction

with any control design method. The proposed LMI approach was found to work well in

this context.

Chapter 6

Simulations

The compensator design of chapter 5 was simulated to verify the performance of the

DMPPT system. Two sets of simulations were performed.

The first simulations test the compensator in the context of its design: These simula-

tions are set up explicitly to verify the tracking and disturbance rejection capabilities of

the system. The second simulations demonstrate the convergence of the DMPPT system

to its global optimum power. All simulations were performed in MATLAB’s Simulink.

6.1 Tracking and disturbance rejection

The compensator was designed for a linearized DMPPT module operating with a simpli-

fied, linear load. The purpose of the first set of simulations is to verify the performance

of a nonlinear DMPPT module, operating in a micro-converter string connected to an

inverter.

The structure of the first Simulink model is shown in figure 6.1. Six series-connected

DMPPT modules are connected to an inverter. The “Module” blocks contain a solar panel

having model (3.7), which is parametrized by G, and an averaged boost converter with

model (3.4). For the “Inverter” block, the nonlinear model (3.14) depicted in figure 3.7

is used. The compensator reference voltages and the irradiances of the six modules are

80

Chapter 6. Simulations 81

inputs to the simulation.

Invertervstring istring

vs1

Module 1

Comp 1

d'1

vo1

io1

G1

Vref 1

−

e1

x1

x6 vs6

Module 6

Comp 6

d'6

vo6

io6

G6

Vref 6

−

e6

Figure 6.1: Compensated DMPPT module simulation model.

The compensator’s inputs are the converter state x = (vC1 , iL, vC2) and the error

e = Vref − vs. It produces the control signal

d′ = Faug

x

e

.Simulations tested the performance of a compensated DMPPT in three respects: ref-

erence tracking, string current disturbance rejection, and irradiance disturbance rejection.

The following simulations were performed:

1. To test reference tracking, a step change of 0.5 V was applied to Vref1.

2. To test the rejection of disturbances from neighboring modules, a step change of 1

V was applied simultaneously to each of Vref2, . . . , Vref6.

3. To test the rejection of a disturbance resulting from a change in irradiance, a step

change of 100 W/m2 is applied to G1.


In each case, the response of module 1 was examined.

To test for robustness, each simulation was performed for multiple values of

(Vref1, G1, · · · , Vref6, G6). The results for five such conditions, listed in table 6.1, are

presented below. Note that modules 2 - 6 share the same Vref and G in table 6.1; the

common values are denoted by the subscript k.

For each condition, the parameter vector pM of module 1 was computed. The real

part of the slowest eigenvalue of the closed loop system was used to estimate the expected

10% settling time, τexp1, which is shown in the final row of the table.

Table 6.1: Sample test conditions for simulationsCondition 1 Condition 2 Condition 3 Condition 4 Condition 5

Vref1 30 V 30.6 V 29.4 V 28.8 V 28.2 V

G1 1000 W/m2 600 W/m2 1150 W/m2 300 W/m2 300 W/m2

Vref,k 29 V 29 V 29 V 29 V 29 V

Gk 1000 W/m2 1250 W/m2 700 W/m2 400 W/m2 200 W/m2

τexp1 1.8 ms 0.89 ms 3.1 ms 3.7 ms 11 ms

The results of these simulations are presented in figures 6.2, 6.3 and 6.4.

Reference tracking Figure 6.2 shows the response of module 1 to a step change of

0.5 V in Vref1. The system responses are much faster than predicted in table 6.1: The

slowest mode contributes little to the Vref response.

This observation makes sense in the context of our earlier discussion in section §5.4.3.1:

Since the slow zero, z, of P (s) in appears1 in the transfer function from vref to vs, the

residue at the nearby slow pole will be small.

String current disturbances Figure 6.3 shows the response of module 1 to the dis-

turbance created by a simultaneous step change in Vref2, . . . , Vref6 of 1V. This is a greater

1Again, assuming that it is not canceled.


0 0.2 0.4 0.6 0.8

x 10−3

0.2

0.3

0.4

0.5

0.6

0.7

0.8

0.9

1

Time (s)

d’

Condition 1

Condition 2

Condition 3

Condition 4

Condition 5

1

(a)

0 0.2 0.4 0.6 0.8 1−3

28

28.5

29

29.5

30

30.5

31

31.5

Time (s)vs

(V)

Condition 1

Condition 2

Condition 3

Condition 4

Condition 5

x 10

(b)

Figure 6.2: Reference tracking simulation results: (a) d′1 and (b) vs1

0 0.005 0.01 0.015 0.020.2

0.3

0.4

0.5

0.6

0.7

0.8

0.9

1

d’

Condition 1

Condition 2

Condition 3

Condition 4

Condition 5

Time (s)

(a)

Condition 1

Condition 2

Condition 3

Condition 4

Condition 5

0 0.005 0.01 0.015 0.0228

28.5

29

29.5

30

30.5

31

vs (

V)

Time (s)

(b)

Figure 6.3: String current disturbance rejection simulation results: (a) d′1 and (b) vs1


0 0.2 0.4 0.6 0.8 1

x 10−3

0.2

0.3

0.4

0.5

0.6

0.7

0.8

0.9

1

d’

Time (s)

Condition 1

Condition 2

Condition 3

Condition 4

Condition 5

(a)

0 0.2 0.4 0.6 0.8 1

x 10−3

28

28.5

29

29.5

30

30.5

31

31.5

32

vs

(V) Condition 1

Condition 2

Condition 3

Condition 4

Condition 5

Time (s)

(b)

Figure 6.4: Irradiance disturbance rejection simulation results: (a) d′1 and (b) vs1

disturbance than would be expected in practice. A vertical line indicates the time at

which the disturbance was applied. At this time scale, the 120 Hz inverter disturbance is

visible, particularly in figure 6.3a. The rejection of both the inverter’s and neighboring

modules’ disturbances is evident in figure 6.3b. Unlike the reference voltage response,

the disturbance current response of figure 6.3 is dominated by the slowest eigenvalue.

Irradiance change disturbances Figure 6.4 shows the response of module 1 to a

step change of 100 W/m2 in G1. This is rather extreme; in reality the irradiance changes

slowly relative to the system dynamics. Nonetheless, the disturbance is rejected in all

conditions. The graph of d′ shows module 1 settling to a higher boost ratio (M = 1d′)

following the disturbance; this is the result of the increased module power.


6.2 Simulation of DMPPT system operation

For the next simulation, MPP extremum seeking controllers were added to the model

shown in figure 6.1. The ESC output is the reference voltage vref .

The ESC implemented is a modified version of the hill climbing P&O algorithm

described in section §2.1.1. Since the DMPPT modules’ settling times may vary with

operating conditions, a variable time P&O algorithm was chosen.

Figure 6.5 illustrates how the algorithm determines the time interval between reference

voltage commands. At time tref1, a voltage reference step command is issued. The step

size is a fixed ∆v = 0.2 V. The next voltage reference step occurs only when the panel

voltage crosses into the “detection band,” defined as vref ± 0.1(∆v).

vref

v

ttref1

detection band

vs

tref2

Figure 6.5: Illustration of variable time P&O

For this simulation, the PWM switching model of the micro-converter is used. The

effects of converter parasitic resistances, are also included. The values of the parasitics

used are presented in appendix §B.1.

Figure 6.6 shows signals vs and vref for all six modules performing MPP tracking.

The panel irradiances are G1 = 1200, G2 = 1000, G3 = 900, G4 = 800, G5 = 700 and

G6 = 500 W/m2.


28

30

32

vs1

28

30

32

vre

f1

28

30

32

vs2

28

30

32

vre

f2

28

30

32

vs3

28

30

32

vre

f3

28

30

32

vs4

28

30

32

vre

f4

28

30

32

vs5

28

30

32

vre

f5

28

30

32

vs6

0 0.5 1 1.5 2 2.5 3 3.5 4 4.5

x 10−3

28

30

32

vre

f6

Time (s)

Figure 6.6: Distributed MPPT simulation results.


Every module reaches its MPP voltage, show as a thin horizontal line in figure 6.6.

The subsequent three-point oscillation of vref about the MPP is typical of the P&O

algorithm. The variable wait time of the modified P&O algorithm used is evident in the

simulation results.

Figure 6.7 superimposes vs1 and vref1, showing the module’s tracking behavior. The

reference vref1 changes when vs1 comes within 0.1 (∆v) of the previous command voltage.

0 0.5 1 1.5 2 2.5 3 3.5 4 4.5

x 10−3

28

28.5

29

29.5

30

30.5

31

Time (s)

Voltage (

V)

vs1

vref1

Figure 6.7: Maximum power point tracking of module 1.

Chapter 7

Conclusions and Future Work

As the world’s installed photovoltaic capacity rises and technology costs fall, decentralized

PV installations will be an increasingly common sight in urban areas. Small-scale rooftop

and building integrated photovoltaics, mounted on existing structures and grid-connected

via existing wiring, is projected to become an economical power source competitive with

conventional electric power generation [67]. Distributed maximum power point tracking

will play an important role in enabling these technologies.

Considerable research effort has been put towards improving MPPT algorithms and

developing more efficient micro-converter topologies. However, micro-converter compen-

sator design has been widely overlooked. The DMPPT module compensator must be

robust to much greater and more diverse plant variations than traditional dc-dc con-

verters, but this point has not generally been acknowledged in the literature. Thus far,

DMPPT compensator design has been performed by ad hoc methods.

This thesis presents a systematic approach to plant modeling for DMPPT compen-

sator design. A technique for modeling the load of a series-connected DMPPT module

was proposed, and a framework for characterizing plant uncertainty was developed. This

novel modeling procedure gives the micro-converter designer a starting point for compen-

sator design: a dynamical model of the plant, and means of quantifying its uncertainty.

88

Chapter 7. Conclusions and Future Work 89

This thesis also proposes a modern LMI-based robust control approach to the design

of the DMPPT module compensator. The design procedure gives the designer flexibility

to specify relevant constraints on the system’s closed loop performance. Although direct

synthesis failed to produce a compensator for the example system presented, the LMI

procedure was adapted to design a compensator that performs well in simulations over

a wide range of system operating conditions.

In conclusion, it is hoped that these improved modeling and design procedures will

eventually be incorporated into the design processes of DMPPT micro-converters, both

in academia and in industry.

7.1 Limitations and Future Work

The modeling and control design procedures presented serve as a starting point for micro-

converter compensator design. This work considered a simple DMPPT system, about

which several simplifying assumptions were made. This section briefly discusses potential

improvements and extensions for future research.

Improvements to the control design procedure The size of the uncertainty set

was the main impediment in the example design problem. Suggested improvements to

the design procedure focus on reducing the uncertainty set and on relaxing the control

specifications.

The proposed design procedure could be significantly improved by introducing parameter-

dependent control specifications. The parameter vectors pM ∈ P are not all equal: In

a DMPPT system, some pM are far more likely to occur during regular operation than

others, and some pM result only when a module operates at very low power, in which case

its performance is less critical. Relaxing the performance constraints on such modules

could improve the overall compensator design

The effective uncertainty of the system could be reduced by employing gain-scheduled

Chapter 7. Conclusions and Future Work 90

control. A simple gain-scheduled design is achieved by dividing the uncertainty region

into sectors, and designing a compensator for each uncertainty subset. Several of the

parameters in pM are measured in real time; these could determine the appropriate

moment to switch the compensator gains. This approach is particularly suited to the

design of a module with bypass diodes, discussed below.

Extension to more realistic scenarios In modeling the example system, certain

simplifying assumptions were made. The effect of temperature was neglected; however,

the proposed modeling procedure can easily accommodate this.

Our analysis neglected the presence of bypass diodes in the solar panels. If a section

of the panel is damaged or heavily shaded, a bypass diode will conduct, and the effective

loss of a string of PV cells will change the panel’s I-V characteristic. Future work should

consider the effect of bypass diodes in the uncertainty modeling.

Application to more complex DMPPT systems In recent years, considerable

progress has been made in improving the efficiency of micro-converters. It has been

demonstrated that replacing the boost converter with a non-inverting buck-boost topol-

ogy improves the power harvesting capability of the system [24]. A useful direction

for future research would be to adapt the design procedure for this topology. For best

performance, separate compensators would be used in buck and boost modes.

Another innovation that improves micro-converter efficiency is the use of a central

inverter that varies the string voltage as the system operates. The proposed uncertainty

modeling procedures could also be extended to such a system.

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Appendix A

Supplementary proofs

A.1 Local power optimization is equivalent to global

power optimization

Consider the electrical network of solar panels and micro-converters depicted in fig-

ure 2.5b. There are n series-connected modules, which are connected to a load (in

this case, an inverter). Assume that the panels, micro-converters, and the load are all

memoryless, DC devices.

The kth panel has characteristic function hk : vpan 7→ ipan, the graph of which resem-

bles the curves in figure 2.1a.

The kth micro-converter has conversion ratioMk > 0. The micro-converter is assumed

to be ideal, i.e., the ratio of its output and input port voltages is Mk, and the ratio of its

output and input port currents is 1Mk

.

The operating point of the kth panel depends not only on Mk, but on all of the

conversion ratios M1, . . . ,Mn. We will show that there exists a set of conversion ratios

M1, . . . ,Mn such that every panel operates at its maximum power point, and that

when this is the case, the maximum possible power is delivered to the load. In other

words, locally optimizing the panel powers globally optimizes the system power.

99

Appendix A. Supplementary proofs 100

v −+

i

Figure A.1: Passive sign convention.

To show this, we require a few definitions and preliminary results. The polarities

of all circuit components are defined using the passive sign convention, as illustrated in

figure A.1.

Definition 6. A DMPPT module is a two-terminal device having the nonlinear char-

acteristic i = − 1Mh(

1Mv). Its behavior is parametrized by the constant M > 0 and the

function h : R→ R, which is smooth, bijective and strictly decreasing. The function

p : x 7→ xh(x) must have a unique global maximum P ∗ > 0 at some V ∗>0.

It is shown in section §3.3 that the I-V characteristic of a solar panel satisfies the

conditions on h. A solar panel connected to an ideal dc-dc converter capable of achieving

any positive conversion ratio is a DMPPT module by definition 6. The panel’s power at

MPP is P ∗.

Definition 7. An ideal power source is a two-terminal device with characteristic iv =

−P . Its behavior is parametrized by the constant P > 0, and is defined only for v > 0.

We will call the series connection of several DMPPT modules a string of DMPPT

modules; we will likewise refer to a string of ideal power sources.

Definition 8. A permissible load is a two-terminal device that is either an ideal voltage

source with V > 0, or an incrementally passive device (i.e., i = f(v) is monotonically

increasing) with a characteristic defined for all v > 0 and some Vco such that v > Vco ⇒

f(v) > 0.

The definition of permissible load is constructed to ensure that its operating point

will be unique.

The following lemma is necessary to establish that a string of DMPPT modules or

ideal power sources, connected to a permissible load, has a unique operating point.


Lemma 2. A string of ideal power sources or DMPPT modules connected to a permissible

load has a unique operating point.

Proof. Case 1: Consider a single ideal power source connected to a permissible load. Let

(vd, id) and (vl, il) be the operating points of the power source and load. By Kirchhoff’s

laws, vd = vl and id = −il. If the load is an ideal voltage source V > 0, the unique

operating point is il = PV. If the load is an incrementally passive device il = f(vl), then

there is a unique vl > Vco such that f(vl)− Pvl

= 0.

Two ideal power sources connected in series have the I-V characteristic of a single

ideal power source. To see this, let (v1, i1) and (v2, i2) be the operating points of the

two sources, and let P1 and P2 be their powers. Since the two devices share a common

current, v = v1 + v2 = P1+P2

i.

The operating point (v, i) of two series-connected power sources P1 and P2 uniquely

determines their respective operating points. Given i, we have v1 = P1

iand v2 = P2

i.

By iterating this argument to n power sources, it is clear that the operating point of

the string of DMPPT modules uniquely determines the operating points of its constituent

power sources.

Case 2: Consider a single DMPPT module connected to a permissible load, with

operating points (vd, id = fd(vd)) and (vl, il) satisfying Kirchhoff’s laws. The I-V char-

acteristic of the DMPPT module is smooth, bijective and strictly increasing. If the load

is a constant voltage source, the unique operating point is id = fd(V ); if the load is an

incrementally passive device with characteristic il = fl(vl), there is a unique v such that

fd(vd) = −fl(vl).

The series connection of devices having smooth, bijective and strictly increasing I-

V characteristics preserves these properties. Let f1 : v1 7→ i1 and f2 : v2 7→ i2 be

the I-V characteristics of two such devices. Their series connection has characteristic

fser =(f−1

1 + f−12

)−1, which must also be smooth, bijective and strictly increasing.

The operating point (v, i) of two series connected DMPPT modules uniquely deter-


mines the operating points of the individual modules. This is guaranteed by the bijective

nature of the modules’ I-V characteristics, since i is common to both modules.

By iterating this argument to n modules, it is clear that the operating point of the

string of DMPPT modules uniquely determines the operating points of its constituent

modules.

The following lemma is key in proving the achievability of the global maximum power

point. It is a variant of the substitution theorem from network theory, which states that

if the voltage across and current through any branch of a circuit are known, that branch

may be replaced by any device or combination of elements that will maintain the same

voltage and current [68].

Lemma 3. Consider a DMPPT module and an ideal power source P . In any given

circuit, there exists M > 0 such that the module and power source are interchangeable if

and only if P ∈ (0, P ∗].

Proof. To show sufficiency, consider P arbitrary in (0, P ∗]. The DMPPT module has an

associated function p, with p smooth, p(0) = 0 and p(V ∗) = P ∗. By the continuity of

p(·), there exists a vop ∈ (0, V ∗] such that p(vop) = P .

Let vt be the terminal voltage of the ideal power source connected to the remainder

of the circuit. Choose M = vt/vop. Then i = 1Mh(vop) = P

vt.

To show necessity, suppose there exists M such that the module is interchangeable

with ideal power source P . Then P = p(vop), and since P ∗ is the global maximum of p, it

must be that P ≤ P ∗. From the definition of an ideal power source, we also have P > 0.

Finally, we state Tellegen’s theorem; see [68] for a proof.

Tellegen’s theorem. Consider a lumped electrical network with b branches. Suppose

that to each branch we arbitrarily assign a positive terminal, and define the branch’s


potential difference vk and current ik respecting the passive sign convention. If the

network satisfies the constraints imposed by Kirchhoff’s voltage and current laws, then∑bk=1 vkik = 0.

Now, consider again the network depicted in figure 2.5b. To each module, we associate

the terminal voltage-current pairs (vk, ik) and (vpan,k, ipan,k), and the positive conversion

ratio Mk. The string of DMPPT modules is connected to a DC load, with voltage and

current (vl, il).

For any given positive M1, ...,Mn, all of the voltages and currents are uniquely

defined by lemma 2. Denote the power consumed by the load as Pl = vlil, and that

sourced by the kth module as Pk = vkik.

Theorem 7. For any permissible load, max(Pl) =∑n

k=1 P∗k .

Proof. Since the DMPPT circuit obeys Kirchhoff’s laws, by Tellegen’s theorem Pl =∑nk=1 Pk. It follows that max(Pl) ≤

∑nk=1 max(Pk) =

∑ni=1 P

∗k .

To prove equality, we must show that there exist some M1, ...Mn such that each

DMMPT module operates at its maximum power point. To this end, consider a string of

n ideal power sources P1, ..., Pn, connected to the same load. Let Pk = P ∗k . All voltages

and currents in the equivalent circuit are uniquely defined. Let vk be the voltage of the

kth ideal power source.

By repeated application of lemma 3, each ideal power source in the string can be

replaced with its corresponding DMPPT module. It follows that there exist M1, ...,Mn

such that the network of DMPPT modules and the network of ideal power sources behave

identically, which is to say, each module operates at its maximum power point.

This proof can easily be extended to the case of n modules connected in an arbitrary

series-parallel configuration.


A.2 Error bound of averaged PWM

Consider figure 3.3b. Let uc(·) be a globally Lipschitz continuous signal defined on

t ∈ [0,∞), where ∀t ∈ [0,∞), uc(t) ∈ [0, 1]. Let Ts be the switching period of the pulse

width modulator. We assume that L, the Lipschitz constant of uc, is less than 1Ts.

Define the pulse width modulation operator TPWM : uc 7→ usw as follows. Let

k(t) =⌊tTs

⌋be the number of switching periods that have elapsed until t. The signal uc

is sampled to obtain the duty ratio of the kth period. Let r(k) = uc (kTs). Then

usw(t) =

1, t

Ts− k(t) ≤ r(k(t))

0, otherwise

.

This is a mathematical description of a uniform pulse width modulator.

Define the averaging operator

Tave : u 7→ v, v(t) =1

Ts

ˆ Ts+t

t

u(τ)dτ,

and let Tave usw = d′, defined on t ∈ [0,∞).

The following lemma demonstrates a conservative upper bound on |uc(t)− d′(t)| in

terms of L and Ts. In practice, Ts is small and uc varies slowly relative to Ts.

Lemma 4. For all t ∈ [0s,∞), |uc(t)− d′(t)| < LTs.

Proof. By assumption, uc(t) ∈ [0, 1]. The duty ratio of the kth switching interval of usw

is r(k) = uc (kTs). Applying the averaging operator, we find that

d′(kTs) =1

Ts

ˆ (k+1)Ts

kTs

usw(τ)dτ = r(k).

Thus, we have that for all k ≥ 0, uc(kTs) = d′(kTs).

Consider the interval [kTs, (k+1)Ts]. Without loss of generality, let k = 0 and suppose


v

iIsc Ib

Voc

Figure A.2: Solar cell I-V characteristic.

that r(1) > r(0). It must be that for all t ∈ [0, Ts],

d′(t) ∈ [d′(0), d′(Ts)]

uc(t) ∈ [uc(0)− Lt, uc(0) + Lt] ∪ [uc(Ts)− Lt, uc(Ts) + Lt].

It follows that |uc(t)− d′(t)| < LTs for all t ≥ 0.

It is possible to show a similar upper bound for natural pulse width modulation.

However, since the controller for the DMPPT system would be implemented digitally in

practice, uniform pulse width modulation is more relevant.

A.3 Unimodal characteristic of solar arrays

A solar cell is modeled by equation (3.6) in section §3.3. An example of solar cell I-V

characteristic is given in figure A.2.

Let f : i 7→ v, defined on [0, Ib], be the function whose graph is the solar cell I-V

characteristic. We define Ib to be the current beyond which equation (3.6) no longer holds;

Ib will be well above the cell’s short circuit current Isc. The function f is parametrized

by the cell’s irradiance G and temperature T .

A solar panel is composed of Ns series-connected solar cells. Each cell may experience

different lighting conditions, so we assign to each a characteristic function f1, . . . , fNs .

The cells share a common current ipan. The panel voltage is vpan = fΣ(ipan), where


fΣ =∑n

i=1 fi is defined on [0,min(Ibi)]. The power generated is p = ipanfΣ(ipan).

The following lemma demonstrates that the graph of p vs. ipan must be unimodal.

Lemma 5. Let fi : [0, b] → R, i = 1, . . . , Ns, be twice continuously differentiable func-

tions. Define fΣ =∑n

i=1 fi, and define g(x) = xfΣ(x). If for all i, f ′i < 0 and f ′′i < 0 on

[0, b], then g has a unique maximum on this interval.

Proof. By linearity, f ′Σ(x) < 0 and f ′′Σ(x) < 0 on [0, b]. Now,

g′(x) = xf ′Σ(x) + fΣ(x)

g′′(x) = xf ′′Σ(x) + 2f ′Σ(x).

Since x is non-negative, g′′(x) < 0 on [0, b]. The continuity of g implies that g achieves

a maximum on the closed interval [0, b], and since, g′′ < 0, that maximum is unique.

The solar cell I-V characteristics are decreasing and strictly concave, so f ′i < 0 and

f ′′i < 0 on [0,min(Ibi)]. It follows from the lemma that p = ipanfΣ(ipan) is concave and

achieves a unique maximum on this interval.

A.4 Controllability of the augmented system

We wish to show that (Aaug(pM), Bu,aug(pM)) is controllable for all pM ∈ P , where

Aaug =

A(pM) 0

−C 0

, Bu,aug =

Bu(pM)

0

and A(pM), Bu(pM) and C are matrices of system equation (4.9).

Lemma 6. The pair (A(pM), Bu(pM)) is controllable for all pM ∈ P .


Proof. Perform the PBH test on (KeqA, KeqBu). Since Keq has full rank ∀pM ∈ P , it

does not affect the outcome. Let T (λ) =

[KeqA− λI

∣∣∣∣ KeqBu

]. Then

T (λ) =

− 1Rpv− λ −1 0 0

1 −λ −D′ −VC2

0 D′ − 1Rload

− λ IL

.

If columns 3 and 4 are linearly independent (l.i.), then T has full rank. Columns 3 and

4 are linearly dependent only when λ = λcrit = − 1Rload

− D′ILVC2

. Consider

T (λcrit) =

− 1Rpv

+ 1Rload

+ D′ILVC2

−1 0 0

1 1Rload

+ D′ILVC2

−D′ −VC2

0 D′ D′ILVC2

IL

.

Columns 1 and 4 are l.i. It remains to show that column 2 is l.i. from columns 1 and

4. Let c1, c2 and c3 denote columns 1, 2 and 4 of T (λcrit) respectively. By contradiction,

suppose there exist constants t1 and t4 such that c2 = t1c1 + t4c4. It must be that

t1 =−1

− 1Rpv

+ 1Rload

+ D′ILVC2

t4 =D′

IL

t1 − VC2t4 =1

Rload

+D′ILVC2

.

But this is not possible, since the parameters in pM are always positive and it can easily

be checked that t1 − VC2t4 < 0 ∀pM ∈ P .

Lemma 7. The pair (Aaug(pM), Bu,aug(pM)) is controllable for all pM ∈ P if (A(pM), Bu(pM))

is controllable for all pM ∈ P .


Proof. Perform the PBH test on (Aaug, Bu,aug). Let

T (λ) =

A(pM)− λI 0

−C −λI

∣∣∣∣∣∣∣Bu(pM)

0

.When λ = 0,

T (0) =

Keq 0

0 1

−1

− 1Rpv

−1 0 0 0

1 0 −D′ 0 −VC2

0 D′ − 1Rload

0 IL

−1 0 0 0 0

.

Since all of the parameters in pM are nonzero, T has full row rank.

Whenλ 6= 0, T has full row rank if[A(pM)− λI Bu(pM)

]has full row rank, i.e.,

if (A(pM), Bu(pM)) is controllable.

Appendix B

Converter design

B.1 DMPPT module boost converter

The design parameters of the ideal boost converter are the input capacitor C1, inductance

L, and output capacitor C2. We need also define the practical boundary of CCM mode

operation. Unless stated otherwise, design equations are taken from [10].

Inductor The inductance value is chosen based on the maximum permissible ripple

of the inductor current at panel MPP under standard test conditions. The steady-state

inductor current is equal to the panel current, 7.87 A at MPP; the MPP panel voltage is

30.6 V [2]. The maximum permitted ripple is 15% at a switching frequency of 250 kHz.

Due to efficiency considerations, the duty ratio will not be permitted to exceed 0.67, a

boost ratio of 3.

The value of the inductance is given by equation (B.1),

L >Vg

2 M iLDTs =

VMPP

2 (0.15× IMPP )DmaxTs, (B.1)

which yields L > 34.6µH. As it is good design practice to use an inductor larger than

marginally necessary, a conservative inductor value of 40µH is chosen.

109

Appendix B. Converter design 110

Input capacitor The input capacitor filters the switching ripple from the power con-

verter. Panel voltage ripple is undesirable from the perspective of MPPT, as the tracker

relies on the panel’s convergence to the reference voltage. We wish to limit the voltage

ripple of the panel to 1%.

The input capacitor and inductor together form a two-pole filter. Following [10], we

assume that the inductor current ripple computed above flows entirely through the filter

capacitor to compute a first-order estimate of the ripple voltage. The value of the desired

input capacitance is given by equation (B.2), in which we assume 15% inductor current

ripple;

C1 >M iLTs8 M vs

=(0.15× Is)Ts8 (0.01× Vs)

. (B.2)

The minimum required capacitance is determined based on the worst-case ripple sce-

nario. In section §4.3, it is determined that the minimum panel voltage under standard

operation is Vs = 28.2 V. The maximum possible current will be achieved at this voltage

when the irradiance reaches its assumed maximum of G = 1250W/m2; using the model

of section §3.3, the maximum current is found to be Is = 10.1 A. Using these values in

equation (B.2) yields C1 > 2.7µF.

This calculation yields a practical minimum value of the input capacitor. However, it

is common practice to chose a filter capacitor large enough to attenuate voltage transients

in addition to the steady state ripple. We thus conservatively increase our minimum by

a factor of four, and select an input capacitor of 10 µF.

Output capacitor The output capacitor is chosen to minimize the output voltage

ripple, which we limit to 1%. The required capacitance is computed using equation (B.3),

C2 >Io

2 M voDTs. (B.3)

The minimum required capacitance is again determined based on the worst case ripple

scenario,


C2 >

(Is × 1

M

)2(0.01) (Vs ×M)

D︷︸︸︷(M − 1

M

)Ts =

Ts2(0.01)

IsVs

(M − 1

M3

).

The worst case value of M−1M3 can be computed by basic calculus, and is found to

have a maximum at M = 1.5 (D = 0.333). The worst case value of the panel large-

signal admittance IsVs

is hypothetically infinite, if the panel operates under short-circuit

conditions. In reality, we never expect the DMPPT module to operate at such a distance

from MPP; the operating boundaries are defined in section §4.3. As before, we use the

extreme operating values of Vs = 28.2 V and Is = 10.1 A, which yields a minimum

capacitance C2 > 10.4µF.

Since the attenuation of voltage transients is critical in ensuring the decoupled oper-

ation of DMPPT modules, we again conservatively increase our minimum by a factor of

four, and select an output capacitor of 40 µF.

Mode boundary The DMPPT converter is designed for continuous conduction mode

(CCM) operation. However, CCM operation is inefficient at low power levels, and

modern power converters are designed to use efficiency maximizing schemes such as burst

mode and pulse frequency modulation [41,42] when operating at low power.

We define a mode boundary below which the converter is assumed not to operate in

CCM. Since the input voltage varies little (section §4.3.1), the mode transition is defined

by a minimum inductor current.

The converter is designed for an inductor ripple current of 1.18 A at Vs = 30.6 V.

Neglecting design conservatism, the mode boundary of conventional CCM is IL > 1.18

A, below which inductor valley current is negative. We therefore choose IL > 1.18 A as

a practical lower bound for standard operation.

An upper bound on the boost conversion ratio is also enforced for efficiency reasons.

This design will permit operation up to a maximum of M = 3.


Table B.1: Components selected for micro-converterComponent Manufacturer Part number Value Quantity Rating Parasitic

L CoilCraft SER2915L-103 40 µH 1 17 A 1.6 mΩ

C1 Murata GRM55DR71H335 3.3 µF 3 50 V ∼5 mΩ

C2 Murata KCM55TR72A106 10 µF 4 100 V ∼10 mΩ

switches Infineon BSC077N12NS3 - 2 120 V 7.7 mΩ

Component selection The parasitic values used in simulations were obtained by se-

lecting components for the micro-converter, as shown in table B.1. The “Parasitic” column

gives the equivalent series resistance (ESR) of each component: the parasitic inductor

resistance, the capacitor ESR, and the on-resistance of the MOSFET switches.

The “Quantity” column indicates the number of each component needed. Note that

the input and output capacitors are made up of three and four parallel-connected capac-

itors respectively, a configuration that reduces the equivalent series resistance (ESR). To

a first order approximation, the ESR of C1 is 13× 5 mΩ and the ESR of C2 is 1

4× 10 mΩ.

B.2 Inverter

The design parameters of the simplified inverter are the DC link voltage Vdc, the DC link

capacitor Cinv, and the outer loop PI controller coefficients KP and KI .

DC link voltage The nominal grid voltage for the single-stage inverter is 240 V (RMS).

For the full bridge inverter to function, the DC link voltage must exceed the peak grid

voltage. A minimum 15% margin of error over the nominal required Vdc is prudent to

ensure normal operation under transient conditions. This yields a DC link voltage of

390 V, which we round to the standard 400 V.

DC link capacitor The DC link capacitor is chosen to control the voltage ripple. As

derived in section §3.4, the size of capacitor necessary to maintain a voltage ripple of M v


under steady-state operating conditions is given by

Cinv =P

2ωVdc M v.

We design for a maximum voltage ripple of 5%. Given a maximum of ten 240 W

modules in the string, the inverter will process 240 W of power under STC. These values

yield a capacitance of 398µF. We choose a conservative value of Cinv = 450µF.

PI controller The design of the outer loop controller of the simplified inverter requires

a plant model for the inverter; figure B.1a is the basis of this model. The sinusoidal

component of the power drawn by the inverter has been neglected. This approximation

is acceptable because Cinv has been chosen to ensure that the ripple in v is small, and

because the gain of controller K will roll off at a frequency below the 120 Hz disturbance.

Unlike the simplified inverter of figure 3.7, figure B.1a includes a first order lag block

representing the dynamics of the inverter’s inner loop. As many control design proce-

dures yield closed loop responses that resemble a first order lag, this is a reasonable

approximation. The performance of the outer loop controller K is limited by the speed

of the inner loop, the time constant θ. For an inverter having a switching frequency of

20 kHz and (conservatively) a time constant on the order of 100 switching periods, we

estimate θ = 5 ms.

The system is at equilibrium when v = Vdc and pinv = Pdc. The plant P of fig-

ure B.1b is derived from the circuit of figure B.1a, and linearizing (using the Taylor

series expansion) at the equilibrium:

ic = idc − iinv

Cinvdv

dt=Pdc − pinv

v

≈ 1

Vdc(−pinv).


Pdc

ic

pinv

idc iinv

v

−

Vdc

ev uK

θs + 1

1

Cinv

(a)

Pdc

pinv

v

−

Vdc

ev uK

θs + 1

1

−

pinv−~

θs + 1

1P

(b)

Figure B.1: Inverter control system: a) schematic diagram, b) block diagram.

Converting to transfer function form yields the plant

P (s) =−pinv(s)v(s)

=1

CinvVdcs.

Although the plant contains an integrator, the outer loop controller too must contain

an integrator in order for its output Pinv to be non-zero at equilibrium when ev = 0. A

PI controller is a natural (and common) choice:

K(s) = −(kP +

kIs

)= −kc

(1 +

1

τIs

).

The gains must be negative, as the controller should respond to a positive ev by increasing

Pref . The PI controller parameters are chosen using the Skogestad internal model control

(SIMC) design procedure [52] for a first order plant with time delay. To approximate our

system in this form, we follow [52] and approximate the lag as a time delay, 1θs+1≈ e−θs.

This approximation is conservative, since a delay is worse from a control perspective

than an equivalent lag. By following the SIMC procedure for a near-integrating plant,


we obtain the parameters

kc =CinvVdcτc + θ

τI = 4(τc + θ),

where τc is a tuning parameter. Since θ appears summed with τc in the above expressions,

and since we have been conservative in our modeling, we can have confidence in the design

despite our uncertainty about the time constant of the inner loop. We choose τc = θ = 5

ms, which yields PI parameters kP = 18 and kI = 450.

Appendix C

Algorithms

C.1 Photovoltaic parameter fitting

To model a solar panel, we must fit the parameters of equation (3.7) to the manufacturer-

provided panel data. The datasheet of any solar panel includes the open-circuit voltage

(Voc), short circuit current (Isc), and the maximum power point current (Impp) and voltage

(Vmpp) of the panel under standard test conditions (G = 1000 W/m2 and T = 25 °C).

The curve-fitting problem can be framed as a constrained nonlinear optimization.

Let x = (α, I0, Rs, Rp, a) be the vector of parameters to be solved for. From the

physics of equation (3.7), these parameters must respect the constraints α, I0, Rs, Rp > 0

and α ∈ [1, 2]. Additionally, it is shown in [44] that

Rp >Vmpp

Isc − Impp− Voc − Vmpp

Impp.

Equation (3.7) describes a one-to-one relation fx,G,T : i 7→ v, parametrized by x, G

and T . Although fx,G,T cannot be expressed in closed form, we can solve numerically

for its open-circuit voltage, short-circuit current, and maximum power point. Define

Voc,x = fx,G,T (0) and Isc,x = f←x,G,T (0), the preimage of 0. Define Impp,x as the value of i

that maximizes i (fx,G,T (i)), and Vmpp,x = fx,G,T (Impp,x).

116

Appendix C. Algorithms 117

Table C.1: Datasheet values for the SW 240 mono solar panelQuantity Value

Voc 37.6 V

Isc 8.22 A

Impp 7.87 A

Vmpp 30.6 V

ns 60

We seek x such that Voc,x, Isc,x, Impp,x and Voc,x resemble the datasheet values as

closely as possible. To this end, we define the objective function

e(x) = w1

(Voc − Voc,x

Voc

)2

+w2

(Isc − Isc,x

Isc

)2

+w3

(Impp − Impp,x

Impp

)2

+w4

(Vmpp − Vmpp,x

Vmpp

)2

,

where (w1, w2, w3, w4) are relative weights such that∑4

i=1 wi = 1.

The nonlinear optimization problem of minimizing e(x) subject to the constraints

described is solved numerically using the fmincon function from MATLAB’s Optimiza-

tion Toolbox. As there are five parameters and only four fitting values, the problem is

underdetermined; however, an exact solution does not exist.

The result xopt returned by fmincon was found to depend strongly on the initial guess

x0. A Monte Carlo approach was used to generate 1000 random initial guess vectors, and

the xopt corresponding to the smallest value of e was taken.

The datasheet values for the SW 240 mono solar panel under standard test conditions

are given below in table C.1. The optimization was performed using equal weights on

the terms of e, and the optimal value of e was 3.79×10−5. The corresponding parameter

values are given in table 3.2.


C.2 Polytopic covering in 2D

We are interested in finding the optimal (minimum area) convex polygon that covers a

given 2D shape. The terminology and notation used below is local to this section.

Let C be a piecewise smooth, closed curve in R2 that encloses a convex region, and let

P be a convex, n-sided polygon. We seek the smallest area P such that C is contained in

P . The following algorithm solves this problem as a constrained nonlinear optimization

in n variables.

Begin be choosing n ≥ 3.

Algorithm

1. Select any point enclosed by C, and call this point xO.

2. Choose θ ∈ (θ1, . . . , θn) | 0 ≤ θ1 < . . . < θn < 2π, θi+1−θi < π, (θ1+2π)−θn < π.

The angles of vector θ define an ordered set of points on the unit circle, such any

two adjacent points are separated by an arc length less that π.

3. Construct rays at angles (θ1, . . . , θn) outwards from xO.

4. For each ray, construct a perpendicular line intersecting the ray and tangent to C,

as shown in figure C.1. The intersections of neighboring such lines form a convex

n-gon.

5. Optimize the area of the resulting n-gon over θ.

The following two lemmas prove that the proposed algorithm will always yield a P of

minimum area. Note that the optimal P may not be unique.

Lemma 8. If P is optimal, then all of the sides of P are tangent to C.

Proof. Suppose by contradiction that an optimal P has at least one side not tangent to

C. Then it is possible to draw a line parallel to that side, and to create a P ′ containing

C and enclosing a smaller area than P .


θ1θ2

θ3

θ4

xO

C

P

Figure C.1: Illustration of the 2D optimal covering algorithm.

Lemma 9. Let P be an n-gon with all sides tangent to C. For any choice of xO, there

exists a vector θ such that the algorithm produces P .

Proof. Let xO be an arbitrary point enclosed by C. Let v1, . . . , vn be sequentially

ordered vertices of P , and let ei be the edge between vi and vi+1 (to simplify notation,

define vn+1 = v1). Extend each edge infinitely in either direction, and construct a line

perpendicular to the edge and passing through xO. Denote point of intersection of the

extended edge and its perpendicular by pi.

For any i between 1 and n, the points xO, pi, vi+1, pi+1 form a quadrilateral. Since

∠xOpivi+1 = ∠vi+1pi+1xO = π2and ∠pivi+1pi+1 > 0, it must be that θi := ∠pixOpi+1 <

π.

In practice, we are interested in covering the region defined by a large but finite

collection of points R. Applying the quickhull algorithm [64] yields the convex hull, a

subset of the points in R. The curve C is found by connecting the points in the convex

hull of R.

To find the tangent lines from step 4, we first perform a coordinate transform to place

xO at the origin. For each θi, we project every point in the convex hull of R onto the

unit vector ui = (cos θi, sin θi). Let mi be the maximum positive scalar projection. The

ith tangent line passes through the point miui and is perpendicular to ui.

The constrained optimization over θ was implemented using the fmincon function


Rpv

IL

0

10

0 0.2 0.4

(a)

Vo

0

50

100

D'

0 0.5 1

(b)

Figure C.2: Output of the 2D polytopic covering algorithm.

from MATLAB’s Optimization Toolbox. Since the problem is not in general convex, the

result of the optimization will be dependent on the initial θ. A suitable initial guess

vector can either be supplied by the user, or generated using a Monte Carlo approach.

Figure C.2 illustrates the algorithm’s output on two of the shapes of figure 5.1, using

n = 4 and 5 vertices respectively.

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