MMIC Amplifier In QFN Package Qualification · PDF fileMMIC Amplifier In QFN Package...

MMIC Amplifier In QFN Package

Qualification Report

MMIC Amplifier In QFN Package Qualification Report August 2016

2

Table of Contents Page

Introduction 6

The QFN Package 8

Summary of Test Results 10

Summary of Performance Variation 10

ESD Sensitivity Level 10

Environmental / Operational Maximum Ratings 10

Environmental Test Plan 12

Electrical Testing 14

Test Fixtures 14

MSL & Preconditioning 15

Performance Plots - High Temperature Operating Life (HTOL) 17

Equivalent Hours Calculation – High Temperature Operating Life (HTOL) 19

Performance Plots – Highly Accelerated Temperature and Humidity Stress Test (HAST) 20

Performance Plots – Autoclave (AC) 22

Performance Plots – High Temperature Storage Life (HTSL) 25

Performance Plots – Temperature Cycling (TC) 27

Table of Abbreviations

Marki Microwave Incorporated MMI

Quad Flat No-Lead Package QFN

Pseudomorphic High Electron Mobility Transistor PHemt

Gallium Arsenide GaAs

High Temperature Operating Life HTOL

Highly Accelerated Temperature and Humidity Stress Test HAST

Autoclave AC

High Temperature Storage Life HTSL

Temperature Cycling TC

Electro-Static Discharge ESD


3

Table of Figures Number Description Page(s)

1 Mechanical Drawing of ADM Package 8

2 Cross-sectional drawing of typical QFN package with GaAs die 8

3 Custom Test Fixture (Soldered) 14

4 Custom Test Fixture (Press-in) 15

5 Annotated MSL & Preconditioning Reflow Profile 15

6 HTOL - Gain Variation Plot 17

7 HTOL - Frequency & Cumulative Distribution of 17.7GHz Gain Variation (single unit variation)

17

8 HTOL - Idss Variation Plot 18

9 HTOL - Frequency & Cumulative Distribution of 17.7GHz Idss Variation (single unit variation)

18

10 HTOL - 17.7 GHz Input Return Loss Comparison 18

11 HTOL - Extrapolated Equivalent Hours Plot 19

12 HAST - Gain Variation Plot 20

13 HAST - Frequency & Cumulative Distribution of 17.7GHz Gain Variation (single unit variation)

20

14 HAST - Idss Variation Plot 21

15 HAST - Frequency & Cumulative Distribution of 17.7GHz Idss Variation (single unit variation)

21

16 HAST – Input Return Loss Comparison 21

17 Autoclave - Gain Variation Plot (Lot 1) 22

18 Autoclave - Idss Variation Plot (Lot 1) 22

19 Autoclave – Input Return Loss Comparison (Lot 1) 23 20 Autoclave - Gain Variation Plot (Lot 2) 23

21 Autoclave - Idss Variation Plot (Lot 2) 23

22 Autoclave – Input Return Loss Comparison (Lot 2) 24

23 Autoclave - Frequency & Cumulative Distribution of 17.7GHz Gain Variation (Lots 1 & 2; single unit variation)

24

24 Autoclave - Frequency & Cumulative Distribution of 17.7GHz Idss Variation (Lots 1 & 2; single unit variation)

24

25 HTSL - Gain Variation Plot 25

26 HTSL - Frequency & Cumulative Distribution of 17.7GHz Gain Variation (single unit variation)

25

27 HTSL - Idss Variation Plot 26

28 HTSL - Frequency & Cumulative Distribution of 17.7GHz Idss Variation (single unit variation)

26

29 HTSL – Input Return Loss Comparison 26 30 Temperature Cycling - Gain Variation Plot (Lot 1) 27

31 Temperature Cycling - Idss Variation Plot (Lot 1) 27

32 Temperature Cycling – Input Return Loss Comparison (Lot 1) 28

33 Temperature Cycling - Gain Variation Plot (Lot 2) 28

34 Temperature Cycling - Idss Variation Plot (Lot 2) 28 35 Temperature Cycling – Input Return Loss Comparison (Lot 2) 29

36 Temperature Cycling - Frequency & Cumulative Distribution of 17.7GHz Gain Variation (Lots 1&2; single unit variation)

29

37 Temperature Cycling - Frequency & Cumulative Distribution of 17.7GHz Idss Variation (Lots 1 & 2; single unit variation)

29


4

Table of Tables Number Description Page

1 Qualified MMI Part Numbers 8

2 Summary of Test Results 10

3 Summary of Performance Variation 10

4 ESD Sensitivity Level 10

5 Environmental / Operational Maximum Ratings - Device 10

6 Environmental / Operational Maximum Ratings - Package 10

7 Test Method – Device 12

8 Test Method – Package& Device Passivation 12

9 Custom Test Fixtures – Materials Used 14

10 HTOL Test Parameters 17

11 Equivalent Hours Calculation – Identities 19

12 Equivalent Hours Calculation – Values 19

13 HAST Test Parameters 20

14 Autoclave Test Parameters 22

15 HTSL Test Parameters 25

16 TC Parameters 27


5

Introduction


6

Our reliability study combines device, package, and ESD test methods to produce a comprehensive view of a typical

component’s mechanical and electrical integrity over its lifetime. The conclusions drawn from this study establishes

Marki Microwave’s QFN package’s ability to withstand mechanical stresses that were imposed by the test methods.

It also provides a basis of confidence in the QFN package’s ability to support the specified electrical performance of a

typical Marki Microwave GaAs amplifier device contained within. The GaAs amplifier device used in this study is

fabricated using a particular process, “A”, that actualizes a configuration of distributed pseudomorphic high electron

mobility transistors (PHemt) and is typical of all Marki Microwave MMIC GaAs amplifier devices that feature

comparable power dissipation (up to ~1W).

The test plan used to perform this study delineates package and device test methods to highlight the efficacy of

specific mechanical features of the QFN package, die attachment, die passivation, wire bonds and lid seal as well as

the package’s ability to prevent thermal sinking in the GaAs amplifier die under thermal conditions that exceed the

specified operating temperature. This study is based on the planning and practice of JEDEC standards. The conditions

applied to each standard were chosen to encourage our customers’ increased confidence in our product’s efficacy

under environmental conditions that exceed typical use cases.


7

The QFN Package


8

The representative package used in our study was a 4mm x 4mm x 0.9mm gross-leak sealed ceramic QFN containing

a GaAs pseudomorphic high electron mobility transistor (PHemt) distributed MMIC amplifier device fabricated using

process “A” *.

Figure 1 – A drawing of a 4mm QFN package. Alternate dimensioning: [ mm ]

Ceramic Lid

Sealing Epoxy

Ceramic QFN Body

Conductive Epoxy

Wire Bond

GaAs Die

Figure 2 – A cross-sectional drawing of a typical QFN package with GaAs die and mechanical attachment features.

Related Part Numbers*

Marki Microwave Part Number Die Number Thermal Resistance, Θjc QFN Size

ADM-0026-5929SM 5929 0.873 C/W 4mm sq.

ADM-0126-5835SM 5835 1.177 C/W 4mm sq.

ADM-0012-5931SM 5931 1.469 C/W 3mm sq.

ADM-0026-5931SM 5931 1.462 C/W 4mm sq.

ADM-0026-5915SM 5915 0.833 C/W 4mm sq.

ADM-0126-5928SM 5928 0.883 C/W 4mm sq.

Table 1

* Contact Marki Microwave for details regarding process “A” and related part numbers.

16

22

10

Ground Paddle.154

[3.90]

.098 Sq.

[2.50]

.003 Typ

[.08]

.020 Typ

[.50]

.012 Typ

[.30]

.013 Typ

[.32]

.154

[3.90]

3

17

18

14

13

2

1

4

5

6

23 24212019

1112 9 8 7

15

.028 Typ

[.70]

ADM

5928

D/C

XXX

.035

[.90]


9

Summaries & Declarations


10

Summary of Test Results

Table 2

Summary of Performance Variation

Table 3

ESD Sensitivity Level The GaAs Device was not subjected to HBM & CDM ESD testing. Marki Microwave declares the following ESD classifications and recommends the QFN package be handled in a manner that appropriately accounts for high ESD sensitivity.

Model Classification Voltage

HBM 0A < 125V

CDM C0A < 125V

Table 4

Environmental / Operational Maximum Ratings

Table 5

Table 6

† Values are stated in order of their respective lot numbers; Lot 1, Lot 2.

‡ Press-in test fixture used

§ The lower value in the range was not verified in this study

Test Method Qty In Qty Out Fails Fail Criteria

High Temperature Operating Life (HTOL) 26 26 0 1dB change in gain or 10mA change in Idss

Highly Accelerated Stress Test (HAST) 20 20 0 1dB change in gain or 10mA change in Idss

High Temperature Storage Life (HTSL) 10 10 0 1dB change in gain or 10mA change in Idss

Accelerated Moisture Resistance (Autoclave) 40 40 0 1dB change in gain or 10mA change in Idss

Temperature Cycling (TC) 29 29 0 1dB change in gain or 10mA change in Idss

Test Method Frequency

(GHz) Avg Initial Gain (dB)

Max Gain Change

(dB)

Gain Range (dB)

Avg Initial Idss (mA)

Max Idss Change (mA)

Idss Range (mA)

HTOL 17.7 11.4 0.21 0.34 131 4 6

HAST 17.7 11.4 0.35 0.37 132 5 6

HTSL 17.7 11.4 0.16 0.31 127 2 2

Autoclave 17.7 11.4 0.18, 0.19† 0.23, 0.19

† 130 3, 1

† 4, 1

†

Temperature Cycling

17.7 10.9 0.35, 0.26‡ 0.48, 0.26

‡ 125 5.4, 2

‡ 5.4, 2

‡

Device

Static Operating Temperature Range -55oC to +85

oC

Static Storage Temperature Range -65oC to +150

oC

§

Package

Static Operating Temperature Range -55oC to +85

oC

Static Storage Temperature Range -65oC to +150

oC

§

Dynamic Operating Temperature Range +25oC to +75

oC, +5

oC/min ramp

Humidity 80% RH @ +85oC


11

Test Plan


12

Device

Test Conditions Duration Sample Size Fail Criteria

High Temperature Operating Life (HTOL)

Tj = 132oC

Vdd = +7V, Vgs = 0V, Idss = 130 mA 1000 Hours

1 lot of 26 units

1dB change in gain or 10mA change in Idss

Table 7

HTOL: This test simulates the devices’ operating condition in an accelerated way, and is primarily for device qualification and reliability monitoring. Acceleration Factor (AF) & Extrapolated Lifetime were determined. The practice of this test procedure complied with JESD22-A108D, Temperature, Bias, and Operating Life & JESD47I, Stress-Test-Driven Qualification of Integrated Circuits

**.

Package & Device Passivation

Test Conditions Duration Sample Size Fail Criteria

Highly Accelerated Temperature and Humidity Stress Test (HAST)

Vdd = +6, Vgs = 0V, Idss = 107mA Temp = 130

oC, RH = 85%

Vapor Pressure = 33.3psia 96 Hours

1 lot of 20 units


High Temperature Storage Life (HTSL)

Temp = 150oC 1000 Hours

1 lot of 10 units


Accelerated Moisture Resistance (Autoclave)

Temp = 121oC, RH = 100%

Vapor Pressure = 29.7psia 96 Hours

1 lot of 40 units


Temperature Cycling (TC)

Ts (min) = -65oC Ts (max) = +150

oC

Transition Time = 43 minutes Dwell Time = 10 Minutes

500 Cycles 1 lot of 29

units


Table 8

HAST: This test evaluates the reliability of non-hermetic packaged devices in humid environments. It employs severe conditions of temperature, humidity, and bias which accelerate the penetration of moisture through the external protective material. The practice of this test procedure complied with JESD22-A110D, Highly Accelerated Temperature and Humidity Stress Test

**.

HTSL: This test is typically used to determine the effects of time and temperature, under storage conditions, for thermally activated failure mechanisms and time-to failure distributions of solid state electronic devices. The practice of this test procedure complied with JESD22-A103D, High Temperature Storage Life

**.

Autoclave: This test method applies primarily to moisture resistance evaluations and robustness testing. Samples are subjected to a condensing, highly humid atmosphere under pressure to force moisture into the package to uncover weaknesses such as delamination and metallization corrosion. The practice of this test procedure complied with JESD22-A102D, Accelerated Moisture Resistance - Unbiased Autoclave

**.

Temperature Cycling: This standard applies to single-, dual- and triple-chamber temperature cycling and covers component and solder interconnection testing. This test is conducted to determine the ability of components and solder interconnects to withstand mechanical stresses induced by alternating high- and low-temperature extremes. Permanent changes in electrical and/or physical characteristics can result from these mechanical stresses. The practice of this test procedure complied with JESD22-A104E, Temperature Cycling

**.

**

http://jedec.org/

http://jedec.org/


13

Performance Testing & Preconditioning


14

Electrical Test All RF test were performed using an electronically calibrated N5242A PNA-X Network Analyzer.

Test Fixtures To facilitate RF testing and biasing of the amplifier device, the ADM package was attached to a custom designed test

fixture. Table 2 gives a list of materials used in the construction of the test fixture.

Description / Material

Aluminum Housing

SMA Connector

Feed Through Pins

Screws

Ground Lug

RO 4003 PCB

Silver Epoxy

Solder (SN63)

Table 9

Figure 3 – Custom test fixture that was designed to facilitate HTOL, HAST, HTSL & Autoclave tests. For biased test

methods, the voltages used are shown.

0.1 uF, 2 PL

0.1

uF

101

101

Vd2 Vd(nc)Vg2

Vggnd

(nc) (nc)

A26GLP

YYWW

XXXX

0.1uF

100 pF, 2 PL 10 ohm Resistor

+7V / 130mA (HTOL)

Ground

Ground

+6V / 118mA (HAST)


15

To test packages that were subjected to temperature cycling stress, a press - in test fixture was used.

Figure 4 – Photo of the press – in test fixture designed to facilitate electrical testing of temperature cycled samples.

Preconditioning & Moisture Sensitivity Level (MSL) All samples were subjected to preconditioning & MSL 1 conditions that comply with JESD22-A113F, Preconditioning of

Nonhermetic Surface Mount Devices Prior to Reliability Testing, & J-STD-020D.1, Moisture/Reflow Sensitivity

Classification for Nonhermetic Solid State Surface Mount Devices. Both standards were met using the Pb-free reflow

parameters defined in J-STD-020D.1 and shown in figure 5.

Figure 5 – Pb-free reflow profile used to precondition and set the moisture sensitivity level of all samples.


16

Performance Plots


17

High Temperature Operating Life (HTOL)

Conditions Duration Sample Size Fail Criteria Fails

Tj = 132oC

Vdd = +7V, Vgs = 0V, Ids = 130 mA 1000 Hours 1 lot of 26 units


0

Table 10

Purpose This test simulates the devices’ operating condition in an accelerated way, and is primarily for device qualification and reliability monitoring. Acceleration Factor (AF) & Extrapolated Lifetime were determined. The practice of this test procedure complied with JESD22-A108D, Temperature, Bias, and Operating Life & JESD47I, Stress-Test-Driven Qualification of Integrated Circuits.

Gain Variation (HTOL)

Figure 6 – 17.7GHz gain variation vs duration of environmental stress among all samples.

Histogram and Cumulative Distribution of Gain Variation (HTOL)

Figure 7 – Distribution of gain variation gain among all samples; single unit RMS average.


18

Variation in Idss (HTOL)

Figure 8 – 17.7GHz Idss variation vs duration of environmental stress among all samples.

Histogram and Cumulative Distribution of Variation in Idss (HTOL)

Figure 9 – Distribution of 17.7GHz Idss variation among all samples; single unit RMS average.

Input RL (HTOL)

Figure 10 – 17.7GHz input return loss comparison of 1 sample over 1000 hours of stress.


19

Equivalent Hours Calculation (HTOL)

Identities

Device Hours = Number of Devices x Duration of Test

Equivalent Hours = Device Hours x Acceleration Factor (AF)

AF = exp[EA

K(

1

Tuse

− 1

Tj

)]

EA = Activation Energy (J) K = Boltzmann Constant (m2kg s

-2 K

-1)

TUSE = Operating Temperature (K) Tj = Junction Temperature(K)

Table 11

Values Derived From HTOL Test Method

EA = 236.8 x 10-21

J K = 1.38 x 10-23

m2

kg s-2

K-1

Tuse = 358.15 K (+85o

C) Tj = 405.15 K

Device Hours = 26,000 AF = 259.3

Equivalent Hours = 6.7 x 106

Table 12

Figure 11 – The data points on this plot were calculated using the equivalent hours identities & HTOL test method

derivations. For each of the data points shown, the acceleration factor (AF) was calculated with a temperature of

interest substituted for TUSE. The device hours calculation was not change.


20

Highly Accelerated Temperature and Humidity Stress Test (HAST) Conditions Duration Sample Size Fail Criteria Fails

Vdd = +6, Vgs = 0V, Idss = 107mA Temp = 130

oC, RH = 85%

Vapor Pressure = 33.3psia 96 Hours 1 lot of 20 units


0

Table 13

Purpose This test evaluates the reliability of non-hermetic packaged devices in humid environments. It employs severe conditions of temperature, humidity, and bias which accelerate the penetration of moisture through the external protective material. The practice of this test procedure complied with JESD22-A110D, Highly Accelerated Temperature and Humidity Stress Test.

Gain Variation (HAST)

Figure 12 – 17.7 GHz gain variation vs duration of environmental stress among all samples.

Histogram and Cumulative Distribution of Gain Variation (HAST)

Figure 13 – Distribution of 17.7 GHz gain variation gain among all samples; single unit RMS average.


21

Variation in Idss (HAST)

Figure 14 – 17.7 GHz Idss variation vs duration of environmental stress among all samples.

Histogram and Cumulative Distribution of Variation in Idss (HAST)

Figure 15 – Distribution of 17.7GHz Idss variation among all samples, single unit RMS average.

Input RL (HAST)

Figure 16 – 17.7 GHz input return loss comparison of 1 sample over 96 hours of stress.


22

Accelerated Moisture Resistance (Autoclave) Conditions Duration Sample Size Fail Criteria Fails

Temp = 121oC, RH = 100%

Vapor Pressure = 29.7psia 96 Hours 1 lot of 40 units


0

Table 14

Purpose This test method applies primarily to moisture resistance evaluations and robustness testing. Samples are subjected to a condensing, highly humid atmosphere under pressure to force moisture into the package to uncover weaknesses such as delamination and metallization corrosion. The practice of this test procedure complied with JESD22-A102D, Accelerated Moisture Resistance - Unbiased Autoclave.

Gain Variation (Lot 1_AC)

Figure 17 –17GHz Gain variation vs duration of environmental stress among all samples in lot 1.

Variation in Idss (Lot 1_AC)

Figure 18 – 17.7 GHz Idss variation vs duration of environmental stress among all samples in lot 1.


23

Input RL (Lot 1_AC)

Figure 19 – 17.7GHz input return loss comparison of 1 sample over 96 hours of stress.

Gain Variation (Lot 2_AC)

Figure 20 – 17.7GHz gain variation vs duration of environmental stress among all samples in lot 2.

Variation in Idss (Lot 2_AC)



24

Input RL (Lot 2_AC)

Figure 22 – 17.7GHz input return loss comparison of 1 sample over 96 hours of autoclave stress.

Histogram and Cumulative Distribution of Gain Variation (Lots 1 & 2_AC)

Figure 23 – Distribution of 17.7GHz Idss variation among all samples; lots 1& 2; single unit RMS average.

Histogram and Cumulative Distribution of Variation in Idss (Lots 1 & 2_AC)

Figure 24 – Distribution of 17.7GHz gain variation among all samples; lots 1 & 2; single unit RMS average.

0.00%

20.00%

40.00%

60.00%

80.00%

100.00%

0

2

4

6

8

10

0.06 0.08 0.10 0.12 0.14 0.16 0.18 0.20

Nu

mb

er

of

Sam

ple

s

Gain Change Intervals (dB)

Distribution of Typical Gain Variation


25

High Temperature Storage Life (HTSL) Conditions Duration Sample Size Fail Criteria Fails

Temp = 150oC 1000 Hours 1 lot of 10 units


0

Table 15

Purpose This test is typically used to determine the effects of time and temperature, under storage conditions, for thermally activated failure mechanisms and time-to failure distributions of solid state electronic devices. The practice of this test procedure complied with JESD22-A103D, High Temperature Storage Life.

Gain Variation (HTSL)

Figure 25 – 17.7 GHz gain variation vs duration of environmental stress among all samples.

Histogram and Cumulative Distribution of Gain Variation (HTSL)

Figure 26 – Distribution of 17.7 GHz gain variation gain among all samples; single unit RMS average.


26

Variation in Idss (HTSL)

Figure 27 – 17.7 GHz Idss variation vs duration of environmental stress among all samples.

Histogram and Cumulative Distribution of Variation in Idss (HTSL)

Figure 28 – Distribution of 17.7GHz Idss variation among all samples; single unit RMS average.

Input RL (HTSL)

Figure 29 – 17.7 GHz input return loss comparison of 1 sample over 1000 hours of stress


27

Temperature Cycling (TC) Conditions Duration Sample Size Fail criteria Fails

Ts (min) = -65oC Ts (max) = +150

oC

Transition Time = 43 minutes Dwell Time = 10 Minutes

500 Cycles 1 lot of 29 units 1dB change in gain or 10mA change in Idss

0

Table 16

Purpose This standard applies to single-, dual- and triple-chamber temperature cycling and covers component and solder

interconnection testing. This test is conducted to determine the ability of components and solder interconnects to

withstand mechanical stresses induced by alternating high- and low-temperature extremes. Permanent changes in

electrical and/or physical characteristics can result from these mechanical stresses. The test procedure complied with

JESD22-A104E, Temperature Cycling.

Temperature Cycling (Lot 1)

Figure 30 – 17GHz Gain variation vs duration of environmental stress among all samples in lot 1.




28


Figure 32 – 17.7GHz input return loss comparison of 1 sample over 500 cycles of stress.


Figure 33 – 17.7GHz gain variation vs duration of environmental stress among all samples in lot 2.




29


Figure 35 – 17.7GHz input return loss comparison of 1 sample over 500 cycles of stress.

Temperature Cycling (Lots 1 &2)

Figure 36 – Distribution of gain variation among all temperature cycling samples in lots 1 & 2; single unit RMS average.

Temperature Cycling (Lots 1 & 2)

Figure 37 – Distribution of Idss variation among all temperature cycling samples in lots 1 & 2; single unit RMS average.

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