Mixed signal systems and integrated circuits signal... · 2010. 4. 2. · quantizer and dynamic...
Transcript of Mixed signal systems and integrated circuits signal... · 2010. 4. 2. · quantizer and dynamic...
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2008/1/18 A. Matsuzawa 1
Mixed signal systems and integrated circuits
Akira Matsuzawa
Tokyo Institute of Technology
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2008/1/18 A. Matsuzawa 2
Over sampling ADC and DAC
Sigma-delta modulation
1. Z transform2. Noise shaping3. Sigma-delta modulation4. SNR5. Hider order system6. Multi-stage Sigma-delta modulation7. Recent important developments8. Design example
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2008/1/18 A. Matsuzawa 3
Higher order sigma-delta modulation
Higher order sigma-delta modulator becomes unstable easily.
Cascade connection of the integrators Quantizer
111
−− z 111
−− z 1−z... Q
( ) ( ) ( ) ( )
( ) )z(Ez)z(X)z(Y
QYz
z.....YzzY
zzX
zY
k
kkk
1
1
1
11
1
1
1
1
1
11111
−
−
−
−−
−
−
−
−
−+=
∴
+−
−−−
−−
−−
=
111
−− z
OutHIn
The feed back loop becomes unstabledue to large phase delay,When the order is larger than 2.
Increase the resolution of the quantizerfor stabilization
3rd-- >10 steps 4 th ---- >30
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2008/1/18 A. Matsuzawa 4
Actual 4th order Sigma-delta ADC
+X +1
1
1 −
−
− zz
a2a1
+1
1
1 −
−
− zz
1
1
1 −
−
− zz
nQ Y+
a3 a4
1
1
1 −
−
− zz
( )( ) ( ) ( ) ( ) 4
1311
2221
3131
441
41
11111
−−−−−−−−
−
+−+−+−+−
−
zazzazzazzazzNTF :
Needs adjustment coefficients for system stabilization.
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2008/1/18 A. Matsuzawa 5
Feed forward type
( ) ( )
( ) ( )
( ) ( )N
kikk
ii
ikk
ii
k
N
k
ii
i
QAzXa
A
zaY
zazzA
QYzXaz
aY
1
0
1
1
1
1
11
10
11
11
11
1
−
−−
=
−−
=
−−
−
=−
−+
−=
−+−≡
+−⎪⎭
⎪⎬⎫
⎪⎩
⎪⎨⎧
−=
∑
∑
∑
( )N
k
kkc
QazXaY
aAffz1
0
1
1
1−
−
−+≅∴
≅∴<<≅ )(
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2008/1/18 A. Matsuzawa 6
Feed forward technique
Feed forward technique is effective to stabilize the feed back loop.
111
−− z+ 111
−− z +1−z
...Quantization
QOut
a1a2 ak-1
111
−− z
H
In
Adjust the coefficients to satisfy the feed back stability.
( ) ( )
( ) ( )
( ) ( )N
kikk
ii
ikk
ii
k
N
k
ii
i
QAzXa
A
zaY
zazzA
QYzXaz
aY
1
0
1
1
1
1
11
10
11
11
11
1
−
−−
=
−−
=
−−
−
=−
−+
−=
−+−≡
+−⎪⎭
⎪⎬⎫
⎪⎩
⎪⎨⎧
−=
∑
∑
∑( )
Nk
kkc
QazXaY
aAffz1
0
1
1
1−
−
−+≅∴
≅∴<<≅ )(
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2008/1/18 A. Matsuzawa 7
General expression of ΣΔ modulator
Quantizer Output signalInput signal
+ )(zH
)(zF
nQX Y
nQzFzH
XzFzH
zHY)()()()(
)(+
++
=1
11
)()()(
zFzHzH
+1STF: Signal Transfer Function
)()( zFzH+11
NTF: Noise Transfer Function
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2008/1/18 A. Matsuzawa 8
Actual SNR of Sigma delta ADC
M 阪大 谷口教授より
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2008/1/18 A. Matsuzawa 9
Pole, zero, and frequency characteristics
Unit circle
Zeros: Z=1Quadrature
Poles
阪大 谷口教授より
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2008/1/18 A. Matsuzawa 10
Design for position of zeros
Deeper blacking for noise in signal-band
1=z
Spiting zeros on the unit circle
阪大 谷口教授より
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2008/1/18 A. Matsuzawa 11
Local resonators
Local resonator can form the zeros
)()(:
zFzHNTF
+11
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2008/1/18 A. Matsuzawa 12
Effect of zero-spreading
阪大 谷口教授より
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2008/1/18 A. Matsuzawa 13
MASH (Multi-stage noise shaping)
111
−− z+
1−z
Q1
+
+
11 −− z
111
−− z+
1−z
Q2
+
+
11 −− z
111
−− z+
1−z
Q3
X
-Q1
-Q2
1st
quantization noise
Y1Y
Y2
Y3
2nd
quantization noise
( )( )( ) 3
123
21
12
11
1
11
1
QZQYQZQY
QZXY
−
−
−
−+−=
−+−=
−+=
( ) ( )( ) 3
31
321
21
1
1
11
QZXY
YZYZYY−
−−
−+=∴
−+−+=
Feed forwarded multi-stage noise shaping architecture is free from instability,however requires good matching.
Realizing the stable 3rd order sigma delta modulation.
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2008/1/18 A. Matsuzawa 14
Continuous time ΣΔADC
We can make sigma delta ADC with CT filter.
L. Breems and J.H. Huijsing,”Continuous-time sigma-delta modulation for A/D conversion in radio Receivers”Kluwer
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2008/1/18 A. Matsuzawa 15
Effect of clock jitter
SNR of CT ΣΔADC is very sensitive to the clock jitter.In contrast, DT type is not so.
DAC Pulse
2281
Tbwit Mf
SNR∆
≈σlim_
Ts
SNR=85dB, M=32, fbw=1.25MHz, 2.8psfbw=12.5MHz, 0.028ps
T∆σ
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2008/1/18 A. Matsuzawa 16
High dynamic range design
Sigma delta method with multi-bit quantizer and dynamic element matching technique realized 25MS/s, 80dB ADC.
P. Balmelli, et al., ISSCC 2004
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2008/1/18 A. Matsuzawa 17
Add new functionSigma-delta ADC can change the performance by changing over sampling ratio and filter characteristics. High DR and narrow BW
Low DR and wide BW Compatible:
T. Burger and Q. Huang, ISSCC 2001
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2008/1/18 A. Matsuzawa 18
Add new functionDelta-sigma ADC can use complex band-pass filter.Analog filter and VGA can be removed from IF stage.
gm-C filter
K. Philips, ISSCC 2003
Complex band-pass sigma-delta
5th order complex sigma-delta 1b, @64MHz
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2008/1/18 A. Matsuzawa 19
LV and LP design0.8V 1.5mW CT sigma-delta modulator attained 50dB at 2MHz in.
Low voltage OTA
Conventional SC integrator
2nd order, 16x over sampling ADC
Simple low voltage OTA enabled itT. Ueno, et al., ISSCC 2004
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2008/1/18 A. Matsuzawa 20
Design example of ΣΔ型ADC
Matsuzawa Lab. Now designing high speed sigma delta ADC
Signal bandwidth:10MHzDynamic range: >80dB
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2008/1/18 A. Matsuzawa 21
Design issuesフィルタ・ 高次の方が量子化ノイズ抑制大・ しかし安定性確保が困難
サンプリング容量・ 小さいと高スルーレート・ しかしkT/Cノイズ大
量子化ノイズ・ 量子化器が高分解能だと少ない・ しかし限界や非理想性がある
オペアンプ・ 初段の入力換算ノイズは抑制がきかない・ 実際のゲインは有限
近似
+
量子化ノイズ QN
+
クロック
フィルタ
DAC
量子化器入力 X(アナログ)
出力 Y(デジタル)
+-
量子化器・ 積分非直線誤差(INL)や微分非直線性誤差(DNL)がある
クロックジッター・ サンプリング時間のずれが雑音を生じる
DAC素子のばらつき・ フィードバック抑制がきかない
MATLAB/Simulink の可変パラメータモデルによるシミュレーション
どこがどの程度性能に影響するのか?
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2008/1/18 A. Matsuzawa 22
Architecture
シミュレーションの概要
1、上図のフィルタの係数を決定する
2、以下の可変パラメータ・ノイズ・非理想性を加えたモデルの作成振幅・周波数等 量子化器積分非直線性誤差オーバーサンプリング率 DAC素子ばらつき量子化分解能 オペアンプノイズジッター オペアンプゲインスルーイング 振幅範囲
サンプリング容量(kT/Cノイズ)
3、各パラメータを変化させてシミュレーションを行いSNRをグラフ化、考察
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2008/1/18 A. Matsuzawa 23
Transfer function, pole and zero location for stability
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2008/1/18 A. Matsuzawa 24
Simulation model with Simulink
積分器係数0.75 0.40 0.30 0.15 0.15ローカルフィードバック係数0.05 0.25(比較用に 0.0 0.0 も)
信号帯域 10MHzサンプリング周波数 640MHz(オーバーサンプリング率32)量子化器分解能 4bit
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2008/1/18 A. Matsuzawa 25
SNR vs. Input signal intensity
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2008/1/18 A. Matsuzawa 26
SNR vs. M
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2008/1/18 A. Matsuzawa 27
SNR vs. Quantizing level
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2008/1/18 A. Matsuzawa 28
SNR vs. Jitter
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2008/1/18 A. Matsuzawa 29
SNR vs. Capacitor
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2008/1/18 A. Matsuzawa 30
SNR vs. quantizer INL
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2008/1/18 A. Matsuzawa 31
SNR vs. DAC nonlinearity
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2008/1/18 A. Matsuzawa 32
SNR vs. gain of OP amp
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2008/1/18 A. Matsuzawa 33
References
• J.C. Candy and G.C. Tems, “Oversampling Delta-Sigma Converters,” IEEE Press, 1992.
• Rudy van de Plassche, “ CMOS Integrated Analog to Digital and Digital to Analog Converters,” Kluwer.
• F. Medeiro, A. Perez-Verdu and A. Rodriguez-Vazquez, “Top-Down Design of High-Performance Sigma-Delta Modulators,”, Kluwer.
• C. Toumanzou, G. Moschytz, and B. Bilbert, “Trade-offs in Analog Circuit Design,” Kluwer.
• 岩田 「CMOSアナログ回路設計技術」 トリケップス