Mini Project Arai Hanis

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Mini Project: CASCADED SMALL SIGNAL AMPLIFIER 1.0 Objectives: To investigate the ac operation of the JFET small signal common source (CS) amplifier. To investigate the ac operation of the BJT small signal common emitter (CE) amplifier with feedback. To investigate the overall performance of a cascaded small signal amplifier. To determine the budget required for the cascaded small signal amplifier. To propose retail price of the cascaded small signal amplifier. 2.0 Instruction : Cascading amplifiers are a common practice in electronics, due to several reasons. Using the JFET as the input element means that the circuit has high input impedance, while the BJT ensures maximum gain. The combinational effect should provide wide bandwidth and significant level of linearity. An example of possible application will be in audio amplifier system, where gain, impedance matching, linearity and bandwidth are some of the important requirements to ensure the system satisfies audiophile needs. In this mini project, a cascading preamplifier system is given to you and your partner of evaluation. Your work begins with calculating the ac small signal parameters. The circuit also need to be simulated to confirm its functionality. Further, you have to construct the sub-circuits, measure the bias values, test the sub-circuit, integrate testing of the final product on a strip board, and produce a technical report detailing the findings and suggestions for improvement.
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Mini Project: CASCADED SMALL SIGNAL AMPLIFIER 1.0 Objectives: To investigate the ac operation of the JFET small signal common source (CS) amplifier. To investigate the ac operation of the BJT small signal common emitter (CE) amplifier with feedback. To investigate the overall performance of a cascaded small signal amplifier. To determine the budget required for the cascaded small signal amplifier. To propose retail price of the cascaded small signal amplifier.

2.0 Instruction :

Cascading amplifiers are a common practice in electronics, due to several reasons. Using the JFET as the input element means that the circuit has high input impedance, while the BJT ensures maximum gain. The combinational effect should provide wide bandwidth and significant level of linearity. An example of possible application will be in audio amplifier system, where gain, impedance matching, linearity and bandwidth are some of the important requirements to ensure the system satisfies audiophile needs.

In this mini project, a cascading preamplifier system is given to you and your partner of evaluation. Your work begins with calculating the ac small signal parameters. The circuit also need to be simulated to confirm its functionality. Further, you have to construct the subcircuits, measure the bias values, test the sub-circuit, integrate testing of the final product on a strip board, and produce a technical report detailing the findings and suggestions for improvement.

3.0 Procedure: TASK 1: Given Rs = 1k, h-parameter values for 2N2222A :hie = 1.2k, hre = 20 x 106, hfe = 180 and hoe = 20 x 10 S and 2N3819 JFET having device parameters IDSS = 10mA,Vp = -4V and rd = ; Calculate the parameters that have been involved in the AC Small Signal Analysis for the cascaded circuit shown in figure 2.0 .

Figure 2.0

Lab Calculation Cascade Amplifier (BJT and JFET) Stage 1 (JFET amplifier) Remove source and load impedance

239.24k

2.4k

Find input impedance, Zi RG = 2.1M // 270k = 239.24k Zi = RG = 239.24k

Find output impedance, Zo Zo = rd// RD = RD = 2.4k , where rd =

DC analysis for JFET amplifier Do dc analysis to find VGSQ and IDQ, where use to find Av with gm not given Given IDSS = 10mA, Vp = - 4V Using Shockley Equation, to find 2 point on graph

ID = IDSS Let VGS = - 1V ID = 10m = 5.625mA Point 1 (-1, 5.625) Let VGS = - 3V ID = 10m = 0.625mA Point 2 (-3, 0.625)

Find VGS line

Vth = = = 2.392V

V DD

Loop at Thevenin circuit -Vth + VRth + VGS +VRS = 0 VGS = Vth VRS = 2.392 - ID (Rs) , where IG = 0

Let ID = 0 VGS = Vth = 2.392V Point 3 (2.392, 0)

Let VGS = 0 0 = 2.392 - ID (Rs) ID (Rs) = 2.392 ID = = 1.6mA Point 4 (0, 1.6)

After all point is placed, transfer curve can be drawn.

From Q point VGSQ = -1.85V and IDQ = 2.4mA

Find voltage gain, Av where VGSQ = -1.85V Av = = -gmZo

= -gmo

=

= = - 6.45

So, AVNL = -6.45 Ri = Zi = 239.24k Ro = Zo = 2.4k

Draw the 2 port network equivalent for Stage 1

2.4k

239.24k

-6.45

Stage 2 (BJT amplifier) Remove source and load impedance

1.268k 3.9k

Find overall output impedance, Zo Zo =

// Rc// 3.9k

=

= 3.618k

Find overall input impedance, Zi Zi = RB // Zi = 1.268k // 55.199k = 1.24k

RB = 8.2k // 1.5k = 1.268k

Find input impedance, Zi

Zi =

=

= = 1.2k + (180)(0.3k) + (2 x 10 6)(- (180)(3.618k) = 55.199k

Find voltage gain, Av

Av =

= = == = -11.79

So, AVNL = - 11.79 Ri = Zi = 1.24k Ro = Zo = 3.618k

Draw for

the 2 port network equivalent circuit Stage 2

3.618k

1.24k

-11.79

Draw block diagram for each stage (Stage 1 and Stage 2)

+ Vi _

For Stage 1 AVNL = - 6.45 Ri = 239.24kRo = 2.4k

For Stage 2 AVNL = - 11.79 Ri = 1.24kRo = 3.618k

+ Vo _

Two Port Network Equivalent Circuit for Stage 1 and Stage with effect of Rs and RL Stage 1 Stage 2

1k

2.4k

3.618k

100k 239.24k -6.45 1.24k -11.79

Find loaded gain, Avload of each stage Avload1 =

AVNL1

= = - 2.197 Avload2 = = = - 11.38

(-6.45)

AVNL2 (- 11.79)

Find total gain, Av total Avtotal = Avload1 x Avload2 = (- 2.197) (-11.38) = 25.002

Find overall voltage gain, Avs Avs = = Avtotal = 25.002 = 24.898

Find output voltage Av = Vo = AvVi = 24.898 (20m) = 497.96 mV TASK 2a: For the 2N3819 JFET having device parameters IDSS = 10mA,Vp = -4V and rd = ;

i-

Construct the circuit in figure 1.0 and measure the values of VGS and ID as outlined in Table 1.

Parameter VGS (V) ID (mA)

Measured value -1.2 V 2.3 mA

TASK 2b 1. Construct the Stage 1 of the circuit, as shown in figure 2.0

2. Apply a 1kHz, 20mVp-p ac signal to the input of the amplifier.

3. Measure the output voltage, V01and determine the voltage gain, Av1 of the amplifier (Stage

1)

Measurement point V01 Voltage Gain Av1 = -141mV 20m = -7.05

Value (V) 141mV

4. Neatly draw both input and output signals of stage 1 on the grid provided.

INPU

OUTPU

CH1 : 50mV V/div Time/Div: 0.2ms

CH2 : 20mv Time/Div: 0.2ms

V/div

5. Measure both the input impedance, Zi and the output impedance, Zo of the JFET amplifier. (Refer to appendix 1)

Parameter

Value (Ohm)

Zi Zo

undefined 1.78

TASK 2c: Repeat the same procedure of Task 2b for BJT amplifier (Stage 2) shown in figure 3.0. Measurement point V02 The voltage gain, AV2 of the amplifier (Stage 2). Voltage gain, AV2 = 237mV 20m = 11.85 Value (V) 237mV

Neatly draw both input and output signals of Stage 2 on the grid provided.

INPU

OUTPU

CH1 : 50m V/div Time/Div: 0.2m

CH2 : 10mV/div Time/Div: 0.2m

The input and the output impedance, of the BJT amplifier.

Parameter Zi Zo

Value (Ohm) 1.23 k 3.54k

TASK 2d: When both sections comply with your gain requirements, combine the TWO (2) Stages amplifiers to make up a complete cascaded small signal amplifier circuit as in figure 2.0. Produce the cascaded amplifier circuit on the strip board. Test your circuit for gain and bandwidth compliances.

1. Apply a 1kHz, 20mVp-p ac signal to the input of the amplifier.2. Measure the output voltage, V02; hence determine the overall voltage gain, Avo of the

amplifier.

Measurement point V02

Value (V) 575mV

Overall Voltage gain, Avo= 575mV/20m = 28.75

Neatly draw both input and output signals of the cascaded amplifier on the grid provided.

OUTPU

INPU

CH1 : 20m

V/div

CH2 : 0.2 V/div Time/Div: 0.2m

Time/Div: 0.2m

3. Varies the input frequency of the amplifier and measure Output Voltage, V02. Fill in

table 2. Produce the Bode plots of the response using Semi-log graph paper and determine the cut-off frequencies and the bandwidth, Bw of the amplifier. Vin Input Frequency 10 30 50 100 400 700 1k 3k 5k 20mV p-p 10k 20K 30k 40k 60k 80k 100K 250k 500k 800k 1M 5M 10M TASK 3: V02 92.8mV 270mV 369mV 409mV 566mV 568mV 568mV 568mV 568mV 568mV 568mV 566mV 563mV 557mV 548mV 538mV 448mV 306mV 213mV 176mV 95mV 79mV AVO 4.64 13.5 18.45 20.45 28.3 28.4 28.4 28.4 28.4 28.4 28.4 28.3 28.15 27.85 27.4 26.9 22.4 15.3 10.65 8.8 4.75 3.95

Using suitable software, simulate the circuit and print the complete result of task 2d. Documents your findings from simulation in the lab report. Produce the cascaded amplifier circuit on the strip board. Test your circuit for gain and bandwidth compliances. 1. Apply a 1khz, 20 mVp-p ac signal to the input of the amplifier.

2. Measure the output voltage,Vo2; hence determine the overall voltage gain, Avo of the amplifier.

Measurement Point Vo2

Value (Vp-p) 48.3mV

Overall Voltage Gain, AVo = -(Vo/Vi) = -(-48.3m/20m) = 2.415

Varies the input frequency of the amplifier and measure Output Voltage, Vo2.

Vin = 20mV p-pInput Frequency 10 30 50 100 400 700 1k 3k 5k 10k 20k 30k 40k 60k 80k 100k 250k 500k 800k 1M 5M 10M Vo2p-p 5.5mv 15.6mv 23.7mv 38.9mv 47.6mv 48.1mv 48.3mv 48.5mv 48.2mv 48.2mv 48.2mv 48.7mv 48.7mv 48.5mv 48.2mv 48.2mv 48.5mv 48.2mv 48.2mv 48.4mv 35.1mv 21mv Avo 0.27 0.78 1.186 1.945 2.38 2.405 2.415 2.425 2.41 2.41 2.41 2.435 2.435 2.425 2.41 2.41 2.425 2.41 2.41 2.42 2.25 1.05

Produce the Bode plots of the response

2.4378 x 0.707 = 1.723

Determine the cut-off frequencies(fl-fh)and the bandwidth,Bw of the cascaded amplifier.

fL= 58.84Hz

fH = 6.026MHz

Bandwidth

= fH fL = 6.026 MHz 58.84 Hz = 6.025941Mhz

TASK 4 Analysis the result obtain from the calculation, experiment and by simulation Measure the value ofParameter (V) (A)

andCalculation - 1.85V 2.4mA Experiment -1.2V 2.3mA

Measure of the peak-to-peak output voltage stage 1, ParameterOutput (V) Voltage Gain, -6.45 -7.0 Voltage,

Calculation-

Experiment140 mVpp

Measure of the input impedance,Parameter Input Impedance, Output Impedance,

and output impedance,Calculation 239.24 k

at stage 1Experiment undefined

2.4 k

1.78 k

Measure of the peak-to-peak output voltage stage 2, ParameterOutput (V) Voltage Gain, - 11.79 -11.85 Voltage,

Calculation-

Experiment237mVpp

Measure of the input impedance,Parameter Input Impedance, Output Impedance,

and output impedance,Calculation 1.24 k

at stage 2Experiment 1.32 k

3.618 k

3.54 k

Measure of the peak-to-peak output voltage completed cascaded circuit, ParameterOutput (V) Voltage Gain, 25.002 28.4 2.415 Voltage,

Calculation497.96mVpp

Experiment568mVpp

Simulation48.3 mVpp

Determine the cut-off frequencies ( and ) and the bandwidth, BwParameter Experiment Simulation

Lower Frequency, (Hz) Upper Frequency, (Hz) Bandwidth, Bw

780

58.84

118 k

6.026M

117.22k

6.025941M

For this mini project, we need to construct the Cascaded small-signal amplifier. First, before doing the lab practical we have to calculate the theoretical value of what we should obtain during do the hands-on lab. So, we have calculated the value of voltage gain,Avo, input impedance, Zi, output impedance, Zo. The value of calculation was listed in the table. As given in the lab sheet, during the lab practical have some parameters to measure. The value of measurement of lab practical was shown in the listed table. First for task 2a,DC analysis for JFET circuit, we have to measure and . From the practical value and calculation value get some minor difference, it maybe because of the component error which the and the JFET parameters is not same what are given in the lab sheet to do the calculation. Then for task 2b for the AC analysis, we measure the output voltage and calculate the voltage gain. The output we get it is without any distortion and its inverted. There are a little bit difference values between lab practical and calculation. It maybe because during the practical lab we changed the value 2.1 M resistor with the resistor value 2M or during implement setting of the voltage input get some difference value. For the input impedance, Zi the calculation value was 239.24 k while the practical value was undefined. It JFET theory provides a very high input impedance, so when we do the lab practical get a distortion at the output waveform. The output impedance a little bit different between calculation and practical value and it maybe because tolerance in the components. Next for task 2c for the BJT AC analysis, we measure the output voltage and calculate the voltage gain. The output we get it is without any distortion and out of phase between the input and output waveform. There are a difference values between lab practical and calculation it because we measured the Av loaded which is including the 100 k, which is the Av loaded for stage two but it still have a little bit difference. Its maybe because some different value for BJT parameters, when we do the calculation and in the real components. For the input impedance, Zi and the output impedance, Zo a little bit different between calculation and practical value and it maybe because tolerance in the components.

After that for task 2d for the completed cascaded small signal amplifier, we measure the output voltage and calculate the voltage gain. The output we get it is without any distortion and in phase between the input and output waveform. It because it was inverted at the first stage cascaded circuit and it was invert back at the stage 2. There are almost the same values between lab practical and calculation which has bit difference and it maybe because we measured the Av loaded which is including the internal resistance of the function generator. With varying input frequency, the output voltage and gain are measured and recorded in the provided table and sketch a graph using semilog graph paper and from the graph it can clearly see the highest and stable Av is 28.4. From the graph it determines the Lower Frequency, 780Hz and Upper Frequency, 118kHz and also bandwidth, Bw 117.22 kHz. For the simulation we doing only task 2d, measure the output voltage and calculate the voltage gain of the amplifier. Based on the calculation, lab practical and simulation get a difference value of output voltage and voltage gain. For the measurement of bandwidth with using bode plot. From the simulation the value that we get is Lower Frequency, 58.84Hz and Upper Frequency, 6.026MHz and also bandwidth,Bw 6.025941 M. it also different value that we get from the lab practical value. One cause of the difference the result is in the simulation the transistor 2N3819 didnt have in the Multisim software, so we replace with almost same characteristic FET transistor with using 2N3821. So, it maybe varies the value of this cascaded amplifier circuit.

Task 5 Prepare the costing for the cascaded amplifier and suggest the retail price of the circuit. Justify your answer.

Component

Quantity

Price/unit (RM)

Total Price (RM)

Resistor Transistor Capacitor Strip board Wire jumper Soldering lead

10 2 5 1 0.5 m 0.5 m

0.05 0.40 0.10 1.50 1.00 2.50 TOTAL A

0.50 0.80 0.50 1.50 0.50 1.25 RM 5.05

Worker

Hour

Price/hour (RM)

Total Price (RM)

Soldering

1.5

3.00

4.50

testing

1

4.00 TOTAL B

4.00 RM8.50

TOTAL COST

= TOTAL A + TOTAL B =RM5.05 + RM8.50 =RM13.55 = 15% = 15% x Total Cost = RM 2.03

PROFIT

RETAIL PRICE = TOTAL COST + PROFIT = RM 13.55 + RM 2.03 = RM 15.58 Calculation for one completed cascaded small-signal amplifier

Based on the table above, it show total cost for one completed cascaded amplifier circuit. The cost A show the price of component and the cost B show the workers salary. Salary workers for the soldering it maybe one and half hour to complete soldering the and for the testing process which is to troubleshooting and testing the amplifier circuit it take maybe an hour to finish. The salary price was suitable with the experience and knowledge about construct, solder, testing and troubleshooting of cascaded small-signal amplifier. For the retail price of this cascaded amplifier, the selling price is about RM 15.58. It is because we take a 15% profit of total cost for one completed cascaded amplifier. One of the advantages of this amplifier is produces high gain which is 50. The circuit was constructed and solder properly. The profit of the amplifier will be used for improvement in another amplifier in the future.

Task 6: Viva