Microprocessors Lab Manual Original
-
Upload
chaitanya-ymr -
Category
Documents
-
view
232 -
download
0
Transcript of Microprocessors Lab Manual Original
-
7/29/2019 Microprocessors Lab Manual Original
1/81
-
7/29/2019 Microprocessors Lab Manual Original
2/81
-
7/29/2019 Microprocessors Lab Manual Original
3/81
Microprocessors and Interfacing Lab
Head CSE
3
-
7/29/2019 Microprocessors Lab Manual Original
4/81
Microprocessors and Interfacing Lab
S.No Contents Page No
1 Lab Objective I
2 Introduction About Lab II
3 Guidelines to Students III
4 List of Lab Exercises 2
5 Solutions for Programs 5
4
-
7/29/2019 Microprocessors Lab Manual Original
5/81
Microprocessors and Interfacing Lab
INDEX
SI.NO EXPERIME
NT NO. NAME OF THE EXPERIMENT PAGE NO
MICRO PROCESSOR PROGRAMS(CYCLE-1)
1. 1 Introduction to TASM
2 2
8- Bit Arithmetic Operations
a) Addition of Two 8-bit
Numbers
b) Subtraction of Two 8-bit
Numbers
c) Multiplication of Two 8-bit
Numbers
d) Division of Two 8-bit
Numbers
3 3
16- Bit Arithmetic Operations
a) Addition of Two 16-bitNumbers
b) Subtraction of Two 16-bit
Numbers
c) Multiplication of Two 16-bit
Numbers
d) Division of Two 16-bit
Numbers
4 4
Multi bit Operations
a) Addition of Two 32-bit
Numbers
b) Subtraction of Two 32-bit
Numbers
c) Multi Byte Addition
d) Average of N Numbers
5
-
7/29/2019 Microprocessors Lab Manual Original
6/81
-
7/29/2019 Microprocessors Lab Manual Original
7/81
Microprocessors and Interfacing Lab
String
11 11
Using DOS-BIOS Interrupts
a) To read aString from DOS
Prompt
b) To display String on the
DOS Prompt
INTERFACING PROGRAMS
(CYCLE-2)
12 12 Interfacing with 8259 PIC
13 13 Interfacing with 8255 PPI
14 14 Interfacing with 8251 USART
MICRO CONTROLLER PROGRAMS
(CYCLE-3)
15 15To Understand First Memory Area
From (00-1F)
16 16To Understand Second Memory
Area From (20-2F)
17 17To Understand Third Memory Area
From (30-7F)
18 18To Understand the Memory Area of
80-FF
19 19 SWAP Operation
20 20 SET-RESET
7
-
7/29/2019 Microprocessors Lab Manual Original
8/81
-
7/29/2019 Microprocessors Lab Manual Original
9/81
-
7/29/2019 Microprocessors Lab Manual Original
10/81
-
7/29/2019 Microprocessors Lab Manual Original
11/81
-
7/29/2019 Microprocessors Lab Manual Original
12/81
-
7/29/2019 Microprocessors Lab Manual Original
13/81
-
7/29/2019 Microprocessors Lab Manual Original
14/81
-
7/29/2019 Microprocessors Lab Manual Original
15/81
-
7/29/2019 Microprocessors Lab Manual Original
16/81
-
7/29/2019 Microprocessors Lab Manual Original
17/81
-
7/29/2019 Microprocessors Lab Manual Original
18/81
Microprocessors and Interfacing LabExperiment:3(b)
16-Bit Subtraction
Aim: To perform the subtraction of two 16 bit numbers
Apparatus: Tasm software
AlgorithmStep1 : startStep2: initialize data segmentStep3: move one variable data into ax and move one variable data into bxStep4: subtract the contents of bx from axStep5: store the result in d3 variablestep6:stop
Source codedata segmentd1 dw 7000hd2 dw 8000hd3 dw ?data endscode segmentassume cs:code,ds:datastart:mov ax,datamov ds,ax
mov ax,d1mov bx,d2sub ax,bxmov d3,axsbb ah,00hmov byte ptr d3+2,ahmov ah,4chint 21hcode endsend start
Result
The subtraction of two 16 bit numbers is completed successfully
18
-
7/29/2019 Microprocessors Lab Manual Original
19/81
-
7/29/2019 Microprocessors Lab Manual Original
20/81
-
7/29/2019 Microprocessors Lab Manual Original
21/81
-
7/29/2019 Microprocessors Lab Manual Original
22/81
-
7/29/2019 Microprocessors Lab Manual Original
23/81
-
7/29/2019 Microprocessors Lab Manual Original
24/81
-
7/29/2019 Microprocessors Lab Manual Original
25/81
-
7/29/2019 Microprocessors Lab Manual Original
26/81
Microprocessors and Interfacing Labdec cl
jnz gomov ah,4chint 21hcode endsend start
RESULT:
The multibyte addition is completed successfully.
26
-
7/29/2019 Microprocessors Lab Manual Original
27/81
-
7/29/2019 Microprocessors Lab Manual Original
28/81
-
7/29/2019 Microprocessors Lab Manual Original
29/81
-
7/29/2019 Microprocessors Lab Manual Original
30/81
-
7/29/2019 Microprocessors Lab Manual Original
31/81
-
7/29/2019 Microprocessors Lab Manual Original
32/81
-
7/29/2019 Microprocessors Lab Manual Original
33/81
Microprocessors and Interfacing LabExperiment No:7(a)
Signed Multiplication Operation
AIM: To perform signed multiplication operation of two 8-bit numbers.
APPARATUS: TASM Software
ALGORITHM:
Step-1: StartStep-2: Initialize the data segmentStep-3: Move the contents of two input variables into registers al,bl respectivelyStep-4: Perform the Integer Multiplication of the contents of registers al and blStep-5: Store the result in an output variable as output dataStep-6: Stop
SOURCE CODE:
data segmentd1 db 10hd2 db 0FChd3 dw ?
data endscode segment
assume cs:code,ds:datastart:
mov ax,datamov ds,axmov al,d1mov bl,d2imul blmov d3,axmov ah,4chint 21h
code endsend start
RESULT:
The signed multiplication operation of two 8-bit numbers is successfully
completed.
33
-
7/29/2019 Microprocessors Lab Manual Original
34/81
-
7/29/2019 Microprocessors Lab Manual Original
35/81
Microprocessors and Interfacing LabExperiment No:8(a)
Conversion Of Packed Bcd To Unpacked Bcd
AIM: To perform conversion of BCD numbers from packed to unpacked form.
APPARATUS: TASM Software
ALGORITHM:
Step-1: StartStep-2: Initialize the data segmentStep-3: Move the contents of input data into registers axStep-4: Move the contents of register ax into bxStep-5: Perform the AND operation between register ax and 000Fh & store it in axStep-6: Perform the AND operation between register bx and 00F0h & store it in bxStep-7: Perform ROTATE-LEFT operation for register bx 4 timesStep-8: Perform the OR operation between registers ax and bx
Step-9: Store the result of unpacked BCD as output dataStep-10: Stop
SOURCE CODE:
data segmentd1 dw 0054hd2 dw ?
data endscode segment
assume cs:code,ds:datastart:
mov ax,datamov ds,axmov ax,d1mov bx,axand ax,000Fhand bx,00F0hrol bx,04hor ax,bxmov d2,axmov ah,4ch
int 21hcode endsend start
RESULT:
The conversion of BCD numbers from packed to unpacked form issuccessfully completed.
35
-
7/29/2019 Microprocessors Lab Manual Original
36/81
-
7/29/2019 Microprocessors Lab Manual Original
37/81
-
7/29/2019 Microprocessors Lab Manual Original
38/81
-
7/29/2019 Microprocessors Lab Manual Original
39/81
-
7/29/2019 Microprocessors Lab Manual Original
40/81
-
7/29/2019 Microprocessors Lab Manual Original
41/81
Microprocessors and Interfacing LabExperiment No:10(a)
Moving Block of Data
AIM: To perform the copy of two strings.
APPARATUS: TASM Software,PC
ALGORITHM:
Step-1: StartStep-2: Initialize the data segmentStep-3: Initialize a string variable in data segmentStep-4:Create duplicate locations into which the data should moved.Step-5: Load the effective address of variables to SI,DIStep-6: Perform Clear Direction operation and take length of string as count.Step-7: Repeatedly move string byte-by-byte until count reaches zero.Step-8: Store the result in specified memory locations declared in data segment.
Step-9: Stop
SOURCE CODE:
data segmentstr1 db MPI$str2 db 5dup(0)count equ ($-str1)
data endscode segment
assume cs:code,ds:datastart: mov ax,data
mov ds,axlea si,str1lea di,str2mov cl,countcld
rep movsbmov ah,4chint 21h
code endsend start
RESULT:
Thus block of data is moved to specified memory location.
41
-
7/29/2019 Microprocessors Lab Manual Original
42/81
Microprocessors and Interfacing LabExperiment No:10(b)
Comparison Of Strings
AIM: To perform the comparison of two strings.
APPARATUS: TASM Software,PC
ALGORITHM:
Step-1: StartStep-2: Initialize the data segmentStep-3: Initialize two string variables in data segmentStep-4:Calculate the length of the two strings.Step-5: Load the effective address of variables to SI,DI
Step-6: Compare the lengths of two strings(a)if equal goto step-7.
(b)if not equal goto step-7(b).
Step-7: Repeatedly compare strings byte-by-byte until count reaches zero.(a) if equal store the result as 1111H(b) if not equal store result as 0FFFFH
Step-8: Stop
SOURCE CODE:
data segmentstr1 db MPI$strlen1 equ ($-str1)str2 db MPI$
strlen2 equ ($-str2)data endscode segment
assume cs:code,ds:datastart: mov ax,data
mov ds,axlea si,str1lea di,str2mov cx,strlen1mov dx,strlen2cmp cx,dx
jne NOTEQUALcldrep cmpsb
jne NOTEQUALmov res,1111Hjmp QUIT
NOTEQUAL: mov res,0FFFFHQUIT: mov ah,4ch
int 21hcode ends
end start
RESULT:
Thus two strings are compared .
42
-
7/29/2019 Microprocessors Lab Manual Original
43/81
Microprocessors and Interfacing LabExperiment No:10(c)
Length Of String
AIM: To calculate the length of string.
APPARATUS: TASM Software , PC
ALGORITHM:
Step-1: StartStep-2: Initialize the data segmentStep-3: Initialize a string variable in data segment whose length is to be calculated.
Step-4: Load the effective address of variables to SI,DIStep-5:Clear AX and BX registers.Step-6:Load the string to AX and checks for $.
(a) If finds goto step-7(b) If not increment BL register and take it as required length of string
Step-7: Stop
SOURCE CODE:
data segmentstr1 db MPI$length db ?
data endscode segment
assume cs:code,ds:datastart: mov ax,data
mov ds,axlea si,str1
xor ax,axxor bx,bx
BACK: lods str1cmp al,$je GOinc bljmp BACK
GO: mov length,blmov ah,4ch
int 21Hcode endsend start
RESULT:
Thus length of string is calculated .
43
-
7/29/2019 Microprocessors Lab Manual Original
44/81
Microprocessors and Interfacing LabExperiment No:10(d)
Reverse Of String
AIM: To reverse the string.
APPARATUS: TASM Software , PC
ALGORITHM:
Step-1: StartStep-2: Initialize the data segmentStep-3: Initialize a string variable in data segment whose calculate its length.Step-4: Load the effective address of variable to SI.Step-5: Add string length to DI.Step-5:Clear AX register and move contents to AL.Step-6:Exchange the values of SI and DI and increment SI and decrement DI.Step-7: Repeat Step-6 until DI value should above or equal to SI.
Step-8:Stop
SOURCE CODE:
data segmentstr1 db MPI$strlen1 equ ($-str1)
data endscode segment
assume cs:code,ds:datastart: mov ax,data
mov ds,axxor ax,ax
lea si,str1add di,(strlen1-1)
L1: mov al,[si]Xchg [di],almov [si],alinc sidec dicmp di,sijae L1
mov ah,4chint 21Hcode ends
end start
RESULT:
Thus the given string is reversed.
44
-
7/29/2019 Microprocessors Lab Manual Original
45/81
-
7/29/2019 Microprocessors Lab Manual Original
46/81
-
7/29/2019 Microprocessors Lab Manual Original
47/81
Microprocessors and Interfacing LabExperiment No:11(a)
Reading Characters from Dos Prompt
AIM: To read a string in dos prompt.
APPARATUS: TASM Software
ALGORITHM:
Step-1: StartStep-2: Initialize the data segmentStep-3: Move the count value of the word into dl registersStep-4: Load the effective address of dl to diregisterStep-5: Move the contents value 06h to dl registerStep-6: Read the character from keyboardStep-7: Decrement dlStep-8: Store the character in dl
Step-9: If zf=0 goto step6Step-10: Stop
SOURCE CODE:
data segmentd1 db 7 dup(0)
data endscode segment
assume cs:code,ds:data,es:datastart: mov ax,data
mov ds,axmov es,axmov dl,06hlea di,d1
l1: mov ab,01hint 21hdec d1
jnz l1mov ah,4chint 21h
code endsend start
RESULT:
Therefore reading a string in dos prompt is successfully completed.
47
-
7/29/2019 Microprocessors Lab Manual Original
48/81
Microprocessors and Interfacing LabExperiment No:11(b)
Displaying Characters on the Dos Prompt
AIM: To display a string on the ````dos prompt.
APPARATUS: TASM Software
ALGORITHM:
For macro
Step-1: macro definitionStep-2: move 09h to ah registerStep-3: Move the offset of displayed string to dx register
Step-4: end of macroFor program
Step-1: StartStep-2: Initialize data segment
Step-3: Call the macro with d1 as argumentStep-4: Call the macro with d2 as argumentStep-5: Stop
SOURCE CODE:
Display1 macro strgmov ah,09hmov dx,offset strgint 21h
endmdata segment
str1 db 'Microprocessors$'str2 db 'Interfacing$'str3 db 'lab$'
data endscode segment
assume cs:code,ds:datastart: mov ax,data
mov ds,axdisplay1 str1display1 str2display1 str3mov ah,4chint 21h
code endsend start
RESULT:
Therefore the display of a string on the dos prompt is successfully completed.
48
-
7/29/2019 Microprocessors Lab Manual Original
49/81
Microprocessors and Interfacing Lab
Interfacing
Programs(CYCLE NO-2)
Experiment No:12
49
-
7/29/2019 Microprocessors Lab Manual Original
50/81
-
7/29/2019 Microprocessors Lab Manual Original
51/81
Microprocessors and Interfacing Lab3088 20 20 49 20 47 4F msg8 DB ' I GOT INTR 7 ',0H308E 54 20 49 4E 54 523094 20 37 20 20 00
4000 START:4000 0E PUSH CS4001 07 POP ES4002 9A B1 4B 00 F8 CALLS 4BB1, F800 ;4007 B8 00 00 MOV AX,0000400A 8E D8 MOV DS,AX400C BB 02 02 MOV BX, 0202400F B9 08 00 MOV CX, 084012 C7 07 00 00 MOV WPTR [BX], 00H4016 83 C3 04 ADD BX,44019 E2 F7 LOOP 4012401B BB 00 02 MOV BX,0200401E 2E CS
401F 8D 06 00 60 LEA AX,60004023 89 07 MOV [BX],AX4025 83 C3 04 ADD BX,44028 2E CS4029 8D 06 08 60 LEA AX,6008402D 89 07 MOV [BX],AX402F 83 C3 04 ADD BX,44032 2E CS4033 8D 06 10 60 LEA AX,60104037 89 07 MOV [BX],AX4039 83 C3 04 ADD BX,4
403C 2E CS403D 8D 06 18 60 LEA AX, 60184041 89 07 MOV [BX], AX4043 83 C3 04 ADD BX,44046 2E CS4047 8D 06 20 60 LEA AX, 6020404B 89 07 MOV [BX], AX404D 83 C3 04 ADD BX,44050 2E CS4051 8D 06 28 60 LEA AX, 60284055 89 07 MOV [BX], AX
4057 83 C3 04 ADD BX, 4405A 2E CS405B 8D 06 30 60 LEA AX,6030405F 89 07 MOV [BX], AX4061 83 C3 04 ADD BX, 44064 2E CS4065 8D 06 38 60 LEA AX, 60384069 89 07 MOV [BX],AX406B 83 C3 04 ADD BX,4406E BA 00 30 MOV DX,030004071 B0 13 MOV AL, 13
4073 EF OUT DX4074 BA 02 30 MOV DX,03002
51
-
7/29/2019 Microprocessors Lab Manual Original
52/81
Microprocessors and Interfacing Lab4077 B0 60 MOV AL, 604079 EF OUT DX407A B0 0F MOV AL, 0F407C EF OUT DX407D B0 00 MOV AL,00407F EF OUT DX4080 BF 80 00 MOV DI,804083 BE 00 30 MOV SI, 30004086 9A 00 10 00 F0 CALLS 1000, 0F000408B FB STI408C E9 FD FF BCK: JMP BCK
6000 BF C0 00 SERV1: MOV DI,0C0H6003 BE 11 30 MOV SI, 30116006 9A 00 10 00 F0 CALLS 1000, 0F000600B FB STI600C CF IRET
6008 BF C0 00 SERV2: MOV DI,0C0H600B BE 22 30 MOV SI, OFFSET MSG2600E 9A 00 10 00 F0 CALLS 1000, 0F0006013 FB STI6014 CF IRET
6010 BF C0 00 SERV3: MOV DI,0C0H6013 BE 33 30 MOV SI, OFFSET MSG36016 9A 00 10 00 F0 CALLS 1000, 0F000601B FB STI
601C CF IRET
6018 BF C0 00 SERV4: MOV DI,0C0H601B BE 44 30 MOV SI, OFFSET MSG4601E 9A 00 10 00 F0 CALLS 1000, 0F0006023 FB STI6024 CF IRET
6020 BF C0 00 SERV5: MOV DI,0C0H6023 BE 55 30 MOV SI, OFFSET MSG56026 9A 00 10 00 F0 CALLS 1000, 0F000
602B FB STI602C CF IRET
6028 BF C0 00 SERV6: MOV DI,0C0H602B BE 66 30 MOV SI, OFFSET MSG6602E 9A 00 10 00 F0 CALLS 1000, 0F0006033 FB STI6034 CF IRET6030 BF C0 00 SERV7: MOV DI,0C0H6033 BE 77 30 MOV SI, OFFSET MSG76036 9A 00 10 00 F0 CALLS 1000, 0F000
603B FB STI603C CF IRET
52
-
7/29/2019 Microprocessors Lab Manual Original
53/81
Microprocessors and Interfacing Lab
6038 BF C0 00 SERV8: MOV DI,0C0H603B BE 88 30 MOV SI, OFFSET MSG8603E 9A 00 10 00 F0 CALLS 1000, 0F0006043 FB STI6044 CF IRET
Result:Hence we observe the interrupts (IN 0-IN 06) by using 8259 kit.
Experiment No:13
53
-
7/29/2019 Microprocessors Lab Manual Original
54/81
Microprocessors and Interfacing Lab
8255 INTERFACING
AIM: To test 8255 in different modes (mode0, mode1, mode2) by using theinterfacing kit
Apparatus: personnel computer8255 kit--1nos
Power supply connections: no power is needed
Procedure: connect the bus from interface kit (nifc 15) to 8086 ALS trainer of 8255
connector (CN1). Care should be taken such that pin1 of cn1 coincides with pin1 of
the cable
1. Mode0:1. EPROM address: GO (PRESS ENTER)E000 (enter SHIFT button):19b0
Mode 0: any read or writeFor read operation 1&3 short by using jumpersFor write operation 3&5 short
Jumper connections:Jp1---2&3Jp2---2&3Jp7---1&2Jp8---1&2For PORT A the given data is complimentary data in PORT B. that is the concept ofmode 0.
2. Mode 1(strobed i/p &o/p)
Strobed i/p:--
RD mode:Jp1---2&3; jp22&3; jp71&2; jp8: 1&2; jp51&2; jp6: 1&2EPROM address E000:1700
3. Mode 2:When the data is given in the port a ,as the press the strobe pulse then the same
data reads on port b.
Strobed o/p:--
Modewrite modeJp1---2&3; jp22&3; jp71&2; jp8: 1&2; jp52&3; jp6: 3&4.EPROM address: E000:1640It takes data from keyboard i.e. Enter aa then port b displayed that value.
Mode2: strobed bidirectional i/p & o/p:--Mode: read mode
Jp1---2&3; jp22&3; jp71&2; jp8: 1&2; jp51&2; jp6: 1&2, jp6:5&6.
54
-
7/29/2019 Microprocessors Lab Manual Original
55/81
Microprocessors and Interfacing LabProgram:
1 .OUTPUT 2500AD234 ******************************************5 ;PROGRAM TO TEST 8255 IN MODE 0 (BASIC
I/O)
6 *****************************************7 ; PORT A bits are connected to DIP switch (used as i/p
port)8 ; PORT B bits are connected to LEDs (used as output port)9 ; PORT C bits PC1, PC5 & PC7 are connected to LEDs10 ;( used as o/p port)1112 3000 PORTA EQU 3000H ; 8255 PORT A address13 3002 PORTB EQU 3002H ; 8255 PORT B address14 3004 PORTC EQU 3004H ; 8255 PORT C address15 3006 CTLP_55 EQU 3006H ; 8255 control port address16
17 0000:0000 DSEG SEGMENT18 0000:3000 ORG 0000:3000H19 0000:3000 20 38 32 35 35 20 MSG DB ' 8255 in mode-0 ',0h
0000:3006 69 6E 20 6D 6F 640000:300C 65 2D 30 20 00
20 0000:3011 20 20 20 42 61 73 MSG1 DB ' Basic I/O ',0h0000:3017 69 63 20 49 2F 4F0000:301D 20 20 20 20 00
21 DSEG ENDS2223 0000:0000 CSEG SEGMENT
2425 0000:4000 ORG 0000:4000H2627 ASSUME CS: CSEG, DS:DSEG2829 ; displaying message on LCD30 ; ------------------------------------------31 0000:4000 9A B1 4B 00 F8 CALL far f800:4bb1h ; clear display32 0000:4005 BF 80 00 MOV di, 80h ; display in
upper line33 0000:4008 BE 00 30 MOV SI, offset MSG ;34 0000:400B 9A C0 4F 00 F8 CALL FAR f800:4FC0h; display output
routine35 0000:4010 BF C0 00 MOV DI, C0H ; display in lower
line36 0000:4013 BE 11 30 MOV SI, OFFSET MSG137 0000:4016 9A C0 4F 00 F8 CALL FAR F800:4FC0H; display o/p routine383940 0000:401B START:41 0000:401B B0 90 MOV AL,90H ;control word to initialise
825542 0000:401D BA 06 30 MOV DX,CTLP_55;portA as i/p, portB and portC as
o/p43 0000:4020 EE OUT DX,AL44 0000:4021
55
-
7/29/2019 Microprocessors Lab Manual Original
56/81
Microprocessors and Interfacing Lab45 ; Read data from portA, this data depends on input46 ; switch settings. Complement the data and output47 ; it portB. PortC port can be operated in bit set reset48 ; mode. Observe portC bits on LED (PC1,PC5 & PC7)49 ; portC bits must be outputted to control port of 8255.50 0000:402151 0000:4021 LOOP1:
52 0000:4021 BA 00 30 MOV DX, PORTA53 0000:4024 EC IN AL, DX54 0000:4025 F6 D0 NOT AL55 0000:4027 BA 02 30 MOV DX, PORTB56 0000:402A EE OUT DX, AL57 0000:402B58 0000:402B B0 02 MOV AL, 02H ;reset pc1 bit59 0000:402D BA 06 30 MOV DX, CTLP_5560 0000:4030 EE OUT DX, AL61 0000:4031 E8 30 00 CALL DELAY6263 0000:4034 B0 03 MOV AL,03H ;set pc1 bit
64 0000:4036 BA 06 30 MOV DX,CTLP_5565 0000:4039 EE OUT DX,AL66 0000:403A E8 27 00 CALL DELAY6768 0000:403D B0 0A MOV AL,0AH ;reset pc5 bit69 0000:403F BA 06 30 MOV DX,CTLP_5570 0000:4042 EE OUT DX,AL71 0000:4043 E8 1E 00 CALL DELAY7273 0000:4046 B0 0B MOV AL,0BH ;set pc5 bit74 0000:4048 BA 06 30 MOV DX,CTLP_55
75 0000:404B EE OUT DX,AL76 0000:404C E8 15 00 CALL DELAY7778 0000:404F B0 0E MOV AL,0EH ;reset pc7 bit79 0000:4051 BA 06 30 MOV DX,CTLP_5580 0000:4054 EE OUT DX,AL81 0000:4055 E8 0C 00 CALL DELAY8283 0000:4058 B0 0F MOV AL,0FH ;set pc7 bit84 0000:405A BA 06 30 MOV DX,CTLP_5585 0000:405D EE OUT DX,AL86 0000:405E E8 03 00 CALL DELAY
8788 ;This program can be executed for89 0000:4061 E9 BD FF JMP LOOP1 ;different switch settings90 0000:406491 0000:4064 B9 FF 7F DELAY:MOV CX,7FFFH92 0000:4067 E2 FE NEXT:LOOP NEXT ;loop for delay93 0000:4069 C3 RET9495 CSEG ENDS96 0000:0000 END96 0000:0000 END
56
-
7/29/2019 Microprocessors Lab Manual Original
57/81
Microprocessors and Interfacing Lab
1 .OUTPUT 2500AD234 *********************************************************5 PROGRAM TO TEST 8255 IN MODE 1 (STROBED I/O
MODE)6 *********************************************************7 ;8255 operating in strobed input mode8 ;MODE 1 makes use of interrupt for transferring i/o data
to9 ;or from a specified port.Priority interrupt controller10 ;8259 used as a interrupt to CPU1112 ; In mode1, portC is used as control/status for portA &
portB.13 ;I/P is controlled by 3 control bits STBA(PC4),IBFA(PC5) &14 ; INTRA(PC3).By controlling these signals,data can be
15 ; read/write from specified ports.16 ; Interface is designed by taking portA as i/p port.1718 3000 PORTA EQU 3000H19 3002 PORTB EQU 3002H20 3004 PORTC EQU 3004H21 3006 CTLP_55 EQU 3006H2223 0000:0000 DSEG SEGMENT24 0000:3000 ORG 0000:3000H25 0000:3000 20 38 32 35 35 20 MSG DB ' 8255 in mode-1 ', 0h
0000:3006 69 6E 20 6D 6F 640000:300C 65 2D 31 20 0026 0000:3011 53 74 72 6F 62 65 MSG1 DB 'Strobed I/O mode', 0h
0000:3017 64 20 49 2F 4F 200000:301D 6D 6F 64 65 00
27 DSEG ENDS2829 0000:0000 CSEG SEGMENT3031 0000:4000 ORG 0000:4000H3233 ASSUME CS: CSEG, DS: DSEG
3435 ; displaying message on LCD36 ; ------------------------------------------37 0000:4000 9A B1 4B 00 F8 CALL far f800:4bb1h ; clear display38 0000:4005 BF 80 00 MOV di, 80h ; display in
upper line39 0000:4008 BE 00 30 MOV SI, offset MSG ;40 0000:400B 9A C0 4F 00 F8 CALL FAR f800:4FC0h; display output
routine41 0000:4010 BF C0 00 MOV DI, C0H ; display in lower
line42 0000:4013 BE 11 30 MOV SI, OFFSET MSG143 0000:4016 9A C0 4F 00 F8 CALL FAR F800:4FC0H; display o/p routine4445 0000:401B START:
57
-
7/29/2019 Microprocessors Lab Manual Original
58/81
Microprocessors and Interfacing Lab46 0000:401B B8 00 00 MOV AX, 00H ; initialisation of stack
pointer47 0000:401E 8E D0 MOV SS,AX48 0000:4020 BC 00 20 MOV SP,2000H49 0000:402350 0000:4023 FA CLI51 0000:4024 FC CLD
52 0000:402553 0000:4025 B8 00 00 MOV AX,00H ;data segmentinitialisation
54 0000:4028 8E D8 MOV DS,AX5556 0000:402A BB 02 02 MOV BX,202H ;initalisation of interrupt
vector57 0000:402D 0E PUSH CS58 0000:402E 58 POP AX59 0000:402F 89 07 MOV [BX],AX60 0000:4031 BB 00 02 MOV BX,200H61 0000:4034 2E 8D 06 63 40 LEA AX,CS:SERVICE
62 0000:4039 89 07 MOV [BX],AX6364 0000:403B BA D8 FF MOV DX,0FFD8H ;ICW165 0000:403E B0 13 MOV AL,13H66 0000:4040 EE OUT DX,AL6768 0000:4041 BA DA FF MOV DX,0FFDAH ;ICW2(interrupt vector
address)69 0000:4044 B0 80 MOV AL,80H70 0000:4046 EE OUT DX,AL71
72 0000:4047 B0 0F MOV AL,0FH73 0000:4049 EE OUT DX,AL ;ICW47475 0000:404A B0 FE MOV AL,0FEH76 0000:404C EE OUT DX,AL ;OCW1(IR0 mask reset)77 0000:404D78 0000:404D B0 B4 MOV AL,0B4H ;initialisation of 8255 for
mode179 0000:404F BA 06 30 MOV DX,CTLP_55 ;input operation80 0000:4052 EE OUT DX,AL8182 0000:4053 B0 09 MOV AL,09H ;to enable INTE flip flop
which is83 0000:4055 EE OUT DX,AL ;controlled by bit set/reset of
pc48485 0000:4056 B0 03 MOV AL,03H ;OBF1(PC1) is set86 0000:4058 EE OUT DX,AL8788 0000:4059 B0 0A MOV AL,0AH ;IBF(PC5) is reset89 0000:405B EE OUT DX,AL9091 0000:405C B0 0F MOV AL,0FH ;OBF2(PC7) is set92 0000:405E EE OUT DX,AL939495 0000:405F FB STI ;enable interrupt bit
58
-
7/29/2019 Microprocessors Lab Manual Original
59/81
-
7/29/2019 Microprocessors Lab Manual Original
60/81
Microprocessors and Interfacing Lab25 ASSUME CS:CSEG,DS:DSEG2627 0000:4000 START:28 ;displaying message on LCD29 ;------------------------------------------30 0000:4000 9A B1 4B 00 F8 CALL far f800:4bb1h ;clear
display
31 0000:4005 BF 80 00 MOV di,80h ;display in upperline32 0000:4008 BE 00 30 MOV SI,offset MSG ;33 0000:400B 9A C0 4F 00 F8 CALL FAR f800:4FC0h;display o/p routine34 0000:4010 B8 00 00 MOV AX,00H35 0000:4013 8E D0 MOV SS,AX ;Stack segment
initialisation36 0000:4015 BC 00 20 MOV SP,2000H3738 0000:4018 FA CLI39 0000:4019 FC CLD40 0000:401A
41 0000:401A B8 00 00 MOV AX,00H ;data segmentinitialisation
42 0000:401D 8E D8 MOV DS,AX4344 0000:401F BB 02 02 MOV BX,202H45 0000:4022 0E PUSH CS46 0000:4023 58 POP AX ;initialisation of interrupt vector47 0000:4024 89 07 MOV [BX],AX48 0000:4026 BB 00 02 MOV BX,200H49 0000:4029 2E 8D 06 67 40 LEA AX,CS:SERVICE50 0000:402E 89 07 MOV [BX],AX
5152 0000:4030 BA D8 FF MOV DX,FFD8H53 0000:4033 B0 13 MOV AL,13H54 0000:4035 EE OUT DX,AL55 0000:4036 BA DA FF MOV DX,FFDAH56 0000:4039 B0 80 MOV AL,80H ;initialisation of PIC
8259A57 0000:403B EE OUT DX,AL58 0000:403C B0 0F MOV AL,0FH59 0000:403E EE OUT DX,AL60 0000:403F B0 FE MOV AL,FEH61 0000:4041 EE OUT DX,AL
62 0000:404263 0000:4042 BA 06 30 MOV DX,CTLP_55 ;initialise 8255 in
mode1.64 0000:4045 B0 B4 MOV AL,B4H ;portA i/p and portB o/p65 0000:4047 EE OUT DX,AL6667 0000:4048 B0 05 MOV AL, 05H ;enable INTE flip flop
which is68 0000:404A BA 06 30 MOV DX,CTLP_55 ;controlled by bit PC269 0000:404D EE OUT DX,AL7071 0000:404E B0 0A MOV AL,0AH72 0000:4050 EE OUT DX,AL ;IBF(PC5) taken low73 0000:4051 B0 0F MOV AL,0FH74 0000:4053 EE OUT DX,AL ;OBF2*(PC7) taken high
60
-
7/29/2019 Microprocessors Lab Manual Original
61/81
-
7/29/2019 Microprocessors Lab Manual Original
62/81
-
7/29/2019 Microprocessors Lab Manual Original
63/81
Microprocessors and Interfacing Lab61 0000:403C B0 0F MOV AL,0FH62 0000:403E EE OUT DX,AL63 0000:403F B0 FE MOV AL,FEH64 0000:4041 EE OUT DX,AL65 0000:404266 0000:4042 B0 C1 MOV AL,C1H ;initialise 8255 in
mode 2
67 0000:4044 BA 06 30 MOV DX,CTLP_55 ;portA i/p &o/p,portC lower i/p.68 0000:4047 EE OUT DX,AL69 0000:404870 0000:4048 B0 09 MOV AL,09H ;enable INTE2 flip flop
which is71 0000:404A BA 06 30 MOV DX,CTLP_55 ;controlled by bit
set/reset of pc472 0000:404D EE OUT DX,AL7374 0000:404E FB STI ;enable interrupt75
76 0000:404F E9 FD FF BACK: JMP BACK7778 ;When STB* pulse is given by pressing the switch,STB*
line79 ;goes low & IBF goes high & INTR line goes high and data
is80 ;read by 8255.Then control jumps to interrupt service
routine81 ;to perform read operation.O/P the same on portB and
display.82
83 0000:4052 SERVICE:84 0000:4052 BA 00 30 MOV DX,PORTA85 0000:4055 EC IN AL,DX86 0000:4056 8A C8 MOV CL,AL87 0000:4058 BA 02 30 MOV DX,PORTB88 0000:405B EE OUT DX,AL8990 0000:405C B5 00 MOV CH,00H91 0000:405E 8B F1 MOV SI,CX92 0000:4060 9A 1F 4F 00 F8 CALL FAR DBDT93 0000:406594 0000:4065 FB STI
95 0000:4066 CF IRET9697 CSEG ENDS97 CSEG ENDS
1 .OUTPUT 2500AD234 **********************************************************5 PROGRAM TO TEST 8255 IN MODE 2 (BIDIRECTIONAL O/P MODE).6 **********************************************************7 ;Output is controlled by bits ACK*(PC6) & OBF*(PC7).8 ;NOTE:Make sure that the DPDT switch is on the WR side9
63
-
7/29/2019 Microprocessors Lab Manual Original
64/81
Microprocessors and Interfacing Lab10 3000 PORTA EQU 3000H11 3002 PORTB EQU 3002H12 3004 PORTC EQU 3004H13 3006 CTLP_55 EQU 3006H14 4ECC KBDT EQU 0F800:4ECCH1516 0000:0000 DSEG SEGMENT
17 0000:3000 ORG 0000:3000H18 0000:3000 38 32 35 35 20 69 MSG DB '8255 in md2 O/P ',0h0000:3006 6E 20 6D 64 32 200000:300C 4F 2F 50 20 00
19 DSEG ENDS2021 0000:0000 CSEG SEGMENT22 0000:4000 ORG 0000:4000H23 ASSUME CS:CSEG,DS:DSEG2425 0000:4000 START:26 ;displaying message on LCD
27 ;------------------------------------------28 0000:4000 9A B1 4B 00 F8 CALL FAR F800:4bb1h ;clear
display29 0000:4005 BF 80 00 MOV DI,80H ;display in upper
line30 0000:4008 BE 00 30 MOV SI,offset MSG ;31 0000:400B 9A C0 4F 00 F8 CALL FAR f800:4FC0h;display output
routine32 0000:4010 B8 00 00 MOV AX,00H33 0000:4013 8E D0 MOV SS,AX ;stack segment
initialisation
34 0000:4015 BC 00 20 MOV SP,2000H3536 0000:401837 0000:4018 FA CLI38 0000:4019 FC CLD39 0000:401A40 0000:401A B8 00 00 MOV AX,00H ;data segment
initialisation41 0000:401D 8E D8 MOV DS,AX43 0000:401F BB 02 02 MOV BX,202H44 0000:4022 0E PUSH CS45 0000:4023 58 POP AX
46 0000:4024 89 07 MOV [BX],AX ;interrupt vectorinitialisation
47 0000:4026 BB 00 02 MOV BX,200H48 0000:4029 2E 8D 06 55 40 LEA AX,CS:SERVICE49 0000:402E 89 07 MOV [BX],AX5051 0000:4030 BA D8 FF MOV DX,FFD8H52 0000:4033 B0 13 MOV AL,13H53 0000:4035 EE OUT DX,AL54 0000:4036 BA DA FF MOV DX,FFDAH55 0000:4039 B0 80 MOV AL,80H ;initialisation of PIC
8259A56 0000:403B EE OUT DX,AL57 0000:403C B0 0F MOV AL,0FH58 0000:403E EE OUT DX,AL
64
-
7/29/2019 Microprocessors Lab Manual Original
65/81
Microprocessors and Interfacing Lab59 0000:403F B0 FE MOV AL,FEH60 0000:4041 EE OUT DX,AL61 0000:404262 0000:4042 B0 C1 MOV AL,C1H ;initialise 8255 in mode
263 0000:4044 BA 06 30 MOV DX,CTLP_55 ;port A i/p & o/p,port
C lower i/p
64 0000:4047 EE OUT DX,AL6566 0000:4048 B0 0D MOV AL,0DH ;enable INTE flip flop67 0000:404A BA 06 30 MOV DX,CTLP_5568 0000:404D EE OUT DX,AL6970 0000:404E B0 03 MOV AL,03H ;OBF1* taken high71 0000:4050 EE OUT DX,AL7273 0000:4051 FB STI ;enable interrupt7475 0000:4052 E9 FD FF BACK: JMP BACK
7677 ;When CPU writes data on output latch OBF* line goes low.78 ;As soon as user presses switch,ACK* goes low & INTR
goes high79 ;and control jumps to service routine and the data is
latched80 ;on PORTA and OBF* line gets cleared when ACK* is
received.81 ;This data can also be observed on LED connected to
PORTA82
83 0000:405584 0000:4055 SERVICE:85 0000:4055 9A CC 4E 00 F8 CALL FAR KBDT86 0000:405A 8B C6 MOV AX,SI87 0000:405C BA 00 30 MOV DX,PORTA88 0000:405F EE OUT DX,AL89 0000:4060 FB STI90 0000:4061 CF IRET91 0000:406292 CSEG ENDS92 CSEG ENDS
Result : Thus different modes of 8255 are observed.
Experiment No:14
8251 INTERFACING (TRANSMITTING&RECEIVING PART)
AIM:To test 8251 in transmitting and receiving parts by using the interfacing kit
Apparatus: personnel computerTransmitting &receving kit(nifc 21)1nos
Power supply connections :+5 v------BLUEGND---BLACK
65
-
7/29/2019 Microprocessors Lab Manual Original
66/81
Microprocessors and Interfacing Lab+12--- RED_12---GREEN
Jumper connections:Jp 6: 1&2; Jp 7: 1&2; Jp17: 1&2; Jp 18: 1&2; Jp 1: 3&2; Jp 2: 3&2; Jp 4,jp5,jp13: 1&2:Jp 9 :5&6;jp 10 :5&6;jp 16:3&2;Eprom address : E000:34D0
Procedure for transmitting part:Connect the cable of RS 232 One end to kit (nifc 21) to other end is connected topersonnel computer parallel port.And then run the communication package for 86drv.exe for 8086kit, b30drv.exe for51lcd kit. execute the program in keyboard mode using go command
Then the message TESTING 8251 TRANSMITTING PART will be displayed in theKit. Suppose we may enter the data from the key board the data will see in thememory location of 0:ff00.
Procedure for receving part:Jp 6: 1&2; Jp 7: 1&2; Jp17: 1&2; Jp 18: 1&2; Jp 1: 3&2; Jp 2: 3&2; Jp 4,jp5,jp13: 1&2:
Jp 9 :1&2;jp 10 :5&6;jp 16:3&2;Eprom address : E000:35C0And then run the communication package for 86drv.exe for 8086kit, b30drv.exe for51lcd kit. execute the program in keyboard mode using go command
Then the message 8251-RECEVING MODEwill be displayed on the lcd kitThen enter the characters from keyboard ,when user does not want to enter thecharacters any more then press the enter key. when it is pressed the char ODappears on the data The user can see the characters transmiited to the 8251A inRAM location 0:ff00 for 86 series kit
AIM:To test 8251 in transmitting and receiving parts by using the interfacing kit
Apparatus: personnel computerTransmitting &receving kit1nos
Program:
1 .OUTPUT 2500AD23 ;PROGRAM TO TEST 825145 7000 CLOCK_FREQ EQU 1536000 ;8253 clock
frequency
6 3402 CTL_8251 EQU 3402H ;8251 control portaddress
7 3400 DATA_8251 EQU 3400H ;8251 data portaddress
8 3002 TMR1_8253 EQU 3002H ;8253 timer1 address9 3006 CTL_8253 EQU 3006H ;8253 control port
address10 FF00 EXT_RAM_LC EQU 0:FF00H ;RAM location11 4F1F DBDT EQU F800:4F1FH ;routine for display on
data field1213 000A CNT_BAUD_9600_MODE16 EQU 000AH14 0140 CNT_BAUD_4000_MODE01 EQU 0140H15 0028 CNT_BAUD_2400_MODE16 EQU 0028H16 0014 CNT_BAUD_1200_MODE64 EQU 0014H
66
-
7/29/2019 Microprocessors Lab Manual Original
67/81
Microprocessors and Interfacing Lab17 0050 CNT_BAUD_0300_MODE64 EQU 0050H1819 00CE MODE_WORD16 EQU CEH20 00CD MODE_WORD1 EQU CDH21 00CF MODE_WORD64 EQU CFH2223 ;With the count calculated for various baud rates program
is24 ;written to test receiver part of 8251 using RS_232standard.
25 ;Data characters can be received from keyboard & sent to8251
26 ;on an interrupt basis.RxRDY pin of the 8251 is connectedto
27 ;an interrupt input through PIC 8259.2829 ;************************************30 ;PROGRAM TO TEST 8251 RECEIVING PART.31 ;************************************
3233 0000:0000 DSEG SEGMENT34 0000:3000 ORG 0000:3000H35 0000:3000 38 32 35 31 2D 52 MSG2 DB '8251-Receiv mode',0H
0000:3006 65 63 65 69 76 200000:300C 6D 6F 64 65 00
36 DSEG ENDS3738 0000:0000 CSEG SEGMENT39 0000:4000 ORG 0000:4000H40 ASSUME CS:CSEG,DS:DSEG
4142 0000:4000 START:4344 ;displaying message on LCD45 ;------------------------------------------46 0000:4000 9A B1 4B 00 F8 CALL FAR F800:4BB1H ;clear display47 0000:4005 BF 80 00 MOV DI,80H ;display in upper
line48 0000:4008 BE 00 30 MOV SI,offset MSG2 ;49 0000:400B 9A C0 4F 00 F8 CALL FAR f800:4FC0h;display output routine5051
52 0000:4010 B8 00 00 MOV AX,00H ;initialisation of stackpointer
53 0000:4013 8E D0 MOV SS,AX54 0000:4015 BC 00 20 MOV SP,2000H5556 0000:4018 8E D8 MOV DS,AX57 0000:401A58 0000:401A FA CLI59 0000:401B FC CLD60 0000:401C61 0000:401C BB 02 02 MOV BX,0202H ;initalisation of
interrupt vector62 0000:401F 0E PUSH CS63 0000:4020 58 POP AX64 0000:4021 89 07 MOV [BX],AX
67
-
7/29/2019 Microprocessors Lab Manual Original
68/81
Microprocessors and Interfacing Lab65 0000:4023 BB 00 02 MOV BX,200H66 0000:4026 2E 8D 06 80 40 LEA AX,CS:SRVC267 0000:402B 89 07 MOV [BX],AX6869 0000:402D BA D8 FF MOV DX,0FFD8H ;ICW170 0000:4030 B0 13 MOV AL,13H71 0000:4032 EE OUT DX,AL
7273 0000:4033 BA DA FF MOV DX,0FFDAH ;ICW2(intrrpt vectoraddress)
74 0000:4036 B0 80 MOV AL,80H75 0000:4038 EE OUT DX,AL7677 0000:4039 B0 0F MOV AL,0FH78 0000:403B EE OUT DX,AL ;ICW47980 0000:403C B0 FE MOV AL,0FEH81 0000:403E EE OUT DX,AL ;OCW1(IR0 mask reset)82
83 0000:403F BB 00 FF MOV BX,EXT_RAM_LC ;BX points to RAMlocation where the
84 ;character read from 8251 are stored8586 0000:4042 BA 06 30 MOV DX,CTL_8253 ;initialise timer1 in
mode287 0000:4045 B0 76 MOV AL,76H88 0000:4047 EE OUT DX,AL8990 0000:4048 BA 02 30 MOV DX,TMR1_825391 0000:404B B0 0A MOV AL,CNT_BAUD_9600_MODE16
;load MSB in count reg94 0000:4050 EE OUT DX,AL9596 0000:4051 FB STI ;enable interrupt9798 0000:4052 BA 02 34 MOV DX,CTL_8251 ;send 0's to
guarantee,device is in99 0000:4055 B0 00 MOV AL,00H ;command instruction
format before
100 0000:4057 EE OUT DX,AL ;the RESET command isissued.101102 0000:4058 90 NOP103 0000:4059 90 NOP104 0000:405A 90 NOP105 0000:405B 90 NOP106 0000:405C EE OUT DX,AL107108 0000:405D 90 NOP109 0000:405E 90 NOP110 0000:405F 90 NOP111 0000:4060 90 NOP112 0000:4061 EE OUT DX,AL113
68
-
7/29/2019 Microprocessors Lab Manual Original
69/81
Microprocessors and Interfacing Lab114 0000:4062 BA 02 34 MOV DX,CTL_8251 ;send internal RESET
command to115 0000:4065 B0 40 MOV AL,40H ;return device to idle
state116 0000:4067 EE OUT DX,AL117 0000:4068 90 NOP118 0000:4069 90 NOP
119 0000:406A 90 NOP120 0000:406B 90 NOP121 0000:406C122 0000:406C BA 02 34 MOV DX,CTL_8251 ;load mode control
word123 0000:406F B0 CE MOV AL,MODE_WORD16124 0000:4071 EE OUT DX,AL125 0000:4072 90 NOP126 0000:4073 90 NOP127 0000:4074 90 NOP128 0000:4075 90 NOP129
130 0000:4076 BA 02 34 MOV DX,CTL_8251 ;load commandword131 0000:4079 B0 36 MOV AL,36H132 0000:407B EE OUT DX,AL133 ;when the character typed has been shifted into
8251,and the134 ;character is in receiver buffer ready to be
read,RxRDY pin135 ;is connected to the interrupt pin,as soon as RxRDY
is set136 ;interrupt is enabled & process jumps to service
routine137138139140 0000:407C 90 BACK1: NOP141 0000:407D E9 FC FF JMP BACK1142143144 0000:4080 SRVC2:145 0000:4080 BA 00 34 MOV DX,DATA_8251146 0000:4083 EC IN AL,DX ;In the service routine
data is
147 0000:4084 EC IN AL,DX ;read from 8251,checkwhether typed148 0000:4085 90 NOP ;character is 0DH.If yes it
indicates149 0000:4086 90 NOP ;it is the last char and is
displayed150 0000:4087 90 NOP ;in the data field of the
display and151 0000:4088 90 NOP ;reinitialise pointer to the
starting152 0000:4089 3C 0D CMP AL,0DH ;address of RAM
location.153 0000:408B 75 0F JNZ AHEAD2154155 0000:408D B4 00 MOV AH,00
69
-
7/29/2019 Microprocessors Lab Manual Original
70/81
Microprocessors and Interfacing Lab156 0000:408F 8B F0 MOV SI,AX157 0000:4091 9A 1F 4F 00 F8 CALL FAR DBDT158 0000:4096 BB 00 FF MOV BX,EXT_RAM_LC159 0000:4099 E9 03 00 JMP TERM160 0000:409C 88 07 AHEAD2:MOV [BX],AL ;If typed char is
other than 0DH162 0000:409E 43 INC BX ;then store the char in
RAM loc.163 0000:409F FB TERM: STI164 0000:40A0 CF IRET165 ;Reading a data char from 8251 data port causes it
to reset166 ;the RxRDY output signal.The process returns from
service167 ;routine & waits until another character is ready to
be read.168169 CSEG ENDS170 0000:0000 END
170 0000:0000 END
1 .OUTPUT 2500AD23 PROGRAM TO TEST 825145 7000 CLOCK_FREQ EQU 1536000 ;8253 clock
frequency6 3402 CTL_8251 EQU 3402H ;8251 control port
address
7 3400 DATA_8251 EQU 3400H ;8251 data portaddress8 3002 TMR1_8253 EQU 3002H ;8253 timer1 address9 3006 CTL_8253 EQU 3006H ;8253 control port
address10 FF00 EXT_RAM_LC EQU 0000:FF00H ;RAM location11 4F1F DBDT EQU F800:4F1FH ;routine for display on
data field1213 000A CNT_BAUD_9600_MODE16 EQU 000AH14 0140 CNT_BAUD_4000_MODE01 EQU 0140H15 0028 CNT_BAUD_2400_MODE16 EQU 0028H
16 0014 CNT_BAUD_1200_MODE64 EQU 0014H17 0050 CNT_BAUD_0300_MODE64 EQU 0050H1819 00CE MODE_WORD16 EQU CEH20 00CD MODE_WORD1 EQU CDH21 00CF MODE_WORD64 EQU CFH2223 ;With the count calculated for various baud rates program
is24 ;written to test transmission part of 8251 using RS_232
standard25 ;Data characters can be sent to 8251 on an interrupt
basis.So26 ;to send characters on interrupt basis the TxRDY pin of the27 ;8251 is connected to an interrupt input through PIC 8259.
70
-
7/29/2019 Microprocessors Lab Manual Original
71/81
Microprocessors and Interfacing Lab2829
30 ;*************************************** 31 ;PROGRAM TO TEST 8251 TRANSMITTINGPART. 32 ;***************************************
3334 0000:0000 DSEG SEGMENT35 0000:3000 ORG 0000:3000H36 0000:3000 20 20 54 65 73 74 MSG2 DB ' Testing 8251 ',0h
0000:3006 69 6E 67 20 38 320000:300C 35 31 20 20 00
37 0000:3011 54 72 61 6E 73 6D MSG1 DB 'Transmiting part',0h0000:3017 69 74 69 6E 67 200000:301D 70 61 72 74 00
38 0000:3022 54 45 53 54 49 4E MSG DB 'TESTING 8251 IN ASYNCHRONOUSMODE',0DH,0AH,1BH
0000:3028 47 20 38 32 35 31
0000:302E 20 49 4E 20 41 530000:3034 59 4E 43 48 52 4F0000:303A 4E 4F 55 53 20 4D0000:3040 4F 44 45 0D 0A 1B
39 DSEG ENDS4041 0000:0000 CSEG SEGMENT42 0000:4000 ORG 0000:4000H43 ASSUME CS:CSEG,DS:DSEG44 ;displaying message on LCD45 ;------------------------------------------
46 0000:4000 9A B1 4B 00 F8 CALL FAR F800:4BB1H ;clear display47 0000:4005 BF 80 00 MOV DI,80H ;display inupper line
48 0000:4008 BE 00 30 MOV SI,offset MSG2 ;49 0000:400B 9A C0 4F 00 F8 CALL FAR f800:4FC0h ;display
output routine50 0000:4010 BF C0 00 MOV DI,C0H ;display in
lower line51 0000:4013 BE 11 30 MOV SI,OFFSET MSG152 0000:4016 9A C0 4F 00 F8 CALL FAR F800:4FC0H ;display
output routine53
54 0000:401B START:5556 0000:401B B8 00 00 MOV AX,00H ;initialisation of stack
pointer57 0000:401E 8E D0 MOV SS,AX58 0000:4020 BC 00 20 MOV SP,2000H5960 0000:4023 B8 00 00 MOV AX,00H61 0000:4026 8E D8 MOV DS,AX6263 0000:4028 FA CLI64 0000:4029 FC CLD65 0000:402A66 0000:402A BB 02 02 MOV BX,0202H ;initalisation of
interrupt vector71
-
7/29/2019 Microprocessors Lab Manual Original
72/81
Microprocessors and Interfacing Lab67 0000:402D 0E PUSH CS68 0000:402E 58 POP AX69 0000:402F 89 07 MOV [BX],AX70 0000:4031 BB 00 02 MOV BX,0200H71 0000:4034 2E 8D 06 91 40 LEA AX,CS:SRVC172 0000:4039 89 07 MOV [BX],AX73
74 0000:403B BA D8 50 MOV DX,050D8H ;ICW175 0000:403E B0 13 MOV AL,13H76 0000:4040 EE OUT DX,AL7778 0000:4041 BA DA 50 MOV DX,050DAH ;ICW2(interrupt vector
address)79 0000:4044 B0 80 MOV AL,80H80 0000:4046 EE OUT DX,AL8182 0000:4047 B0 0F MOV AL,0FH83 0000:4049 EE OUT DX,AL ;ICW484
85 0000:404A B0 FE MOV AL,0FEH86 0000:404C EE OUT DX,AL ;OCW1(IR0 mask reset)878889 0000:404D BB 22 30 MOV BX,OFFSET MSG ;BX points to
message90 0000:4050 BE 00 FF MOV SI,EXT_RAM_LC ;SI points to RAM
Locations91 ;where the characters written to 8251 are stored9293 0000:4053 BA 06 30 MOV DX,CTL_8253 ;initialise timer1 in
mode294 0000:4056 B0 76 MOV AL,76H95 0000:4058 EE OUT DX,AL97 0000:4059 BA 02 30 MOV DX,TMR1_825398 0000:405C B0 0A MOV AL,CNT_BAUD_9600_MODE16;load the MSB count in101 0000:4061 EE OUT DX,AL ;timer1 count reg102103 0000:4062 FB STI ;enable interrupt
104105 0000:4063 BA 02 34 MOV DX,CTL_8251 ;8251 control port
address.Send106 0000:4066 B0 00 MOV AL,00H ;0's to guarantee,device
is in107 0000:4068 EE OUT DX,AL ;the command
instruction format.108 ;Repeat the same four times109 0000:4069 90 NOP110 0000:406A 90 NOP111 0000:406B 90 NOP112 0000:406C 90 NOP113 0000:406D EE OUT DX,AL114 0000:406E 90 NOP115 0000:406F 90 NOP
72
-
7/29/2019 Microprocessors Lab Manual Original
73/81
Microprocessors and Interfacing Lab116 0000:4070 90 NOP117 0000:4071 90 NOP118 0000:4072 EE OUT DX,AL119120 0000:4073 BA 02 34 MOV DX,CTL_8251 ;send internal reset
command121 0000:4076 B0 40 MOV AL,40H ;to return device to
idle state122 0000:4078 EE OUT DX,AL123 0000:4079 90 NOP124 0000:407A 90 NOP125 0000:407B 90 NOP126 0000:407C 90 NOP127 0000:407D128 0000:407D BA 02 34 MOV DX,CTL_8251 ;load the mode
control word129 0000:4080 B0 CE MOV AL,MODE_WORD16130 0000:4082 EE OUT DX,AL131 0000:4083 90 NOP
132 0000:4084 90 NOP
134 0000:4085 BA 02 34 MOV DX,CTL_8251 ;load thecommand word135 0000:4088 B0 33 MOV AL,33H ;when CTS* input of 8251
is136 0000:408A EE OUT DX,AL ;asserted low and the
8251 buffer137 0000:408B 90 NOP ;is ready for a
character,the TxRDY
138 0000:408C 90 NOP ;pin will go high.SinceTxRDY pin139 ;is connected to the interrupt pin,as soon as TxRDY is set
INTR140 ;is enabled and the process jumps to service
routine.141 0000:408D142 0000:408D 90 BACK: NOP143 0000:408E E9 FC FF JMP BACK146 0000:4091 SRVC1:147 0000:4091 B8 00 00 MOV AX,0000H148 0000:4094 8E D8 MOV DS,AX
149 0000:4096 8A 07 MOV AL,[BX] message address storedin reg BX150 0000:4098 83 C3 01 ADD BX,01H ;read the message
byte by byte151 0000:409B 3C 1B CMP AL,1BH ;check if the byte is a
last byte152 0000:409D 75 09 JNZ AHEAD153 0000:409F154 0000:409F155 0000:409F BB 22 30 MOV BX,OFFSET MSG ;if yes reinitialise
the pointer156 0000:40A2 BE 00 FF MOV SI,EXT_RAM_LC ;to message and
RAM location157 0000:40A5 E9 E9 FF JMP SRVC1
73
-
7/29/2019 Microprocessors Lab Manual Original
74/81
Microprocessors and Interfacing Lab158 0000:40A8 BA 00 34 AHEAD: MOV DX,DATA_8251 ;if not send
the char to data port159 0000:40AB EE OUT DX,AL;of 8251 & also save in ram
location160 0000:40AC 8A C8 MOV CL,AL161 0000:40AE B8 00 00 MOV AX,00H162 0000:40B1 8E D8 MOV DS,AX
163 0000:40B3 8A C1 MOV AL,CL164 0000:40B5 88 04 MOV [SI],AL165 0000:40B7 83 C6 01 ADD SI,01H166 0000:40BA FB STI167 0000:40BB CF IRET168 ;When the data character is written to 8251 data
port the 8251169 ;resets its TxRDY o/p until the buffer is again ready
to receive170 ;a character.The process returns from interrupt
routine after171 ;writing data to 8251 and waits until 8251 buffer is
ready in172 ;in the main loop.174 CSEG ENDS175 0000:0000 END176 0000:0000
Result:Hence we observed the transmitting &receiving part of the kit of 8251.
74
-
7/29/2019 Microprocessors Lab Manual Original
75/81
Microprocessors and Interfacing Lab
Micro Controller
Programs(CYCLE NO-3)
Experiment No:15
75
-
7/29/2019 Microprocessors Lab Manual Original
76/81
Microprocessors and Interfacing Lab
TO UNDERSTAND FIRST MEMORY AREA FROM (00-1F)
Aim: To understand the 1st memory area of 8051 micro controller.
Apparatus: ALS-SDA-51-STA KITKey boardPower supply +5v
Source code: SET D4
SET D3MOV R1, #50MOV R2, #40ADD A1,R1ADD A,R2LCALL 0003H
Result: Thus we understand the 1st memory area 00-1F of 8051 micro controller.
Experiment No:16
TO UNDERSTAND SECOND MEMORY AREA FROM (20-2F)
Aim: To understand the 2nd memory area of 8051 micro controller (Bitaddressable)
76
-
7/29/2019 Microprocessors Lab Manual Original
77/81
Microprocessors and Interfacing Lab
Apparatus: ALS-SDA-51-STA KITKey boardPower supply +5v
Source code:MOV C,27
MOV 2E, CLCALL 0003H
Result:Thus we understand the 2nd memory area 20-2F (bit-addressable) of 8051
micro controller.
Experiment No:17
TO UNDERSTAND THIRD MEMORY AREA FROM (30-7F)
Aim: To understand the 3rd memory area of 8051 micro controller (30-7F).
Apparatus: ALS-SDA-51-STA KITKey board
77
-
7/29/2019 Microprocessors Lab Manual Original
78/81
-
7/29/2019 Microprocessors Lab Manual Original
79/81
Microprocessors and Interfacing LabMOV d0, #75MOV E0, #25ADD A, D0MOV F0, ALCALL 0003H
Result: Thus we understand the memory area of 80-FF in 8051 micro controller.
Experiment No:19
SWAP OPERATION
Aim: To perform swap operation in 8051 micro controller.
Apparatus: ALS-SDA-51-STA KITKey boardPower supply
Source code:
79
-
7/29/2019 Microprocessors Lab Manual Original
80/81
Microprocessors and Interfacing Lab
MOV A1,#64
SWAP A
MOV R4,A
LCALL 0003h
Result:Thus the swap operation in 8051 micro controller performed.
Experiment No:20
SET-RESET
Aim: To perform the set reset operation of 8051 micro controller
Apparatus: ALS-SDA-51-STA KITKey boardPower supply +5v
Source code:
SET B, D4
CLR D3
80
-
7/29/2019 Microprocessors Lab Manual Original
81/81
Microprocessors and Interfacing Lab
MOV RO, D0
MOV A,@R0
LCALL 0003H
Result:Thus the set-reset operation in 8051 micro controller is performed.