Microprocessor Part2

8/17/2019 Microprocessor Part2

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University of TechnologyElectrical Eng. DepartmentMicroprocessor Engineering & Microcontroller

Lecture SixIntroduction to Microcontroller

Ass is t.Prof . Dr. Hadeel Nasrat

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INTRODUCTION TO MICROCONTROLLERE

What i s a Microcontro ller?• A microcontroller (sometimes abbreviated µC, uC or MCU ) is a small computer

on a single integrated circuit containing a processor core, memory, and

programmable input/output peripherals.

•

Microcontrollers are designed for embedded applications, in contrast to themicroprocessors used in personal computers or other general purpose

applications. Microcontrollers may be:

Embedded’ inside some other device (often a consumer product) so

that they can control the features or actions of the product. Another

name for a microcontroller is therefore an ‘embedded controller’.

Dedicated to one task and run one speci c program. The program is

stored in ROM and generally does not change.

A low-power device. A battery-operated microcontroller might consume

as littleas50 milliwatts.

• A Microcontroller may take an input from the device it is controlling and controls

the device by sending signals to deferent components in the device.

• A microcontroller is often small and low cost. The components may be chosen tominimize size and to be as in expensive as possible.

• The actual processor used to implement a microcontroller can vary widely. In many

products, such as microwave ovens, the demand on the CPU is fairly low and price is an

important consideration. In these cases, manufacturers turn to dedicated microcontroller

chips – devices that were originally designed to be low-cost, small, low-power,

embedded CPUs. The Motorola 6811 and Intel 8051 are both good examples of such

chips.

http://en.wikipedia.org/wiki/Integrated_circuithttp://en.wikipedia.org/wiki/Input/outputhttp://en.wikipedia.org/wiki/Microprocessorhttp://en.wikipedia.org/wiki/Personal_computerhttp://en.wikipedia.org/wiki/Personal_computerhttp://en.wikipedia.org/wiki/Microprocessorhttp://en.wikipedia.org/wiki/Input/outputhttp://en.wikipedia.org/wiki/Integrated_circuit


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Development/Classification of microcontrollers

Microcontrollers have gone through a silent evolution (invisible). The

evolution can be rightly termed as silent as the impact or application of a

microcontroller is not well known to a common user, although microcontroller

technology has undergone significant change since early 1970's. Development

of some popular microcontrollers is given as follows.

Intel 4004 4 bit (2300 PMOS trans, 108 kHz) 1971

Intel 8048 8 bit 1976

Intel 8031 8 bit (ROM-less) .

Intel 8051 8 bit (Mask ROM) 1980

Microchip PIC16C64 8 bit 1985

Motorola 68HC11 8 bit (on chip ADC) .

Intel 80C196 16 bit 1982

Atmel AT89C51 8 bit (Flash memory) .

Microchip PIC 16F877 8 bit (Flash memory + ADC) .

Microcontrollers Vs Microprocessors

1. A microprocessor requires an external memory for program/data storage.Instruction execution requires movement of data from the external memory to

the microprocessor or vice versa. Usually, microprocessors have good

computing power and they have higher clock speed to facilitate faster

computation.

2. A microcontroller has required on-chip memory with associated peripherals. A

microcontroller can be thought of a microprocessor with inbuilt peripherals.


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3. A microcontroller does not require much additional interfacing ICs for

operation and it functions as a stand alone system. The operation of a

microcontroller is multipurpose, just like a Swiss knife.

4. Microcontrollers are also called embedded controllers. A microcontroller clock

speed is limited only to a few tens of MHz. Microcontrollers are numerous and

many of them are application specific.

Choosing a Microcontroller

Three criteria in Choosing a Microcontroller

meeting the computing needs of the task efficiently and cost effectively

speed, the amount of ROM and RAM, the number of I/O ports and

timers, size, packaging, power consumption

easy to upgrade

cost per unit

availability of software development tools

assemblers, debuggers, C compilers, emulator, simulator, technical

support

wide availability and reliable sources of the microcontrollers


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Internal Structure of a Microcontroller

F i g

. 1 :

M i c r o c o n

t r o

l l e r

A r c h

i t e c

t u r e

b l o c

k d i a g r a m


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calibration values, codes, values to count up to etc.), which must be saved after

turning the power supply off. A disadvantage of this memory is that the process of

programming is relatively slow. It is measured in miliseconds.

Special Function Registers (SFR)

Special function registers are part of RAM memory. Their purpose is

predefined by the manufacturer and cannot be changed therefore. Since their bits

are physically connected to particular circuits within the microcontroller, such as A/D

converter, serial communication module etc., any change of their state directly

affects the operation of the microcontroller or some of the circuits. For example,

writing zero or one to the SFR controlling an input/output port causes the appropriate

port pin to be configured as input or output. In other words, each bit of this register

controls the function of one single pin.


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Program Counter

Program Counter is an engine running the program and points to the memory

address containing the next instruction to execute. After each instruction execution,

the value of the counter is incremented by 1. For this reason, the program executes

only one instruction at a time just as it is written. However…the value of the program

counter can be changed at any moment, which causes a “jump” to a new memory

location. This is how subroutines and branch instructions are executed. After

jumping, the counter resumes even and monotonous automatic counting +1, +1,+1…

A regi st er or a memory cell is an electronic circuit which can memorize the state of

one byte. Besides 8 bits available to the user, each register has also a number of

addressing bits. It is important to remember that:

• All registers of ROM as well as those of RAM referred to as general-purpose

registers are mutually equal and nameless. During programming, each of

them can be assigned a name, which makes the whole operation much

easier.

• All SFRs are assigned names which are different for different types of the

microcontrollers and each of them has a special function as their name

suggests.

Central Processor Unit (CPU) As its name suggests, this is a unit which monitors and controls all processes

within the microcontroller and the user cannot affect its work. It consists of several

smaller subunits, of which the most important are:

• Instruction decoder is a part of the electronics which recognizes program

instructions and runs other circuits on the basis of that. The abilities of this

circuit are expressed in the "instruction set" which is different for each

microcontroller family.


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• Ar ithmeti cal Logical Uni t (ALU) performs all mathematical and logical

operations upon data.

• Accumulator is an SFR closely related to the operation of ALU. It is a kind of

working desk used for storing all data upon which some operations should be

executed (addition, shift etc.). It also stores the results ready for use in further

processing. One of the SFRs, called the Status Register, is closely related to

the accumulator, showing at any given time the "status" of a number stored in

the accumulator (the number is greater or less than zero etc.).

Input/output ports (I/O Ports)

In order to make the microcontroller useful, it is necessary to connect it to

peripheral devices. Each microcontroller has one or more registers (called a port)

connected to the microcontroller pins.


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Why do we call them input/output ports? Because it is possible to change a

pin function according to the user's needs. These registers are the only registers in

the microcontroller the state of which can be checked by voltmeter!

Oscillator

Even pulses generated by the oscillator enable harmonic and synchronous

operation of all circuits within the microcontroller. It is usually configured as to use

quartz-crystal or ceramics resonator for frequency stabilization. It can also operate

without elements for frequency stabilization (like RC oscillator). It is important to say

that program instructions are not executed at the rate imposed by the oscillator itself,

but several times slower. It happens because each instruction is executed in several

steps. For some microcontrollers, the same number of cycles is needed to execute

any instruction, while it's different for other microcontrollers. Accordingly, if the

system uses quartz crystal with a frequency of 20MHz, the execution time of an

instruction is not expected 50nS, but 200, 400 or even 800 nS, depending on the

type of the microcontroller!


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Timers/Counters

Most programs use these miniature electronic "stopwatches" in their

operation. These are commonly 8- or 16-bit SFRs the contents of which is

automatically incremented by each coming pulse. Once the register is completely

loaded, an interrupt is generated!

If these registers use an internal quartz oscillator as a clock source, then it is

possible to measure the time between two events (if the register value is T1 at the

moment measurement has started, and T2 at the moment it has finished, then the

elapsed time is equal to the result of subtraction T2-T1 ). If the registers use pulses

coming from external source, then such a timer is turned into a counter.

This is only a simple explanation of the operation itself. It’s somehow more

complicated in practice.


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Watchdog timer

The Watchdog Timer is a timer connected to a completely separate RC

oscillator within the microcontroller.

If the watchdog timer is enabled, every time it counts up to the program end, the

microcontroller reset occurs and program execution starts from the first instruction.

The point is to prevent this from happening by using a special command. The whole

idea is based on the fact that every program is executed in several longer or shorter

loops.

If instructions resetting the watchdog timer are set at the appropriate program

locations, besides commands being regularly executed, then the operation of the

watchdog timer will not affect the program execution.

If for any reason (usually electrical noise in industry), the program counter "gets

stuck" at some memory location from which there is no return, the watchdog will not

be cleared, so the register’s value being constantly incremented will reach themaximum et voila! Reset occurs!

Power Supply Circuit

There are two things worth attention concerning the microcontroller power

supply circuit:

Brown out is a potentially dangerous state which occurs at the moment the

microcontroller is being turned off or when power supply voltage drops to the lowest

level due to electric noise. As the microcontroller consists of several circuits which

have different operating voltage levels, this can cause its out of control performance.

In order to prevent it, the microcontroller usually has a circuit for brown out reset

built-in. This circuit immediately resets the whole electronics when the voltage level

drops below the lower limit.

Reset pin is usually referred to as Master Clear Reset (MCLR

) and serves forexternal reset of the microcontroller by applying logic zero (0) or one (1) depending


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on the type of the microcontroller. In case the brown out is not built in the

microcontroller, a simple external circuit for brown out reset can be connected to this

pin.

Serial communication

Parallel connections between the microcontroller and peripherals established

over I/O ports are the ideal solution for shorter distances up to several meters.

However, in other cases, when it is necessary to establish communication between

two devices on longer distances it is obviously not possible to use parallel

connections. Then, serial communication is the best solution.

Today, most microcontrollers have several different systems for serial

communication built in as a standard equipment. Which of them will be used

depends on many factors of which the most important are:

• How many devices the microcontroller has to exchange data with?

• How fast the data exchange has to be?

• What is the distance between devices?


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• Is it necessary to send and receive data simultaneously?

One of the most important things concerning serial communication is the Protocol

which should be strictly observed. It is a set of rules which must be applied in order

that devices can correctly interpret data they mutually exchange. Fortunately, the

microcontrollers automatically take care of this, so the work of the programmer/user

is reduced to a simple write (data to be sent) and read (received data).

Program

Unlike other integrated circuits which only need to be connected to other

components and turn the power supply on, the microcontrollers need to be

programmed first. This is a so called "bitter pill" and the main reason why hardware-

oriented electronics engineers stay away from microcontrollers. It is a trap causing

huge losses because the process of programming the microcontroller is basically

very simple.

Interrupt - electronics is usually more faster than physical processes it should keep

under control. This is why the microcontroller spends most of its time waiting for

something to happen or execute. In other words, when some event takes place, themicrocontroller does something. In order to prevent the microcontroller from


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spending most of its time endlessly checking for logic state on input pins and

registers, an interrupt is generated. It is the signal which informs the central

processor that something attention worthy has happened. As its name suggests, it

interrupts regular program execution. It can be generated by different sources so

when it occurs, the microcontroller immediately stops operation and checks for the

cause. If it is needed to perform some operations, a current state of the program

counter is pushed onto the Stack and the appropriate program is executed. It's the

so called interrupt routine.

Stack is a part of RAM used for storing the current state of the program

counter (address) when an interrupt occurs. In this way, after a subroutine or an

interrupt execution, the microcontroller knows from where to continue regular

program execution. This address is cleared after returning to the program because

there is no need to save it any longer, and one location of the stack is automatically

availale for further use. In addition, the stack can consist of several levels. This

enables subroutines’ nesting, i.e. calling one subroutine from another.


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Univers i ty of Techno logyElectrical Eng. DepartmentMicroprocessor Engin eering & Microcontrol ler

Lecture Seven8051 Microcontrol lerAs sist .Prof. Dr. Hadeel Nasrat

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8051 Microco nt ro l ler

The Intel MCS-51 is a Harvard architecture, single chip microcontroller (µC)

series which was developed by Intel in 1980 for use in embedded systems. Intel's

original versions were popular in the 1980s and early 1990s. While Intel no longer

manufactures the MCS-51, binary compatible derivatives remain popular today. In

addition to these physical devices, several companies also offer MCS-51 derivatives as

IP cores for use in FPGAs or ASICs designs.

Intel's original MCS-51 family was developed using NMOS technology, but later

versions, identified by a letter C in their name (e.g., 80C51) used CMOS technology and

consumed less power than their NMOS predecessors. This made them more suitable for

battery-powered devices.

The main features of 8051 µC are:

• 8-bit ALU, Accumulator and 8-bit Registers; hence it is an 8-bit microcontroller

• 8-bit data bus – It can access 8 bits of data in one operation

• 16-bit address bus – It can access 2 16 memory locations – 64 KB (65536

locations) each of RAM and ROM

• On-chip RAM – 128 bytes (data memory)

• On-chip ROM – 4 kByte (program memory)

• Four byte bi-directional input/output port

• One serial interface (UART serial port)

•

Two 16-bit Counter /timers• Two-level interrupt priority

http://en.wikipedia.org/wiki/Harvard_architecturehttp://en.wikipedia.org/wiki/Microcontrollerhttp://en.wikipedia.org/wiki/Intelhttp://en.wikipedia.org/wiki/Embedded_systemhttp://en.wikipedia.org/wiki/Binary_compatiblehttp://en.wikipedia.org/wiki/IP_corehttp://en.wikipedia.org/wiki/FPGAshttp://en.wikipedia.org/wiki/ASICshttp://en.wikipedia.org/wiki/NMOS_logichttp://en.wikipedia.org/wiki/CMOShttp://en.wikipedia.org/wiki/Arithmetic_logic_unithttp://en.wikipedia.org/wiki/8-bithttp://en.wikipedia.org/wiki/Microcontrollerhttp://en.wikipedia.org/wiki/Data_bushttp://en.wikipedia.org/wiki/Address_bushttp://en.wikipedia.org/wiki/Kilobytehttp://en.wikipedia.org/wiki/Byteshttp://en.wikipedia.org/wiki/Bytehttp://en.wikipedia.org/wiki/Input/outputhttp://en.wikipedia.org/wiki/Serial_porthttp://en.wikipedia.org/wiki/Timerhttp://en.wikipedia.org/wiki/Interrupthttp://en.wikipedia.org/wiki/Interrupthttp://en.wikipedia.org/wiki/Timerhttp://en.wikipedia.org/wiki/Serial_porthttp://en.wikipedia.org/wiki/Input/outputhttp://en.wikipedia.org/wiki/Bytehttp://en.wikipedia.org/wiki/Byteshttp://en.wikipedia.org/wiki/Kilobytehttp://en.wikipedia.org/wiki/Address_bushttp://en.wikipedia.org/wiki/Data_bushttp://en.wikipedia.org/wiki/Microcontrollerhttp://en.wikipedia.org/wiki/8-bithttp://en.wikipedia.org/wiki/Arithmetic_logic_unithttp://en.wikipedia.org/wiki/CMOShttp://en.wikipedia.org/wiki/NMOS_logichttp://en.wikipedia.org/wiki/ASICshttp://en.wikipedia.org/wiki/FPGAshttp://en.wikipedia.org/wiki/IP_corehttp://en.wikipedia.org/wiki/Binary_compatiblehttp://en.wikipedia.org/wiki/Embedded_systemhttp://en.wikipedia.org/wiki/Intelhttp://en.wikipedia.org/wiki/Microcontrollerhttp://en.wikipedia.org/wiki/Harvard_architecture


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• Power saving mode (on some derivatives)

• only 1 On chip oscillator (external crystal)

• 6 interrupt sources (2 external , 3 internal, Reset)

• 64K external code (program) memory(only read)PSEN

• 64K external data memory(can be read and write) by RD,WR

• Code memory is selectable by EA (internal or external)

8051 FamilySome of the microcontrollers of 8051 family are given as follows:

DEVICE

ON-CHIPDATA

MEMORY (bytes)

ON-CHIPPROGRAMMEMORY

(bytes)

16-BITTIMER/COUNTER

NO. OFVECTOREDINTERUPTS

FULLDUPLEX

I/O

8031 128 None 2 5 1

8032 256 none 2 6 1

8051 128 4k ROM 2 5 1

8052 256 8k ROM 3 6 1

8751 128 4k EPROM 2 5 1

8752 256 8k EPROM 3 6 1

AT89C51 128 4k FlashMemory 2 5 1

AT89C52 256 8k Flashmemory 3 6 1

http://en.wikipedia.org/wiki/Power_managementhttp://en.wikipedia.org/wiki/Power_management


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Pin Diagram of 8051 µC and Pin description of 8051 µC

Figure (1) shows the Pin diagram of 8086. The description follows it.

Fig. 1: (a) 8051 Pin Diagram (b) 8051 Schematic Pin out .

(a) (b)

http://www.8085projects.info/post/Pin-Diagram-of-8086-and-Pin-description-of-8086.aspxhttp://www.8085projects.info/post/Pin-Diagram-of-8086-and-Pin-description-of-8086.aspx


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Pinout Description

Pins 1-8: Port 1 Each of these pins can be configured as an input or an output.

Pin 9: RS A logic one on this pin disables the microcontroller and clears the contents of

most registers. In other words, the positive voltage on this pin resets the microcontroller.

By applying logic zero to this pin, the program starts execution from the beginning.

Pins10-17: Port 3 Similar to port 1, each of these pins can serve as general input or

output. Besides, all of them have alternative functions:

Port 3 Alternate Functions

Pin 10: RXD Serial asynchronous communication input or Serial synchronous

communication output.

Pin 11: TXD Serial asynchronous communication output or Serial synchronouscommunication clock output.

Pin 12: INT0 Interrupt 0 input.

Pin 13: INT1 Interrupt 1 input.

Pin 14: T0 Counter 0 clock input.

Pin 15: T1 Counter 1 clock input.

Pin 16: WR Write to external (additional) RAM.


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Pin 17: RD Read from external RAM.

Pin 18, 19: X2, X1 Internal oscillator input and output. A quartz crystal which specifies

operating frequency is usually connected to these pins. Instead of it, miniature ceramics

resonators can also be used for frequency stability. Later versions of microcontrollers

operate at a frequency of 0 Hz up to over 50 Hz.

Pin 20: GND Ground.

Pin 21-28: Port 2 If there is no intention to use external memory then these port pins are

configured as general inputs/outputs. In case external memory is used, the higher

address byte, i.e. addresses A8-A15 will appear on this port. Even though memory with

capacity of 64Kb is not used, which means that not all eight port bits are used for its

addressing, the rest of them are not available as inputs/outputs.

Pin 29: PSEN If external ROM is used for storing program then a logic zero (0) appears

on it every time the microcontroller reads a byte from memory.

Pin 30: ALE Prior to reading from external memory, the microcontroller puts the lower

address byte (A0-A7) on P0 and activates the ALE output. After receiving signal from the

ALE pin, the external register (usually 74HCT373 or 74HCT375 add-on chip) memorizes

the state of P0 and uses it as a memory chip address. Immediately after that, the ALU

pin is returned its previous logic state and P0 is now used as a Data Bus. As seen, port

data multiplexing is performed by means of only one additional (and cheap) integrated

circuit. In other words, this port is used for both data and address transmission.

Pin 31: EA By applying logic zero to this pin, P2 and P3 are used for data and address

transmission with no regard to whether there is internal memory or not. It means that

even there is a program written to the microcontroller, it will not be executed. Instead, the

program written to external ROM will be executed. By applying logic one to the EA pin,

the microcontroller will use both memories, first internal then external (if exists).

Pin 32-39: Port 0 Similar to P2, if external memory is not used, these pins can be used

as general inputs/outputs. Otherwise, P0 is configured as address output (A0-A7) when


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the ALE pin is driven high (1) or as data output (Data Bus) when the ALE pin is driven

low (0).

Pin 40: VCC +5V power supply.

Architecture or Functional Block Diagram of 8051

8051 employs Harvard architecture. It has some peripherals such as 32 bit digital

I/O, Timers and Serial I/O. The basic architecture of 8051 is given in fig 2.

Fig. (2): basic architecture of 8051


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Fig. 3: Internal Architecture of 8051


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Input/Output Ports (I/O Ports)

All 8051 microcontrollers have 4 I/O ports each comprising 8 bits which can be

configured as inputs or outputs.

Accordingly, in total of 32 input/output pins enabling the microcontroller to be

connected to peripheral devices are available for use.

Pin configuration, i.e. whether it is to be configured as an input (1) or an output (0),

depends on its logic state.

In order to configure a microcontroller pin as an input, it is necessary to apply logic

zero (0) to appropriate I/O port bit. In this case, voltage level on appropriate pin will

be 0.

Similarly, in order to configure a microcontroller pin as an input, it is necessary to

apply a logic one (1) to appropriate port. In this case, voltage level on appropriate pin

will be 5V (as is the case with any TTL input).

This may seem confusing but don't loose your patience. It all becomes clear after

studying simple electronic circuits connected to an I/O pin.

Fig. 4: 8051 Port 3 Bit Latches and I/O


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1. write a 1 to the pin

2. output pin isVcc

Fig. 6 : Writing “1” to Output Pin P1.X

1. write a 0 to the pin

2. output pin isground

Fig. 7: Writing “0” to Output Pin P1.X

0

1

0

1

X


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1. write a 1 to the pinMOV P1,#0FFH

2. MOV A,P1external pin=High

Fig. 8 : Reading “High” at Input Pin

0

1

X

3. Read pin=1 Read latch=0Write to latch=1

1. write a 1 to the pinMOV P1,#0FFH

2. MOV A,P1external pin=Low

Fig. 9 : Reading “LOW” at Input Pin

0

1

X

3. Read pin=1 Read latch=0Write to latch=1

1

0


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Port 0

The P0 port is characterized by two functions. If external memory is used then the

lower address byte (addresses A0-A7) is applied on it. Otherwise, all bits of this port are

configured as inputs/outputs.

The other function is expressed when it is configured as an output. Unlike other ports

consisting of pins with built-in pull-up resistor connected by its end to 5 V power supply,

pins of this port have this resistor left out. This apparently small difference has its

consequences:

If any pin of this port is configured as an input then it acts as if it “floats”. Such an input

has unlimited input resistance and in determined potential.

When the pin is configured as an output, it acts as an “open drain”. By applying logic 0 to

a port bit, the appropriate pin will be connected to ground (0V). By applying logic 1, the

external output will keep on “floating”. In order to apply logic 1 (5V) on this output pin, it is

necessary to built in an external pull-up resistor.

Fig. 11 : Output Pin with external pull-up

Fig. 10 : Port 0


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Port 1

P1 is a true I/O port, because it doesn't have any alternative functions as is the

case with P0, but can be cofigured as general I/O only. It has a pull-up resistor built-in

and is completely compatible with TTL circuits.

Port 2

P2 acts similarly to P0 when external memory is used. Pins of this port occupy

addresses intended for external memory chip. This time it is about the higher address

byte with addresses A8-A15. When no memory is added, this port can be used as a

general input/output port showing features similar to P1.

Port 3

All port pins can be used as general I/O, but they also have an alternative

function. In order to use these alternative functions, a logic one (1) must be applied to

appropriate bit of the P3 register. In terms of hardware, this port is similar to P0, with the

difference that its pins have a pull-up resistor built-in.

Memory Organization

The 8051 has two types of memory and these are Program Memory and Data

Memory. Program Memory (ROM) is used to permanently save the program being

executed, while Data Memory (RAM) is used for temporarily storing data and

intermediate results created and used during the operation of the microcontroller.

Depending on the model in use All 8051 microcontrollers have a 16-bit addressing bus

and are capable of addressing 64 kb memory. It is neither a mistake nor a big ambition of

engineers who were working on basic core development. It is a matter of smart memory

organization which makes these microcontrollers a real “programmers’ goody“.


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Program Memory

The first models of the 8051 microcontroller family did not have internal program

memory. It was added as an external separate chip. These models are recognizable by

their label beginning with 803 (for example 8031 or 8032). All later models have a few

Kbyte ROM embedded. Even though such an amount of memory is sufficient for writing

most of the programs, there are situations when it is necessary to use additional memory

as well. A typical example are so called lookup tables. They are used in cases when

equations describing some processes are too complicated or when there is no time forsolving them. In such cases all necessary estimates and approximates are executed in

advance and the final results are put in the tables (similar to logarithmic tables).

Fig. 12 : External program memory of the 8051


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How does the microcontroller handle external memory depends on the EA pin logic state:

EA=0 In this case, the microcontroller completely ignores internal program memory andexecutes only the program stored in external memory.

EA=1 In this case, the microcontroller executes first the program from built-in ROM, then

the program stored in external memory.

In both cases, P0 and P2 are not available for use since being used for data and address

transmission. Besides, the ALE and PSEN pins are also used.

Fig. 13 : Program memory depends on the EA pin logic state


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Data Memory

As already mentioned, Data Memory is used for temporarily storing data and

intermediate results created and used during the operation of the microcontroller.

Besides, RAM memory built in the 8051 family includes many registers such as hardware

counters and timers, input/output ports, serial data buffers etc. The previous models had

256 RAM locations, while for the later models this number was incremented by additional

128 registers. However, the first 256 memory locations (addresses 0-FFh) are the heart

of memory common to all the models belonging to the 8051 family. Locations available tothe user occupy memory space with addresses 0-7FH, i.e. first 128 registers. This part of

RAM is divided in several blocks.

The first block consists of 4 banks each including 8 registers denoted by R0-R7. Prior to

accessing any of these registers, it is necessary to select the bank containing it. The next

memory block (address 20H-2FH) is bit- addressable, which means that each bit has its

own address (0-7FH). Since there are 16 such registers, this block contains in total of

128 bits with separate addresses (address of bit 0 of the 20H byte is 0, while address of

bit 7 of the 2FH byte is 7FH). The third group of registers occupy addresses 2FH-7FH,

i.e. 80 locations, and does not have any special functions or features.

Additional RAM

In order to satisfy the programmers’ constant hunger for Data Memory, the

manufacturers decided to embed an additional memory block of 128 locations into thelatest versions of the 8051 microcontrollers. However, it’s not as simple as it seems to

be… The problem is that electronics performing addressing has 1 byte (8 bits) on

disposal and is capable of reaching only the first 256 locations, therefore. In order to

keep already existing 8-bit architecture and compatibility with other existing models a

small trick was done.


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Fig. 14 : Additional Data memory of the 8051


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What does it mean? It means that additional memory block shares the same addresses

with locations intended for the SFRs (80h- FFh). In order to differentiate between these

two physically separated memory spaces, different ways of addressing are used. The

SFRs memory locations are accessed by direct addressing, while additional RAM

memory locations are accessed by indirect addressing.

Memory expansion

In case memory (RAM or ROM) built in the microcontroller is not sufficient, it is possible

to add two external memory chips with capacity of 64Kb each. P2 and P3 I/O ports are

used for their addressing and data transmission.

Fig. (15): Memory Expansion in the 8051 microcontroller


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From the user’s point of view, everything works quite simply when properly connected

because most operations are performed by the microcontroller itself. The 8051

microcontroller has two pins for data read RD P3.7) and PSEN . The first one is used for

reading data from external data memory (RAM), while the other is used for reading data

from external program memory (ROM). Both pins are active low. A typical example of

memory expansion by adding RAM and ROM chips (Hardward architecture), is shown in

figure above.

Even though additional memory is rarely used with the latest versions of the

microcontrollers, we will describe in short what happens when memory chips are

connected according to the previous schematic. The whole process described below is

performed automatically.

When the program during execution encounters an instruction which resides in

external memory (ROM), the microcontroller will activate its control output ALE

and set the first 8 bits of address (A0-A7) on P0. IC circuit 74HCT573 passes

the first 8 bits to memory address pins.

A signal on the ALE pin latches the IC circuit 74HCT573 and immediately

afterwards 8 higher bits of address (A8-A15) appear on the port. In this way, a

desired location of additional program memory is addressed. It is left over to

read its content.

Port P0 pins are configured as inputs, the PSEN pin is activated and the

microcontroller reads from memory chip.

Similar occurs when it is necessary to read location from external RAM. Addressing is

performed in the same way, while read and write are performed via signals appearing onthe control outputs RD (is short for read) or WR (is short for write).

Special Function Registers

The set of Special Function Registers (SFRs) contains important registers such as

Accumulator, Register B, I/O Port latch registers, Stack pointer, Data Pointer, Processor

Status Word (PSW) and various control registers. Some of these registers are bit

addressable.


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The SFRs are in locations 80H to FFH of the on-chip RAM. In the 8051 not all locations

are used. These extra locations are used by other family members (8052, etc.) for the

extra features these microcontrollers possess. The detailed map of various registers is

shown in the following figure. As you can see, some of the SFRs are bit addressable,

including the four ports P0, P1, P2 and P3.

A Register (Accumulator)

A register is a general-purpose register used for storing intermediate results

obtained during operation. Prior to executing an instruction upon any number or operand

it is necessary to store it in the accumulator first. All results obtained from arithmetical

operations performed by the ALU are stored in the accumulator. Data to be moved from

one register to another must go through the accumulator. In other words, the A register is

Fig. 16: Summary of the 8051 on-chip data memory

(Special Function Registers)


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the most commonly used register and it is impossible to imagine a microcontroller

without it. More than half instructions used by the 8051 microcontroller use somehow the

accumulator.

B Register

The B register is used together with the accumulator for multiply and divide operations.

• The MUL AB instruction multiplies the values in A and B and stores the low-byte

of the result in A and the high-byte in B.o For example, if the accumulator contains F5H and the B register contains

02H, the result of MUL AB will be A = EAH and B = 01H.

• The DIV AB instruction divides A by B leaving the integer result in A and the

remainder by B.

o For example, if the accumulator contains 07H and the B register contains

02H, the result of DIV AB will be A = 03H and B = 01H.

The B register is also bit-addressable.

Program Status Word Register

PSW register is one of the most important SFRs. It contains several status bits

that reflect the current state of the CPU. Besides, this register contains Carry bit,

Auxiliary Carry, two register bank select bits, Overflow flag, parity bit and user-definable

status flag.

P - Parity bit. If a number stored in the accumulator is even then this bit will be

automatically set (1), otherwise it will be cleared (0). It is mainly used during data

transmit and receive via serial communication.


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- Bit 1. This bit is intended to be used in the future versions of microcontrollers.

OV Overflow occurs when the result of an arithmetical operation is larger than 255 and

cannot be stored in one register. Overflow condition causes the OV bit to be set (1).

Otherwise, it will be cleared (0).

RS0, RS1 - Register bank select bits. These two bits are used to select one of four

register banks of RAM. By setting and clearing these bits, registers R0-R7 are stored in

one of four banks of RAM.

RS1 RS2 Register Bank Address of Register Bank

0 0 0 00H to 07H0 1 1 08H to 0FH

1 0 2 10H to 17H1 1 3 18H to 1FH

F0 - Flag 0. This is a general-purpose bit available for use.

AC - Auxiliary Carry Flag is used for BCD operations only.

CY - Carry Flag is the (ninth) auxiliary bit used for all arithmetical operations and shift

instructions.

R Registers (R0-R7)

This is a common name for 8

general-purpose registers (R0, R1, R2

...R7). Even though they are not true SFRs,

they deserve to be discussed here because

of their purpose. They occupy 4 banks

within RAM. Similar to the accumulator,

they are used for temporary storing

variables and intermediate results during

operation. Which one of these banks is to


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be active depends on two bits of the PSW Register. Active bank is a bank the registers

of which are currently used.

The following example best illustrates the purpose of these registers. Suppose it is

necessary to perform some arithmetical operations upon numbers previously stored in

the R registers: (R1+R2) - (R3+R4). Obviously, a register for temporary storing results of

addition is needed. This is how it looks in the program:

MOV A,R3; Means: move number from R3 into accumulator

ADD A,R4; Means: add number from R4 to accumulator (result remains in accumulator)MOV R5,A; Means: temporarily move the result from accumulator into R5

MOV A,R1; Means: move number from R1 to accumulator

ADD A,R2; Means: add number from R2 to accumulator

SUBB A,R5; Means: subtract number from R5 (there are R3+R4)

Data Pointer Register (DPTR)

DPTR register is not a true one because it doesn't physically exist. It consists of

two separate registers: DPH (Data Pointer High) and (Data Pointer Low). For this reason

it may be treated as a 16-bit register or as two independent 8-bit registers. Their 16 bits

are primarly used for external memory addressing. Besides, the DPTR Register is

usually used for storing data and intermediate results. Besides, the DPTR Register is

usually used for storing data and intermediate results.

Stack Pointer (SP) Register

The stack pointer (SP) is an 8-bit register at location 81H. A stack is used for

temporarily storing data. It operates on the basis of last in first out (LIFO). Putting data

onto the stack is called "pushing onto the stack" while taking data off the stack is called

"popping the stack."

The stack pointer contains the address of the item currently on top of the stack. On

power-up or reset the SP is set to 07H. When pushing data onto the stack, the SP is first

increased by one and the data is then placed in the location pointed to by the SP. Whenpopping the stack, the data is taken off the stack and the SP is then decreased by one.


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Since reset initializes the SP to 07H, the first item pushed onto the stack is stored at 08H

(remember, the SP is incremented first, then the item is placed on the stack). However, if

the programmer wishes to use the register banks 1 to 3, which start at address 08H,

he/she must move the stack to another part of memory. The general purpose RAM

starting at address 30H is a good spot to place the stack. To do so we need to change

the contents of the SP.

MOV SP, #2FH.

Now, the first item to be pushed onto the stack will be stored at 30H.

P0, P1, P2, P3 - Input/Output Registers

If neither external memory nor serial communication system are used then 4 ports with in

total of 32 input/output pins are available for connection to peripheral environment. Eachbit within these ports affects the state and performance of appropriate pin of the

microcontroller. Thus, bit logic state is reflected on appropriate pin as a voltage (0 or 5 V)

and vice versa, voltage on a pin reflects the state of appropriate port bit.

As mentioned, port bit state affects performance of port pins, i.e. whether they will be

configured as inputs or outputs. If a bit is cleared (0), the appropriate pin will be

configured as an output, while if it is set (1), the appropriate pin will be configured as an

input. Upon reset and power-on, all port bits are set (1), which means that all appropriate

pins will be configured as inputs.


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Lecture Eight8051 Instruc tion SetAs sist .Prof. Dr. Hadeel Nasrat

Page 1 of 16

8051 Addressing Modes

There are 8 addressing modes. The addressing mode determines how the

operand byte is selected. The direct and indirect addressing modes are used to

distinguish between the SFR space and data memory space. The relative instructions

are based on the value of the program counter. The absolute instructions operate in the

same manner. Indexed instructions use a calculation to generate the address used as

part of the instruction.

Register MOV A, B

Direct MOV 30H,A

Indirect ADD A,@R0

Immediate Constant ADD A,#80 H

Relative* SJMP +127/-128 of PC

Absolute* AJMP within 2K

Long* LJMP FAR

Indexed MOVC A,@A+PC

* Related to program branching instructions

Register Addressing

♦ In the Register Addressing mode, the instruction involves transfer of informationbetween registers,

♦ The accumulator is referred to as the A register.

MOV R0, A


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Direct Addressing

♦ In Direct Addressing mode you specify the operand by giving its actual memory

address (in Hexadecimal) or by giving its abbreviated name.

MOV A, P3 ; Transfer the contents of Port 3 to the accumulator

MOV A, 020H ; Transfer the contents of RAM location 20H to the

accumulator

Indirect Addressing

♦ In the Indirect Addressing mode, a register is used to hold the effective address of

the operand.

♦ This register, which holds the address, is called the pointer register and is said to

point to the operand.

♦ Only registers R0, R1 and DPTR can be used as pointer registers.♦ R0 and R1 registers can hold an 8-bit address whereas DPTR can hold a 16-bit

address.

♦ DPTR is useful in accessing operands which are in the external memory.

MOV @R0,A ; Store the content of accumulator into the memory

; location pointed to by the contents of

; register R0. R0 could have an

; 8-bit address, such as 60H.

MOVX A,@DPTR ; Transfer the contents from the memory location

; pointed to by DPTR into the accumulator

; DPTR could have a 16-bit address, such as 1234H.


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Immediate Constant Addressing

♦ In the Immediate Constant Addressing mode, the source operand is an 8- or 16-bit

constant value.

♦ This constant is specified in the instruction itself (rather than in a register or a

memory location).

♦ The destination register should hold the same data size which is specified by the

source operand.

ADD A,#030H ; Add 8-bit value of 30H to the accumulator register

; (which is an 8-bit register).

MOV DPTR,#0FE00H ; Move 16-bit data constant FE00H into the

; 16-bit Data Pointer Register.

Relative Addressing

♦ The Relative Addressing mode is used with some type of jump instructions like

SJMP (short jump) and conditional jumps like JNZ.

♦ This instruction transfers control from one part of a program to another.

GoBack: DEC A ; Decrement A

JNZ GoBack ; If A is not zero, loop back

Absolute Addressing

♦ In Absolute Addressing mode, the absolute address, to which the control is

transferred, is specified by a label.

♦ Two instructions associated with this mode of addressing are ACALL and AJMP

instructions.

♦ These are 2-byte instructions.

ACALL PORT_INIT ;PORT_INIT should be

;located within 2k bytes.

PORT_INIT: MOV P0, #0FH ;PORT_INIT subroutine


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Long Addressing

♦ This mode of addressing is used with the LCALL and LJMP instructions.

♦ It is a 3-byte instruction and the last 2 bytes specify a 16-bit destination location

where the program branches to.

♦ It allows use of the full 64K code space.

LCALL TIMER_INIT ; TIMER_INIT address (16-bits ;long) is

; specified as the operand

; In C, this will be a

;function call: Timer_Init().

TIMER_INIT: ORL TMOD,#01H ;TIMER_INIT subroutine

Indexed Addressing

♦ The Indexed addressing is useful when there is a need to retrieve data from a look-

up table (LUT).

♦

A 16-bit register (data pointer) holds the base address and the accumulator holds an8-bit displacement or index value.

♦ The sum of these two registers forms the effective address for a JMP or MOVC

instruction.

MOV A, #08H ; Offset from table start

MOV DPTR, #01F00H ; Table start address

MOVC A, @A+DPTR ; Gets target value from the table

; start address + offset and puts it ;in A.

♦ After the execution of the above instructions, the program will branch to address

1F08H (1F00H+08H) and transfer into the accumulator the data byte retrieved from

that location (from the look-up table)

8051 Instructions Set

The process of writing program for the microcontroller mainly consists of giving

instructions (commands) in the specific order in which they should be executed in order

to carry out a specific task. All commands are known as INSTRUCTION SET. All


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microcontrollers compatible with the 8051 have in total of 255 instructions, i.e. 255

different words available for program writing. Here is a list of the operands and their

meanings:

• A - accumulator;

Rn - is one of working registers (R0-R7) in the currently active RAM memory bank;

• Direct - is any 8-bit address register of RAM. It can be any general-purpose register

or a SFR (I/O port, control register etc.);

• @Ri - is indirect internal or external RAM location addressed by register R0 or R1;

• #data - is an 8-bit constant included in instruction (0-255);

• #data16 - is a 16-bit constant included as bytes 2 and 3 in instruction (0-65535);

• addr16 - is a 16-bit address. May be anywhere within 64KB of program memory;

• addr11 - is an 11-bit address. May be within the same 2KB page of program

memory as the first byte of the following instruction;

• rel - is the address of a close memory location (from -128 to +127 relative to the

first byte of the following instruction). On the basis of it, assembler computes the

value to add or subtract from the number currently stored in the program counter;• bit - is any bit-addressable I/O pin, control or status bit; and

• C - is carry flag of the status register (register PSW).

Types of instructions

The C8051 instructions are divided into five functional groups:

Arithmetic operations

Logical operations

Data transfer operations

Boolean variable operations

Program branching operations


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Arithmetic instructions

Mnemonics Description Bytes Cycles

ADD A, Rn A A + Rn 1 1

ADD A, direct A A + (direct) 2 1

ADD A, @Ri A A + @Ri 1 1

ADD A, #data A A + data 2 1

ADDC A, Rn A A + Rn + C 1 1

ADDC A, direct A A + (direct) + C 2 1

ADDC A, @Ri A A + @Ri + C 1 1

ADDC A, #data A A + data + C 2 1

DA A Decimal adjust accumulator 1 1

DIV ABDivide A by B

A quotient ; B remainder1 4

DEC A A A -1 1 1

DEC Rn Rn Rn - 1 1 1

DEC direct (direct) (direct) - 1 2 1

DEC @Ri @Ri @Ri - 1 1 1

INC A A A+1 1 1

INC Rn Rn Rn + 1 1 1

INC direct (direct) (direct) + 1 2 1

INC @Ri @Ri @Ri +1 1 1INC DPTR DPTR DPTR +1 1 2

MUL ABMultiply A by B

A low byte (A*B) ;B high byte (A* B)1 4

SUBB A, Rn A A - Rn - C 1 1

SUBB A, direct A A - (direct) - C 2 1

SUBB A, @Ri A A - @Ri - C 1 1

SUBB A, #data A A - data - C 2 1


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Logical Instructions


ANL A, Rn A A AND Rn 1 1

ANL A, direct A A AND (direct) 2 1

ANL A, @Ri A A AND @Ri 1 1

ANL A, #data A A AND data 2 1

ANL direct, A (direct) (direct) AND A 2 1 ANL direct, #data (direct) (direct) AND data 3 2

CLR A A 00H 1 1

CPL A A A 1 1

ORL A, Rn A A OR Rn 1 1

ORL A, direct A A OR (direct) 1 1

ORL A, @Ri A A OR @Ri 2 1

ORL A, #data A A OR data 1 1ORL direct, A (direct) (direct) OR A 2 1

ORL direct, #data (direct) (direct) OR data 3 2

RL A Rotate accumulator left 1 1

RLC A Rotate accumulator left through carry 1 1

RR A Rotate accumulator right 1 1

RRC A Rotate accumulator right through carry 1 1

SWAP A Swap nibbles within Acumulator 1 1XRL A, Rn A A EXOR Rn 1 1

XRL A, direct A A EXOR (direct) 1 1

XRL A, @Ri A A EXOR @Ri 2 1

XRL A, #data A A EXOR data 1 1

XRL direct, A (direct) (direct) EXOR A 2 1

XRL direct, #data (direct) (direct) EXOR data 3 2


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Data Transfer Instructions


MOV A, Rn A Rn 1 1

MOV A, direct A (direct) 2 1

MOV A, @Ri A @Ri 1 1

MOV A, #data A data 2 1

MOV Rn, A Rn A 1 1

MOV Rn, direct Rn (direct) 2 2

MOV Rn, #data Rn data 2 1

MOV direct, A (direct) A 2 1

MOV direct, Rn (direct) Rn 2 2

MOV direct1, direct2 (direct1) (direct2) 3 2

MOV direct, @Ri (direct) @Ri 2 2

MOV direct, #data (direct) #data 3 2

MOV @Ri, A @Ri A 1 1

MOV @Ri, direct @Ri (direct) 2 2

MOV @Ri, #data @Ri data 2 1

MOV DPTR, #data16 DPTR data16 3 2

MOVC A, @A+DPTR A Code byte pointed by A + DPTR 1 2

MOVC A, @A+PC A Code byte pointed by A + PC 1 2

MOVC A, @Ri A Code byte pointed by Ri 8-bit address) 1 2

MOVX A, @DPTR A External data pointed by DPTR 1 2

MOVX @Ri, A @Ri A (External data - 8bit address) 1 2

MOVX @DPTR, A @DPTR A(External data - 16bit address) 1 2

PUSH direct (SP) (direct) 2 2

POP direct (direct) (SP) 2 2

XCH Rn Exchange A with Rn 1 1

XCH direct Exchange A with direct byte 2 1


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XCH @Ri Exchange A with indirect RAM 1 1

XCHD A, @RiExchange least significant nibble of A with

that of indirect RAM1 1

Boolean Variable Instructions


CLR C C-bit 0 1 1

CLR bit bit 0 2 1

SET C C 1 1 1

SET bit bit 1 2 1

CPL C C 1 1

CPL bit bit 2 1

ANL C, /bit C C . 2 1 ANL C, bit C C. bit 2 1

ORL C, /bit C C + 2 1

ORL C, bit C C + bit 2 1

MOV C, bit C bit 2 1

MOV bit, C bit C 2 2

Program Branching Instructions

Mnemonics DescriptionBytes Instruction

Cycles

ACALL addr11 PC + 2 (SP) ; addr 11 PC 2 2

AJMP addr11 Addr11 PC 2 2


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CJNE A, direct, relCompare with A, jump (PC + rel)

if not equal

3 2

CJNE A, #data, relCompare with A, jump (PC + rel)

if not equal

3 2

CJNE Rn, #data, relCompare with Rn, jump (PC + rel)

if not equal

3 2

CJNE @Ri, #data, relCompare with @Ri A, jump (PC +

rel) if not equal

3 2

DJNZ Rn, rel Decrement Rn, jump if not zero 2 2

DJNZ direct, relDecrement (direct), jump if not

zero

3 2

JC rel Jump (PC + rel) if C bit = 1 2 2

JNC rel Jump (PC + rel) if C bit = 0 2 2

JB bit, rel Jump (PC + rel) if bit = 1 3 2

JNB bit, rel Jump (PC + rel) if bit = 0 3 2JBC bit, rel Jump (PC + rel) if bit = 1 3 2

JMP @A+DPTR A+DPTR PC 1 2

JZ rel If A=0, jump to PC + rel 2 2

JNZ rel If A ≠ 0 , jump to PC + rel 2 2

LCALL addr16 PC + 3 (SP), addr16 PC 3 2

LJMP addr 16 Addr16 PC 3 2

NOP No operation 1 1RET (SP) PC 1 2

RETI (SP) PC, Enable Interrupt 1 2

SJMP rel PC + 2 + rel PC 2 2

JMP @A+DPTR A+DPTR PC 1 2

JZ rel If A = 0. jump PC+ rel 2 2

JNZ rel If A ≠ 0, jump PC + rel 2 2

NOP No operation 1 1


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Example programs

Example 1: - exchange the content of FFh and FF00h

Solution: - here one is internal memory location and other is memory external location.

so first the content of ext memory location FF00h is loaded in acc. then the content of int

memory location FFh is saved first and then content of acc is transferred to FFh. now

saved content of FFh is loaded in acc and then it is transferred to FF00h.

Mov dptr, #0FF00h ; take the address in dptr

Movx a, @dptr ; get the content of 0FF00h in a

Mov r0, 0FFh ; save the content of 0FFh in r0

Mov 0FFh, a ; move a to 0FFh

Mov a, r0 ; get content of 0FFh in a

Movx @dptr, a ; move it to 0FF00h

Example 2: - store the higher nibble of r7 in to both nibbles of r6

Solution: – first we shall get the upper nibble of r7 in r6. Then we swap nibbles of r7 and

make OR operation with r6 so the upper and lower nibbles are duplicated

Mov a, r7 ; get the content in acc

Anl a, #0F0h ; mask lower bitMov r6, a ; send it to r6

Swap a ; xchange upper and lower nibbles of acc

Orl a, r6 ; OR operation

Mov r6, a ; finally load content in r6

Example 3: - treat r6-r7 and r4-r5 as two 16 bit registers. Perform subtraction between

them. Store the result in 20h (lower byte) and 21h (higher byte).


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Solution: - first we shall clear the carry. Then subtract the lower bytes afterward then

subtract higher bytes.

Clr c ; clear carry

Mov a, r4 ; get first lower byte

Subb a, r6 ; subtract it with other

Mov 20h, a ; store the result

Mov a, r5 ; get the first higher byte

Subb a, r7 ; subtract from other

Mov 21h, a ; store the higher byte

Example 4: - divide the content of r0 by r1. Store the result in r2 (answer) and r3

(reminder). Then restore the original content of r0.

Solution:- after getting answer to restore original content we have to multiply answer with

divider and then add reminder in that.

Mov a, r0 ; get the content of r0 and r1Mov b, r1 ; in register A and B

Div ab ; divide A by B

Mov r2, a ; store result in r2

Mov r3, b ; and reminder in r3

Mov b, r1 ; again get content of r1 in B

Mul ab ; multiply it by answer

Add a, r3 ; add reminder in new answerMov r0, a ; finally restore the content of r0

Example 5: - transfer the block of data from 20h to 29h to external location 1020h to

1029h.

Solution: - here we have to transfer 10 data bytes from internal to external RAM. So

first, we need one counter. Then we need two pointers one for source second fordestination.


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Mov r7, #0Ah ; initialize counter by 10d

Mov r0, #20h ; get initial source location

Mov dptr, #1020h ; get initial destination location

Nxt: Mov a, @r0 ; get first content in acc

Movx @dptr, a ; move it to external location

Inc r0 ; increment source location

Inc dptr ; increase destination location

Djnz r7, nxt ; decrease r7. if zero then over otherwise move next

Example 6: - find out how many equal bytes between two memory blocks 10h to 19h

and 20h to 29h.

Solution: - here we shall compare each byte one by one from both blocks. Increase the

count every time when equal bytes are found

Mov r7, #0Ah ; initialize counter by 10dMov r0, #10h ; get initial location of block1

Mov r1, #20h ; get initial location of block2

Mov r6, #00h ; equal byte counter. Starts from zero

Nxt: Mov a, @r0 ; get content of block 1 in acc

Mov b, a ; move it to B

Mov a, @r1 ; get content of block 2 in acc

Cjne a, b, nomatch ; compare both if not equalInc r6 ; increment the counter

Nomatch: inc r0 ; otherwise go for second number

Inc r1

djnz r7, nxt ; decrease r7. if zero then over otherwise move next


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Example 7: - given block of 100h to 200h. Find out how many bytes from this block are

greater then the number in r2 and less then number in r3. Store the count in r4.

Solution: - in this program, we shall take each byte one by one from given block. Now

here two limits are given higher limit in r3 and lower limit in r2. So we check first higher

limit and then lower limit if the byte is in between these limits then count will be

incremented.

Mov dptr, #0100h ; get initial location

Mov r7, #0FFh ; counter

Mov r4, #00h ; number counter

Mov 20h, r2 ; get the upper and lower limits in

Mov 21h, r3 ; 20h and 21h

Nxt: Movx a, @dptr ; get the content in acc

Cjne a, 21h, lower ; check the upper limit first

Sjmp out ; if number is larger

Lower: jnc out ; jump outCjne a, 20h, limit ; check lower limit

Sjmp out ; if number is lower

Limit: jc out ; jump out

Inc r4 ; if number within limit increment count

Out: inc dptr ; get next location

Djnz r7, nxt ; repeat until block completes

Example 8:- the crystal frequency is given as 12 MHz. Make a subroutine that will

generate delay of exact 1 ms. Use this delay to generate square wave of 50 Hz on pin

P2.0

Solution: - 50 Hz means 20 ms. And because of square wave 10 ms on time and 10 ms

off time. So for 10 ms we shall send 1 to port pin and for another 10 ms send 0 incontinuous loop.


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Loop: Setb p2.0 ; send 1 to port pin

Mov r6, #0Ah ; load 10d in r6

Acall delay ; call 1 ms delay ×10 = 10 ms

Clr p2.0 ; send 0 to port pin

Mov r6, #0Ah ; load 10d in r6

Acall delay ; call 1 ms delay ×10 = 10 ms

Sjmp loop ; continuous loop

Delay: ; load count 250d

Lp2: Mov r7, #0FAh

Lp1: Nop ; 1 cycle

Nop ; 1+1=2 cycles

Djnz r7, lp1 ; 1+1+2 = 4 cycles

Djnz r6, lp2 ; 4×250 = 1000 cycles = 1000 µs = 1 ms

ret

Example 9:- count number of interrupts arriving on external interrupt pin INT1. Stop

whencounter overflows and disable the interrupt. Give the indication on pinP0.0

Solution: - as we know whenever interrupt occurs the PC jumps to one particular location

where it’s ISR is written. So we have to just write one ISR that will do the job

Mov r2, #00h ; initialize the counter

Mov ie, #84h ; enable external interrupt 1Here: Sjmp here ; continuous loop

Org 0013h ; interrupt 1location

Inc r2 ; increment the count

Cjne r2, #00h, out ; check whether it overflows

Mov ie, #00h ; if yes then disable interrupt

Clr p0.0 ; and give indicationOut : reti ; otherwise keep counting


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Example 10: - continuously scan port P0. If data is other then FFh write a subroutine that

will multiply it with 10d and send it to port P1

Solution: - here we have to use polling method. We shall continuously pole port P0 if

there is any data other then FFh. If there is data we shall call subroutine

Agin: Mov p0, #0ffh ; initialize port P0 as input port

Loop: Mova, p0 ; get the data in acc

Cjne a, #0FFh, dat ; compare it with FFh

Sjmp loop ; if same keep looping

Dat: acall multi; if different call subroutine

Sjmp agin ; again start polling

Multi

Mov b,#10d ; load 10d in register B

Mul ab ; multiply it with received data

Mov p1, a ; send the result to P1Ret ;return to main program


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Lecture nine8051 Timer & Cou nterAs sist .Prof. Dr. Hadeel Nasrat

Page 1 of 22

8051 Timer and Counter

As you already know, the microcontroller oscillator uses quartz crystal for its

operation. As the frequency of this oscillator is precisely defined and very stable, pulses

it generates are always of the same width, which makes them ideal for time

measurement. Such crystals are also used in quartz watches. In order to measure time

between two events it is sufficient to count up pulses coming from this oscillator. That is

exactly what the timer does. If the timer is properly programmed, the value stored in its

register will be incremented (or decremented) with each coming pulse, i.e. once per each

machine cycle. A single machine-cycle instruction lasts for 12 quartz oscillator periods,

which means that by embedding quartz with oscillator frequency of 12MHz, a number

stored in the timer register will be changed million times per second, i.e. each

microsecond.

The 8051 microcontroller has 2 timers/counters called T0 and T1. As their names

suggest, their main purpose is to:1. Measure time between events

2. Generate required amount of time

3. Count events

4. Generate baud rate for Serial communication


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Timer increments by 1 every machine cycle

Counter Increments at every input pulse

Time of 1 Machine Cycle, for 12 MHZ crystal? 1 micro second for crystal of 12 MHz

Time of 1 Machine Cycle for 11.0592 MHz crystal?

♦ Oscillator (Crystal) : 11.0592 MHz

♦ 12 Clock cycles make 1 Machine cycle

♦ Time of 1 clock cycle = 1 / 11.0592 MHz

♦ Time of 1 Machine Cycle = 12* (1 / 11.0592 MHz )

♦ 1 Machine Cycle = 1.0851 Micro Seconds

Timer Registers

♦ TCON Timer Control

♦ TMOD Timer Mode

♦ TH0/TL0 Timer 0 16 bit register (byte addressable only)

♦ TH1/TL1 Timer 1 16 bit register (byte addressable only)

Timer Control (TCON) Register

• TCON register is also one of the registers whose bits are directly in control of timer

operation.

• Only 4 bits of this register are used for this purpose, while rest of them is used for

interrupt control to be discussed later.

• TFx : Timer x overflow flag. It causes interrupt. It is set by hardware and cleared

after interrupt processing.

• TRx: Timer x run control bit. Set/Cleared by software to turn Timer/Counter on/off

o 1 - Timer is enabled.

o 0 - Timer is disabled.


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Page 3 of 22

• IEx: Interrupt x Edge Flag; Set when detected external interrupt edge, and cleared

after interrupt processing.

• ITx: Interrupt x Type control bit. Set/Cleared by software falling edge triggered

external interrupts

TMOD Register (Timer Mode)

The TMOD register selects the operational mode of the timers T0 and T1. As seen

in figure below, the low 4 bits (bit0 - bit3) refer to the timer 0, while the high 4 bits (bit4 -

bit7) refer to the timer 1. There are 4 operational modes and each of them is describedherein.

Bits of this register have the following function:

• GATE1 enables and disables Timer by means of a signal brought to the INT pin(P3.2, P3.3):

o 1 - Timer operates only if the INT bit is set.

o 0 - Timer operates regardless of the logic state of the INT bit.

• T C selects pulses to be counted up by the timer/counter :

o 1 - Counter counts pulses brought to the T pin (P3.4, P3.5).

o 0 - Timer counts pulses from internal oscillator.

• M1M0 These two bits select the operational mode of the Timer.

M 1 M 0 M O D E D E S C R I P T I O N

0 0 0 13-bit timer

0 1 1 16-bit timer

1 0 2 8-bit auto-reload

1 1 3 Split mode


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Page 4 of 22

Timer Operation

♦ Configure timers (TMOD)

♦ Initialize values (TH and TL)

♦ Start and Stop Timer (TCON)

Using 8051 Timers

♦ TH and TL contain the ‘value’ of timer

♦ Timers count UP. This value will be incremented by 1 every machine

cycle

♦ When TH and TL have maximum value, next machine cycle would set them

both to ZERO.

Configuring Timers TMOD

♦ Timer 0 in Mode1 ; Timer 1 in Mode3

♦ MOV tmod,#00110001b

♦ OR MOV tmod,#31h

Controlling Timers TCON

SETB TR0 ;running the timer

Label: JNB TF0, Label ; waiting till overflow flag is set

Timer T0

As seen in figure below, the timer T0 consists of two registers – TH0 and TL0

representing a low and a high byte of one 16- digit binary number.

Accordingly, if the content of the timer T0 is equal to 0 (T0=0) then both registers it

consists of will contain 0. If the timer contains for example number 1000 (decimal), then


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Page 5 of 22

the TH0 register (high byte) will contain the number 3, while the TL0 register (low byte)

will contain decimal number 232.

Formula used to calculate values in these two registers is very simple:

TH0 × 256 + TL0 = T

Matching the previous example it would be as follows:

3 × 256 + 232 = 1000

Since the timer T0 is virtually 16-bit register, the largest value it can store is 65 535. In

case of exceeding this value, the timer will be automatically cleared and counting starts

from 0. This condition is called an overflow. Two registers TMOD and TCON are closelyconnected to this timer and control its operation.

Timer 1

Timer 1 is identical to timer 0, except for mode 3 which is a hold-count mode. It

means that they have the same function, their operation is controlled by the same

registers TMOD and TCON and both of them can operate in one out of 4 different

modes.


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Page 6 of 22

Internal Architecture of the 8051 Timer


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Page 7 of 22

Mode 0 (13-bit timer)

This is one of the rarities being kept only for the purpose of compatibility with the

previous versions of microcontrollers. This mode configures timer 0 as a 13-bit timer

which consists of all 8 bits of TH0 and the lower 5 bits of TL0. As a result, the Timer 0

uses only 13 of 16 bits. How does it operate? Each coming pulse causes the lower

register bits to change their states. After receiving 32 pulses, this register is loaded and

automatically cleared, while the higher byte (TH0) is incremented by 1. This process is

repeated until registers count up 8192 pulses. After that, both registers are cleared andcounting starts from 0.


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Page 8 of 22

Timer 0 in mode 1 (16-bit timer)

Mode 1 configures timer 0 as a 16-bit timer comprising all the bits of both registersTH0 and TL0. That's why this is one of the most commonly used modes. Timer operatesin the same way as in mode 0, with difference that the registers count up to 65 536 asallowable by the 16 bits .

Timer 0 in mode 2 (Auto-Reload Timer)

Mode 2 configures timer 0 as an 8-bit timer. Actually, timer 0 uses only one 8-bit

register for counting and never counts from 0, but from an arbitrary value (0-255) stored

in another (TH0) register.


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Page 9 of 22

The following example shows the advantages of this mode. Suppose it is necessary to

constantly count up 55 pulses generated by the clock.

If mode 1 or mode 0 is used, It is necessary to write the number 200 to the timer

registers and constantly check whether an overflow has occurred, i.e. whether they

reached the value 255. When it happens, it is necessary to rewrite the number 200 and

repeat the whole procedure. The same procedure is automatically performed by the

microcontroller if set in mode 2. In fact, only the TL0 register operates as a timer, while

another (TH0) register stores the value from which the counting starts. When the TL0

register is loaded, instead of being cleared, the contents of TH0 will be reloaded to it.

Referring to the previous example, in order to register each 55th pulse, the best solution

is to write the number 200 to the TH0 register and configure the timer to operate in mode

2.


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Page 10 of 22

Timer 0 in Mode 3 (Split Timer)

Mode 3 configures timer 0 so that registers TL0 and TH0 operate as separate 8-

bit timers. In other words, the 16-bit timer consisting of two registers TH0 and TL0 is split

into two independent 8-bit timers. This mode is provided for applications requiring an

additional 8-bit timer or counter. The TL0 timer turns into timer 0, while the TH0 timer

turns into timer 1. In addition, all the control bits of 16-bit Timer 1 (consisting of the TH1

and TL1 register), now control the 8-bit Timer 1. Even though the 16-bit Timer 1 can still

be configured to operate in any of modes (mode 1, 2 or 3), it is no longer possible to

disable it as there is no control bit to do it. Thus, its operation is restricted when timer 0 is

in mode 3.

The only application of this mode is when two timers are used and the 16-bit Timer 1 the

operation of which is out of control is used as a baud rate generator.


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Page 11 of 22

How to 'read' a timer?

Depending on application, it is necessary either to read a number stored in the timer

registers or to register the moment they have been cleared.

It is extremely simple to read a timer by using only one register configured in mode 2

or 3. It is sufficient to read its state at any moment. That's all!

It is somehow complicated to read a timer configured to operate in mode 2. Suppose

the lower byte is read first (TL0), then the higher byte (TH0). The result is:

TH0 = 15 TL0 = 255

Everything seems to be ok, but the current state of the register at the moment of

reading was:

TH0 = 14 TL0 = 255

In case of negligence, such an error in counting (255 pulses) may occur for not so

obvious but quite logical reason. The lower byte is correctly read (255), but at the

moment the program counter was about to read the higher byte TH0, an overflow

occurred and the contents of both registers have been changed (TH0: 14 →15, TL0:

255 →0). This problem has a simple solution. The higher byte should be read first, thenthe lower byte and once again the higher byte. If the number stored in the higher byte is

different then this sequence should be repeated. It'

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