Microcontroller - Maxim Integrated · BIT OPERATIONS AP, APC, PSF IC, IMR, SC, ... AVR MSP430 MIPS...

MicrocontrollerENGINEERING REVIEW

MAXQ ..........1

MAXQ

RISC .....7

DS80C400

C .................17

MAXQTM

8

16 RISC CISC

Maxim Integrated Products

Dallas Semiconductor

MAXQ RISC

MAXQ MAXQ

MAXQ

MAXQ

MAXQ -

MAXQ

/

/ MAXQ

RISC

MAXQ

MAXQ (

RISC ) MAXQ ( )

MAXQ RISC

2

RISC CPU

CPU ( )

CPU

MAXQ 8

16 RISC (

)

MAXQ

MAXQ MOVE MOVE

16 MAXQ

7 1 8

0 ( #00h – #FFh)

ALU

1 16 MAXQ

MAXQ

MAXQ

MAXQ

/ (

)

@DP[0]

0 (DP[0])

MAXQ /

MAXQ (ADD SUB ADDC SUBB)

(IP)

/

/

DP[0]

@DP[0]++ @DP[0]--

IMMEDIATE BYTE DATA(i.e., 00h–FFh)

INDEX MODULEINDEX MODULE

0

1

f ddd dddd

FORMAT DESTINATION SOURCE

ssss ssss

INDEX MODULE

1. MAXQ

...MAXQ

3

MAXQ

16

/

-

MAXQ

MAXQ

MAXQ

MAXQ 2004

MAXQ MAXQ10 MAXQ20

MAXQ10 MAXQ20 (ALU) MAXQ10

8 ( ) ALU MAXQ20 16 ( ) ALU

MAXQ 8 16 /

A[n]

n 16 MAXQ A[0]

A[1] ... A[14] A[15] AP

Acc ( Acc = A[AP]) AP

16

MAXQ ALU

ADDC src

(src) /

(APC) AP

(PSF) 5 ALU

(C) (Z) (S) (E) (OV)

PSF

(GF1 GF0)

MAXQ MAXQ

/ PUSH /POP

( / / )

MAXQ

-

... /

-

4

MAXQ10 MAXQ20

MAXQ DJNZ 16 (LC[0] LC[1])

DJNZ LC[n], src 0

RISC

MAXQ

MAXQ

DJNZ

MAXQ 3 16 (DP[0] DP[1] BP[Offs])

(DPC) / (WBSn)

/

/ (FP = BP[Offs]) 16

(BP) 8 (Offs) C

Von Neumann Harvard

MAXQ Harvard

Von Neumann

I/O

Von Neumann

MAXQ (MMU)

ROM

MAXQ

-

MAXQ

MAXQ 8

16 RISC

(

)

5

16 32

/

16 6 (M0–M5)

(6 x 32 = 192 )

MAXQ I/O

LCD ADC 10 (M6–M15) MAXQ

MAXQ

/ / MAXQ

2 MAXQ

MAXQ MAXQ

( = 00h)

00h

(n) (PFX[n])

16 32

/ ( 16

24 )

PFX[n] n

n = dds

( / )

16

16

( ) MAXQ MAXQ

MAXQ

MAXQ MAXQ

(MAXQ Q –Quiet ) MAXQ

2. MAXQ

TIMER 0 TIMER 1 TIMER 2

UART

IN-CIRCUIT DEBUGGER

BIT OPERATIONS

AP, APC, PSF IC, IMR, SC, CKCN, WDCN

I/O

I/O I/O

PROGRAMMEMORY

STACKMEMORY

DATAMEMORY

A[0]... A[15]

ALU OPERATIONSACC

PFX[n] MODULE

CONDITIONAL JUMPS, RETURNS, CONDITIONAL RETURNS

GENERAL-PURPOSE I/O, EXTERNAL INTERRUPT CONTROL AND STATUS

IPPUSH/POP, CALL, DJNZSP, IV, LC[n]

DPC, BP, OFFS, FP, GR

DP[n]DATA MEMORY ACCESS

MULTIPLY-ACCUMULATE UNIT

SPI™

MAXQ TRANSFER MAP

CMP

MAXQ

16

MAXQ

6

MAXQ

MAXQ

MAXQ

MAXQ - MAXQ

MAXQ

MAXQ

MAXQ

MAXQ Maxim Integrated Products, Inc.SPI Motorola, Inc.

...MAXQ

MAXQ

7

MAXQRISCMAXQ PIC16CXXX ( ) AVR

MSP430

MIPS ( )/mA

MAXQ

MAXQ -

/ MAXQ -

MAXQ MAXQ

MAXQ 1

MAXQ

MNEMONIC DESCRIPTION MNEMONIC DESCRIPTIONBIT MANIPULATION LOGICALMOVE C, #0/#1 Clear/Set Carry AND Logical ANDCPL C Complement Carry OR Logical ORAND Acc. Logical AND Carry with Accumulator Bit XOR Logical XOROR Acc. Logical OR Carry with Accumulator Bit CPL,NEG One's, Two's ComplementXOR Acc. Logical XOR Carry with Accumulator Bit SLA,SLA2, SLA4 Shift Left Arithmetically 1,2,4MOVE C, Acc. Move Accumulator Bit to Carry SRA,SRA2,SRA4 Shift Right Arithmetically 1,2,4MOVE Acc.,C Move Carry to Accumulator Bit SR Logical Shift RightMOVE C, src. Move Register Bit to Carry RR,RRC Rotate Right Carry (Ex/In) clusive MOVE dst., #0/#1 Clear/Set Register Bit RL,RLC Rotate Left Carry (Ex/In) clusiveMATH DATA TRANSFERADD, ADDC Add Carry (Ex/In) clusive XCHN Exchange Accumulator data nibbles SUB, SUBB Subtract Carry (Ex/In) clusive XCH (MAXQ20) Exchange Accumulator data bytesFLOW CONTROL AND BRANCHING MOVE dst, src Move source to destination

JUMP {C/NC/Z/NZ/E/NE/S} Jumps - unconditional or conditional, relative or absolute PUSH/POP Push/Pop stack

DJNZ LC[n], src Decrement Counter, Jump Not Zero POPI Pop stack and enable interrupts (INS≤0)CALL Call – relative or absolute OtherRET {C/NC/Z/NZ/S} Return – unconditional or conditional NOP No Operation

RETI {C/NC/Z/NZ/S}Return from Interrupt – unconditional or conditional CMP Compare with Accumulator

DESTINATION SPECIFIER

FORMAT BIT (0 = IMMEDIATE SOURCE, 1 = MODULE SOURCE)

SOURCE SPECIFIER

1. MAXQ

-

8

MAXQ

MAXQ

( )

1


ISA STRENGTH WEAKNESS

AVR

• 32 general-purpose workingregisters (accumulators)

• Data pointers are part of thedirectly addressable workingregisters; allow easy masking andbit-manipulation of high/lowpointer bytes.

• Read from pointer + displacement(0 to 63-byte displacement)

• Stack limited only by internalRAM (except 90S1200 with noRAM, then stack depth = 3)

• Single-cycle operation• Relative jumps ±2k (two-cycle)• All AVR have data EEPROM• Explicit instructions to set/clear

each status register flag; largegroup of bit-manipulatinginstructions

• Separate interrupt vectors

• Pipelined instruction fetch• Beyond the 32 regs, load (LD)/store

(ST) overhead becomes a factorLD/ST @X,Y,Z = two cycles,

• LPM = 3 cycles• Reduced support/scope on literal

operations (no ADDC, EORI; onlyCPI, ORI, ANDI, SUBI, SBCI, LDIwork on R16–R31)

• No rotate instructions exclusive ofcarry

• Conditional jump range only+63/-64 (two-cycle)

• CALL/RET/RETI = four cycles

PIC16CXXX

• Source, destination bit encodedinto ALU operations

• Direct data access (symbolicaddressing mode) can producedense code and is conducive todata overlays

• four-clock core yields poorexecution speed

• Pipelined instruction fetch• Access to upper data-memory banks

requires paging (RP1:0 bank select)• Indirect data access requires

INDF,FSR registers• Cannot directly load W

(accumulator)• No ADDC, SUBB• Stack depth = 8• No relative jumps/branches—only

absolute (CALL, GOTO) orconditional skips (BTFSx)

• RETLW for code memory reads =wasted code space and does notallow CRC of code space

• CALL/GOTO/RET/RETFIE/RETWall require eight clock cycles(two instruction cycles)

• Single interrupt vector

1....

(

)• 32 ( )

•

/

• + (0 63 )

• RAM

( 90S1200 RAM

= 3)

•

• ±2k ( )

• AVR EEPROM

• /

•

•

• 32 (LD)/

(ST)

LD/ST @X, Y, Z =

• LPM = 3

• /

( ADDC EOR1 CPI ORI

ANDI SUBI SBCI LDI

R16–R31 )

•

• +63/-64 ( )

• CALL/RET/RETI =

• ALU

• ( )

•

•

•

(RP1:0 )

• INDF

• W ( )

• ADDC SUBB

• = 8

• / (CALL

GOTO) (BTFSx)

• RETLW =

CRC

• CALL/GOTO/RET/RETFIE/RETW

( )

•

9

(MemCpy64 )

64

MSP430 MAXQ20

ISA STRENGTH WEAKNESS

MSP430

• Extensive source, destinationaddressing modes are encodedwithin the op code—can yield densecode

• 16-bit internal data path• Internal memory accessible as word

or byte• Constant generator (CG) for -1, 0, 1,

2, 4, 8• Single-cycle operation• Stack limited only by internal RAM• Conditional/relative jump destination

range = ±512 (two-cycle)• Separate interrupt vectors, single-

source flags automatically cleared

• Von Neumann memory map +elaborate addressing modes = manycycles. The ONLY single-cycleinstructions are those dealingexclusively with Rn. Peripheralregister access = three to six cycles

• Literals not supported by CGrequire extra word

• Destination operand cannot beregister indirect or register indirectauto-increment

• No auto-decrement support forregister indirect

• Symbolic addressing limits theability to reuse code routines

MAXQ

• System and peripheral registers areaccessible as source or destinationin the same logical memory space,yielding the fastest data transfers

• Single-cycle operation and nopipelining

• Single-cycle conditional jump(+127/-128) or two-cycle absolutejump (0–65,535)

• Single-cycle CALL/RET/RETI• Auto-decrementing loop-counter

registers eliminate overheadnormally wasted when maintaininga counter

• Three data pointers with auto-increment/decrement support. Onedata pointer, FP, supports basepointer + offset addressing (i.e.,BP[Offs]).

• Auto-increment/decrement/modulocontrols for accumulator (workingregister) file

• Selectable word or byte-accessmode for each data pointer

• Prefixable op code allows a simplemeans for instruction set extensionsor enhancements

• Active accumulator is always theimplicit destination for ALUoperations

• Single-port, synchronous, SRAMdata memory requires that a datapointer be activated (selected)before being used

• Default stack depth = 16, however,data pointer hardware is ideal forimplementing a soft stack in datamemory

1. ( )

•

• 16

•

• (CG) -1 0 1

2 4 8

•

• RAM

• / = ±512

( )

•

• Von Neumann +

=

Rn

= 3 6

• CG

•

•

•

•

•

• (+127/-128)

(0 – 65,535)

• CALL/RET/RETI

•

• /

(FP)

+

( BP[Offs])

• ( )

/ /

•

•

• ALU

• SRAM

( )

• = 16

10

;======================================AVR======================================; ramsize=r16 ;size of block to be copied; Z-pointer=r30:r31 ;src pointer; Y-pointer=r28:r29 ;dst pointer; USES:; ramtemp=r1 ;temporary storage registerloop: ; cycles

ld ramtemp,Z+ ; 2 @src => tempst Y+,ramtemp ; 2 temp => @dstdec ramsize ; 1 brne loop ; 2/1ret ; 4/5

;---------

;(7*bytecount) + return –1(last brne isn’t taken).

; WORD COUNT = 5 ; CYCLE COUNT = 451

;=====================================MAXQ10====================================; DP[0] ; src pointer (default WBS0=0); DP[1] ; (dst-1) pointer (default WBS1=0); LC[0] ; byte count (Loop Counter)loop: ;words & cycles

move DP[0], DP[0] ; 1 implicit DP[0] pointer selectionmove @++DP[1],@DP[0]++ ; 1 djnz LC[0], loop ; 1 ret ; 1

;----------; 4 / (3*bytecount) +1


;====================================MAXQ20=====================================; Assuming bytes are word aligned (like MSP430 code) for comparison; DP[0] ; src pointer (default WBS0=1); DP[1] ; (dst-1) pointer (default WBS1=1); LC[0] ; byte count (Loop Counter)loop: ;words/cycles

move DP[0], DP[0] ; 1 implicit DP[0] pointer selectionmove @++DP[1],@DP[0]++ ; 1 djnz LC[0], loop ; 1 ret ; 1

;----------; 4 / (3*bytecount/2) +1


;====================================MSP430=====================================; MSP430 has a 16-bit data bus; assuming bytes are word aligned, only requires (blocksize/2 transfers).; R4 ;src pointer; R5 ;dst pointer; R6 ;size of block to copyloop: ;words/cycles

mov @R4+, 0(R5) ;2 / 5 @src++ => dstadd #2, R5 ;1 / 1 const generator makes this 1/1decd.b R6 ;1 / 1 really sub #2, R6jz loop ;1 / 2ret ;1 / 3

;----------;6 / (9*(bytecount/2)) + return


;===================================PIC16CXXX===================================; a ; src pointer base; b ; dst pointer base; i ; byte count held in reg file; USES:; temp ; temp data storageloop: ; cycles

decf i, W ; 1 i-- => W addlw a ; 1 (a+i--) => W starting at end movwf FSR ; 1 W => FSR movfw INDF ; 1 W <= @FSR get data movwf temp ; 1 W => temp

11

movlw (b-a) ; 1 diff in dest-src addwf FSR, F ; 1 (b+i--) => W movfw temp ; 1 temp => W movwf INDF ; 1 W => @FSR store data decfsz i, F ; 2/1 i-- goto loop ; 2return ; 2

;----------;11 / (12*bytecount) +1 (ret instead of

goto, +1 on decfsz); WORD COUNT = 12 ; CYCLE COUNT = 769 (*4clks/inst cycle = 3076)

MAXQ MAXQ10

MAXQ20 MAXQ10

(

MSP430 MAXQ20 )

MAXQ10 /

MAXQ

1)

2)

3) Harvard

4) / MSP430

0(R5) @R5

MAXQ /

MSP430

MSP430 16

ADC

ADC

; words/cycles

mov.w &ADAT,0(R14) ; 3 / 6 Store output word

incd.w R14 ; 1 / 1 Increment pointer

; 4 / 7

MAXQ20

move @DP[0]++, ADCOUT ; 1 / 1

350030002500200015001000500

0

CYCL

ES

97 193 291 451

3076

MAX

Q20

MAX

Q10

MSP AV

R

PIC

25

20

15

10

5

0

BYTE

S

10

21

MAX

Q

AVR

MSP PI

C

128

MemCpy64 CYCLE/BYTE COUNT COMPARISON

MAXQ

/

MemCpy64 /

12

(BubbleSort )

/

32

MAXQ MAXQ

ASCII (Hex2Asc )

16 (0 9 A F)

AVR MAXQ

MSP

(#nnnnh) MAXQ

Atmel AVR MSP430

2 (ShRight )

16 ALU

16 ( ) 256

25,000

20,000

15,000

10,000

5000

0

CYCL

ES

5861

21,580

MAX

Q

AVR

MSP PIC

4035302520151050

BYTE

S

MAX

Q

MSPAV

R

PIC

3101

8621

31.5282636

BubbleSort CYCLE/BYTE COUNT COMPARISON

7060504030

1020

0

CYCL

ES

60

MAX

Q10

AVR

MAX

Q20

MSP PI

C

50

40

30

20

10

0

BYTE

S

MAX

Q

MSPAV

R

PIC

11.75 12 12.25

24 26 26.2521.5

44

Hex2Asc CYCLE/BYTE COUNT COMPARISON

/

Hex2Asc /

BubbleSort /

13

16 ALU MAXQ20 MSP430

8 MAXQ20

8 ALU MAXQ10 16 MSP430

MAXQ20 MSP430 8 16

MAXQ20 16

( ) MSP430

(RRA@R5)

MAXQ20 MSP430 16

(SRA2 SRA4 SLA2 SLA4)

(BitBang )

/

( )

I/O

MAXQ PIC 4 (

) MSP430 Von Neumann

MAXQ PIC RISC PIC MAXQ

14 MAXQ 16 MSP430

( & register) (

#3h)

MSP430

I/O

50403020100

CYCL

ES

9 14

40

10

MAX

Q20

MSP

MAX

Q10

AVR

PIC

2520151050

BYTE

S

20 20

MAX

Q20

MSP PI

C

MAX

Q10

AVR

4

17.5

8 8

ShRight CYCLE/BYTE COUNT COMPARISON

353025

15

5

20

10

0

BYTE

S 19.2522 24

MAX

Q

MSPPI

C

AVR

350300250

150

50

200

100

0

CYCL

ES

56105

145

296

AVR

PIC

MAX

Q

MSP

32

BitBang CYCLE/BYTE COUNT COMPARISON

BitBang

/

( )

BitBang /

ShRight /

14

MSP430

MSP430

MSP430

MIPS/mA

/

MIPS/mA

MIPS/mA

3V ( AVR MSP430 PIC16 MAXQ)

MIPS/mA

MIPS/mA mA

(DC)

mA / MHz

/

mA/MHz

(DC) mA-MHz

( ) 2 -MHz

2 mA/MHz

mA/MHz

MIPS/mA MIPS

MIPS 3

MIPS

(CPI) Microchip PIC

( / )

MIPS (MIPS)

MIPS/mA

mA

00

2 4 6 8 10 12 MHz

STEEPER-DYNAMIC-CURRENTmA/MHz CHARACTERISTIC

HIGHER INITIAL STATIC (DC)CURRENT CHARACTERISTIC

10

8

6

4

2

2. -MHz

CLOCKS/INSTRUCTIONS

MILLION CLOCKS

SECOND

CPI

MIPS (MILLIONS INSTRUCTIONS/SECOND)

MHz

=1

X

3. MAXQ

MIPS

mA/MHz

(DC)

= MIPS ( / )

15

MIPS/mA

MIPS MHz MIPS/MHz (

) MIPS/MHz mA/MHz MIPS/mA

MIPS/MHz MIPS/mA

MIPS/mA

( MIPS / MHz 1 ) 3 (MIPS / MHz = 0.33)

MIPS/mA

DEVICETYPICALmA/MHz

MAXmA/MHz SOURCE

PIC16C55X 0.7 1.25PIC16C55X data sheet: DC Table 10.1, D010 (VCC = 3V, 2MHz);XT or RC

PIC16C62X 0.7 1.25PIC16C62X data sheet: DC Table 12.1, D010 (VCC = 3V, 2MHz);XT or RC

PIC16LC71 0.35 0.625PIC16C71X data sheet: DC Table 15.2, D010 (VCC = 3V, 4MHz);XT or RC

PIC16F62X 0.15 0.175 PIC16F62X data sheet: DC Table 17.1, D010 (VCC = 3V, 4MHz)

PIC16LF870/1 0.15 0.5PIC16F870/1 data sheet: DC Table 14.1, D010 (VCC = 3V, 4MHz);XT or RC

AT90S1200 0.33 0.75AT90S1200 data sheet: EC Table (3V, 4MHz), Figure 38,4mA/12MHz (typ)

AT90S2313 0.50 0.75AT90S2313 data sheet: EC Table (3V, 4MHz), Figure 57,7.5mA/15MHz (typ)

MSP430F1101 0.30 0.35MSP430x11x1 data sheet: DC specs IccActive (VCC = 3V,FMCLK = 1MHz)

MSP430C11X1 0.24 0.30MSP430x11x1 data sheet: DC specs IccActive (VCC = 3V,FMCLK = 1MHz)

MSP430Fx12x 0.30 0.35MSP430x12x data sheet: DC specs (VCC = 3V, FMCLK = 1MHz,FACLK = 32kHz)

MAXQ10 0.30 SimulationsMAXQ20 0.30 Simulations

2. mA/MHz

MIPS/MHzCORE

MemCpy64 BubbleSort Hex2Asc ShRight BitBang PeakMAXQ10 1.00 0.99 1.00 1.00 1.00 1MAXQ20 1.00 0.99 1.00 1.00 1.00 1

PIC 0.23 0.20 0.23 0.23 0.21 0.25MSP 0.44 0.39 0.64 0.33 0.38 1AVR 0.57 0.62 0.90 0.71 0.61 1

MIPS/mACORE

MemCpy64 BubbleSort Hex2Asc ShRight BitBangMAXQ10 3.33 3.30 3.33 3.33 3.33MAXQ20 3.33 3.30 3.33 3.33 3.33

PIC 1.53 1.35 1.53 1.50 1.40MSP 1.85 1.62 2.66 1.39 1.55AVR 1.71 1.86 2.69 2.14 1.83

3. MIPS/MHz MIPS/mA

MIPS/MHz

( )

mA/MHz mA/MHz

16

MIPS/mA

MIPS/mA

MIPS/mA /

MIPS/mA

(1) (2)

/

MAXQ MIPS/mA

NORMALIZED (MIPS/mA)COREMemCpy64 BubbleSort Hex2Asc ShRight BitBang

MAXQ10 0.50 1.00 1.00 0.40 1.00MAXQ20 1.00 1.00 0.96 1.00 1.00PIC 0.06 0.29 0.39 0.20 0.38MSP 0.42 0.45 0.68 0.56 0.48AVR 0.19 0.48 0.88 0.26 0.48

4. MIPS/mA

17

DS80C400 CDS80C390 TINI® (TINI Runtime Environment)

JavaTM TINI TINI

Java C

DS80C400 ROM 8051 C Java

ROM TINI

ROM C

HTTP

C

C Hello World HTTP

DS80C400 ROM

TINIm400 7.05 C C51 Keil µVision2TM

2.37

Keil µVision2

Keil µVision2 Hello World C

DS80C400 C

• Project->Create New Project

• Select Device for Target

Data base Dallas

Semiconductor DS80C400

Use Extended Linker Use Extended

Assembler OK 1

• Copy Dallas

80C390 Startup Code to Project

Folder Add File to Project?

No

•

Target 1 Source Group 1

Add files to group 'Source Group 1'

files of

type Asm Source file

startup400.a51

www.maxim-ic.com/HelloWorld

zip

1.

Keil µVision2

DS80C400

18

• 400000h TINIm400 flash

startup400.a51 ?C_CPURESET?0 400000h

?C_CPURESET?0 SEGMENT CODE AT 400000h

• DB 'TINI' DB Target bank

DS80C400 ROM 400000h

400000h TINIm400 flash

DB 40h ; Target bank

• main.c

#include <stdio.h>

void main(){

printf("Test 400 Program\r\n");while (1) { }

}

• Source Group 1 main.c

• Target 1 Options for target 'Target 1'

Target Memory Model Large: variables in XDATA Code Rom Size

Contiguous Mode: 16MB program Use multiple DPTR registers far memory

type support Off-chip Code memory Start 0x400000 Size

0x80000 Off-chip XData memory Start 0x10000 Size 0x4000

2 0x400000 0

TINIm400 0 512k RAM

400000h 1M flash Keil DS80C400

• Output Create HEX File HEX-386

• F7

hex

TINIm400

JavaKit Keil hex TINIm400

JavaKit Java Runtime Environment (1.2 ) Java Communications

API Java Runtime Environment http://java.sun.com/j2se/downloads.html Java

Communications API http://java.sun.com/products/javacomm/index.html JavaKit

TINI (TINI Software Development Kit) www.maxim-ic.com/TINIdevkit

JavaKit TINI Software Development Kit docs

Running_JavaKit.txt JavaKit

TINI www.maxim-ic.com/

TINI/lists

DS80C400 ROM

C

19

JavaKit TINIm400

java JavaKit -400 -flash 40

JavaKit TINIm400

Open Port

Reset DS80C400

DS80C400 Silicon Software -Copyright (C) 2002 MaximIntegrated Products

Detailed product informationavailable at http://www.maxim-ic.com

Welcome to the TINI DS80C400Auto Boot Loader 1.0.1

>

JavaKit File Load HEX File as TBIN

helloworld.hex Load HEX File as TBIN hex TBIN

hex ASCII

hex

40

> B40> X

40

> E

ROM

TINI

0002

Hello World

startup400.a51

?C_STARTUP: SJMP STARTUP1DB 'TINI' ; Tag for TINI Environment 1.02c

; or later (ignored in 1.02b)DB 40h ; Target bank

2.

TINIm400

3. JavaKit

DS80C400

20

SJMP STARTUP1 40 0000 sjmp

{ 'T', 'I', 'N', 'I', 40h } 0002

E ROM E

ROM 400000h ( )

Z flash

> Z41You sure? Y

flash 40h 4Fh

ROM ROM

C ROM ( ROM High-Speed Microcontroller User's

Guide: DS80C400 Supplement 1) Keil C ROM

Keil XDATA ROM

Dallas Semiconductor ROM

Keil ROM

C ROM

Keil Source Group 1 Add Files to Group 'Source

Group 1' '*.lib'

ROM ROM DHCP

TFTP CRC

ROM ( ) ROM

DNS I2CTM 1-Wire®

DS80C400 C ( ) www.maxim-ic.com/

ds80C400/libraries

HTTP SNTP


TFTP SNTP GET

HTTP Dallas Semiconductor

(1) HTTP

80 (2) 60

www.maxim-ic.com/timeserver

ROM

(

)

ROM

DNS I2C

1-Wire

1 www.maxim-ic.com /DS80C400UG

21

HTTP (index.html)

(source.html)

TFTP TFTP

IP index.html source.html TFTP

SolarWinds Windows® TFTP

SolarWinds (www.solarwinds.net) Downloads Free Software TFTP

File Configure

TFTP IP (TFTP_IP_MSB, TFTP_IP_2,TFTP_IP_3 TFTP_IP_LSB)

HTTP

HTTP RFC 2068 HTTP

GET

Berkley

HTTP

struct sockaddr local;unsigned int socket_handle, new_socket_handle, temp;

socket_handle = socket(0, SOCKET_TYPE_STREAM, 0);local.sin_port = 80;bind(socket_handle, &local, sizeof(local));listen(socket_handle, 5);

printf("Ready to accept HTTP connections...\r\n");

// here is the main loop of the HTTP serverwhile (1){

new_socket_handle = accept(socket_handle, &address, sizeof(address));

handleRequest(new_socket_handle);closesocket(new_socket_handle);

}

HTTP

handleRequest GET

( POST HEAD OPTIONS )

time.html timeserver

timeserver stats.html

HTTP

TINI

C

22

SNTP

timeserver Simple Network Time Protocol (SNTP)

RFC 1361 Network Time Protocol (RFC 1305) SNTP UDP

123 t imeserver

time.nist.gov DNS IP

DNS C IP

socket_handle = socket(0, SOCKET_TYPE_DATAGRAM, 0);

// set a timeout of about 2 seconds. //‘timeout’ is unsigned longtimeout = 2000; setsockopt(socket_handle, 0, SO_TIMEOUT, &timeout, 4);

// assume ‘buffer’ has already been cleared outbuffer[0] = 0x23; // No warning/NTP Ver 4/Client

address.sin_addr[12] = TIME_NIST_GOV_IP_MSB;address.sin_addr[13] = TIME_NIST_GOV_IP_2;address.sin_addr[14] = TIME_NIST_GOV_IP_3;address.sin_addr[15] = TIME_NIST_GOV_IP_LSB;address.sin_port = NTP_PORT;sendto(socket_handle, buffer, 48, 0, &address,

sizeof(struct sockaddr));recvfrom(socket_handle, buffer, 256, 0, &address,

sizeof(struct sockaddr));timeStamp = *(unsigned long*)(&buffer[40]);timeStamp = timeStamp - NTP_UNIX_TIME_OFFSET;// now we have time since Jan 1 1970formatTimeString(timeStamp, "London",

last_time_reading_1);last_reading_seconds = getTimeSeconds();closesocket(socket_handle);

2 (0x800 = 2048ms)

RFC 1361 0x23

NTP 4 Client sendto

recvfrom timeStamp

1970 1 1 formatTimeString

In London it is 15:37:37 on March 31, 2003

getTimeSeconds DS80C400

60 HTML time.html

SNTP 60

2

(0x800 = 2048ms)

23

Keil C Dallas Semiconductor C

TINI Java C

DS80C400 TINI

C C

DS80C400

TINI 1-Wire Dallas SemiconductorJava Sun MicrosystemsµVision2 Keil Software, Inc.I2C Philips Corp. Maxim Integrated Products, Inc. I2C

Philips I2C I2C Philips I2CWindows Microsoft Corp.

C DS80C400

www.maxim-ic.com

010-62010298www.maxim-ic.com.cn

www.maxim-ic.com.cn/sample.htmwww.maxim-ic.com.cn/technical.htm8008100310 010-62010598

8328 100083

24

Maxim/Dallas

❒ Maxim/Dallas❒ Maxim/Dallas CD-ROM

( )

____________________________________ / ____________________________

____________________________________ __________________________________

____________________________________________________________________________

____________________________________ __________________________________

____________________________________

____________________________________

________________________________________________________________________

/ ____________________________ ____________ /

( 3 )

MER-3 4/04

MAXIM 800 810 0310

010-6201 0598010-6201 0298

SOLOMON QCE INGRAM MICRO ( ) AVNET010-68408123 ( ) 68408125 ( ) 010-82644888 ( ) 82644333( ) 010-64413113 ( ) 64438260 ( )021-68867026 ( ) 68867217 ( ) 021-64435555 ( ) 64433355( ) 021-52062288 ( ) 52062299 ( )0755-83782626 ( ) 83781753 ( ) 0755-83663721 ( ) 83663027( ) 0755-83781886 ( ) 83780079 ( )028-85535552 ( ) 85593712 ( ) 028-85218282 ( ) 85218383( ) 852-21765388 ( ) 27902182 ( )025-6899420 ( ) 6899419 ( ) 027-87272022 ( ) 87275076( )852-24934202 ( ) 24136307 ( ) 852-27411212 ( ) 27418552( )

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