Metal-Semiconductor contact Schottky Barrier/Diode Ohmic Contacts MESFET · MESFET structure more...

Metal-Semiconductor Interfaces

• Metal-Semiconductor contact

• Schottky Barrier/Diode

• Ohmic Contacts

• MESFET

UMass Lowell 10.523 - Sanjeev Manohar

Device Building Blocks


Energy band diagram of an isolated metal adjacent to an isolated n-type semiconductorsemiconductor


Energy band diagram of a metal-semiconductor contact in thermal equilibriumequilibrium.


Measured barrier height for metal-silicon and metal-gallium arsenide contacts


Energy band diagrams of metal n-type and p-type semiconductors under thermal equilibrium


Energy band diagrams of metal n-type and p-type semiconductors under forward bias


Energy band diagrams of metal n-type and p-type semiconductors under reverse bias.


Charge distribution

electric-field distribution


Depletion Layer

DqN−=ρ Wx <<0

qNs

D

s

qNVε

−=ερ

=∇2

qNdEs

DqNdxdEE

ε−==∇

)()( xWqNxEs

D −ε

=


W W

s

Dbi dxxWqNdxxEVV ∫ ∫ −

ε==− )()(

0 0

s

D

Ws

D WqNxWdxWqNε∫ =−−

ε=

2)()(

20

Dbis qNVVW /)(2 −ε=Depletion width

Dbis q)(

)(2 VVNqWQNQ ε

Charge per unit area

)(2 VVNqWQNQ biDsD −ε==


Capacitance

NqQC sDs εε∂Per unit area:( ) WVVq

VC s

bi

Ds =−

=∂

=2

Per unit area:

( )Ds

bi

NqVV

C ε−

=21

2

Rearranging:

Dsq

Or: ⎤⎡ 12( ) ⎥

⎥

⎦

⎤

⎢⎢

⎣

⎡ −ε

=dVCdq

Ns

D /112

2


1/C2 versus applied voltage for W-Si and W-GaAs diodes


1/C2 vs V

•If straight line – constant doping profile –

slope = doping concentrationslope doping concentration

•If not straight line, can be used to find profile

Intercept V can be used to find φ•Intercept = Vbi can be used to find φBn

+=φ VV

⎟⎞

⎜⎛

+=φ binBn

NkT

VV

⎟⎠

⎞⎜⎝

⎛=

i

Dn n

Nq

kTV ln


Current transport by the thermionic emission process

Thermal equilibrium forward biasreverse bias


Thermionic emission

Number of electrons with enough thermal energy to overcome barrier:

⎟⎠⎞

⎜⎝⎛ φ−

= kTq

Cth

Bn

eNn

At thermal equilibrium, current going both ways is the same:

⎟⎠⎞

⎜⎝⎛ φ−

kTq Bn

eNCjj ⎠⎝→→ == kT

Cmssm eNCjj 1


Forward Bias

Barrier for electrons in semiconductor is reduced by VF

⎟⎠⎞

⎜⎝⎛ −φ−

= kTVq

Cth

FBn

eNn)(

Barrier for electrons from metal to semiconductor is the same

Net current:

1

)(

1 eNCeNCjjj kTq

CkT

Vq

Csmms

BnFBn

−=−=⎟⎠⎞

⎜⎝⎛ φ−

⎟⎠⎞

⎜⎝⎛ −φ−

→→

1

11

1eeNCj kTqV

kTq

C

CCsmms

FBn

⎟⎟⎠

⎞⎜⎜⎝

⎛−=

⎟⎠⎞

⎜⎝⎛ φ−

→→


21 *TANC C =

⎠⎝

Forward Bias

kTqV

s ejj ⎟⎟⎠

⎞⎜⎜⎝

⎛−= 1

kTq Bn

TAjφ−

⎠⎝

2* kTs eTAj = 2*

2*4 kqmπ3

4*h

kqmA eπ=Effective Richardson Constant

Derive by determining current with integral of velocity and density of states

∫ ∫== dEEfEgEvEdNEvj )()()()()(


∫ ∫== dEEfEgEvEdNEvj )()()()()(

Forward current density vs applied voltage of W-Si and W-GaAs diodes


Thermionic Emission over the barrier – low doping


Tunneling through the barrier – high doping


Tunneling through the barrier

Narrow depletion width for high doping – tunneling

F QM 101From QM 101:Wavefunction is exponential depending on barrier width and heightprobability of making it to the other side ~ ψ2

xti eetx α−ω−=Ψ ),( ( )2

2h

EUm −=α

[ ]2/)(22exp~ hqVqmWI Bn −φ−

Dbis qNVVW /)(2 −ε=

( )⎤⎡ −φ− B VCI 2 h/4 mCUMass Lowell 10.523 - Sanjeev

Manohar

( )⎥⎦

⎤⎢⎣

⎡ φ

D

Bn

NVCI 2exp~ h/42 smC ε=

Contact resistance

Specific Contact Resistance(based on current density)

1−⎞⎛ ∂J

0=⎟⎠⎞

⎜⎝⎛∂∂≡

VC V

JR

( )⎥⎤

⎢⎡ −φ− Bn VCI 2exp~

For tunneling current through barrier (high doping):

⎥⎦

⎢⎣ DN

I exp

⎞⎛ φC⎟⎟⎠

⎞⎜⎜⎝

⎛ φhD

BnC N

CR 2exp~Ohmic Contact:


Calculated and measured values of specific contact resistance


MESFET


MESFET – Qualitative Operation

•No gate voltage – depletion from built-in voltage•Positive drain voltage causes reverse bias •Increased depletion width with increased V

)( WaZNqL

ALR

Dn −μ=ρ=



At higher drain voltages, W=a – pinch off at VDsat

s

Dbi

WqNVVε

=−2

2

bis

DDsat VaqNV −

ε=

2

2

⇒


s


Above pinchoff voltage, drain current does not increaseVoltage at pinch-off point is still Vdsat



Addition of gate voltage (negative) increases baseline depletion widthPinch-off occurs soonerSaturation voltage and current are reduced (narrower channel)

GbiD

Dsat VVaqNV −−ε

=2

2


sε2

I-V Characteristics – Linear Region

[ ])(yWaZNqdyIdRIdV D

D μ== [ ])(yWaZNq Dn −μ

( )biGs VVyVW ++ε )(2)( ( )D

biGs

qNyyW =

)()(

qND


WdWqNdVs

D

ε=


[ ]

[ ] WdWqNWaZNq

dVyWaZNqdyI

DDn

DnD

−μ=

−μ= )(

[ ]qs

Dn εμ

∫ −μ

=22

)(2

WdWWaNqIW

Dn ∫ε= )(

1

WdWWaL

IWs

D

( ) ( )⎥⎦⎤

⎢⎣⎡ −−−

εμ

= 31

32

21

22

22

32

2WWWWa

LNqIs

DnD



D

biGs

qNVVW )(2

1+ε

=

D

biGDs

qNVVVW )(2

2++ε

=

biGbiGDDPD V

VVV

VVVVVII

⎥⎥⎤

⎢⎢⎡

⎟⎠

⎞⎜⎝

⎛ ++⎟

⎠

⎞⎜⎝

⎛ ++−=

32

32 2

32

3

DnP

PPP

aNqZI

VVV

μ≡

⎥⎦⎢⎣ ⎠⎝⎠⎝ 33322

DP

sP

aqNV

L

≡

ε

2

22


sP ε2

Normalized ideal current-voltage characteristics of a MESFET


with VP = 3.2 V.

Transconductance

⎤⎡ 33

⎥⎥⎦

⎤

⎢⎢⎣

⎡⎟⎠

⎞⎜⎝

⎛ ++⎟

⎠

⎞⎜⎝

⎛ ++−=

23

23

32

32

P

biG

P

biGD

P

DPD V

VVV

VVVVVII

⎦⎣

In Saturation:biGDP VVVV ++= biGPDsat VVVV −−=⇒

⎤⎡

⎥⎥⎦

⎤

⎢⎢⎣

⎡⎟⎠

⎞⎜⎝

⎛ ++⎟

⎠

⎞⎜⎝

⎛ ++−−−

−−=

23

23

32

32

P

biG

P

biGbiGP

P

biGPPDsat V

VVV

VVVVVV

VVVII

( )⎥⎥⎦

⎤

⎢⎢⎣

⎡⎟⎠

⎞⎜⎝

⎛ ++−

+−=

23

32

321

P

biG

P

biGPDsat V

VVV

VVII

( )⎥⎥⎦

⎤

⎢⎢⎣

⎡⎟⎠

⎞⎜⎝

⎛ ++

+−=

⎥⎦⎢⎣ ⎠⎝

23

32

31 biGbiG

PDsat VVV

VVVII


⎥⎦⎢⎣ ⎠⎝33 PP VV

Transconductance

( ) ⎤⎡ ⎞⎛ 23

21 VVVV( )⎥⎥⎦

⎤

⎢⎢⎣

⎡⎟⎠

⎞⎜⎝

⎛ ++

+−=

2

32

31

P

biG

P

biGPDsat V

VVV

VVII

∂∂

=VG

Dm V

IgD

( ) ( ) ⎥⎦

⎤⎢⎣

⎡++−= −

biGPP

Pm VVVV

Ig

D

23*

3210 2

12

3

⎟⎟⎠

⎞⎜⎜⎝

⎛ +−=

P

biG

P

Pm V

VVVIg 1

⎟⎟⎠

⎞⎜⎜⎝

⎛ +−

μ=

P

biGDnm V

VVL

aqNZg 12


Equivalent Circuit - High Frequency AC

• Input stage looks like capacitances gate-to-channelO t t it i d d i t it• Output capacitances ignored -drain-to-source capacitance small


Maximum Frequency (not in saturation)

• Ci is capacitance per unit area and Cgate is total capacitance of the gate

ZLCC =

• F=fmax when gain=1 (iout/iin=1)

ZLCC igate =

max g ( out in )

gate

m

Cgfπ

=max 2

Sgate

g

WZLC ⎟

⎠⎞

⎜⎝⎛ ε=

Dn

Dn

LaqNL

aqNZ

fεπ

μ=

⎞⎛ ε

μ

≈ 2

2

max 2

2


sS LW

ZL επ⎟⎠⎞

⎜⎝⎛ επ 22

Velocity Saturation

sDsD qNWaZqnAI υ−=υ= )(*

Drain current:

Transconductance

WZ

VW

WI

VIg ss

G

D

G

Dm

ευ=

∂∂

∂∂

=∂∂

=GG

Cutoff Frequency:

Cgf m=

2max

WZ

Cgateπ

/

2max


( ) LWZLWZf S

s

ss

πε

=επευ

=2/2

/max

Figure 7.15. The drift velocity versus the electric field for electrons in various semiconductor materials.


III-V MESFETs – GaAs and InP

+Semi-insulating material – high speed devices (like built-in SOI)

+High Electron Mobility/Saturation Velocity – high speed

+Direct Bandgap – photonic devices

+Heterostructures bandgap engineering+Heterostructures – bandgap engineering

-No Simple Oxides – MOSFETS not viable – no equivalent to SiO2


III-V Transistors: GaAs

No simple oxides for GOX – MOSFETS not widely used

MESFET structure more common – mesa structuredepletion mode transistor

Source DrainGate

Semi-insulating Substrate


Depletion Mode GaAs MESFETDepletion Mode GaAs MESFET

•N-type material – high electron mobility

•Mesa etch for isolation on SI substrate

•Ohmic contacts for Source and Drain – alloyed

•Shottky contact for Gate Ti•Shottky contact for Gate – Ti

•Recessed gate – depth determines threshold


GaAs MESFET Fabrication

Si Implant

Si3N4

Semi-insulating GaAs Substrate

Deposit Si3N4 layer implant Si and anneal for form n-type material


Deposit Si3N4 layer, implant Si and anneal for form n type material Can also grow n-type epi layer by MBE or MOCVD

N-type GaAs


Ohmic contact formation for source and drain – NiAuGeOhmic contact formation for source and drain – NiAuGe

evaporate Au(88wt%)Ge(12wt%) then Ni (+Au)l 30 i t 450°C i H /Nanneal 30 min at 450°C in H2/N2

Au reacts with Ga from substrate – Ga vacanciesGe fills Ga vacancies – heavy n-type doping


y y glow contact resistance ohmic Ge doping not uniform – spreading resistance effect


Gate Recess Etch

Wet etchingWet etchingChannel depth determines pinch-off voltageChannel resistance can be monitored in-situ



Mesa Recess Etch

Wet etchingWet etchingSemi-insulating substrate for device isolation


Semi-insulating GaAs SubstrateSemi-insulating GaAs Substrate

Shottky Gate Electrode deposition – Ti/Pt/Au or Ti/Pd/Au

Almost any metal will form barrieryGa diffuses in many metalsTi –contact Pt or Pd barrier layer


Pt or Pd barrier layerAu added for low resistivity

GaAs Digital Circuits:

Direct Coupled FET Logic (DCFL) – lowest power and highest level of integration

Uses enhancement and depletion mode transistors

Enhancement mode transistors madeusing thinner gate recess ordifferent doping to changedifferent doping to changethreshold


DCFL Fabrication Sequence


DCFL Fabrication Sequence(cont.)


Metal-Semiconductor contact Schottky Barrier/Diode Ohmic Contacts MESFET · MESFET structure more...

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Transcript of Metal-Semiconductor contact Schottky Barrier/Diode Ohmic Contacts MESFET · MESFET structure more...