Message Passing Systems A Formal Model. The System Topology – network (connected undirected graph)...

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Message Passing Systems A Formal Model
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Transcript of Message Passing Systems A Formal Model. The System Topology – network (connected undirected graph)...

Message Passing Systems

A Formal Model

The System

Topology – network (connected undirected graph) Processors (nodes)Communication channels (edges)

Algorithm : A local program for each processor

Notation

n processors: p0, p1, … , pn-1.

Qi : the state set for pi.

Orientation: A numbering of the edges incident to pi , from 1 to r.

outbufi[l], inbufi[l].

Initialization

Qi has a subset of initial states.inbufi[l] is empty.

outbufi[l] not necessarily empty.

More Definitions

The accessible state of pi:

Qi together with inbufi[l] for all l.

Transition function (relation) of pi:

From: The accessible states of pi.

To :Qi.inbufi[l] empty for all l.At most one message added to each outbufi[l].

Configuration

A vector [q0,q1,…,qn-1] where qi is

a state of pi

outbufi[l]

inbufi[l]

An initial configuration

Events

Computation : comp(i)Delivery : del(i,j,m)

Execution

C0 1 C1 2 C2 3 …

Ci : A configuration

i : An event

C0 : An initial configuration

Conditions

Safety Conditions

(Nothing bad happens)Liveness Conditions

(Something good happens) – Termination ?

Asynchronous Systems

No Upper bound on timesDeliveryConsecutive steps of processors

Why Asynchronous algorithms ?Schedule : = 1 2 3 …

Not every sequence is a schedule:

del (1,2,m)

Asynchronous Systems (Contd.)

exec (C0, )

Admissible executionsInfinitely many comp(i) events for each i.Each message sent is eventually delivered.

Synchronous Systems

Rounds.A round:

comp(i) events for each i.del events for each message sent in the round.

Admissible execution: infinite.

Message Complexity

The total number of messages sent during any admissible execution of the algorithm.

In other words, the number of delivery events.

Time Complexity

Synchronous: The number of rounds until termination.

Asynchronous : A time ti is associated with every event i:

ti+1 >= ti.

ti grow w/o bound in any infinite execution.

ti = ti+1 only if they occur in the same processor.

Time Complexity (Contd.) Delay(m) = tj-ti where

i and j are comp events

m is sent in i

m is processed in j

Given any execution, normalize time s.t. the maximum delay is 1 (Execution is infinite, but the number of messages is finite).

Time Complexity: The time at termination.

Time Complexity

We prove by induction on d that: A processor at distance d from r receives

the message M by time d. For the synchronous case we prove that it

is received exactly at time t.

Pseudo Code Conventions We may describe the effect of any subset

of messages in inbuf in separate code fragments for clarity, but..

The processor will execute the codes corresponding to all the messages in inbuf.

The subscript i is omitted.Terminate brings the processor to a

termination state.

Pseudo Code for PI (Flooding)

Upon receiving no message:

; parent nil children other

if and then

send to all neighbors

i r parent nil

M

parent i

Pseudo Code for PI (Flooding)

Upon receiving M from neighbor pj:

j

if then

send to

send to all neighbors except p

else

send to

j

j

parent nil

parent j

PARENT p

M

REJECT p

Pseudo Code for PI (Flooding)

Upon receiving PARENT from neighbor pj:

{ }

if { } then terminate

jchildren children p

children other parent neighbors

Upon receiving REJECT from neighbor pj:

{ }

if { } then terminate

jother other p

children other parent neighbors

Correctness

By code inspection, at each processor:

Once parent is set, it is never changed.If parent set then.

If i=r, parent=i.Otherwise, parent != i.

The set children never decreases.The set other never decreases.

parent

Correctness (cont’d)

Eventually:

At processor pr ,parent=r. (immediate)

At other processors, parent != nilAssume a processor with parent=nil,Consider a path from pr to to this processor.

Let p the first processor on this path with parent = nil, and q the processor before it. (Both exist).

Consider what happened when q set its parent variable…

Correctness (cont’d)

The graph defined by the parent variables:(without the self loop).Has n-1 edgesHas no cycles:

Assume a cycle of length l < n.pr is not in the cycle.Consider the computation events in any admissible

schedule which caused to parent = ?There are l such events. Consider the first event. Contradiction.

Distributed ComputingFundamentals, Simulations and

Advanced Topics

H. Attiya and J. Welch

Section 2.1