MCU Controlled DC-DC

Buck/Boost Converter for Supercapacitors

Jorge Querol Borràs

June 29, 2012

Master of Science Thesis

Stockholm, Sweden 2012

TRITA-ICT-EX-2012:108

MASTER THESISFINAL REPORT

MCU CONTROLLED DC-DCBUCK/BOOST CONVERTER FOR

SUPERCAPACITORS

Jorge Querol

Supervisor:Robert OlssonBjorn Pehrson

Examiner:Markus Hidell

June 29, 2012

Network Systems Laboratory at Communication Systems departmentSchool of Information and Communication Technology

KTH Royal Institute of TechnologyStockholm Sweden

Abstract

This work is focused on DC to DC conversion, what is a crucial function to enable the use ofsupercapacitors for energy storage. A theoretical study and comparison of methods, algorithmsand techniques for software controlled DC-DC converters have been used to develop a systemwhat can step up or down a DC variable voltage and transform it into a steady state voltage.

As a result a new control theory based on Bang-Bang control has been developed with anARM LPC1768 processor. It was implemented to solve the commercial converters problemsbecause they cannot work with supercapacitors due to their low internal resistance.

The outcome is a device what can provide a programmable voltage between 4.5 V and 25 V,hardware can support up to 6 A and it is able to control the operating current flowing throughthe converter. It can be used with the supercapacitors as shown in this work but it can also beused as a general platform for voltage and energy conversion.

Furthermore, the designed hardware has the potential to work with smart grids via Ethernetconnector, solar panels with MPPT algorithms and, at last, manage energy between differentkinds of DC voltage sources and devices.

I

Sammanfattning

Detta arbete ar inriktat pa DC till DC konvertering, vad ar en viktig funktion for att mojliggoraanvandningen av superkondensatorer for lagring av energi. En teoretisk studie och jamforelseav metoder, algoritmer och tekniker for program styrs DC-DC omvandlare har anvants for attutveckla ett system vad som kan stega upp eller ner en DC variabel spanning och omvandla dettill ett stabilt tillstand spanning.

Som ett resultat av en ny kontroll teori bygger pa Bang-Bang kontroll har utvecklats med enARM LPC1768 processor. Det genomfordes for att losa de kommersiella omformare problemeneftersom de inte kan arbeta med superkondensatorer pa grund av deras laga inre motstand.

Resultatet ar en anordning vilken kan tillhandahalla en programmerbar spanning mellan 4,5V och 25 V, kan hardvaran att stodja upp till 6 A och det ar mojligt att styra operativsystemetstrom som flyter genom omvandlaren. Den kan anvandas med de superkondensatorer, sasomvisas i detta arbete, men den kan ocksa anvandas som en allman plattform for spanning ochenergiomvandling.

Dessutom har hardvara mojlighet att arbeta med smarta nat via ethernet-uttag, solpanelermed MPPT algoritmer och antligen, hantera energi mellan olika typer av DC spanningskalloroch enheter.

III

Resum

Aquest document esta centrat en la implementacio d’un convertidor DC/DC, el qual es unelement fonamental en l’us de supercondensadors per a l’emmagatzemament d’energia. S’harealitzat un estudi teoric, aixı com l’analisi de diferents metodes, algorismes i tecniques peral disseny de convertidors DC/DC controlats per software amb la finalitat de desenvolupar unsistema capac d’elevar o reduir un voltatge DC de valor variable i transformar-lo en una tensioconstant.

Aixı mateix, s’ha desenvolupat una nova teoria de control basada en el control Bang-Bangsobre un processador ARM LPC1768. Fou especialment implementada per a resoldre els prob-lemes dels convertidors comercials ja que aquests no poden treballar amb els supercondensadorsdegut a la seva baixa resistencia interna.

El resultat es un dispositiu que pot proporcionar una tensio programable des de 4,5 V fins25 V, amb un hardware que suporta fins a 6 A i que es capac de controlar el corrent que circulatraves del convertidor. Pot ser utilitzat amb els supercondensadors, com es mostra en aquestdocument, pero tambe com una plataforma per la conversio de tensio i la gestio d’energia.

A mes a mes, el hardware dissenyat te el potencial per a funcionar amb xarxes de potenciaintel·ligents mitjancant un connector Ethernet, panells solars controlats amb algorismes MPPTi, al capdavall, gestionar la transferencia d’energia entre diferents tipus de fonts i dispositiusque operen amb corrent continua.

V

Resumen

Este documento se centra en la implementacion de un conversor DC/DC, el cual es un elementoclave en el uso de supercondensadores para el almacenamiento de energıa. Se ha realizado unestudio teorico, ası como el analisis de diferentes metodos, algoritmos i tecnicas para el disenode conversores DC/DC controlados por software con el objetivo de desarrollar un sistema capazde elevar o reducir un voltaje DC de valor variable i transformarlo en una tension constante.

Asimismo, se ha desarrollado una nueva teorıa de control basada en el control Bang-Bangsobre un microprocesador ARM LPC1768. Fue especialmente implementada para resolver losproblemas de los conversores comerciales ya que estos no pueden trabajar con los superconden-sadores debido a su baja resistencia interna.

El resultado es un dispositivo que puede proporcionar una tension programable desde 4,5V hasta 25 V, con un hardware que soporta hasta 6 A y que es capaz de controlar la corrienteque fluye a traves del convertidor. Puede ser utilizado con los supercondensadores, como semuestra en este documento, pero tambien como una plataforma para la conversion de tension ila gestion de energıa.

Ademas, el hardware disenado tiene el potencial para funcionar con redes de potencia in-teligentes mediante un conector Ethernet, paneles solares controlados con algoritmos MPPTy, a fin de cuentas, gestionar la transferencia de energıa entre diferentes tipos de fuentes ydispositivos que operan con corriente continua.

VII

Keywords

List of keywords from IEEE taxonomy:

• Energy storage

• Supercapacitors

• DC-DC power converters

• Voltage control

• Current limiters

• Bang-bang control

• Energy management

• Smart grids

IX

Contents

Abstract I

Sammanfattning III

Resum V

Resumen VII

Keywords IX

Contents XI

List of Figures XIII

List of Tables XV

1 Introduction 11.1 Problem statement . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11.2 Related work . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11.3 Outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

2 Bang-Bang control 72.1 Differences with Sliding Mode Control . . . . . . . . . . . . . . . . . . . . . . . . 72.2 Considerations about the converter . . . . . . . . . . . . . . . . . . . . . . . . . . 82.3 Bang-Bang control theory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82.4 Bang-Bang controller . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

3 Hardware design 153.1 Converter core . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 153.2 Control logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 173.3 Microcontroller . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 193.4 Overvoltage protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 223.5 Hardware implementation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

4 Control software design 254.1 Implemented features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 254.2 Initialization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 254.3 Main loop . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 284.4 Bang-Bang Algorithm . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 294.5 Switch management . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 304.6 Serial bus commands . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33

XI

5 Prototype evaluation 355.1 General behavior . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 355.2 Efficiency considerations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 375.3 Ultracapacitors handling . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40

6 Conclusions 43

7 Future work 45

Bibliography 47

A Comparative C pseudo-code between Bang-Bang and Sliding Mode Controlapproaches 51

B Bang-Bang controller implemented with MATLAB Simulink blocks 53

C Bang-Bang controller implemented in C pseudo-code 55

D Schematics 57D.1 Overvoltage circuit schematics . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57D.2 Main circuits schematics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58D.3 Ethernet controller schematics . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59

E Source code 61E.1 main.c . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61E.2 control.c . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63E.3 bang.c . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66E.4 adc.c . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70

XII

List of Figures

1.1 Universal programmable DC/DC converter . . . . . . . . . . . . . . . . . . . . . . . 21.2 MinNE teams operation system . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31.3 MinNE teams designed converter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31.4 Bidirectional buck/boost DC/DC converter . . . . . . . . . . . . . . . . . . . . . . . 51.5 Bidirectional converter with constant output and variable input . . . . . . . . . . . . 5

2.1 Bidirectional non-inverting buck/boost converter . . . . . . . . . . . . . . . . . . . . 82.2 Regions of convergence for each kind of converter . . . . . . . . . . . . . . . . . . . . 102.3 Evolution of Bang-Bang converter with variable input voltage . . . . . . . . . . . . . 112.4 Evolution of Bang-Bang converter efficiency with variable input voltage . . . . . . . 122.5 State plane variation of the converter . . . . . . . . . . . . . . . . . . . . . . . . . . 122.6 Buck operation mode in phase plane . . . . . . . . . . . . . . . . . . . . . . . . . . . 132.7 Boost operation mode in phase plane . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

3.1 Bidirectional non-inverting buck/boost converter with MOSFET switches . . . . . . 153.2 Conversion efficiency for single buck and boost converters . . . . . . . . . . . . . . . 163.3 MOSFET gate drivers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 183.4 Voltage divisors for adapt ADC range . . . . . . . . . . . . . . . . . . . . . . . . . . 193.5 Bidirectional current sensor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 193.6 Power supply circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 203.7 Microcontroller main connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 203.8 Ethernet physical circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 213.9 Push buttons circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 223.10 Overvoltage circuit to protect supercapacitors . . . . . . . . . . . . . . . . . . . . . . 233.11 Top view of the designed PCB . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

4.1 Core clock structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 264.2 PLL structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 264.3 Main loop controlled by ADC interruptions . . . . . . . . . . . . . . . . . . . . . . . 284.4 Bang-Bang control algorithm . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 294.5 Shoot-through effect . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 314.6 Shoot-through protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 314.7 Reverse Current effect . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 324.8 Reverse current and shoot-through protection . . . . . . . . . . . . . . . . . . . . . . 32

5.1 Converter working in buck mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 365.2 Converter working in boost mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 375.3 Converter working under current limitation . . . . . . . . . . . . . . . . . . . . . . . 385.4 Performance of the converter under light load conditions . . . . . . . . . . . . . . . . 385.5 Efficiency of the converter with high load . . . . . . . . . . . . . . . . . . . . . . . . 39

XIII

5.6 Voltage-Current characteristic of the overvoltage circuit . . . . . . . . . . . . . . . . 405.7 Supercapacitors voltage limited by the overvoltage circuit . . . . . . . . . . . . . . . 405.8 Efficiency of the converter working with the supercapacitors battery . . . . . . . . . 41

B.1 Converter Bang-Bang controller . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53B.2 Operating state makers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53B.3 Proposed sub-controller to decide between buck or boost converter . . . . . . . . . . 54

XIV

List of Tables

2.1 Phase portraits for each combination of switches . . . . . . . . . . . . . . . . . . . . 9

4.1 List of programmed features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 254.2 State of MOSFET transistors for each state of the converter . . . . . . . . . . . . . . 304.3 Serial commands to configure the converter . . . . . . . . . . . . . . . . . . . . . . . 33

XV

Chapter 1

Introduction

1.1 Problem statement

Concern about the environment and rising of renewable energies set new scenarios to replacethe old sources of energy. Therefore, it seems logical that new kinds of energy require new kindsof storage for them. Traditional lead-acid batteries are the main support to storage electricalenergy but their characteristics have weaknesses, including a high internal resistance, limitedlifetime depending on operating temperature and deep cycling. They also include pollutingelements, such as lead, that are less desirable from an environmental point of view. Batteriesbased on supercapacitors can take the place of traditional batteries with chemical elements inthe energy world because they meet the requirements to be compatible with renewable energies.Nevertheless, they have an important disadvantage; their output voltage is not constant anddepends on the amount of energy stored.

This project has the aim of provide a solution to the main problem of the supercapacitorsbatteries and make them able to supply whatever device that works with DC (Direct Current)voltage. The designed system in this document is based on a DC/DC converter that allowsusing these supercapacitors to supply other devices as well as storing energy from DC sources(see Figure 1.1). The Universal programmable DC/DC converter must be able to transforma variable DC voltage into a programmable steady voltage without take care about its outputload. This mechanism can solve the problem of the commercial converters.

They cannot work with supercapacitors because of their low internal resistance. For thisreason, they break down and then they are useless if it is desired to limit the current goinginto the battery. This capacitors can take up to 60 A and, therefore, it has to be limited inorder to preserve the converter. It requires a controller that works regardless of the load sucha Bang-Bang controller.

Moreover, this converter is primarily conceived for working with renewable energies so ithave to be able to work with solar panels or smart power grids as instance.

1.2 Related work

Supercapacitors battery

The supercapacitors battery is composed by a group of high value capacitors that can store awide amount of energy. These supercapacitors have low internal resistance, long lifetime, highpower performance and they are compatible with the environment.

The chosen capacitors are made by MAXWELL TECHNOLOGIES [1]. They are 3000 Fand their maximum operating voltage is 2.7 V. The battery is composed by 16 supercapacitors,

1

Figure 1.1: Universal programmable DC/DC converter

8 groups of 2 in parallel connected in serial, so the equivalent capacitance of the battery is 750F.

Cbattery =1

1C+C + 1

C+C + 1C+C + 1

C+C + 1C+C + 1

C+C + 1C+C + 1

C+C

=C

4= 750 F (1.1)

The maximum voltage of the battery is 21.6 V and it can store 116160 J or 32.3 Wh, aamount about 7 % of a small car battery (BOSCH S3001 12V can store 1771200 J).

Ebattery =1

2Cbattery(Vmax − Vmin)2 = 116160 J = 32.3 Wh (1.2)

Power source for a low consumption router

MinNE teams [2][3][4][5] were projects composed by KTH students and their work was dedi-cated to provide communication networks with equipment which have low energy consumption,support power failures and operate with renewable energy supply. They, in collaboration withSoC group [6], developed a power supply system with solar panel source and super capacitorsto store the energy obtained.

After they, GreeNet was another student team that went on with MinNE project. They fixedbugs and checked the performance of previous designs. Their software, components, documents,design and equipment were a start point to the new converter.

Hardware

MinNE teams implemented a balancing circuit for the supercapacitors. It forces that all thesupercapacitors have a similar voltage and then, to prevent the overvoltage on every one con-trolling the total voltage between the battery terminals. This balancing circuit is supplied bythe same supercapacitors and it can be considered a component of the battery.

Otherwise, MinNE teams proposed a DC/DC converter with independent buck and boostsingle modules in order to manage the variable voltage of the supercapacitors battery andcharge it with a solar panel. The block diagram in Figure 1.2 represents the power system forthe MinNE router which is supplied with the supercapacitors battery due to PicoPSU.

2

Figure 1.2: MinNE teams operation system

The MinNE DC/DC converter with independent buck and boost modules have to regulatethe amount of energy that comes to battery and step up or down the input voltage to get thedesired value at its output. In doing so, the current going into battery and its maximum voltagecharge can be controlled.

This converter is controlled with PWM (Pulse Width Modulation) signals generated by amicrocontroller (ARM Cortex M3 LPC1768) [7] supplied by a 3.3 V regulator (LP2950-33) thatcan take its power from the input voltage or from the super capacitors battery. PWM signals areconnected to drivers (LM27222) to provide the necessary current to make work the converterand are supplied by a 5 V regulator (LP2950-50). Moreover, current (ACS712) and voltagesensors make possible to monitor the converter variables by the microcontroller. In their design(see Figure 1.3), there are some problems:

• The microcontroller is able to change the duty cycle of the PWM signals to modify theobtained voltage but it cannot switch between buck or boost power inputs. It is possibleto have reverse current in the converter that can cause a malfunctions or damages.

• The boost converter has a design problem with the current driver and it does not work(N-channel power transistor cannot drive current because the voltage in its bulk is higherthan in its drain).

• The microcontroller can operate at 3.3 V but drivers and current sensors only from 5 V,so control logic cannot operate if power voltage is lower than 5 V.

Figure 1.3: MinNE teams designed converter

GreeNet team could solve some of these problems and has done some test charging thesupercapacitors. Their main improvements over the hardware were the followings:

3

• Correct and test the right performance of super capacitors balancing circuit.

• Correct the converter design and improve it with a switch to select the power inputbetween buck and boost converter.

Software

MinNE teams developed the necessary software to control their converter with the microcon-troller. They implemented the necessary libraries to modify the duty cycle of PWM peripheral,to get the values of current and voltage sensors and a serial module which it is possible to man-age the configurable options. Moreover, they wrote some guides to install the required softwarefor programming [8] and flashing the LPC1768 microcontroller [9].

In order to control the converter voltage, MinNE teams implemented a closed loop controlalgorithm based on monitoring the desired current and output voltage and then increment ordecrement the duty cycle of PWM signal. It also checks if the supercapacitors battery hasreached the maximum voltage and then turn off the converter. This closed loop algorithmcan be improved with others that are faster, optimal, independents in relation to the load andsimpler in the hardware.

GreeNet team developed other improvements in software and they did many tests to theirconverter and charging the supercapacitors. This work was entirely considered in the design ofthe new converter.

Bidirectional DC/DC converter for an EV application

Magnus Hedlund was a student in Uppsala Universitet and his Master Thesis [10] in ElectricalEngineering is related to voltage conversion for electric vehicles. He designed a bidirectionalbuck/boost converter with a Sliding Mode Control to get the desired voltage at its output.

This converter (see Figure 1.4) is controlled by the microcontroller dsPIC30F2010, whichis supplied by a 5 V regulator; current drivers (HAL50S) supplied by ±15 V regulators; andswitch drivers (IR2110) that are independent each other and make possible to implement allpossible configurations by the microcontroller.

In this work, it was designed a SMC (Sliding Mode Control) [11][12][13][14] based in a con-stant voltage and maximum current error switching surface. This method approach is recognizedas an efficient tool to design robust controllers for complex high-order non linear dynamic plantoperating under uncertain conditions and offers several advantages: stability even for largesupply and load variations, robustness, good dynamic response and simple implementation.

However, as it is shown in [11] and [14], the direct output control used to make the closedloop control is not possible to implement following the Sliding Mode Control design rules. Inthis project, it was implemented a method based in Bang-Bang control [15][16] with voltageand current control. This control offers similar advantages as SMC but it requires a wide studyof system dynamics based in phase portrait convergence and avoiding possible unstable states.It will be the base of the designed control algorithm to get the desired voltage at the output ofthe converter.

This converter is able to transform a variable input voltage into a steady output voltagecontrolling the maximum current like we want and its main behavior is shown in Figure 1.5.

It has some advantages compared with MinNE teams design:

• Buck and boost converter with the same components, it allows to have a reduced hardwareand fast switching between each other.

• No PWM control signals implies faster and simpler software.

4

Figure 1.4: Bidirectional buck/boost DC/DC converter

Figure 1.5: Bidirectional converter with constant output and variable input

1.3 Outline

The structure of this document is the following. In first place, there have been stated thebenefits and problems of the supercapacitors and how the designed converter might solve them.There have also been explained the previous related work what was used as a initial start point.

Later on, the control theory based on a Bang-Bang controller is designed and described. Itwill be necessary to implement a converter what can control voltage and current regardless conthe output load.

In the next chapter, there are detailed explanations and calculations about how the converterhas been designed to accomplish its function trying to maximize its efficiency. Some prototypeshas been built to test if the hardware design, and also the Bang-Bang Control theory developedmeets the specifications and forecasts.

Hereafter, the control software will be programmed following GreeNet guides and recom-mendations. It will implement the software necessary to make work the control algorithm overthe designed hardware.

Eventually, they will be shown the results of a mounted prototype and what are the operatingconditions of the designed hardware and software. After that, it will be stated the conclusions

5

and some future work what may be implemented to improve the converter.

6

Chapter 2

Bang-Bang control

Bang-Bang controllers are VSC (Variable Structure Controllers) and they are specifically de-signed to control signals in discontinuous systems as in DC/DC converters. They are usedin applications that need optimal control, solve in minimum-time problems and are also oftenimplemented because of simplicity or convenience.

The advantages of Bang-Bang control are: efficiency, robustness in front of uncertain oper-ating conditions, stability even for wide input voltage range, good dynamic response, minimalhardware implementation and independence with load variations [14][15][16].

Its correct performance regardless of load variations makes possible to work with superca-pacitors battery. For example, a linear PID (Proportional Integral Derivative) control changesits performance when there is a change from resistive to complex load and produces a systematicerror at the output [17], so it cannot work with the supercapacitors.

Bang-Bang control consists in switch on or off knowing the system behavior and then, tomake it evolve in order to reach the desired stability point. The system behavior can be obtainedby modeling it with a differential equations system for each combination of two switches andthen analyze it calculating its phase portrait.

2.1 Differences with Sliding Mode Control

In control theory, Sliding Mode Control, or SMC, is a nonlinear control method, as well as Bang-Bang control, that alters the dynamics of a nonlinear system by application of a discontinuouscontrol signal. It forces the system to ”slide” along a cross-section of the system’s normalbehavior called ”switching surface”.

Summarizing, these are the main differences between proposed Bang-Bang control and Slid-ing Mode Control applied to DC/DC converters:

• Bang-Bang control does not control how current and voltage vary, it only checks for thefinal desired voltage.

• In contrast, SMC defines a “switching surface” where the dynamics have some convergenceand a stability point.

• The constant voltage surface, defined in Bang-Bang, has not convergence but it has astability point. For this reason, it cannot be implemented in SMC.

• First order SMC control is based in defining the output error and its derivative as thestate variables. It provides a faster control than the Bang-Bang one but it is dependingon the converter load.

7

It would be possible to implement the converter with SMC defining a limited range forthe complex load. However, making it with a Bang-Bang control will become simpler. InAppendix A is shown this difference for a buck converter in C pseudo-code.

2.2 Considerations about the converter

There are some different configurations of DC-DC converters which can be used as buck andboost DC voltage transformers. However, there is one of them what provides the minimal hard-ware and most simple alternative without changing the polarity of the input voltage. Moreover,it can work in different ways and allows several configurations as well as they will be describedbelow.

For these reasons, it has taken the DC/DC converter described in Section 1.2 as a startingpoint for the hardware and as a base to develop the Bang-Bang control theory.

It is a bidirectional non-inverting DC/DC buck/boost converter (see Figure 2.1) that sets upthe hardware core and provides the main required features. This configuration has the abilityto step up or down the input voltage by controlling the system switches. As the saying goesin [18], this kind of converter is composed by a buck cascaded by boost, and it can work as asingle buck, a single boost or a buck-boost converter depending on the switches behavior.

L

C1

31

2

S13 1

2

S2

C2

1+

1− 2−

2+

Figure 2.1: Bidirectional non-inverting buck/boost converter

Thanks to its symmetrical design, it is possible to manage power bidirectionally using a setof sensors and switch drivers to control the energy flow in both directions as it was implementedin [10].

2.3 Bang-Bang control theory

As has been noted before, in Bang-Bang control is essential to know the system behavior andevolution in order to reach the desired stability point. It can be done through studying thephase portraits in CCM (Continuous Conduction Mode) for each combination of switches ofthe converter. CCM means that the current in the energy transfer inductor never goes to zerobetween switching cycles. From [10], the differential equations that model the non-invertingbuck/boost converter are the stated below.

(iL′

vout′

)=

(0 −S2

LS2C − 1

Rload

)(iLvout

)+

(S1vinL0

)Sn = 1 when position 1 (ON mode)

Sn = 0 when position 2 (OFF mode)(2.1)

A phase portrait is a geometric representation of the trajectories of a dynamical system inthe phase plane. In the converter case output voltage and inductor current are the variableswhat compose the phase plane. Also, differential equations what model the behavior of theconverter are only valid under the assumption of CCM. The combinations of switch states andtheir corresponding phase portraits are summarized in Table 2.1.

8

Switch positions Phase portraits

1Switch 1 OFFSwitch 2 OFF

2Switch 1 ON

Switch 2 OFF

3Switch 1 ONSwitch 2 ON

4Switch 1 OFFSwitch 2 ON

Table 2.1: Phase portraits for each combination of switches

9

These normalized phase portraits represent the evolution of inductor current (x axis) andoutput voltage (y axis) in each one of converter states. States 1, 2 and 3 combined in couplesdefine three different operation modes of converter. Buck single converter for 1 and 2, boostsingle converter for 2 and 3, and buck/boost converter for 1 and 3.

Moreover, for each operation mode of converter, there is a convergence region which in-cludes the stable operating points. These regions are drawn in Figure 2.2 above the three firstphase portraits. Blue region corresponds to buck single converter, green to boost and red tobuck/boost.

Figure 2.2: Regions of convergence for each kind of converter

These regions of convergence or stable operating points are placed where angle between vec-tors, corresponding to voltage and current derivative for each couple of combination of switches,are 180 degrees. From Figure 2.2, it follows that single buck and single boost converter are moreefficient because it is possible to reach the desired voltage with less amount of current from theinput.

The width of each region depends on the sample rate for the sensors and, inductor andcapacitor values. Sample rate will determine the ability of the microcontroller to change theswitch control signals in order to select the correct operation mode. Besides, both inductor andcapacitor values will enforce the speed of the changes in inductor current and output voltage.All of them will be important parameters in the hardware design to get a correct performanceof the converter.

Combination of switches number 4 is a state where inductor is discharging itself and losingenergy and there is not any interchange of energy from the input power. For this reason, itsphase portrait has not been represented in the convergence graphic. However, it can be anuseful state in case of overload of the inductor, fast switching off of the converter or reducingthe output voltage without charging the inductor.

From all this theory related to Bang-Bang control, it follows three important points to designthe controller:

• In Bang-Bang control, boost converter cannot work without current limitation. Statenumber 3 becomes unstable if converter does not change to another state. This fact doesnot appear in lineal controllers with PWM signals.

10

• A priori, current limitation only can be implemented by turning off the buck switch cuttingoff the input current (state 1). Studying the dynamics, we can assure that if the outputvoltage is higher than the input one, the current can be controlled by switching to state2 (buck switch turned on) because the derivative of the current in this region is alwaysnegative. It increments the conversion efficiency respects doing the same with state 1.

• It is possible to rectify the lost of efficiency in buck converter (it cannot achieve valuesnear input voltage) changing the operating mode to the boost one because they have incommon the state 2 (buck converter always turned on is the same that boost converteralways turned off). So, its performance is continuous between the maximum voltagereached by the buck converter and the minimum reached by the boost one. It will benecessary a sub-controller to get the optimal voltage for changing between buck and boostsingle converters.

2.4 Bang-Bang controller

A preliminary Bang-Bang controller has been designed and simulated. It switches betweenthe four states depending on six parameters: output voltage, inductor current, input voltage,voltage reference, maximum voltage and maximum current.

The universal programmable buck/boost converter with Bang-Bang control has been sim-ulated in MATLAB Simulink. The controller used in these simulations was implemented withSimulink functions (see Appendix B) and C pseudo-code has been programmed to carry outthe same function (see Appendix C).

In this simulation, the input voltage varies from 21.6 V to 4 V so the converter has to workin both modes (single buck and single boost) to get the programmed output voltage value. Inthe Figure 2.3 is shown how voltage and current of the converter evolve with a voltage referenceof 12 V and operating current of 5 A (in average). Furthermore, it has been simulated with acomplex load of 10 Ω and 0.5 F.

Figure 2.3: Evolution of Bang-Bang converter with variable input voltage

It also has been represented in Figure 2.4 the time averaged efficiency and input and outputpower. In the graph, first 1.5 seconds correspond to the time charging the load capacitor and,

11

at 2.5 there is change in the operation mode from single buck to single boost and at 7.5 secondsthe same change but it the opposite order.

Figure 2.4: Evolution of Bang-Bang converter efficiency with variable input voltage

It also interesting to see how the output voltage varies in front of the inductor current.Figure 2.5 shows how the converter evolves in state variable plane.

Figure 2.5: State plane variation of the converter

The performance of this Bang-Bang controller can be summarized in the following points:

1. If output voltage is higher than maximum voltage reference, set state 4 to reduce bothinductor current and output voltage (see section 2.3).

2. If inductor current is higher than maximum current reference, set state 1 or 2 (dependingon the output and input relationship) to reduce current passing though the converter (seesection 2.3).

12

3. Decide which converter (single buck or boost) must be used according to the relationshipbetween input voltage, output voltage and output reference voltage.

4. Decide which mode has to be used to move up or down the output voltage according tothe relationship between output and reference voltage.

Once they are stated the main points to design the Bang-Bang controller, its performancecan be represented over the phase portrait. In Figure 2.6 and Figure 2.7, it has been representedthe combination of switches which has to be active depending on the instant values of outputvoltage and inductor current depending on the operating mode, buck or boost, which has beenselected.

Figure 2.6: Buck operation mode in phase plane

Figure 2.7: Boost operation mode in phase plane

13

It can be appreciated that the trajectories (arrows) points to the desired output voltage(vref ) and they are set up to reach the corresponding stability points. If vout is higher thanvmax, combination of switches number 4 is active and then both vout and iL are reducing theirvalues. Moreover, for a vout below vref , the derivative of the iL is positive if its value is lowerthan imax, and it is negative on the contrary. This allows to control the maximum currentflowing through the converter.

14

Chapter 3

Hardware design

The hardware of the bidirectional DC/DC buck/boost converter has been designed to accom-plish some requirements in order to become an universal platform to develop software or ar-chitectures that incorporate elements related to green networks, microgrids, supercapacitorsbatteries and solar panels.

The design has been made following a process based in match the general theory of convertersand a set of experimental tests through several prototypes. By this way it has been possibleto check that this converter will be able to work with the Bang-Bang controller and providea circuit capable to work with the supercapacitors battery. However, it can be also used byresearchers or teachers as a generic powerful tool to develop any application related to DCpower transfer, smart grids or green energy.

This converter has the aim of being able to transform an input DC voltage in a range of 5V to 25 V, to an output DC voltage in a range of 0 V to 25 V, with a maximum input andoutput current of 6 A.

3.1 Converter core

A serial combination of a simple buck and a simple boost converter becomes in a step up andstep down converter that can be used bidirectionally depending on the state of the switches[18]. It allows to the current going in to the converter to reach any voltage in the capacitanceof one of the ends of the converter. This is the structure showed in the Figure 3.1 that is callednon-inverting buck and boost converter and it is the simplest way to get a circuit that is ableto step up or down the DC input voltage without change its polarity at the output.

12

G

DS

G

D

S

G

D

S

G

D S

12

12

12

OutInL301

100uH

C303

1000uF

50V

I−

NGate1

PG

ate

1

PG

ate

2

NGate2

I+

IRF4905M301

IRF3205

M302

IRF3205

M303

IRF4905M304

C304

1000uF

50V

C301

1000uF

50V

C302

1000uF

50V

Figure 3.1: Bidirectional non-inverting buck/boost converter with MOSFET switches

First important issue to consider is that all the components must have a low serial resistancebecause it decreases the conversion efficiency [19][20][18]. Figure 3.2, it is represented therelationship between output and input voltage depending on the duty cycle. It can be appreciatethat the parasitic serial resistance will limit the output-input voltage ratio conversion and thenit will reduce the converter capability to reach the desired output voltage.

15

Conversion Efficiency

Buck Mode Boost Mode

Figure 3.2: Conversion efficiency for single buck and boost converters

Inductor

Relationships between values of the main components of the converter are well known and thereare widely developed in power electronics literature. As it can be noted in [18], [19] and [20], theDC to DC converters can work in two modes. These are CCM (Continuous Conduction Mode)and DCM (Discontinuous Conduction Mode), and, in the case of this converter, the CCM givesbetter benefits such as higher efficiency, lower output impedance and less ripple at the output.Besides, the Bang-Bang controller has been designed to operate in CCM.

Therefore, the boundary between these modes establishes the lower value for the inductorthat allows to work in CCM and is given by the following relationships depending on the modethat is working.

• Buck mode:

L ≥ (1−D)Rload

2fswitch

0≤D≤1≥ Rload

2fswitch(3.1)

• Boost mode:

L ≥ (1−D)2DRload

2fswitch

0≤D≤1≥ 4

27∗ Rload

2fswitch(3.2)

• Buck-Boost mode:

L ≥ (1−D)2Rload

2fswitch

0≤D≤1≥ Rload

2fswitch(3.3)

For this design, it was assumed that, in steady state and in the worst case, Rload ≤ 10 Ωand fswitch ≥ 50 kHz (Section 3.3). So, the value for the inductor must be L ≥ 100 µH. It hasbeen taken the minimum value because it reduces size, cost and internal DCR (Direct CurrentResistance).

The chosen inductor was the 2312-RC from BOURNS JW MILLER with L = 100 µH,IDC max = 7 A and DCRmax = 37 mΩ.

Capacitors

A pair of capacitors has been put in parallel in each ends of the converter to filter its voltagein order to get a DC voltage a the output. They are in parallel to reduce the ESR (Equivalent

16

series resistance) and then increase its efficiency. Their capacitance is related to the maximumvoltage ripple at the output and it is defined by the following expressions depending on theworking mode of the converter.

• Buck mode:

Cparallel ≥(1−D)

8Lf2switch

(VoutVripple

)0≤D≤1≥ 1

8Lf2switch

(VoutVripple

)(3.4)

• Boost mode:

Cparallel ≥D

Rfswitch

(VoutVripple

)0≤D≤1≥ 1

Rfswitch

(VoutVripple

)(3.5)

• Buck-Boost mode:

Cparallel ≥D

Rfswitch

(VoutVripple

)0≤D≤1≥ 1

Rfswitch

(VoutVripple

)(3.6)

Taking the same parameters than in the inductor case and considering that Vripple/Vout ≤1 %, it follows that Cparallel ≥ 50 µF from (4) and Cparallel ≥ 200 µF from (5) and (6). It hasbeen taken Cparallel = 2000 µF for each end of the converter because then it will become morerobust in front of noise, input voltage variations and DCM operation.

Chosen capacitors were the 108CKS050M from ILLINOIS CAPACITOR withC = 1000 µF ,VDC max = 50 V and ESRmax = 166 mΩ.

Switches

Converter switches have been made with MOSFET transistors because of their low on resistanceand their robustness driving high power. A pair of P-channel and N-channel MOSFET providessynchronous switching in order to reduce the losses compared with the use of a diode insteadand allows the converter to work bidirectionally.

In synchronous converters is usual to find a double N-channel MOSFET because they providea lower on resistance. However, in this converter has been used a pair of P-channel and N-channelMOSFET instead because the P-channel MOSFET is able to drive current permanently betweenthe inductor and the outer nodes and this fact is required to make it work with the Bang-Bangcontroller and to provide a bidirectional behavior. The non-ideal behavior of the MOSFET asswitches as well as the internal resistance of the inductor and the capacitors have influence overthe efficiency of the converter.

Chosen MOSFET transistors were the IRF4905 and IRF3205 from INTERNATIONALRECTIFIER. IRF4905 is a P-channel MOSFET with VGS(th) max = 4 V , IDS max = −74 Aand RDS(on) max = 20 mΩ, and IRF3205 is a N-channel MOSFET with VGS(th) max = 4 V ,IDS max = 110 A and RDS(on) max = 6.5 mΩ.

3.2 Control logic

MOSFET drivers

As it is stated in [21] and [22], Power MOSFET have great potential as switches for high speedhigh voltage applications like pulsed power. Although the MOSFET is intrinsically capableof fast switching, the packaging inductance and the internal capacitances largely degrade the

17

performance of the device. These parasitic impedances become in a negative effect on theefficiency of the switch and hence it demotes the efficiency of the converter. To fight againstthis fact, there are MOSFET drivers that allow pumping high current in the MOSFET gateand then forcing a quick transition between switch states such as FAN3278.

6VDD

5OUTB

2 INA

3 GND

4 INB

FAN3278

7OUTA

8ENB1 ENA

6VDD

5OUTB

2 INA

3 GND

4 INB

FAN3278

7OUTA

8ENB1 ENA

U302 U303

Power

C312

1uF

C313

10nF

C310

1uF

C311

10nF

Sw2L

Sw2HSw1H

Sw1L NGate2

PGate2

NGate1

PGate1

Power

Z302

5.1V

Z301

5.1V

Z304

5.1V

Z303

5.1V

Figure 3.3: MOSFET gate drivers

The FAN3278 [23] is a dual 1.5 A gate driver optimized to drive a high-side P-channelMOSFET and a low-side N-channel MOSFET in switching control applications operating froma voltage rail up to 27V. Internal circuitry limits the voltage applied to the gates of the externalMOSFETs to 13V maximum. This component incorporates MOSFET devices for the finaloutput stage, providing high current throughout the MOSFET turn-on / turn-off transition tominimize switching losses.

In Figure 3.3 is shown how the FAN3278 drivers have been connected. Moreover, a 5.1 Vzener diode has been connected to each one of its inputs in order to protect the microcontrolleragainst any overvoltage.

Sensors

Sensors are needed to monitor several variables of the converter in order to apply the appro-priate response through the MOSFET drivers. In Bang-Bang control, three variables must bemonitored: input voltage, output voltage and inductor current (see Section 2.3).

Values of input and output voltage are obtained through a voltage divider and then it is readwith an ADC (Analog to Digital Converter) of the microcontroller. The relationship betweenthe input and the output of the voltage divider is the following:

VADCx =12 kΩ

100 kΩ + 12 kΩV =

3

28V (3.7)

Therefore, the microcontroller can read a voltage value in a range from 0 V to 30.8.Moreover, a 1 nF capacitor has been added to filter noise and it provides a cut-off frequency

of:

ffilter ADC(Hz) =1

2πRC' 72 kHz (3.8)

Furthermore, a 5.1 V was connected to each divider zener diode whereby the microcontrolleris protected against overvoltages. Figure 3.4 shows the circuit for each voltage that has to bemeasured.

A bidirectional sensor is required to get the value of the inductor current as well as it isnecessary that it has a lower serial resistance in order to maximize the converter efficiency. TheAllegro ACS710 [24] current sensor provides economical and precise means for current sensingand it fits perfectly to the converter requirements.

18

R108

12k

1%

R107

100k 1%Out ADC0

R106

12k

1%

R105

100k 1%In ADC1

C115

1nF

C114

1nF

Z101

5.1V

Z102

5.1V

Figure 3.4: Voltage divisors for adapt ADC range

ACS710 is a precision linear Hall sensor integrated circuit with a copper conduction pathlocated near the surface of the silicon die. Applied current flows through the copper conductionpath, and the analog output voltage from the Hall sensor linearly tracks the magnetic fieldgenerated by the applied current. This output voltage proportional to the current and a zerocurrent reference are read with two ADC of the microcontroller and then it can be obtained thevalue of the current flowing through the inductor. Figure 3.5 shows how the current sensor wasconnected to the microcontroller.

14VCC

13FAULT

12VIOUT

11FILTER

2 IP+

3 IP+

4 IP+

5 IP−

ACS710

15VOC

16FAULT_EN1 IP+

6 IP−

7 IP−

8 IP−

10VZCR

9GND

12

U301

I+

I−

C306

100pF

C305

1nF

ADC2

C308

100nF

ADC3

C307

1nF

C309

10uF

3V3

Figure 3.5: Bidirectional current sensor

Attending to the ACS710 specifications, a 100 pF capacitor connected to its FILTER pinmakes a bandwidth for the output signal of 120 kHz. Moreover, some capacitors are connectedto the power supply input and signal outputs to reduce noise.

The relationship between the inductor current and the voltage read by the microcontrolleris given by the following relationship:

Il(A) =2(VADC3 − VADC2)

0.151(3.9)

This is valid for −7.5 A ≤ Il ≤ 7.5 A with a total output error of 1.6 % over the reading.

Power supply

All the control logic and the microcontroller are supplied using both input and output powerfrom the converter. As it is shown in Figure 3.6, a double anode diode with common cath-ode (MBR2425CT) provides the power necessary to supply the MOSFET drivers and a 3.3 Vregulator (NCV4274A).

The NCV4274A is a low dropout voltage regulator that gives 3.3 V at its output with ainput range from 4.5 V to 40 V, and a maximum output current of 400 mA. It is used to supplythe current sensor, the microcontroller and the Ethernet port logic.

3.3 Microcontroller

The chosen microcontroller for controlling the converter was the LPC1768 because it was usedin the previous related work (see Section 1.2). The software implemented by the previous teamshas been used as a start point for the control algorithm.

19

12

2

GND

3

Q

4

GND

NCV4274A

1

I

12

1

2

3

4

1

3

2

MBRF2545CT

Out

In

D201

D202

C203

10uF

C202

100nF

Power

3V3

LED1

470

R201

U201

L201 BLM L202 BLMD204

UART0 Vcc

Z201

30V

C201

4.7uF

50V

CONN

D203

D205

UART1 Vcc

Figure 3.6: Power supply circuit

The LPC1768 [7] is an ARM Cortex-M3 based microcontroller for embedded applicationsfeaturing a high level of integration and low power consumption. The ARM Cortex-M3 is anext generation core that offers system enhancements such as enhanced debug features and ahigher level of support block integration.

The LPC1768 is supplied by the 3.3 V signal from the voltage regulator NCV4274A. A setof capacitors and inductors has been connected to the power supply pins in order to filter noise.Moreover, a 12 MHz crystal oscillator provides an external clock signal for the microcontrollerand a push button is connected to the reset signal in order to make a hard reset. In Figure 3.7are shown the main connections of the microcontroller.

1TDO/SWO

2TDI

3TMS/SWDIO

4TRST

5TCK/SWDCLK

14RSTOUT

17RESET

100RTCK

19VBAT

16RTCX1

18RTCX2

22XTAL1

23XTAL2

28 VDD(3V3)

54 VDD(3V3)

71 VDD(3V3)

96 VDD(3V3)

42 VDD(REG)(3V3)

84 VDD(REG)(3V3)

12 VREFP

15 VREFN

13 n.c.

10 VDDA

11 GNDA

31 GND

41 GND

55 GND

72 GND

97 GND

83 GND

LPC1768

100nF

C101

100nF

C102

100nF

C103

100nF

C104

100nF

C105

3V3

10

nF

C107

1u

F

C106

BLM

L101

BLM

L102

VREFP

VREFN

10

nF

C109

1u

F

C108

BLM

L103

BLM

L104

VDDA

VSSA

22pF

C110

22pF

C111

12MHzXTAL

3V3

RST

U101

3V3

3V3

Figure 3.7: Microcontroller main connections

The LPC1768 peripherals that can be used with the designed hardware are the following:

• In-System Programming (ISP) module.

• Ethernet MAC with RMII interface.

• Two UARTs with fractional baud rate generation.

20

• 6 GPIO (General Purpose I/O) pins with configurable pull-up/down resistors.

• 4 12-bit Analog-to-Digital Converter (ADC) with conversion rates up to 200 kHz.

Analog to Digital Converters (ADC)

Four Analog to Digital Converters (ADC) of the LPC1768 are connected to the sensors andtheir measures are used to know the state of the main variables of the converter. These ADCtake 12 bit precision readings at 200 kHz working frequency and hence, the microcontrollercan check the value of the state variables with a frequency of 50 kHz without losing precision.ADC0 and ADC1 are used to measure the voltages at the ends of the converter and, ADC2 andADC3 are connected to the current sensor outputs.

General Output Pins

Four pins with digital input and output behavior are connected to the inputs of the MOSFETdrivers. This allows to the microcontroller to control the state of the four MOSFET and thento decide how is working the whole converter. Moreover, other two general output pins areconnected both to LED diodes in order to provide a visual signal for test programs.

Ethernet connection

The Ethernet connection is based in a very used architecture called RMII (Reduced MediaIndependent Interface). RMII is a standard that addresses the connection of Ethernet physicallayer transceivers (PHY) to Ethernet switches or the MAC portion of an end-device Ethernetinterface. It reduces the number of signals/pins required for connecting to the PHY from 16(for an MII-compliant interface) to between 6 and 10. The designed interface (see Figure 3.8)is based in a general construction for a RMII working at 10 MHz speed.

12 RESERVED

11 RESERVED

2 TX_EN

3 TXD_0

4 TXD_1

5 TXD_2

DP83848C

1 TX_CLK

6 TXD_3/SNI_MODE

7 PWR_DOWN/INT

8 RESERVED

10 RESERVED

9 RESERVED

24

RB

IAS

23

PF

BO

UT

14

RD

+

15

AG

ND

16

TD

-

17

TD

+

13

RD

-

18

PF

BIN

1

19

AG

ND

20

RE

SE

RV

ED

22

AV

DD

33

21

RE

SE

RV

ED

2525MHz_OUT

26LED_ACT/AN_EN

35IOGND

34X1

33X2

32IOVDD33

36DGND

31MDC

30MDIO

29RESET_N

27LED_SPEED/AN1

28LED_LINK/AN0

48

IOV

DD

33

47

IOG

ND

38

RX

_C

LK

39

RX

_D

V/M

II_M

OD

E

40

CR

S/C

RS

_D

V/L

ED

_C

FG

41

RX

_E

R/M

DIX

_E

N

37

PF

BIN

2

42

CO

L/P

HY

AD

0

43

RX

D_0/P

HY

AD

1

44

RX

D_1/P

HY

AD

2

46

RX

D_3/P

HY

AD

4

45

RX

D_2/P

HY

AD

3

J1

J4

J5

J2

J3

J7

J8

J6

75Ω 75Ω

75Ω 75Ω

1000pF / 2kV

TD+1

TCT2

TD-3

RD+4

RCT5

RD-6

8

G-9G+10

Y+12

Y-11

RJ45

1 2

E/D1

OUT3

VCC 4

GND 212

U401

U402

VETH

180

R410

180

R409

2k2

R408

2k2

R407

49.9

R411

BLM

L402

100nF

C407

100nF

C408

VETH

100nF

C401

BLM

L401

100nF

C404

C405

10uF

VETH3V3

100nF

C4094k87

R415

VETH

2k2

R405

ENET_TXD0

ENET_TXD1

ENET_TXEN

RST

ENET_CRS

ENET_RXD0

ENET_RXD1

ENET_RXER

ENET_REFCLK

ENET_MDC

ENET_MDIO

470R404

470R403

470R402

470R401

100nF

C406

10k

R406

VETH

U403

49.9

R412

49.9

R413

49.9

R414

100nF

C402

C403

10uF

Figure 3.8: Ethernet physical circuit

This Ethernet interface, along with the bidirectional behavior of the converter core, providesthe capability to integrate the converter in smart grids. Therefore, it is possible to handle theflow of energy in a microgrid [25] between some elements and provide the voltage and currentthat they need. Moreover, this configuration can provide a tool to develop communicationmethods for remote control or motorization of the converter.

21

Serial communication and program flashing

Two serial UART (Universal Asynchronous Receiver-Transmitter) are reserved to used themcommunication ports to change the converter parameters. These are UART0 and UART1.Moreover, the UART0 serial port can be used for programming or reprogramming the on-chip flash memory, using the boot loader software. This method is called ISP (In-SystemProgramming).

The flash boot loader code is executed every time the part is powered on or reset. Theloader can execute the ISP command handler or the user application code. A low level afterreset at pin P2.10 is considered an external hardware request to start the ISP command handler.Assuming that power supply pins are on their nominal levels when the rising edge on RESETpin is generated, it may take up to 3 ms before P2.10 is sampled and the decision on whetherto continue with user code or ISP handler is made. If P2.10 is sampled low and the watchdogoverflow flag is set, the external hardware request to start the ISP command handler is ignored.If there is no request for the ISP command handler execution (P2.10 is sampled high afterreset), a search is made for a valid user program. If a valid user program is found then theexecution control is transferred to it. If a valid user program is not found, the auto-baud routineis invoked.

12

12

12

12

SW101

10k

R103

RST

3V3

SW102

33k

R104

ISP

3V3

C112

10uF

C113

10uF

Figure 3.9: Push buttons circuit

Pin P2.10 is used as a hardware request signal for ISP and it can be generated with a pushbutton connected to the P2.10. P2.10 is in high impedance mode after reset, after that, a pull-up resistor provides an external high level to put the pin in a defined state. This configurationand also the reset button one, are shown in the Figure 3.9.

3.4 Overvoltage protection

One of the applications of the converter is to manage the power stored in a supercapacitorsbattery. The BCAP3000 [1] from MAXWELL TECHNOLOGIES with 3000F were used tobuild the battery and they allow a maximum voltage between their terminals of 2.7 V (seeSection 1.2). To exceed this voltage can damage permanently the supercapacitors. For thisreason, a overvoltage circuit has been designed to protect them and it replaces the balancingcircuit designed by the previous teams (see Section 1.2).

They are some alternatives to built a overvoltage circuit. A balancing circuit between allpairs can be used, this keeps all the pairs at the same voltage and the 2.7 V maximum voltagecan be controlled monitoring the voltage of the battery. This option have low efficiency andmuch energy is lost during the process of balancing.

Another alternative could be a circuit that switch the energy stored between one pair ofcapacitors or another with the same principle as a DC converter. This would be the most

22

efficient alternative but it requires a lot of hardware to make it work. In order to focus thehardware development on the converter, it has been chose an option which meets the efficiencyand the minimal hardware requirements.

T4SC

NTE263

T2SC

NTE263

T5SC

NTE263

T3SC

NTE263

T1SC

NTE263

T6SC

NTE263

T7SC

NTE263

T8SC

NTE263

SC

1 2 3

CONNSC1

1 2 3

CONNSC2

1 2 3

CONNSC3

Z1SC

2.7V

Z2SC

2.7V

Z3SC

2.7V

Z4SC

2.7V

Z5SC

2.7V

Z6SC

2.7V

Z7SC

2.7V

Z8SC

2.7V

21 3

JS

C

In SC

Out

Supercaps

Figure 3.10: Overvoltage circuit to protect supercapacitors

In Figure 3.10 are shown the overvoltage circuit that can act over the eight pairs of superca-pacitors. Each one of them has built with a NPN transistor base-controlled by a 2.7 zener diode.The zener diodes begin conducting when the voltage between the ultracapacitos terminals isclose to 2.7 V. Then, the current flowing through them goes into the base terminal of the NPNtransistors which start to drive current between the terminals of the supercapacitors.

3.5 Hardware implementation

The designed hardware has been implemented in a 160 x 100 mm PCB (Printed Circuit Board)and it has been installed in a metallic case to protect the circuit and provide a cooling systemfor the transistors. In Figure 3.11 is shown a top view of the PCB.

This PCB has been designed using the free software gEDA. The gEDA [26] project hasproduced and continues working on a full GPL’d suite and toolkit of Electronic Design Au-tomation tools. These tools are used for electrical circuit design, schematic capture, simulation,prototyping, and production. Currently, the gEDA project offers a mature suite of free soft-ware applications for electronics design, including schematic capture, attribute management,bill of materials (BOM) generation, netlisting into over 20 netlist formats, analog and digitalsimulation, and printed circuit board (PCB) layout.

In Appendix ?? is shown the list of components used into the PCB. In Appendix D is shownthe complete schematics which include all the designed circuits, jumpers, test probes and holesthat the designed PCB has.

23

Figure 3.11: Top view of the designed PCB

24

Chapter 4

Control software design

4.1 Implemented features

The Bang-Bang controller has been implemented to work with the designed hardware and pro-grammed in the LPC1768 microcontroller. The main source code that is shown in Appendix Eadded to some functions made by the previous teams, has been programmed to build a converterthat is able to work with the supercapacitors battery. Table 4.1 summarizes the implementedfeatures and others that have been considered in the hardware design but they have not beenprogrammed.

Achieved Considered

Unidirectional buck converter Bidirectional converter

Unidirectional boost converter MPPT algorithm

Current limitation Ethernet communication

Techniques for maximize efficiency Efficiency auto-maximized

Table 4.1: List of programmed features

4.2 Initialization

System clock

The main oscillator is used as the clock source for the CPU, with using a PLL (Phase LockedLoop). The main oscillator is a crystal oscillator which operates at 12 MHz. This frequency isboosted to the maximum CPU operating frequency, by the Main PLL (PLL0). The oscillatoroutput is called osc clk and the microprocessor clock frequency is referred to as cclk as it isshown on Figure 4.1.

The PLL0 input (sysclk), what must be in the range of 32 kHz to 50 MHz, is connected theoscillator output osc clk and thus it has a frequency of 12 MHz. It is initially divided downby a value ”N”, which may be in the range of 1 to 256. This input division provides a greaternumber of possibilities in providing a wide range of output frequencies from the same inputfrequency. In this case it has taken 3 as ”N” value.

Following the PLL0 input divider is the PLL multiplier. This can multiply the input divideroutput through the use of a Current Controlled Oscillator (CCO) by a value ”M”, in the rangeof 6 through 512. The resulting frequency must be in the range of 275 MHz to 550 MHz. Themultiplier works by dividing the CCO output or pllclk by the value of M, then using a phase-frequency detector to compare the pllclk to the multiplier input. The error value is used to

25

Figure 4.1: Core clock structure

adjust the pllclk frequency. The chosen value for ”M” was 50, that gives a pllclk frequency of400 MHz. The PLL structure is shown in Figure 4.2.

Figure 4.2: PLL structure

There are additional dividers at the output of PLL0 to bring the frequency down to whatis needed for the CPU and peripherals such as the CCD (CPU Clock Divider). It has taken avalue of 4 for the CCD. It divide the pllclk frequency of the PLL0 and provide a cclk of 100MHz to the system. Equation 4.1 summarizes how is obtained the 100 MHz main clock:

fosc clk = 12 MHzM = 50N = 3

CCD = 4

fcclk =fpllclkCCD

=2 ∗M ∗ fosc clk

N ∗ CCD= 100 MHz (4.1)

ADC converters

Four ADC (Analog to Digital Converters) are used to monitor the main variables of the con-verter. These are:

• ADC0 for output voltage (Vout).

• ADC1 for input voltage (Vin).

• ADC2 for zero reference current (Iref ).

• ADC3 for inductor current (IL).

26

The input clock for each one of the ADC (pclk) has a frequency of 25 MHz because it wasselected the divider by four over the cclk (100 MHz). This programmable divider is included ineach converter to scale this clock to the clock needed by the successive approximation processof the ADC. According to the specification, the maximum frequency for a 12 bit conversionprecision is 13 MHz, hence with a working frequency of 25 MHz the precision of the analogto digital conversion is about 10 bit. Moreover, fully accurate conversion requires 65 of theseclocks, an then the sampling frequency of each ADC is:

fADC =fclk ADC

65=

fcclk4 ∗ 65

' 385 ksamples/s (4.2)

Given that the four state variables have to be known for every decision of the Bang-Bangcontroller, the maximum control frequency will be:

fcontrol max =fADC

4' 96 kHz (4.3)

Moreover the ADC interruption was programmed to read sequentially the ADC from 0 to 3making a interruption loop.

Serial communication

UART0 was configured to provide serial communication and thus the capability of change theconverter parameters such as desired output voltage or maximum inductor current, withoutreprogram the microcontroller firmware.

The baud-rate of UART0 was set to 115200 bps configuring the corresponding registers andfollowing the relationship of the Equation 4.4.

fcclk = 100 MHz, UnDLM = 0, UnDLL = 37, DivAddV al = 7, MultiV al = 15

baudUART0 = fcclk16∗(256∗UnDLM+UnDLL)∗(1+DivAddV al

MultiV al ))' 115200 bps

(4.4)

Besides, there was set eight bits of data, one stop bit and no parity bit. Therefore the serialconfiguration is 115200 8N1.

Other configurations

Other initial configurations that are done at the beginning of the code are the following:

• Set as digital outputs the control signals. These are connected to the MOSFET driversand then the microcontroller can control the state of the switches with them.

• Initialize the Repetitive Interrupt Timer (RIT). It is used to implement the shoot-throughprotection and limit the reverse current (Section 4.5).

• Set as digital outputs the pins that are connected to the two LEDs. They can be used astest pins or visual control.

• Initialize the internal variables. They are used to store the state variables and the param-eters of the converter (Vout, Vin, Il, Iref , Vmax, Imax, Vref ).

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4.3 Main loop

After the initialization process, the LPC1768 starts a infinite loop where the required operationsto execute the Bang-Bang control take place. In this main loop, the LPC1768 executes contin-ually a function (handle command) that checks if any command has been received through theUART0. If so, the received command is attended and the corresponding routine is executed(see Section 4.6). This process is executed until a flag (UpdateChannel) is set up by the ADCinterruption. This flag indicates that the four ADC have been read and then the Bang-Bangcontroller function can be executed. In Figure 4.3 is showed the flow diagram of the main loop.

Figure 4.3: Main loop controlled by ADC interruptions

Once the ADC flag has been checked, the obtained values for output and input voltage, andinductor current are low-pass filtered in order to remove noise from the readings. It also candiscard some samples detected as glitches caused by the ADC peripheral. This fact was noticedand contrasted with some users of the LPC1768 [27]. Another important factor that has beenconsidered is that both the filtering and the stored values of the state variables are in integerformat because it allows working faster than float formats.

After that, another function (MeanValues) is the responsible of calculate the mean valuesof the state variables every 100000 readings. These values are used to report the state of theconverter through the serial port (see Section 4.6) and can be used for MPPT control or otherimprovements.

Eventually, the Bang-Bang control algorithm is executed and then the microcontroller startsa new iteration of the main loop.

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4.4 Bang-Bang Algorithm

The Bang-Bang controller algorithm that is executed in the LPC1768 is shown in the Figure 4.4.This is the final implemented version and it completes the algorithm described in Section 2.4and Appendix C. It is executed every time that the state variables have been read with theADC and it decides the state of the MOSFET transistors of the converter.

Figure 4.4: Bang-Bang control algorithm

The steps of the algorithm are the following:

1. If Vref = 0 the converter goes to ALL OFF state. Then all the transistors are cut-offand no current is flowing through the inductor. Vref is the desired steady voltage at theoutput, it can be configured in a range of 0 ≤ Vref ≤ Vmax and its initial value is Vref = 0.

2. If Vout > Vmax the converter goes to DISCHARGE state. On one hand, the outputcapacitors are disconnected of the inductor and they start discharging through the load.On the other hand, the inductor terminals are short-circuited and is starts dischargingtoo. This is a security state to avoid overvoltage at the output of the converter. Vmax

determines this maximum voltage, it can be configured in a range of 0 ≤ Vmax ≤ 30 andits initial value is Vmax = 25.

3. If Il > Imax the current flowing through the inductor must be reduced. Imax sets themaximum current at the inductor, it can be configured in a range of 0 ≤ Imax ≤ 6 and itsinitial value is Imax = 1. There are two alternatives depending on the input and outputvoltage.

a) If Vout > Vin the converter goes to BOOST OFF state. As it has been noted inSection 2.3, in this case the current can be reduced without disconnecting the inductorfrom the input supply.

29

b) Otherwise the converter goes to BUCK OFF state and the inductor is disconnectedfrom the input supply.

4. If Vref > Vin the converter must work in boost mode.

a) If Vout > Vref the converter must reduce the voltage at its output. It is possiblegoing to BOOST OFF or BOOST SOFT state depending on the current flowingthrough the inductor. The choice between one or other provides the capability toprotect the converter against the shoot-through and reverse current phenomenons(see Section 4.5).

b) Otherwise the converter goes to BOOST ON state. Then the current necessary toincrease the output voltage until the Vref value is provided by the input supply.

5. Eventually, if Vref ≤ Vin the converter must work in buck mode. As well as in boostmode, the converter must go to the proper state depending on the relationship betweenVout and Vref , and the current flowing through the inductor. BUCK OFF, BUCK SOFTand BUCK ON are the equivalent states for buck mode.

4.5 Switch management

Every state of the converter corresponds to a combination of cut-off or active state of theMOSFET transistors. Table 4.2 summarizes these relationships.

State N-channel 1 P-channel 1 N-channel 2 P-channel 2

BUCK OFF ON OFF OFF ON

BUCK SOFT OFF OFF OFF ON

BUCK ON OFF ON OFF ON

BOOST OFF OFF ON OFF ON

BOOST SOFT OFF ON OFF OFF

BOOST ON OFF ON ON OFF

DISCHARGE ON OFF ON OFF

ALL OFF OFF OFF OFF OFF

Table 4.2: State of MOSFET transistors for each state of the converter

The transition between these states can induce a negative effect over the efficiency of theconverter. It is called shoot-through and there has been implemented a mechanism to minimizeits effects. Moreover, two more states have been added to the ones showed in Table 2.1 and theyare necessaries to implement the Bang-Bang control in order to avoid another negative effectthat is called reverse current. Both effects appear in synchronous converters and they have tobe minimized to get a higher efficiency than in the non-synchronous converters.

Shoot-through

Shoot-through is defined as the condition when both MOSFET transistors (P-channel and N-channel) are either fully or partially turned on, providing a path for current to “shoot through”from Vin or Vout to GND (see Figure 4.5) [28].

To minimize shoot-through, synchronous buck or boost regulators employ one of two tech-niques to ensure “break before make” operation of the transistors:

30

Figure 4.5: Shoot-through effect

1. Fixed “dead-time”. A MOSFET is turned off, then a fixed delay is provided before thelow-side is turned on. This circuit is simple and usually effective, but suffers from its lackof flexibility if a wide range of MOSFET gate capacitances are to be used with a givencontroller. Too long a dead-time means high conduction losses. Too short a dead time cancause shoot-through. A fixed dead-time typically must err on the “too long” side to allowMOSFET transistors to fully discharge before turning on the complementary MOSFET.

2. Adaptive gate drive. This method looks at the gate voltage of the MOSFET that is beingdriven off to determine when to turn on the complementary MOSFET. Theoretically,adaptive gate drives produce the shortest possible dead-time for a given MOSFET withoutproducing shoot-through.

The fixed “dead-time” method was chosen because it can be implemented easily withoutadding more hardware to the converter (an additional ADC is needed for each transistor inmethod 2). It has been set 2 µs as ”dead-time” because it is enough to let discharging thegate of the active transistor. In Figure 4.6 are shown the behavior of the control signals in theshoot-through protection.

Figure 4.6: Shoot-through protection

The ”dead-time” is controlled by the RIT peripheral and it is set every time that the stateof the converter changes. However, if the shoot-through effect is not present in the current statetransition, the microcontroller ignores this fixed ”dead-time” and changes immediately to thecorresponding state (see Figure 4.8).

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Reverse current

Reverse conduction of synchronous rectifiers is a major factor in converter efficiency [29]. Insome cases, the reverse conduction can even cause the destruction of the converter. When theconverter is operating in full heavy load (like with the ultracapacitors battery), the synchronousrectifiers are always more efficient than the standard Schottky diode solution (assuming theconverter is operating at a reasonable frequency of less than 500 kHz).

Figure 4.7: Reverse Current effect

The implemented method to avoid this effect (see Figure 4.7) is to let the transistors thatallow flowing the reverse current to be active only during a short period of time, in this case,it is about 8 µs. This happens during the BUCK OFF and BOOST OFF states. The restof time until the next execution of the Bang-Bang algorithm, these transistors (N-channel 1or P-channel 2) are in cut-off state and the current can flow through its body diodes. Thiscorresponds to BUCK SOFT and BOOST SOFT states.

After that, in the next decision of the Bang-Bang controller, it is checked if the inductorcurrent is positive. If so, the microcontroller repeats the previous process again. If not, theconverter remains in a ”SOFT” state. In Figure 4.8 are shown how both reverse current andshoot-through protection work.

Figure 4.8: Reverse current and shoot-through protection

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4.6 Serial bus commands

A set of basic commands has been programmed in order to configure the parameters of thecontroller without flashing the microcontroller and monitor the evolution of the state variablesthrough a serial bus.

The serial communication software protocol was designed by MinNE 3 team and its de-scribed in [30]. This code implements a serial interface that can be connected to another devicewith a Future Technology Devices International (FTDI) interface. A simply serial communi-cation software such as Minicom is required in the device to send and receive data from theconverter. The parameters of the serial communications are 115200 bps and 8N1 as it wasestablished in Section 4.2.

Table 4.3 summarizes the commands implemented to handle the internal parameters of theconverter.

Command Description

help Shows a list of supported commands.

vref x Sets the reference voltage to x. This is the desired output voltage at the outputof the converter.

imax x Sets the maximum current inductor to x. Determines how much current canflow through the inductor and it has effect over how efficient is the converter.

vmax x Sets the maximum voltage at the output to x. This provide a safe mechanismagainst overvoltage.

par Shows the value in float format of the three configurable parameters (Vref ,Imax and Vmax).

val Shows the value in float format of the three state variables (Vout, Vin and Il)of the converter.

↑ When this key is pressed, the last command appears in the command promptand the previous ones if it is pressed successively.

Table 4.3: Serial commands to configure the converter

The commands that are related with parameters and variables also execute functions thathave to change the format of the values that they carry. As it was mentioned before, variablesand parameters are handled in integer format because the LPC1768 can carry out the operationsfaster than if it uses the float format. Otherwise, float format is better to show the values tothe user of the converter and to configure the parameters too. It is easier to handle than theinteger format. Therefore, vref, imax and vmax commands transform float values into storedinteger values, and par and val transforms integer into float values.

33

Chapter 5

Prototype evaluation

A prototype has been built in order to check if the Bang-Bang controller satisfies the require-ments exposed at the beginning of the document. This prototype has the same structure thanthe designed hardware except the Ethernet interface. Some tests have been carried out with aresistor as load at the output and with the supercapacitors battery later.

5.1 General behavior

In order to check the correct performance of the prototype, it has been done the following setup:

• A DC power source sets the input voltage and provides the power to supply the prototype.

• A 18.5 Ω resistor acts as the output load.

• A multimeter is used to measure the DC component of the output voltage.

• Two multimeters more are used to measure the input and the output voltage.

• A mixed signal oscilloscope is used to:

– Measure the AC component of the output voltage with its analog channel 1 (A1).

– Measure the output of the current sensor with its analog channel 2 (A2).

– Check the operating frequency of the converter with its digital channel 0 (D0).

– Monitor the control signal of the N-MOS 1 with its digital channel 2 (D2).

– Monitor the control signal of the P-MOS 1 with its digital channel 3 (D3).

– Monitor the control signal of the N-MOS 2 with its digital channel 4 (D4).

– Monitor the control signal of the P-MOS 2 with its digital channel 5 (D5).

Several previous considerations must be taken in account before the evaluation of the con-verter. First one is that it can be calibrated in order to reduce the systematic error produced inthe ADC readings. A sample taken by the ADC peripheral has to be scaled using the value ofthe supply voltage to know the value of the voltage that wants to be measured. If it is assumedthat this voltage is exactly VDD = 3.3 V , a systematic error in the measure will be produced.The second consideration is that an error smaller than the 5 % of the measure can be consideredwithin the acceptable margin.

In first place, it has been checked the performance of the converter working in buck mode.The converter parameters have been set up to Vref = 5 V , Imax = 1 A and Vmax = 25 V with

35

the corresponding serial commands (see Section 4.6). Moreover, the input voltage have beenset to 10 V.

The measured DC voltage at the output was Vout = 4.978 V . It means a error smaller than0.5 % so it is within the acceptable error margin.

Figure 5.1: Converter working in buck mode

Furthermore, the following observations can be made looking at Figure 5.1:

1. There are some glitches in voltage and current. It is a common effect in all switchedconverters and it is caused by the reverse recovery charge of the transistors and otherparasitic elements. The analysis of the results will ignore this effect as it was done in [31].

2. The output ripple is about Vripple = 50 mV and it means 1 % of the DC voltage. It fitsthe specifications of the hardware.

3. About the inductor current, it is positive so the reverse current protection accomplishesits function and the maximum value is about 1.3 A (from Equation 9). It means an errorof 30 % and it does not fit to the theoretical study. However, it can be observed that theaverage of the current does not exceed 1 A.

4. The working frequency moves into a range (the value showed in the figure was not constant)but it has been observed that its average is around 71 kHz.

5. It is also shown how change the control signals of the transistors to avoid the reversecurrent and the delay between these signals that provides the shoot-through protection.

The same procedure has been followed to check the boost performance. The configuredparameters have been Vref = 12 V , Imax = 1 A and Vmax = 25 V and the input voltage has

36

been set up to 8 V. The measured output voltage with the multimeter was 12.402 V and itmeans an acceptable error of 3 % over the desired value.

Figure 5.2: Converter working in boost mode

From the Figure 5.2 it follows:

1. It was expected that there are glitches in voltage and current waveforms too.

2. The output ripple is about Vripple = 40 mV and it means less than 1 % of the DC voltage.It also fits the specifications of the hardware.

3. The inductor current is also positive and the maximum value is almost 2 A. It does notfit to the theoretical study neither. However, it can be observed that the average currentis about 1 A.

4. The working frequency and reverse current performance, as well as shoot-through protec-tion, have a similar behavior compared with the buck converter mode.

Eventually, Figure 5.3 shows the converter working under current limitation. This modeworks when the required current at the output is higher than the maximum current configuredsuch as it happens when the converter is connected to the supercapacitors battery. The resultsare similar to the ones showed before and the control signals work is as it was described in theBang-Bang theory.

5.2 Efficiency considerations

The efficiency of the converter will be analyzed first under the conditions of light load. Theseinclude low resistances such as supercapacitors battery or the 18.5 Ω probe resistor connectedbefore.

37

Figure 5.3: Converter working under current limitation

In Figure 5.4 is represented the evolution of the efficiency of the converter in front of thereference voltage. It can be appreciate that the efficiency is higher than 90 % for high outputvoltages or, in other way, for high input-output power transfer. On the contrary, efficiency isworse for low power transfer.

Figure 5.4: Performance of the converter under light load conditions

38

This is a expected behavior because of the high idle power consumption. All the controllogic devices have a quiescent current what causes this degradation (or at least a part of it) onthe converter efficiency.

The main sources of this idle consumption (theoretically from the information in their datasheets) are:

• LPC1768 microcontroller: 42 mA (Active mode with clock at 100 MHz and PLL enabled)[32].

• CWX823 50 MHz crystal controlled oscillator: 30 mA [33].

• DP83848 Ethernet controller: 14 mA (Power Down Mode) [34].

• ACS710 sensor: 9 mA [24].

• FAN3278 MOSFET drivers: 1.8 mA each one [23].

• Others: NCV4274A 3.3 V Regulator, LEDs, voltage divisors and leakage current of allpassive components.

Practically, the measured idle current is 90 mA.Another negative effect over the converter efficiency are the losses on MOSFET body diodes.

As is has noted before, they are used to block the reverse current but, when they are in con-duction, their high forward voltage become in another source of power losses.

Over high load conditions, it can be appreciated the same effect as before. In the case of thisconverter, a high load is when the load at the output needs a current lower or with the samemagnitude than the idle current. In Figure 5.5, there is represented the converter efficiencywith a 110 Ω resistor connected at the output.

Figure 5.5: Efficiency of the converter with high load

This resistor takes 228 mA at 25 V and if the previous idle current is considered, it canexplain the efficiency what is shown in the Figure 5.5.

In Chapter 7, the alternatives to reduce the idle power consumption will be discussed.

39

5.3 Ultracapacitors handling

One of the main goals of this project is to manage a supercapacitors battery. Hardware andsoftware have been designed to charge and discharge the supercapacitors and also it has toprotect it against overvoltages and overcurrents.

The overvoltage protection circuit has to be active when one of the supercapacitors reaches2.7 V between its terminals. In Figure 5.6, it is shown the voltage-current characteristic of thiscircuit for every capacitor. It has been noted that when the voltage is near to 2.7 V, the currentstarts flowing to the transistor instead through the capacitor, avoiding to overcharge it.

Figure 5.6: Voltage-Current characteristic of the overvoltage circuit

In Figure 5.7 is shown the evolution of the voltage of the eight pairs of supercapacitors. Thebattery was charged from 0 V to 19 V in 3 hours and 45 minutes. The input voltage was 10 Vgenerated with the power source and the average charging current 1.25 A.

Figure 5.7: Supercapacitors voltage limited by the overvoltage circuit

The supercapacitors battery acts as a light load and, as it was discussed in previous section,and in Figure 5.8 it can be observed the same behavior as with the 18.5 Ω resistor.

40

Figure 5.8: Efficiency of the converter working with the supercapacitors battery

41

Chapter 6

Conclusions

Once the converter has been checked and tested with different loads at its output, it is time toanalyze what is the result of all the control theory, hardware and software design.

The DC/DC converter is able to step up and down the input voltage in the defined range. Itcan manage voltages from 0 V to 25 V at both sides, input and output, and it works regardlessof the output load. The designed controller based on Bang-Bang control has been perfectlyadapted to abrupt changes on load, input or reference voltage. However, there is one issue whatwas not expected; one of the voltages, input or output, must be higher than 7 V because ofthe MOSFET drivers. According to the drivers data sheet [23], they can work with a minimumvoltage of 4.5 V but it seems that practically, this value is 7 V.

Apart from that, the hardware fits the initial specifications about absolute ratings. It cansupport up to 27 V and 6 A. Moreover, it can work with the supercapacitors battery becauseit can avoid the overvoltage on the capacitors and control the current going into them in orderto avoid damaging the converter. Nevertheless, the idle power consumption is high and it mustbe reduced.

About the implemented software, the average current of the converter can be controlledbut not the maximum. This difference between the Bang-Bang controller simulations and theprototype evaluation is produced by the existing and inescapable delay between the measures ofthe state variables and the change of the control signal of the MOSFET transistors due to theneeded microcontroller operations. This fact produces that the value of imax is proportional tothe average current flowing through the converter but this relationship still has to be quantified.

It has been noted that the designed hardware has a lot of potential so it can be used inmany applications which involves energy management. It was designed to fit a control basedin the developed Bang-Bang algorithm but, besides, it can be used with other kinds of control,with digital signals or, also, with PWM signals. The digital control output pins which havebeen taken in the design, have PWM peripherals what can be programmed in software.

The ”MCU controlled DC-DC buck/boost converter for supercapacitors” is a device whatcan be used in many applications. Manage a supercapacitors battery is its main application butit can be used by researchers or companies in the field of the power and energy management.Used components of the converter are low cost and non polluting. The designed and builtPCB with the components cost about 800 SEK (90 EUR) and it can be reduced changing somecomponents with others with the similar characteristics.

The supercapacitors batteries can replace the other kins of batteries some day. The evolutionof the capacitors technology are evolving day after day and, in the future, all indications are thatsupercapacitors can store as much energy as the other batteries. They would be able to supplyelectric vehicles, making them totally ”green” because right now they include batteries withpolluting elements. Then a converter such as the described in this document will be necessary

43

to manage the power in this kind of vehicles.As it has been noted before, the converter can be used also to manage energy in smart grids.

This is one of the fields related to power management which is growing up at the moment. TheLPC1768 microcontroller has a Ethernet controller what can be programmed by researchers toimplement a protocol what can be used to communicate with other nodes in a smart grid. Thisgrids will have the function of distributing the energy from places where renewable energy isproduced in small amounts to the regions where it is needed or store them. This mechanismwill be able to manage the energy more efficiently.

44

Chapter 7

Future work

There are some issues what may be improved in the converter. In first place, some changes maybe it more efficient, reducing the idle power consumption. These are the following:

• Avoid using LEDs or, at least, do not make them working all the time.

• Make the microcontroller go into sleep mode when it is not doing some calculations andthere are only working the peropherals.

• Include PMOS transistors to connect or disconnect the power supply of some components(MOSFET drivers, current sensor, Ethernet driver, ...) making them working only whenthey are required.

Moreover, Schottky diodes with low forward voltage should be connected in parallel withthe four MOSFETS. They will improve the efficiency of the hardware when it is working toavoid the reverse current. Other MOSFET drivers with similar characteristics might be usedinstead of the FAN3278 in order to avoid the restriction of at least 7 V in one of the sides ofthe converter.

In addition, another microcontroller with faster ADC peripherals would provide a less noise,faster response and more accurate current control. Also, bidirectional power management maybe easily implemented changing the corresponding control signals from one switch to the otherone in the current source code.

Otherwise, the Ethernet peripheral of the LPC1768 microprosessor should be programmedto implement the network communication. Besides, a smart grid management protocol such asDNP3 should also be included to manage the power between other grid nodes.

Eventually, a MPPT (Maximum Power Point Tracking) algorithm may be implemented toget the maximum power from a solar panel. There are some different kinds of algorithms butwhich best fits the behavior of the converter is the Incremental Conductance method (IncCon).This mechanism consists in vary the input current of the converter in order to find the maxi-mum point of power supplied from the solar panel. This variation can be performed using theprogrammable maximum current limitation; it can be varied from zero to the maximum currentthat supports the components of the converter.

45

Bibliography

[1] Maxwell Technologies, “DATASHEET K2 SERIES 650 F - 3,000 F ULTRACAPACI-TORS,” January 2010. Document number: 1015370.1.

[2] L. Osmani, A. Tsopelas, J. Akayezu, G. Cheimonidis, F. Karim, and J. Zhang,“MinNE Final Report.” Comunication Systems Desgin TSLab ICT KTH, January 2009.http://www.tslab.ssvl.kth.se/csd/projects/0921191/node/157.

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[5] C. J. Chaves, “MinNE4 Final Report,” Master’s thesis, TSLab ICT KTH, October 2011.http://web.ict.kth.se/ cjcm/deliverables.html.

[6] V. Saakian, D. Yan, X. Chen, Y. Li, and Q. Ge, “SoC Final Report.” Design Project CourseI CoS ICT KTH, December 2010. http://csd.xen.ssvl.kth.se/csdlive/content/soc.

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[10] M. Hedlund, “Design and construction of a bidirectional DCDC converter for an EV appli-cation,” Master’s thesis, Teknisk-naturvetenskaplig fakultet UTH-enheten UU, February2010. http://web.ict.kth.se/ cjcm/deliverables.html.

[11] F. Guinjoan and D. Biel, “Control de potencia en sistemes d’energies renovables (Teachingslides).” Departament d’Enginyeria Electronica UPC, March 2007.

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[14] A. Sabanovic, A. L. M. Fridman, and S. Spurgeon, Variable structure systems: from prin-ciples to implementation. The Institution of Engineering and Technology, London, UnitedKingdom, 2004.

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[17] P. Li and B. Lehman, “Performance Prediction of DC–DC Converters with Impedances asLoads,” IEEE TRANSACTIONS ON POWER ELECTRONICS, vol. 19, p. 201, January2004. IEEE Members.

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[21] T. Tang and C. Burkhart, “Hybrid MOSFET/Driver for Ultra-Fast Switching,” tech. rep.,Stanford Linear Accelerator Center, Menlo Park, CA 94025 USA, June 2008.

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49

Appendix A

Comparative C pseudo-code betweenBang-Bang and Sliding ModeControl approaches

/∗∗∗ BANG−BANG CONTROL VS SLIDING MODE CONTROL ∗∗∗//∗∗∗ ONLY FOR BUCK CONVERTER ∗∗∗/

/∗ Inputs and c o n s t a n t s used :∗ Vout − Measured output v o l t a g e∗ I l − Measured i n d u c t o r curren t∗ Vref − Desired output v o l t a g e

∗/

/∗ 0 f o r s w i t c h OFF, 1 f o r s w i t c h ON ∗/bool buck = 0 :

/∗∗∗ BANG−BANG CONTROL ∗∗∗/i f ( Vout > Vref )

buck = 0 ;else

buck = 1 ;

/∗∗∗ SLIDING MODE CONTROL ∗∗∗//∗ Constant t h a t c o n t r o l s the s t a b i i l i t y and speed o f

the c o n v e r t e r ( t i p i c a l l y 2/(R∗C) ) ( depends on the load )∗/#define c (2/(R∗C) ) ;

/∗ Voltage Error ∗/int e = Vout − Vref ;

/∗ D e r i v a t i v e v o l t a g e e rro r ( d = e ’ = vout ’ = i c /C =( i l − I r )/C) ( depends on the load )

∗/int d = h i g h p a s s f i l t e r ( I l )/C;

51

bool s w i t c h i n g s u r f a c e = e∗c + d ;i f ( s w i t c h i n g s u r f a c e > 0)

buck = 0 ;else

buck = 1 ;

52

Appendix B

Bang-Bang controller implementedwith MATLAB Simulink blocks

Figure B.1: Converter Bang-Bang controller

Figure B.2: Operating state makers

53

Figure B.3: Proposed sub-controller to decide between buck or boost converter

54

Appendix C

Bang-Bang controller implementedin C pseudo-code

/∗ This C pseudo−code implements a Bang−Bang c o n t r o l l e r wi thcurren t l i m i t a t i o n f o r a non−i n v e r t i n g buck / b o o s t c o n v e r t e r

∗/

/∗ Inputs and c o n s t a n t s used :∗Vout− Measured output v o l t a g e∗ I l − Measured i n d u c t o r curren t∗Vin − Measured input v o l t a g e∗Vref − Desired output v o l t a g e∗Vmax − Configured maximum output v o l t a g e∗Imax − Configured maximum i n d u c t o r curren t

∗/

/∗ 0 f o r s w i t c h OFF, 1 f o r s w i t c h ON∗/bool buck = 0 ;bool boost = 0 ;

/∗ D e f i n i t i o n s f o r each one o f the s w i t c h combinat ions∗/

#define State1 ( ) ( buck = 0 ; boost = 0)#define State2 ( ) ( buck = 1 ; boost = 0)#define State3 ( ) ( buck = 1 ; boost = 1)#define State4 ( ) ( buck = 0 ; boost = 1)

/∗ Safe maximum v o l t a g e l i m i t a t i o n ( i t uses c o n f i g u r a t i o nnumber 4)

∗/i f ( Vout > Vmax)

State4 ( ) ;

55

/∗ Current l i m i t a t i o n∗/else i f ( I l > Imax )/∗ I f output i s over input i t ’ s p o s s i b l e to l i m i t the curren t

wi th s t a t e 2∗/

i f ( Vout > Vin )State2 ( ) ;

/∗ e l s e i t must be l i m i t a t e d wi th s t a t e 1∗/

elseState1 ( ) ;

else

i f ( Vref > Vin )

/∗ OFF mode ( s t a t e 2 f o r b o o s t c o n v e r t e r )∗/

i f ( Vout > Vref )State2 ( ) ;

/∗ ON mode ( s t a t e 3 f o r b o o s t c o n v e r t e r )∗/

elseState3 ( ) ;

/∗ Buck s i n g l e c o n v e r t e r∗/

else

/∗ OFF mode ( s t a t e 1 f o r buck c o n v e r t e r )∗/

i f ( Vout > Vref )State1 ( ) ;

/∗ ON mode ( s t a t e 2 f o r buck c o n v e r t e r )∗/

elseState2 ( ) ;

56

Appendix D

Schematics

D.1 Overvoltage circuit schematics

T4

SC

NT

E2

63

T2

SC

NT

E2

63

T5

SC

NT

E2

63

T3

SC

NT

E2

63

T1

SC

NT

E2

63

T6

SC

NT

E2

63

T7

SC

NT

E2

63

T8

SC

NT

E2

63

SC

Jorge Querol

Ultracapacitors Overvoltage Protection Circuit

TSLab ICT KTH

1

2

3

CO

NN

SC

1

1

2

3

CO

NN

SC

2

1

2

3

CO

NN

SC

3

Z1

SC

2.7

V

Z2

SC

2.7

V

Z3

SC

2.7

V

Z4

SC

2.7

V

Z5

SC

2.7

V

Z6

SC

2.7

V

Z7

SC

2.7

V

Z8

SC

2.7

V

FILE: REVISION:

DRAWN BY: PAGE OF

TITLE

OF

21 3

JS

C

In

SC Ou

t

Supercaps

57

D.2 Main circuits schematics

Out

InL301

100uH

1 2

C303

1000uF

50V

I-

NG

ate

1

PGate1

PGate2

NG

ate

2

I+

G

D

S

IRF

4905

M301

G

D SIR

F3205

M302

G

D SIR

F3205

M303

G

D

S

IRF

4905

M304

14

VC

C

13

FA

UL

T

12

VIO

UT

11

FIL

TE

R

2IP

+

3IP

+

4IP

+

5IP

-

AC

S710

15

VO

C

16

FA

UL

T_

EN

1IP

+

6IP

-

7IP

-

8IP

-

10

VZ

CR

9G

ND

U301

I+ I-

C306

100pF

C305

1nF

AD

C2

C308

100nF

AD

C3

R108

12k

1%

R107

100k

1%

Out

AD

C0

R106

12k

1%

R105

100k

1%

InA

DC

1

Out

In

D201

D202

1 2

C203

10uF

C202

100nF

Pow

er

3V

3

LE

D1

470

R201

6V

DD

5O

UT

B

2IN

A

3G

ND

4IN

B

FA

N3278

7O

UT

A

8E

NB

1E

NA

U302

6V

DD

5O

UT

B

2IN

A

3G

ND

4IN

B

FA

N3278

7O

UT

A

8E

NB

1E

NA

U303

Pow

er

C312 1

uF

C313 1

0nF

C310

1uF

C311

10nF

Sw

2L

Sw

2H

Sw

1H

Sw

1L

NG

ate

2

PG

ate

2

NG

ate

1

PG

ate

1

Pow

er

C307

1nF

C115

1nF

C114

1nF

1 2

C304

1000uF

50V

12

SW

101

10k

R103

RS

T

3V

3

100nF

C101 100nF

C102 100nF

C103 100nF

C104 100nF

C105

3V

3

10nF

C107

1uF

C106

BLM

L101

BLM

L102

VR

EF

P

VR

EF

N

10nF

C109

1uF

C108

BLM

L103

BLM

L104

VD

DA

VS

SA

22pF

C110

22pF

C111

12M

Hz

XT

AL

3V

3

AD

C1

AD

C2

AD

C0

UA

RT

0R

X

AD

C3

UA

RT

0T

X

ISP

EN

ET

_T

XD

0

RS

T

EN

ET

_T

XD

1

EN

ET

_T

XE

N

1T

DO

/SW

O

2T

DI

3T

MS

/SW

DIO

4T

RS

T

5T

CK

/SW

DC

LK

14

RS

TO

UT

17

RE

SE

T

10

0R

TC

K

19

VB

AT

16

RT

CX

1

18

RT

CX

2

22

XT

AL

1

23

XT

AL

2

28

VD

D(3

V3

)

54

VD

D(3

V3

)

71

VD

D(3

V3

)

96

VD

D(3

V3

)

42

VD

D(R

EG

)(3

V3

)

84

VD

D(R

EG

)(3

V3

)

12

VR

EF

P

15

VR

EF

N

13

n.c

.

10

VD

DA

11

GN

DA

31

GN

D

41

GN

D

55

GN

D

72

GN

D

97

GN

D

83

GN

D

LP

C1768

U101

46

P0

[0]

(RD

1/T

XD

3/S

DA

1)

47

P0

[1]

(TD

1/R

XD

3/S

CL

1)

98

P0

[2]

(TX

D0

/AD

0[7

])

99

P0

[3]

(RX

D0

/AD

0[6

])

81

P0

[4]

(I2

SR

XC

LK

/RD

2/C

AP

2[0

])

80

P0

[5]

(I2

SR

XW

S/T

D2

/CA

P2

[1])

79

P0

[6]

(I2

SR

XS

DA

/SS

EL

1/M

AT

2[0

])

78

P0

[7]

(I2

ST

XC

LK

/SC

K1

/MA

T2

[1])

77

P0

[8]

(I2

ST

XW

S/M

ISO

1/M

AT

2[2

])

76

P0

[9]

(I2

ST

XS

DA

/MO

SI1

/MA

T2

[3])

48

P0

[10

] (T

XD

2/S

DA

2/M

AT

3[0

])

49

P0

[11

] (R

XD

2/S

CL

2/M

AT

3[1

])

62

P0

[15

] (T

XD

1/S

CK

0/S

CK

)

63

P0

[16

] (R

XD

1/S

SE

L0

/SS

EL

)

61

P0

[17

] (C

TS

1/M

ISO

0/M

ISO

)

60

P0

[18

] (D

CD

1/M

OS

I0/M

OS

I)

59

P0

[19

] (D

SR

1/S

DA

1)

58

P0

[20

] (D

TR

1/S

CL

1)

57

P0

[21

] (R

I1/R

D1

)

56

P0

[22

] (R

TS

1/T

D1

)

9P

0[2

3]

(AD

0[0

]/I2

SR

XC

LK

/CA

P3

[0])

8P

0[2

4]

(AD

0[1

]/I2

SR

XW

S/C

AP

3[1

])

7P

0[2

5]

(AD

0[2

]/I2

SR

XS

DA

/TX

D3

)

6P

0[2

6]

(AD

0[3

]/A

OU

T/R

XD

3)

25

P0

[27

] (S

DA

0/U

SB

SD

A)

24

P0

[28

] (S

CL

0/U

SB

SC

L)

29

P0

[29

] (U

SB

D+

)

30

P0

[30

] (U

SB

D−

)

27

P3

[25

] (M

AT

0[0

]/P

WM

1[2

])

26

P3

[26

] (S

TC

LK

/MA

T0

[1]/

PW

M1

[3])

82

P4

[28

] (R

XM

CL

K/M

AT

2[0

]/T

XD

3)

85

P4

[29

] (T

XM

CL

K/M

AT

2[1

]/R

XD

3)

95

(EN

ET

TX

D0

) P

1[0

]

94

(EN

ET

TX

D1

) P

1[1

]

93

(EN

ET

TX

EN

) P

1[4

]

92

(EN

ET

CR

S)

P1

[8]

91

(EN

ET

RX

D0

) P

1[9

]

90

(EN

ET

RX

D1

) P

1[1

0]

89

(EN

ET

RX

ER

) P

1[1

4]

88

(EN

ET

RE

FC

LK

) P

1[1

5]

87

(EN

ET

MD

C)

P1

[16

]

86

(EN

ET

MD

IO)

P1

[17

]

32

(US

BU

PL

ED

/PW

M1

[1]/

CA

P1

[0])

P1

[18

]

33

(MC

OA

0/U

SB

PP

WR

/CA

P1

[1])

P1

[19

]

34

(MC

I0/P

WM

1[2

]/S

CK

0)

P1

[20

]

35

(MC

AB

OR

T/P

WM

1[3

]/S

SE

L0

) P

1[2

1]

36

(MC

OB

0/U

SB

PW

RD

/MA

T1

[0])

P1

[22

]

37

(MC

I1/P

WM

1[4

]/M

ISO

0)

P1

[23

]

38

(MC

I2/P

WM

1[5

]/M

OS

I0)

P1

[24

]

39

(MC

OA

1/M

AT

1[1

]) P

1[2

5]

40

(MC

OB

1/P

WM

1[6

]/C

AP

0[0

]) P

1[2

6]

43

(CL

KO

UT

/US

BO

VR

CR

/CA

P0

[1])

P1

[27

]

44

(MC

OA

2/P

CA

P1

[0]/

MA

T0

[0])

P1

[28

]

45

(MC

OB

2/P

CA

P1

[1]/

MA

T0

[1])

P1

[29

]

21

(VB

US

/AD

0[4

]) P

1[3

0]

20

(SC

K1

/AD

0[5

]) P

1[3

1]

75

(PW

M1

[1]/

TX

D1

) P

2[0

]

74

(PW

M1

[2]/

RX

D1

) P

2[1

]

73

(PW

M1

[3]/

CT

S1

/TR

AC

ED

AT

A[3

]) P

2[2

]

70

(PW

M1

[4]/

DC

D1

/TR

AC

ED

AT

A[2

]) P

2[3

]

69

(PW

M1

[5]/

DS

R1

/TR

AC

ED

AT

A[1

]) P

2[4

]

68

(PW

M1

[6]/

DT

R1

/TR

AC

ED

AT

A[0

]) P

2[5

]

67

(PC

AP

1[0

]/R

I1/T

RA

CE

CL

K)

P2

[6]

66

(RD

2/R

TS

1)

P2

[7]

65

(TD

2/T

XD

2)

P2

[8]

64

(US

BC

ON

NE

CT

/RX

D2

) P

2[9

]

53

(EIN

T0

/NM

I) P

2[1

0]

52

(EIN

T1

/I2

ST

XC

LK

) P

2[1

1]

51

(EIN

T2

/I2

ST

XW

S)

P2

[12

]

50

(EIN

T3

/I2

ST

XS

DA

) P

2[1

3]

LP

C1768

U101

AD

C T

est

Supply

Test

GP

IO T

est

2

1

3

J3

2

4

1

3

5

J0

2

4

1

3

5

J1

Driver1

Test

GND

ADC1

ADC2

ADC3

ADC0

GND

Power

3V3

LE

D2

470

R101

GND

2

1

3

J6

GND

GPIO1

GPIO2

EN

ET

_C

RS

GP

IO1

GP

IO2

2

4

6

1

3

5

J5

UART1RX

UART1TX

UA

RT

1

GND

12

SW

102

33k

R104

ISP

3V

3

LE

D3

470

R102

2

GN

D

3Q

4

GN

D

NC

V4274A

1

I

U201

L201

BLM

L202

BLM

UART1 Vcc

1 2

C309

10uF

3V

3

D204

UA

RT

0 V

cc

Z201

30V

Jorg

e Q

uero

l

MC

U C

ontr

olle

d D

C/D

C B

uck/B

oost C

onvert

er

FIL

E:

RE

VIS

ION

:

DR

AW

N B

Y:

PA

GE

OF

TIT

LE

TS

Lab IC

T K

TH

OF

1 2

C112

10uF

1 2

C113

10uF

Z101

5.1

V

Z102

5.1

V

1 2

C201

4.7

uF

50V

1 2 3 4

CO

NN

Z302

5.1

V

Z301

5.1

V

Z304

5.1

V

Z303

5.1

V

3V

3

3V

3

1 3

2

MB

RF

2545C

T

D203

H1

H2

H3

H4

2

4

6

1

3

5

J4

UART0RX

UART0TX

GND

UART0 Vcc

UA

RT

0

D205

UA

RT

1 V

cc

UA

RT

1R

X

UA

RT

1T

X

1 2

C301

1000uF

50V

1 2

C302

1000uF

50V

EN

ET

_R

XD

0

EN

ET

_R

XD

1

EN

ET

_R

XE

R

EN

ET

_R

EF

CLK

EN

ET

_M

DC

EN

ET

_M

DIO

Sw

1L

Sw

1H

Sw

2L

Sw

2H

2

4

1

3

5

J2

GNDDriver2

Test

PGate1

NGate2

Sw2L

Sw1H

PGate2

Sw2H

NGate1

Sw1L

58

D.3 Ethernet controller schematics

12

RE

SE

RV

ED

11

RE

SE

RV

ED

2T

X_E

N

3T

XD

_0

4T

XD

_1

5T

XD

_2

DP

83848C

1T

X_C

LK

6T

XD

_3/S

NI_

MO

DE

7P

WR

_D

OW

N/IN

T

8R

ES

ER

VE

D

10

RE

SE

RV

ED

9R

ES

ER

VE

D

24RBIAS

23PFBOUT

14RD +

15AGND

16TD -

17TD +

13RD -

18PFBIN1

19AGND

20RESERVED

22AVDD33

21RESERVED

25

25M

Hz_O

UT

26

LE

D_A

CT

/AN

_E

N

35

IOG

ND

34

X1

33

X2

32

IOV

DD

33

36

DG

ND

31

MD

C

30

MD

IO

29

RE

SE

T_N

27

LE

D_S

PE

ED

/AN

1

28

LE

D_LIN

K/A

N0

48 IOVDD33

47 IOGND

38 RX_CLK

39 RX_DV/MII_MODE

40 CRS/CRS_DV/LED_CFG

41 RX_ER/MDIX_EN

37 PFBIN2

42 COL/PHYAD0

43 RXD_0/PHYAD1

44 RXD_1/PHYAD2

46 RXD_3/PHYAD4

45 RXD_2/PHYAD3

U401

J1

J4

J5

J2

J3

J7

J8

J6

75Ω

75Ω

75Ω

75Ω

1000pF

/ 2

kV

TD

+1

TC

T2

TD

-3

RD

+4

RC

T5

RD

-6 8

G-

9G

+10

Y+

12

Y-

11

RJ45

U402

VE

TH

180

R410

180

R409

2k2

R408

2k2

R407

49.9

R411

BLM

L402

100nF

C407

100nF

C408

VE

TH

100nF

C401

BLM

L401

100nF

C404

12

C405 1

0uF

VE

TH

3V

3

100nF

C409

4k87

R415

VE

TH

2k2

R405

EN

ET

_T

XD

0

EN

ET

_T

XD

1

EN

ET

_T

XE

N

RS

T

EN

ET

_C

RS

EN

ET

_R

XD

0

EN

ET

_R

XD

1

EN

ET

_R

XE

R

EN

ET

_R

EF

CLK

EN

ET

_M

DC

EN

ET

_M

DIO

470

R404

470

R403

470

R402

470

R401

100nF

C406

10k

R406

VE

TH

E/D

1

OU

T3

VC

C4

GN

D2

U403

49.9

R412

49.9

R413

49.9

R414

100nF

C402

12

C403

10uF

FIL

E:

RE

VIS

ION

:

DR

AW

N B

Y:

PA

GE

OF

TIT

LE

Jorg

e Q

uero

l

MC

U C

ontr

olle

d D

C/D

C B

uck/B

oost C

onvert

er

TS

Lab IC

T K

TH

OF

59

Appendix E

Source code

These are the main source files of the implemented software. The rest of the code can bedownloaded from the SVN repository (https://repo0.svn.ict.kth.se/csd/smartgrid).

E.1 main.c

/∗∗ main . c∗∗ Created on : 14/12/2011∗ Author : Jorge Querol∗/

#include ” . . / LPC17xx . h”#include ” . . / adc/adc . h”#include ” . . / bang/bang . h”#include ” . . / c o n t r o l / c o n t r o l . h”

extern void SystemInit ( void ) ;

extern void comm init ( void ) ;extern void handle command ( ) ;

extern void welcomeMsg ( void ) ;extern void s e t e c h o ( void ) ;extern u i n t 8 t p r in t cha r ( const char ∗ charBuf ) ;

extern int UpdateChannel ;extern int Vout , Vin , I l ;int I r e f ;

int main ( void )

/∗ S t a r t l e d connected to P1.29 and P1.18 ∗/LPC GPIO1−>FIODIR |= 0x20040000 ;LPC GPIO1−>FIOSET |= (1 << 2 9 ) ;

61

LPC GPIO1−>FIOCLR |= (1 << 1 8 ) ;

SystemInit ( ) ; // l p c 1 7 6 8 s t a r t u p . c

GPIOInit ( ) ;TimerIn it ( ) ;Va lue In i t ( ) ;ADCInit ( ) ;

comm init ( ) ;// welcomeMsg ( ) ;

s e t e c h o ( ) ;

while (1 )

handle command ( ) ;i f ( UpdateChannel >= 3)

UpdateChannel = −1;ADCRead( 0 ) ;Vout = ADCValues ( 0 ) ;Vin = ADCValues ( 1 ) ;I r e f = ADCValues ( 2 ) ;I l = ADCValues (3 ) − I r e f ;MeanValues ( ) ;BangBang ( ) ;LPC GPIO1−>FIOPIN ˆ= (1 << 2 9 ) ;

return 0 ;

62

E.2 control.c

/∗∗ c o n t r o l . cimax 6∗∗∗ Created on : 08/03/2012∗ Author : Jorge Querol∗/

#include ” . . / LPC17xx . h”#include ” . . / bang/bang . h”#include ” . . / c o n t r o l / c o n t r o l . h”

#ifde f ShowPer iod ica l ly#include ” . . / comm/comm. h”#endif

int Vref , Imax , Vmax;int Vout , Vin , I l ;int Vo , Vi , Io , I i ;int i , Vom, Vim, Iom , Iim ;

extern int ADC[ 4 ] ;extern s t a t e t CurrentState ;

void Value In i t ( void )

Vref = 0 ;Imax = ( int ) ( I IMAX ∗ 4095 ∗ 0 . 151 ) /(Vdd ∗ 2 ) ;Vmax = ( int ) (I VMAX ∗ 4095 ∗ 3) /(Vdd ∗ 2 8 ) ;Vo = 0 ;Vi = 0 ;Io = 0 ;I i = 0 ;i = 1 ;Vom = 0 ;Vim = 0 ;Iom = 0 ;Iim = 0 ;

void BangBang( void )

i f ( Vref > 0)

/∗ Safe maximum v o l t a g e l i m i t a t i o n( i t uses c o n f i g u r a t i o n number4 ) ∗/i f ( Vout > Vmax)

63

SetState (DISCHARGE) ;/∗ Current l i m i t a t i o n ∗/else i f ( I l > Imax )

/∗ I f output i s over input i t ’ s p o s s i b l e tol i m i t the curren t wi th s t a t e 2 ∗/i f ( Vout > Vin )

SetState (BOOST OFF) ;/∗ e l s e i t must be l i m i t e d wi th s t a t e 1 ∗/else

SetState (BUCK OFF) ;else

/∗ Boost s i n g l e c o n v e r t e r ∗/// i f ( oper a t in gzo ne ( Vin , Vref , Vout ) )

i f ( Vref > Vin )

/∗ OFF mode ( s t a t e 2 f o r b o o s t c o n v e r t e r ) ∗/i f ( Vout > Vref )

i f ( I l > 10)SetState (BOOST OFF) ;

elseSetState (BOOST SOFT) ;

/∗ ON mode ( s t a t e 3 f o r b o o s t c o n v e r t e r ) ∗/else

SetState (BOOST ON) ;/∗ Buck s i n g l e c o n v e r t e r ∗/else

/∗ OFF mode ( s t a t e 1 f o r buck c o n v e r t e r ) ∗/i f ( Vout > Vref )

i f ( I l > 10)SetState (BUCK OFF) ;

elseSetState (BUCK SOFT) ;

/∗ ON mode ( s t a t e 2 f o r buck c o n v e r t e r ) ∗/else

SetState (BUCK ON) ;

else

SetState (ALL OFF ) ;

64

void MeanValues ( void )

f loat aux ;

i ++;Vom += Vout ;Vim += Vin ;i f ( (LPC GPIO2−>FIOPIN & 0x0008 ) | | ( CurrentState == BOOST SOFT) )

Iom += I l ;i f (LPC GPIO2−>FIOPIN & 0x0002 )

Iim += I l ;

i f ( ( i % 100000) == 0)

Vo = Vom / 100000;Vi = Vim / 100000;Io = Iom / 100000;I i = Iim / 100000;Vom = 0 ;Vim = 0 ;Iom = 0 ;Iim = 0 ;

#ifde f ShowPer iod ica l ly

i f ( i >= 100000)

i = 1 ;p r i n t ( ”\ r \n Vo : ” ) ;aux = (Vo ∗ Vdd ∗ 28) / (4095 ∗ 3 ) ;p r i n t f l o a t (&aux ) ;p r i n t ( ” Vin : ” ) ;aux = ( Vi ∗ Vdd ∗ 28) / (4095 ∗ 3 ) ;p r i n t f l o a t (&aux ) ;p r i n t ( ” Io : ” ) ;aux = ( Io ∗ Vdd ∗ 2) / (4095 ∗ 0 . 1 5 1 ) ;p r i n t f l o a t (&aux ) ;p r i n t ( ” I i : ” ) ;aux = ( I i ∗ Vdd ∗ 2) / (4095 ∗ 0 . 1 5 1 ) ;p r i n t f l o a t (&aux ) ;

#endif

65

E.3 bang.c

/∗∗ bang . c∗∗ Created on : 14/12/2011∗ Author : Jorge Querol∗/

#include ” . . / LPC17xx . h”#include ” . . / bang/bang . h”

s t a t e t CurrentState ;

void GPIOInit ( void )

LPC PINCON−>PINSEL4 &= ˜0x0000000FF ;// Set GPIO c o n t r o l as d i g i t a l o u t p u t sLPC GPIO2−>FIODIRL |= 0x000F ;// Set P2 . 0 , P2 . 1 , P2 . 2 , P2 .3 as o u t p u t sLPC GPIO2−>FIOPINL &= ˜0x000F ;// Set OFF a l l Buck and Boost s w i t c h e sCurrentState = ALL OFF;

void TimerIn it ( void )

LPC SC−>PCONP |= (1 << 1 6 ) ;// Set up Power f o r RITLPC SC−>PCLKSEL1 |= (1 << 2 6 ) ;// P e r i p h e r a l Clock EnabledLPC RIT−>RICTRL &= ˜0x0C ;// D i s a b l e R e p e t i t i v e I n t e r r u p t Timer (RIT)LPC RIT−>RICTRL |= 0x01 ;// Clear R e p e t i t i v e I n t e r r u p t Timer (RIT)NVIC EnableIRQ (RIT IRQn ) ;NVIC SetPrior ity (RIT IRQn , 1 ) ;

void RIT IRQHandler ( void )

LPC RIT−>RICTRL &= ˜0x08 ;// D i s a b l e R e p e t i t i v e I n t e r r u p t Timer (RIT)

// Shoot−through & Reserve curren t p r o t e c t i o ni f ( CurrentState == BUCK OFF)// Buck L ON Buck H OFF − Boost L OFF Boost H ON

LPC GPIO2−>FIOSETL = 0x0009 ;

66

LPC RIT−>RICTRL |= 0x09 ;// Enable and c l e a r i n t e r r u p tLPC RIT−>RICOMPVAL = LPC RIT−>RICOUNTER + 700 ;// 8 us d e l a y (100 c y c l e s +)CurrentState = BUCK SOFT;

else i f ( CurrentState == BUCK SOFT)

// Buck L OFF Buck H OFF − Boost L OFF Boost H ON

LPC GPIO2−>FIOCLRL = 0x0001 ;LPC GPIO2−>FIOSETL = 0x0008 ;

else i f ( CurrentState == BUCK ON)

// Buck L OFF Buck H ON − Boost L OFF Boost H ONLPC GPIO2−>FIOSETL = 0x000A ;

else i f ( CurrentState == BOOST OFF)// Buck L OFF Buck H ON − Boost L OFF Boost H ON

LPC GPIO2−>FIOSETL = 0x000A ;LPC RIT−>RICTRL |= 0x09 ;// Enable and c l e a r i n t e r r u p tLPC RIT−>RICOMPVAL = LPC RIT−>RICOUNTER + 700 ;// 8 us d e l a y (100 c y c l e s +)CurrentState = BOOST SOFT;

else i f ( CurrentState == BOOST SOFT)// Buck L OFF Buck H ON − Boost L OFF Boost H OFF

LPC GPIO2−>FIOCLRL = 0x0008 ;LPC GPIO2−>FIOSETL = 0x0002 ;

else i f ( CurrentState == BOOST ON)

// Buck L OFF Buck H ON − Boost L ON Boost H OFFLPC GPIO2−>FIOSETL = 0x0006 ;

else i f ( CurrentState == DISCHARGE)// Buck L ON Buck H OFF − Boost L ON Boost H OFFLPC GPIO2−>FIOSETL = 0x0005 ;

void SetState ( s t a t e t s t a t e )

i f ( s t a t e == BUCK OFF)// Buck L ON Buck H OFF − Boost L OFF Boost H ON

i f (LPC GPIO2−>FIOPINL & 0x0002 )LPC GPIO2−>FIOCLRL = 0x0002 ;

elseLPC GPIO2−>FIOSETL = 0x0001 ;

67

i f (LPC GPIO2−>FIOPINL & 0x0004 )LPC GPIO2−>FIOCLRL = 0x0004 ;

elseLPC GPIO2−>FIOSETL = 0x0008 ;

else i f ( s t a t e == BUCK SOFT)// Buck L OFF Buck H OFF − Boost L OFF Boost H ON

i f (LPC GPIO2−>FIOPINL & 0x0001 )LPC GPIO2−>FIOCLRL = 0x0001 ;

i f (LPC GPIO2−>FIOPINL & 0x0002 )LPC GPIO2−>FIOCLRL = 0x0002 ;

i f (LPC GPIO2−>FIOPINL & 0x0004 )LPC GPIO2−>FIOCLRL = 0x0004 ;

elseLPC GPIO2−>FIOSETL = 0x0008 ;

else i f ( ( s t a t e == BUCK ON) | | ( s t a t e == BOOST OFF) )// Buck L OFF Buck H ON − Boost L OFF Boost H ON

i f (LPC GPIO2−>FIOPINL & 0x0001 )LPC GPIO2−>FIOCLRL = 0x0001 ;

elseLPC GPIO2−>FIOSETL = 0x0002 ;

i f (LPC GPIO2−>FIOPINL & 0x00004 )LPC GPIO2−>FIOCLRL = 0x0004 ;

elseLPC GPIO2−>FIOSETL = 0x0008 ;

else i f ( s t a t e == BOOST SOFT)// Buck L OFF Buck H ON − Boost L OFF Boost H OFF

i f (LPC GPIO2−>FIOPINL & 0x0001 )LPC GPIO2−>FIOCLRL = 0x0001 ;

elseLPC GPIO2−>FIOSETL = 0x0002 ;

i f (LPC GPIO2−>FIOPINL & 0x0004 )LPC GPIO2−>FIOCLRL = 0x0004 ;

i f (LPC GPIO2−>FIOPINL & 0x0008 )LPC GPIO2−>FIOCLRL = 0x0008 ;

else i f ( s t a t e == BOOST ON)// Buck L OFF Buck H ON − Boost L ON Boost H OFF

68

i f (LPC GPIO2−>FIOPINL & 0x0001 )LPC GPIO2−>FIOCLRL = 0x0001 ;

elseLPC GPIO2−>FIOSETL = 0x0002 ;

i f (LPC GPIO2−>FIOPINL & 0x0008 )LPC GPIO2−>FIOCLRL = 0x0008 ;

elseLPC GPIO2−>FIOSETL = 0x0004 ;

else i f ( s t a t e == DISCHARGE)// Buck L ON Buck H OFF − Boost L ON Boost H OFF

i f (LPC GPIO2−>FIOPINL & 0x0002 )LPC GPIO2−>FIOCLRL = 0x0002 ;

elseLPC GPIO2−>FIOSETL = 0x0001 ;

i f (LPC GPIO2−>FIOPINL & 0x0008 )LPC GPIO2−>FIOCLRL = 0x0008 ;

elseLPC GPIO2−>FIOSETL = 0x0004 ;

else i f ( s t a t e == ALL OFF)// Buck L OFF Buck H OFF − Boost L OFF Boost H OFF

LPC GPIO2−>FIOCLRL = 0x000F ;

i f ( s t a t e != CurrentState )

LPC RIT−>RICTRL |= 0x09 ;// Enable and c l e a r i n t e r r u p tLPC RIT−>RICOMPVAL = LPC RIT−>RICOUNTER + 100 ;// 2 us d e l a y (100 c y c l e s +)CurrentState = s t a t e ;

69

E.4 adc.c

/∗∗ adc . c∗∗ Created on : 21/02/2012∗ Author : Jorge Querol∗/

#include ” . . / LPC17xx . h”#include ” . . / adc/adc . h”

int ADC[ ADCChannels ] ;int UpdateChannel ;

int pos [ ADCChannels ] ;int g l i t c h e s [ ADCChannels ] ;int Buf f e r [ 2 ] [ G l i t chBu f f e r ] [ ADCChannels ] ;

void ADCvaluesInit ( void ) ;

void ADCInit ( void )

LPC PINCON−>PINSEL1 |= 0x00154000 ;// S e l e c t ADC f u n c t i o n f o r p ins (ADC0−3)LPC PINCON−>PINSEL3 |= 0xF0000000 ;// S e l e c t ADC f u n c t i o n f o r p ins (ADC4−5)LPC PINCON−>PINMODE1 |= 0x0002A8000 ;// Nei ther p u l l−up nor p u l l−down r e s i s t o rLPC PINCON−>PINMODE3 |= 0xA00000000 ;// Nei ther p u l l−up nor p u l l−down r e s i s t o rLPC SC−>PCONP |= (1 << 1 2 ) ;// Set up b i t PCADCLPC SC−>PCLKSEL0 |= (01 << 2 4 ) ;// PCLK = CCLK (102 MHz)/∗ 7−0 SEL∗ 15−8 CLKDIV = 7 (12.25 MHz)∗ 15−8 CLKDIV = 3 (25 .5 MHz)∗ 16 BURST s o f t w a r e∗ 21 PDN on (ADC on )∗/

LPC ADC−>ADCR |= 0x00200300 ;LPC ADC−>ADINTEN = 0x00000100 ;// ADC I n t e r r u p t EnabledNVIC EnableIRQ (ADC IRQn ) ;NVIC SetPrior ity (ADC IRQn, 2 ) ;ADCvaluesInit ( ) ;// I n i t ADC g l i t c h f i l t e rUpdateChannel = −1;

70

ADCRead( 0 ) ;// S t a r t f i r s t convers ion

void ADCRead(unsigned char ADC)

LPC ADC−>ADCR &= ˜(0 x000000FF ) ;// Remove ADC s e l e c t e dLPC ADC−>ADCR |= (1 << ADC) ;// S e l e c t ADCLPC ADC−>ADCR |= (1 << 2 4 ) ;// S t a r t convers ion

void ADC IRQHandler ( void )

int Channel ;Channel = (LPC ADC−>ADGDR >> 24) & 0x00000007 ;ADC[ Channel ] = (LPC ADC−>ADGDR >> 4) & 0x00000FFF ;UpdateChannel = Channel ;Channel++;i f ( Channel < ADCChannels )

ADCRead( Channel ) ;else

LPC GPIO1−>FIOPIN ˆ= (1 << 2 9 ) ;//ADCRead( 0 ) ;/∗∗/

void ADCvaluesInit ( void )

int i , j , k ;for ( i =0; i <2; i++)

for ( j =0; j<Gl i t chBu f f e r ; j++)

for ( k=0; k<ADCChannels ; k++)

Buf f e r [ i ] [ j ] [ k ]=0;

for ( i =0; i<ADCChannels ; i++)

pos [ i ] = 0 ;g l i t c h e s [ i ] = 0 ;

71

int ADCValues ( int Channel )#ifde f PREFILTER

stat ic int i , match ;#endif

stat ic int sample ;sample = ADC[ Channel ] ;

#ifde f PREFILTERmatch = 0 ;

while ( ( ( sample − Buf f e r [ 0 ] [ pos [ Channel ] ] [ Channel ] ) > ( Gl itchHyst ) ) | |( ( Buf f e r [ 0 ] [ pos [ Channel ] ] [ Channel ] − sample ) > ( Gl itchHyst ) ) )

pos [ Channel ]++;i f ( pos [ Channel ] >= Gl i t chBu f f e r )

pos [ Channel ] = 0 ;match++;i f ( match >= Gl i t chBu f f e r )

break ;

i f ( match >= Gl i t chBu f f e r )// P o s s i b l e g l i t c h d e t e c t e d

g l i t c h e s [ Channel ]++;i f ( g l i t c h e s [ Channel ] > Gl i t chBu f f e r )// Previous samples maybe were not g l i t c h e s

for ( i =0; i<Gl i t chBu f f e r ; i++)Buf f e r [ 0 ] [ i ] [ Channel ] = Buf f e r [ 1 ] [ i ] [ Channel ] ;

g l i t c h e s [ Channel ] = 0 ;else// Store s u s p i c i o u s samples

Buf f e r [ 1 ] [ g l i t c h e s [ Channel ] −1 ] [ Channel ] = sample ;sample = 0 ;for ( i =0; i<Gl i t chBu f f e r ; i++)

sample += Buf f e r [ 0 ] [ i ] [ Channel ] ;sample /= Gl i t chBu f f e r ;

else

g l i t c h e s [ Channel ] = 0 ;pos [ Channel ]−−;i f ( pos [ Channel ] < 0)

72

pos [ Channel ] = Gl i t chBu f f e r − 1 ;Buf f e r [ 0 ] [ pos [ Channel ] ] [ Channel ] = sample ;

#endif

return ( sample ) ;

73