Mathematical Modeling Approach for the FAB Design Process...
Transcript of Mathematical Modeling Approach for the FAB Design Process...
1
Mathematical Modeling Approach for the FAB Design
Process in Semiconductor Manufacturing
Gwangjae Yu
Junghoon Kim
Young Jae Jang
Dept. of Industrial and Systems Eng.
KAIST
2
1. Research Motivation
• Two current practice- Trial & error by human experience Optimality not guaranteed- Decision by the consensus of the different field-experts Significant time & effort needed
Layout designer Simulation expert
Product engineer Facility manager
2. Tool allocation
3. Simulation Test
1. Bay layout design
4. Finallayout design
ManyIterations
Trial & error
Trial & error
• Each Trial & Error requires consensus• Very difficult to reach on consensus
Trial & error Over 3 months!
Copyright © Young Jae JANG
3
1. Research Motivation
• Two current practice- Trial & error by human experience Optimality not guaranteed- Decision by the consensus of the different field-experts Significant time & effort needed
• New practice- Analytical method by optimization theory Optimality or sub-optimality
guaranteed- Decision by the math and computer technology Significant time & effort saved
+
Over 3 months! Total less than a few hours!
Copyright © Young Jae JANG
4
2. Research
• Introducing the 2 STEP fab layout design procedure
STEP 1 : Designing the optimal bay layout (process level design)
STEP 2 : Allocating the tools (tool level design)
<STEP 1> <STEP 2>
Copyright © Young Jae JANG
5
3. Research Objective
• How to find a better layout design?- in terms of certain decision criteria
• What does it mean by better?- Several criteria considering the material handling (distance, time, cost, congestion, etc.)
• Our objective- Find a layout design with the minimum material flow distance
Copyright © Young Jae JANG
6
4. Research Idea
• Semiconductor manufacturing process- Repetitive process, thus re-enters the same bays and tools many times
• Major issue in the bay layout design process- Wrong bay layout can cause an inefficient material handling (in terms of time, distance, cost, etc.)
EX) Process flow: DRY
<Bad>
Ex) Comparison of the material handling efficiency of the 2 different bay design of 2X2 layout
WET PHO IMP DRY
DRY PHO
IMP WET
AMHS
<Good>
DRY WET
IMP PHO
AMHS2 cycles 1 cycle
Copyright © Young Jae JANG
7
4. Research Idea
• Semiconductor manufacturing process- Repetitive process, thus re-enters the same bays and tools many times
• Major issue in the tool allocation process- Wrong tool allocation can cause an inefficient material handling (in terms of time, distance, cost, etc.)
Ex) Comparison of the material handling efficiency by the 2 different tool allocation scenario
Assuming that the bay layout design is in optimal
EX) Material flow: T001 T002 T003 T004 T005
<Bad>
DRY WET
WET PHO
AMHS
<Good>
DRY WET
WET PHO
AMHS
T001 T002
T005
T003
T004
T002
T003
T001
T005 T004
1.75 cycles 0.75 cycles
Copyright © Young Jae JANG
8
Case Study
<Settings>
• 4 product types
• 18 bay locations (in rectangular space)
• One directional loop with shortcuts
• 212 tool choices (8 types : PVD, CVD, PHO, WET, DIF, DRY, CMP, IMP)
• Around 300 steps per each product type
• Production plan (40,000 wfr/month 10,000 wfr/wk)
Product-ID Plan (wfr/wk)
Prod A 1,000
Prod B 4,500
Prod C 1,000
Prod D 3,500
Total 10,000
<Weekly production plan data (Time 1)>
Copyright © Young Jae JANG
1 4 5 8 9 12 13 16
AMHS
2 3 6 7 10 11 14 15
1) Bay layout2) Tool allocation
MathematicalModeling
17
18
<Basic layout format>
9
STEP 1Optimal Bay Layout Design
Copyright © Young Jae JANG
10
STEP 1: Optimal Bay Layout Design Using the Flow Matrix
• Flow matrix (From-To chart) is a step to step process transition matrixthat demonstrates the manufacturing steps.
Copyright © Young Jae JANG
<Monthly From-To frequency among the process types (40,000 wafers/month)>
11
STEP 1: Optimal Bay Layout Design Using the Flow Matrix
• Objective- minimize the total travel distance of the wafer flow
• Constraints
1. all the tools must be allocated based on the space capacity of each bay2. Conservation of the material flow3. bays of the same process types are located next to each other
Copyright © Young Jae JANG
Model 1: Bay layout design model (MIP)
12
AMHS
STEP 1: Optimal Bay Layout Design Using the Flow Matrix
• Constraints1. All the tools must be allocated based on the space capacity of each bay2. Conservation of the material flow3. Bays of the same process types are located next to each other
WET𝑻𝒐𝒐𝒍𝑾𝑬𝑻:
𝑻𝒐𝒐𝒍𝑫𝑹𝒀:
WET WET WET
DRY DRY
𝑻𝒐𝒐𝒍𝑫𝑰𝑭: DIF
7 Tools to be allocated4 WET, 2 DRY, 1 DIF(1 unit space each)
3 bays of 4 unit spaces each
Bay 1 Bay 2 Bay 3
IN & OUT4 unit (by 4 tools)
Material flow occurs
IN & OUT3 unit (by 3 tools)
Material flow occurs
NO IN & OUT0 unit (by 0 tools)
Material flow occurs
Copyright © Young Jae JANG
To
13
AMHS
STEP 1: Optimal Bay Layout Design Using the Flow Matrix
• Constraints1. All the tools must be allocated based on the space capacity of each bay2. Conservation of the material flow3. Bays of the same process types are located next to each other
Bay 1 Bay 2 Bay 3
If IN flow = 100Bay 4 Bay 5 Bay 6
OUT flow = 100IN = OUT
100 100=
Copyright © Young Jae JANG
14
AMHS
STEP 1: Optimal Bay Layout Design Using the Flow Matrix
• Constraints1. All the tools must be allocated by the space capacity of the bay2. Conservation of the material flow3. Bays of the same process types are located next to each other
DRY DRY WET DIF …
DRY WET WET DIF ...
*If 3 DRY, 3 WET, and 2 DIF bays are required,
Copyright © Young Jae JANG
Bypass bridge
15
Result: Bay Layout Design
<18-bay layout design, specifying the process types for each bay>
Copyright © Young Jae JANG
Bay 1
DRY DRY
AMHS: IMHS (Inter-bay Material Handling System)
Bay 4
DRY DRY
Bay 5
DRY DRY
Bay 8
IMP IMP
Bay 9
WET WET
Bay 12
WET WET
Bay 13
WET DIF
Bay 16
CMP CVD
Bay 17
CVD CVD
DRY DRY
Bay 2
DRY DRY
Bay 3
DRY PHO
Bay 6
PHO IMP
Bay 7
WET WET
Bay 10
WET WET
Bay 11
DIF DIF
Bay 14
CMP PVD
Bay 15
CVD CVD
Bay 18
: Stocker : Intra-bay Material Handling System
16
STEP 2Optimal Tool Allocation
Copyright © Young Jae JANG
17
STEP 2: Optimal Tool Allocation Using the Mfg. Step Sequence
• Manufacturing step sequence is a very specific process flow informationthat demonstrates the manufacturing system in the tool level. (recipe sequence)
<Actual mfg. step sequences>
Copyright © Young Jae JANG
Total around 300 steps !!
<Recipe sequence data sample of product type A>
18
STEP 2: Optimal Tool Allocation Using the Mfg. Step Sequence
• Objective- Minimize the travel distance of the wafer flows
• Constraints1. Conservation of step to step material flow2. Tool capacity of one bay ≥ flow in that bay3. Tools are assigned by the bay space capacity
Copyright © Young Jae JANG
Model 2: Tool allocation model (MIP)
19
STEP 2: Optimal Tool Allocation Using the Mfg. Step Sequence
• Constraints
1. Conservation of step to step material flow2. Tool capacity of one bay ≥ flow in that bay3. Tools are assigned based on the bay space capacity
AMHS
STEP1 STEP3 STEP3
STEP2 STEP4 STEP4
EX) If 4 step process of hourly production rate 100,1 2 3 4
100 30
70 3010 60
𝑓𝑙𝑜𝑤𝑠𝑡𝑒𝑝1 = 𝑓𝑙𝑜𝑤𝑠𝑡𝑒𝑝2= 𝑓𝑙𝑜𝑤𝑠𝑡𝑒𝑝3= ⋯ = 𝑓𝑙𝑜𝑤𝑠𝑡𝑒𝑝 𝑛
Copyright © Young Jae JANG
20
STEP 2: Optimal Tool Allocation Using the Mfg. Step Sequence
• Constraints
1. Conservation of step to step material flow2. Tool capacity of one bay ≥ flow in that bay3. Tools are assigned based on the bay space capacity
1𝑪𝑽𝑫𝟏:
𝑪𝑽𝑫𝟐:
1 1 1
2 2
𝑪𝑽𝑫𝟑: 3
<Pre-determined tool plan>
Bay 1 (CVD) Bay 2,3,4,⋯
STEP1: 100
: Each capa 15 for step 1
: Each capa 20 for step 1
: Each capa 50 for step 1
15 + 2*20 + 50 = 105 ≥ 100
Total tool capacity ≥ req. production (step 1)
Copyright © Young Jae JANG
21
STEP 2: Optimal Tool Allocation Using the Mfg. Step Sequence
• Constraints
1. Step to step material flow is conserved2. Tool capacity of one bay ≥ flow in that bay3. Tools are assigned based on the bay space capacity
1𝑪𝑽𝑫𝟏:
𝑪𝑽𝑫𝟐:
1 1 1
2 2
𝑪𝑽𝑫𝟑: 3
<Pre-determined tool plan with 2 bays with 4 slots each>
Bay 1 (CVD) Bay 2 (CVD)
Copyright © Young Jae JANG
22
Result: Optimal Tool Allocation
Copyright © Young Jae JANG
<Tool allocation result for 18-bay layout (sample data)>
23
Analysis of the layout designSimulation
Copyright © Young Jae JANG
24
Simulation of the FAB Layout
Copyright © Young Jae JANG
<FAB layout>
< Simulation >
< From/To matrix >
0
20
40
60
80
100
0
20
40
60
80
100
120
140
30
90
15
0
21
0
27
0
33
0
39
0
45
0
51
0
57
0
63
0
69
0
75
0
81
0
87
0
93
0
The
nu
mb
er o
f m
ove
s
Delivery time (sec.)
Cu
mu
lati
ve (
%)
< Determination of number of OHTs in AMHS>
25
Simulation Model
Copyright © Young Jae JANG
26
Comparison of the resultant layout design performance
• Returning to our original purpose of study,
Q. “Would the analytical approach result a better performance over current practice of trial & error approach?”
• We compared 3 different layout designs1) Layout design from the analytical model2) Layout design by trial & error method referring a technical report,
SEMATECH 300mm Factory Layout and Material Handling Modeling: Phase II Report3) Layout design by trial & error method referring a journal paper,
Chen, J. C., Dai, R. D., & Chen, C. W. (2008). A practical fab design procedure for wafer fabrication plants. International Journal of Production Research, 46(10), 2565-2588
• Performance measure- Transport time- Waiting time- Average OHT-util.- Average WIP in the STKs
Copyright © Young Jae JANG
27
Analysis Result
Copyright © Young Jae JANG
<Comparison Result of the simulation test for 3 different layout designs>
PerformanceCriteria
LayoutDesigns
Transport time Waiting timeAverageOHT-util.
Average WIP in the STKs
Optimalby our method
55.41 sec 271.15 sec 50.03 % 4.35 lots
Reference 1(SEMATECH)
65.17 sec 297.93 sec 56.26 % 4.57 lots
Reference 2(Journal Paper)
64.68 sec 291.88 sec 54.87 % 4.40 lots
About 14~15% decrease in transportation time, 7~9 % decrease in waiting time,5~6% decrease in avg. OHT utilization, 1~5% decrease in avg. WIP.
28
Conclusion
Copyright © Young Jae JANG
• Analytical approach with mathematical modeling can be an effective way in layout design process of a semiconductor FAB.
• The resultant layout can be used as an initial layout of a good quality to start minor changes using trial & error method by the experience of the experts.
• Finally, it can reduce a significant amount of time that more time can be spent on testing different designs and decision making process for final decision.