Low Noise Amplifier, 0.01 GHz to 10 GHz Data Sheet ... · Low Noise Amplifier, 0.01 GHz to 10 GHz...

Low Noise Amplifier, 0.01 GHz to 10 GHz

Data Sheet HMC8411LP2FE

Rev. A Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 ©2019 Analog Devices, Inc. All rights reserved. Technical Support www.analog.com

FEATURES Low noise figure: 1.7 dB typical Single positive supply (self biased) High gain: 15.5 dB typical High OIP3: 34 dBm typical 6-lead, 2 mm × 2 mm LFCSP

APPLICATIONS Test instrumentation Military communications

FUNCTIONAL BLOCK DIAGRAM

2

1

3

6

5

4NC

RFIN

RBIAS

NC

RFOUT/VDD

GND

HMC8411LP2FETOP VIEW

(Not to Scale)

1585

9-00

1

Figure 1.

GENERAL DESCRIPTION The HMC8411LP2FE is a gallium arsenide (GaAs), monolithic microwave integrated circuit (MMIC), pseudomorphic high electron mobility transistor (pHEMT), low noise wideband amplifier that operates from 0.01 GHz to 10 GHz.

The HMC8411LP2FE provides a typical gain of 15.5 dB, a 1.7 dB typical noise figure, and a typical output third-order intercept (OIP3) of 34 dBm, requiring only 55 mA from a 5 V supply voltage. The saturated output power (PSAT) of 19.5 dBm typical enables the low noise amplifier (LNA) to function as a local oscillator (LO) driver for many of Analog Devices, Inc., balanced, in-phase/quadrature (I/Q), or image rejection mixers.

The HMC8411LP2FE also features inputs and outputs that are internally matched to 50 Ω, making the device ideal for surface-mounted technology (SMT)-based, high capacity microwave radio applications.

The HMC8411LP2FE is housed in a RoHS-compliant, 2 mm × 2 mm, 6-lead LFCSP.

Multifunction pin names may be referenced by their relevant function only.

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HMC8411LP2FE Data Sheet

Rev. A | of 23

TABLE OF CONTENTS Features .............................................................................................. 1 Applications ....................................................................................... 1 Functional Block Diagram .............................................................. 1 General Description ......................................................................... 1 Revision History ............................................................................... 2 Specifications ..................................................................................... 3

0.01 GHz to 1 GHz Frequency Range ........................................ 3 1 GHz to 6 GHz Frequency Range ............................................. 3 6 GHz to 10 GHz Frequency Range ........................................... 4

Absolute Maximum Ratings ............................................................ 5 Thermal Resistance ...................................................................... 5 ESD Caution .................................................................................. 5

Pin Configuration and Function Descriptions ..............................6 Interface Schematics .....................................................................6

Typical Performance Characteristics ..............................................7 Theory of Operation ...................................................................... 18 Applications Information .............................................................. 19

Recommended Bias Sequencing .............................................. 19 Typical Application Circuit ....................................................... 20

Evaluation Board ............................................................................ 21 Outline Dimensions ....................................................................... 23

Ordering Guide .......................................................................... 23

REVISION HISTORY 5/2019—Rev. 0 to Rev. A Changes to Table 3 ............................................................................ 4 Changes to Theory of Operation Section .................................... 18

3/2019—Revision 0: Initial Version



Rev. A | of 23

SPECIFICATIONS 0.01 GHz TO 1 GHz FREQUENCY RANGE VDD = 5 V, supply current (IDQ) = 55 mA, and TA = 25°C, unless otherwise noted.

Table 1. Parameter Symbol Min Typ Max Unit Test Conditions/Comments FREQUENCY RANGE 0.01 1 GHz GAIN 12.5 15.5 dB

Gain Variation over Temperature 0.005 dB/°C NOISE FIGURE 1.8 dB RETURN LOSS

Input 22 dB Output 17 dB

OUTPUT Output Power for 1 dB Compression P1dB 17 20 dBm Saturated Output Power PSAT 20.5 dBm Output Third-Order Intercept OIP3 33.5 dBm Measurement taken at output power (POUT) per

tone = 6 dBm Output Second-Order Intercept OIP2 43 dBm Measurement taken at POUT per tone one = 6 dBm

POWER ADDED EFFICIENCY PAE 30 % Measured at PSAT SUPPLY CURRENT IDQ 55 mA SUPPLY VOLTAGE VDD 2 5 6 V

1 GHz TO 6 GHz FREQUENCY RANGE VDD = 5 V, IDQ = 55 mA, and TA = 25°C, unless otherwise noted.

Table 2. Parameter Symbol Min Typ Max Unit Test Conditions/Comments FREQUENCY RANGE 1 6 GHz GAIN 12 15 dB

Gain Variation over Temperature 0.01 dB/°C NOISE FIGURE 1.7 dB RETURN LOSS


OUTPUT Output Power for 1 dB Compression P1dB 17 20 dBm Saturated Output Power PSAT 21 dBm Output Third-Order Intercept OIP3 34 dBm Measurement taken at POUT per tone = 6 dBm Output Second-Order Intercept OIP2 39 dBm Measurement taken at POUT per tone = 6 dBm




Rev. A | of 23

6 GHz TO 10 GHz FREQUENCY RANGE VDD = 5 V, IDQ = 55 mA, and TA = 25°C, unless otherwise noted.

Table 3. Parameter Symbol Min Typ Max Unit Test Conditions/Comments FREQUENCY RANGE 6 10 GHz GAIN 11 14 dB

Gain Variation over Temperature 0.018 dB/°C NOISE FIGURE 2 dB RETURN LOSS


OUTPUT Output Power for 1 dB Compression P1dB 13 16 dBm Saturated Output Power PSAT 19.5 dBm Output Third-Order Intercept OIP3 33 dBm Measurement taken at POUT per tone = 6 dBm Output Second-Order Intercept OIP2 40 dBm Measurement taken at POUT per tone = 6 dBm




Rev. A | of 23

ABSOLUTE MAXIMUM RATINGS Table 4. Parameter1 Rating Drain Bias Voltage (VDD) 7 V Radio Frequency Input (RFIN) Power 20 dBm Channel Temperature 175°C Continuous Power Dissipation (PDISS), T = 85°C

(Derate 12.2 mW/°C Above 85°C) 1.098 W

Storage Temperature Range −65°C to +150°C Operating Temperature Range −40°C to +85°C Peak Reflow Temperature Moisture

Sensitivity Level 1 (MSL1)2 260°C

Electrostatic Discharge (ESD) Sensitivity Human Body Model (HBM) 500 V,

Class 1B passed

1 When referring to a single function of a multifunction pin in the parameters, only the portion of the pin name that is relevant to the specification is listed. For full pin names of multifunction pins, refer to the Pin Configuration and Function Descriptions section.

2 See the Ordering Guide section for more information.

Stresses at or above those listed under Absolute Maximum Ratings may cause permanent damage to the product. This is a stress rating only; functional operation of the product at these or any other conditions above those indicated in the operational section of this specification is not implied. Operation beyond the maximum operating conditions for extended periods may affect product reliability.

THERMAL RESISTANCE Thermal performance is directly linked to printed circuit board (PCB) design and operating environment. Close attention to PCB thermal design is required.

θJC is the junction to case thermal resistance.

Table 5. Thermal Resistance Package Type θJC Unit CP-6-12 82 °C/W

ESD CAUTION



Rev. A | of 23

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS

2

1

3

6

5

4NC

RFIN

RBIAS

NC

RFOUT/VDD

GND

HMC8411LP2FETOP VIEW

(Not to Scale)

NOTES1. NC = NO CONNECT. THIS PIN IS NOT

CONNECTED INTERNALLY. THIS PIN MUST BECONNECTED TO THE RF AND DC GROUND.

2. EXPOSED PAD. THE EXPOSED PAD MUST BECONNECTED TO RF AND DC GROUND. 15

859-002

Figure 2. Pin Configuration

Table 6. Pin Function Descriptions Pin No. Mnemonic Description 1 RBIAS Current Mirror Bias Resistor Pin. Use this pin to set the current to the internal resistor by the external resistor. See

Figure 3 for the interface schematic. 2 RFIN RF Input (RFIN). This pin is ac-coupled and matched to 50 Ω. See Figure 4 for the interface schematic. 3, 4 NC No Connect. This pin is not connected internally. This pin must be connected to the RF and dc ground. 5 RFOUT/VDD RF Output (RFOUT). This pin is ac-coupled and matched to 50 Ω. See Figure 5 for the interface schematic. Drain Bias for the Amplifier (VDD). This pin is ac-coupled and matched to 50 Ω. See Figure 5 for the interface

schematic. 6 GND Ground. This pin must be connected to the RF and dc ground. See Figure 6 for the interface schematic. EPAD Exposed Pad. The exposed pad must be connected to RF and dc ground.

INTERFACE SCHEMATICS RBIAS

15859-006

Figure 3. RBIAS Interface Schematic

RFIN

15859-004

Figure 4. RFIN Interface Schematic

RFOUT/VDD

15859-005

Figure 5. RFOUT/VDD Interface Schematic

GND

15859-003

Figure 6. GND Interface Schematic



Rev. A | of 23

TYPICAL PERFORMANCE CHARACTERISTICS

0 200

RESP

ONS

E (d

B)

FREQUENCY (MHz)25 50 75 100 125 150 175

S11S21S22

20

–30

–20

–10

0

10

1585

9-00

7

Figure 7. Gain and Return Loss (Response) vs. Frequency, 10 MHz to 200 MHz,

VDD = 5 V, IDQ = 55 mA

18

4

GAI

N (d

B)

6

8

10

12

14

16

0 200FREQUENCY (MHz)

25 50 75 100 125 150 175

+85°C+25°C–40°C

1585

9-00

8

Figure 8. Gain vs. Frequency, 10 MHz to 200 MHz, for Various Temperatures,


18

4

GAI

N (d

B)

6

8

10

12

14

16

0 12FREQUENCY (GHz)

2 4 6 8 10

2V, IDD = 20mA3V, IDD = 32mA4V, IDD = 44mA5V, IDD = 55mA6V, IDD = 67mA

1585

9-00

9

Figure 9. Gain vs. Frequency for Various Supply Voltages and Currents (IDD),

RBIAS = 1.1 kΩ

20

–300 16

RESP

ONS

E (d

B)

–20

–10

0

10

S11S21S22

2 4 6 8 10 12 14FREQUENCY (GHz) 15

859-

010

Figure 10. Broadband Gain and Return Loss (Response) vs. Frequency,

200 MHz to 16 GHz, VDD = 5 V, IDQ = 55 mA

18

4

GAI

N (d

B)

6

8

10

12

14

16

0 122 4 6 8 10

+85°C+25°C–40°C

FREQUENCY (GHz) 1585

9-01

1

Figure 11. Gain vs. Frequency, 200 MHz to 12 GHz, for Various Temperatures,


18

4

GAI

N (d

B)

6

8

10

12

14

16

0 122 4 6 8 10

510Ω, IDQ = 75mA780Ω, IDQ = 65mA1.1kΩ, IDQ = 55mA1.8kΩ, IDQ = 45mA3.0kΩ, IDQ = 35mA


9-01

2

Figure 12. Gain vs. Frequency for Various Bias Resistor Values and IDQ,

VDD = 5 V



Rev. A | of 23

0

–25

INPU

T RE

TURN

LO

SS (d

B)

–20

–15

–10

–5


25 50 75 100 125 150 175

+85°C+25°C–40°C

1585

9-01

3

Figure 13. Input Return Loss vs. Frequency, 10 MHz to 200 MHz, for

Various Temperatures, VDD = 5 V, IDQ = 55 mA

0 122 4 6 8 10

0

–25

INPU

T RE

TURN

LO

SS (d

B)

–20

–15

–10

–5



9-01

4

Figure 14. Input Return Loss vs. Frequency for Various Supply Voltages and IDD,

RBIAS = 1.1 kΩ

0

–10

–5

–15

–20

OUT

PUT

RETU

RN L

OSS

(dB)


25 50 75 100 125 150 175

+85°C+25°C–40°C

1585

9-01

5

Figure 15. Output Return Loss vs. Frequency, 10 MHz to 200 MHz, for


0 122 4 6 8 10

0

–25

INPU

T RE

TURN

LO

SS (d

B)

–20

–15

–10

–5

+85°C+25°C–40°C


9-01

6

Figure 16. Input Return Loss vs. Frequency, 200 MHz to 12 GHz, for


0 122 4 6 8 10

0

–25

INPU

T RE

TURN

LO

SS (d

B)

–20

–15

–10

–5



9-01

7

Figure 17. Input Return Loss vs. Frequency for Various Bias Resistor Values and IDQ,

VDD = 5 V

0 12FREQUENCY (GHz)

2 4 6 8 10

0

–25

OUT

PUT

RETU

RN L

OSS

(dB)

–20

–15

–10

–5

+85°C+25°C–40°C

1585

9-01

8

Figure 18. Output Return Loss vs. Frequency, 200 MHz to 12 GHz, for




Rev. A | of 23

0 12FREQUENCY (GHz)

2 4 6 8 10

0

–25

OUT

PUT

RETU

RN L

OSS

(dB)

–20

–15

–10

–5


1585

9-01

9

Figure 19. Output Return Loss vs. Frequency for Various Supply Voltages and IDD, RBIAS = 1.1 kΩ

0

–35

REVE

RSE

ISO

LATI

ON

(dB)

+85°C+25°C–40°C

–30

–25

–20

–15

–10

–5


25 50 75 100 125 150 175

1585

9-02

0

Figure 20. Reverse Isolation vs. Frequency, 10 MHz to 200 MHz, for


0 12FREQUENCY (GHz)

2 4 6 8 10

0

–35

REVE

RSE

ISO

LATI

ON

(dB)

–30

–25

–20

–15

–10

–5


1585

9-02

1

Figure 21. Reverse Isolation vs. Frequency for Various Supply Voltages and IDD, RBIAS = 1.1 kΩ

0 12FREQUENCY (GHz)

2 4 6 8 10

0

–25

OUT

PUT

RETU

RN L

OSS

(dB)

–20

–15

–10

–5


1585

9-02

2

Figure 22. Output Return Loss vs. Frequency for Various Bias Resistor Values and IDQ, VDD = 5 V

0 12FREQUENCY (GHz)

2 4 6 8 10

0

–35

REVE

RSE

ISO

LATI

ON

(dB)

–30

–25

–20

–15

–10

–5

+85°C+25°C–40°C

1585

9-02

3

Figure 23. Reverse Isolation vs. Frequency, 200 MHz to 12 GHz, for


0 12FREQUENCY (GHz)

2 4 6 8 10

0

–35

REVE

RSE

ISO

LATI

ON

(dB)

–30

–25

–20

–15

–10

–5


1585

9-02

4

Figure 24. Reverse Isolation vs. Frequency for Various Bias Resistor Values and IDQ, VDD = 5 V



Rev. A | of 23

10

00 200

NOIS

E FI

GUR

E (d

B)

FREQUENCY (MHz)20 40 60 80 100 120 140 160 180

2

4

6

8

+85°C+25°C–40°C

1585

9-02

5

Figure 25. Noise Figure vs. Frequency, 10 MHz to 200 MHz, for


10

00 200

NOIS

E FI

GUR

E (d

B)

FREQUENCY (MHz)20 40 60 80 100 120 140 160 180

2

4

6

8


1585

9-02

6


Various Supply Voltages and IDD, RBIAS = 1.1 kΩ

10

00 200

NOIS

E FI

GUR

E (d

B)

20 40 60 80 100 120 140 160 180

2

4

6

8


FREQUENCY (MHz) 1585

9-02

7


Various Bias Resistor Values and IDQ, VDD = 5 V

6

0

NOIS

E FI

GUR

E (d

B)

1

2

3

4

5

0 12FREQUENCY (GHz)

2 4 6 8 10

+85°C+25°C–40°C

1585

9-02

8

Figure 28. Noise Figure vs. Frequency, 200 MHz to 12 GHz, for


6

0

NOIS

E FI

GUR

E (d

B)

1

2

3

4

5

0 12FREQUENCY (GHz)

2 4 6 8 10


1585

9-02

9



6

0

NOIS

E FI

GUR

E (d

B)

1

2

3

4

5

0 12FREQUENCY (GHz)

2 4 6 8 10


1585

9-03

0





Rev. A | of 23

0 1.0FREQUENCY (GHz)

0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9

24

4

P1dB

(dBm

)

8

12

16

20

+85°C+25°C–40°C

1585

9-03

1

Figure 31. P1dB vs. Frequency, 0.01 GHz to 1.0 GHz, for Various Temperatures,


28

00 1.0

FREQUENCY (GHz)0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9

4

8

12

16

20

24

P1dB

(dBm

)


1585

9-03

2

Figure 32. P1dB vs. Frequency, 0.01 GHz to 1.0 GHz, for


28

00 1.0

FREQUENCY (GHz)0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9

4

8

12

16

20

24

P1dB

(dBm

)


1585

9-03

3

Figure 33. P1dB vs. Frequency, 0.01 GHz to 1.0 GHz, for


0 2 4 6 8 10 12FREQUENCY (GHz)

24

4

P1dB

(dBm

)

8

12

16

20

+85°C+25°C–40°C

1585

9-03

4

Figure 34. P1dB vs. Frequency, 1 GHz to 12 GHz, for Various Temperatures,



28

0

4

8

12

16

20

24

P1dB

(dBm

)


1585

9-03

5

Figure 35. P1dB vs. Frequency, 1 GHz to 12 GHz, for



28

0

4

8

12

16

20

24

P1dB

(dBm

)


1585

9-03

6

Figure 36. P1dB vs. Frequency, 1 GHz to 12 GHz, for




Rev. A | of 23

24

40 1.0

FREQUENCY (GHz)

8

12

16

20

0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9

+85°C+25°C–40°C

P SAT

(dBm

)

1585

9-03

7

Figure 37. PSAT vs. Frequency, 0.01 GHz to 1.0 GHz, for Various Temperatures,


28

00 1.0

FREQUENCY (GHz)0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9

4

8

12

16

20

24

P SAT

(dBm

)


1585

9-03

8

Figure 38. PSAT vs. Frequency, 0.01 GHz to 1.0 GHz, for


28

00 1.0

FREQUENCY (GHz)0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9

4

8

12

16

20

24

P SAT

(dBm

)


1585

9-03

9

Figure 39. PSAT vs. Frequency, 0.01 GHz to 1.0 GHz, for



24

4

8

12

16

20

+85°C+25°C–40°C

P SAT

(dBm

)

1585

9-04

0

Figure 40. PSAT vs. Frequency, 1 GHz to 12 GHz, for Various Temperatures,



28

0

4

8

12

16

20

24


P SAT

(dBm

)

1585

9-04

1

Figure 41. PSAT vs. Frequency, 1 GHz to 12 GHz, for



28

0

4

8

12

16

20

24

P SAT

(dBm

)


1585

9-04

2

Figure 42. PSAT vs. Frequency, 1 GHz to 12 GHz, for




Rev. A | of 23

45

0

PAE

(%)

5

10

15

20

25

30

35

40


0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9

+85°C+25°C–40°C

1585

9-04

3

Figure 43. PAE vs. Frequency, 0.01 GHz to 1.0 GHz, for


36

30

24

18

12

6

0–10 18

P OUT

(dBm

), G

AIN

(dB)

, PAE

(%)

INPUT POWER (dBm)–6 –2 2 6 10 14

96

54

I DD

(mA)

61

68

75

82

89

POUTGAINPAEIDD

1585

9-04

4

Figure 44. POUT, Gain, PAE, and IDD vs. Input Power,

Power Compression at 1 GHz, VDD = 5 V, IDQ = 55 mA

30

0–10 18

P OUT

(dBm

), G

AIN

(dB)

, PAE

(%)


96

54

I DD

(mA)

61

68

75

82

89

POUTGAINPAEIDD

6

12

18

24

1585

9-04

5




45

0

PAE

(%)

5

10

15

20

25

30

35

40

+85°C+25°C–40°C

1585

9-04

6

Figure 46. PAE vs. Frequency, 1 GHz to 12 GHz, for


36

30

24

18

12

6

0–10 18

P OUT

(dBm

), G

AIN

(dB)

, PAE

(%)


96

54

I DD

(mA)

61

68

75

82

89

POUTGAINPAEIDD

1585

9-04

7



25

02 8

GAI

N (d

B), P

1dB

(dBm

), P S

AT (d

Bm)

SUPPLY VOLTAGE (V)

5

10

15

20

3 4 5 6 7

180

40

I DD

(mA)

60

80

100

120

140

160

GAINP1dBPSATIDD

1585

9-04

8

Figure 48. POUT, Gain, PAE, and IDD vs. Supply Voltage,

Power Compression at 1 GHz, RBIAS = 1.1 kΩ



Rev. A | of 23

25

02 8

GAI

N (d

B), P

1dB

(dBm

), P S

AT (d

Bm)

SUPPLY VOLTAGE (V)

5

10

15

20

3 4 5 6 7

180

40

I DD

(mA)

60

80

100

120

140

160

GAINP1dBPSATIDD

1585

9-04

9



0.6

0–10 18

POW

ER D

ISSI

PATI

ON

(W)

INPUT POWER (dBm)

10GHz5GHz1GHz

0.1

0.2

0.3

0.4

0.5

–6 –2 2 6 10 14

1585

9-05

0

Figure 50. Power Dissipation vs. Input Power at TA = 85°C,


40

100 1.0

OIP

3 (d

Bm)

FREQUENCY (GHz)

+85°C+25°C–40°C

15

20

25

30

35

0.2 0.4 0.6 0.8

1585

9-05

1

Figure 51. OIP3 vs. Frequency, 0.01 GHz to 1.0 GHz, for Various Temperatures,


25

02 8

GAI

N (d

B), P

1dB

(dBm

), P S

AT (d

Bm)

SUPPLY VOLTAGE (V)

5

10

15

20

3 4 5 6 7

180

40

I DD

(mA)

60

80

100

120

140

160

GAINP1dBPSATIDD

1585

9-05

2



75

00 8

IM3

(dBc

)

POUT PER TONE (dBm)

15

30

45

60

1 2 3 4 5 6 7

10GHz5GHz1GHz

1585

9-05

3

Figure 53. IM3 vs. POUT per Tone for Various Frequencies,


0 122 4 6 8 10

40

10

OIP

3 (d

Bm)

+85°C+25°C–40°C

15

20

25

30

35


9-05

4

Figure 54. OIP3 vs. Frequency, 1 GHz to 12 GHz, for Various Temperatures,




Rev. A | of 23

42

00 1.0

OIP

3 (d

Bm)

FREQUENCY (GHz)

6

12

18

24

30

36

0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9


1585

9-05

5

Figure 55. OIP3 vs. Frequency, 0.01 GHz to 1.0 GHz, for


45

00 1.0

OIP

3 (d

Bm)

FREQUENCY (GHz)

5

10

15

20

25

30

35

40

0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9


1585

9-05

6



55

00 1.0

OIP

2 (d

Bm)

FREQUENCY (GHz)

5

10

15

20

25

30

35

40

45

50

0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9

+85°C+25°C–40°C

1585

9-05

7

Figure 57. OIP2 vs. Frequency, 0.01 GHz to 1.0 GHz, for Various Temperatures,


0 122 4 6 8 10

42

0

OIP

3 (d

Bm)

6

12

18

24

30

36



9-05

8

Figure 58. OIP3 vs. Frequency, 1 GHz to 12 GHz, for


0 122 4 6 8 10

45

0

OIP

3 (d

Bm)

5

10

15

20

25

30

35

40



9-05

9



0 12FREQUENCY (GHz)

2 4 6 8 10

55

0

OIP

2 (d

Bm)

5

10

15

20

25

30

35

40

45

50

+85°C+25°C–40°C

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9-06

0

Figure 60. OIP2 vs. Frequency, 1 GHz to 12 GHz, for Various Temperatures,




Rev. A | of 23


0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9

55

0

OIP

2 (d

Bm)

5

10

15

20

25

30

35

40

45

50


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1




0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9

55

0

OIP

2 (d

Bm)

5

10

15

20

25

30

35

40

45

50


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2



75

50–10 14

I DD

(mA)

INPUT POWER (dBm)

55

60

65

70

–6 –2 2 6 10

10GHz5GHz1GHz

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3

Figure 63. IDD vs. Input Power for Various Frequencies,

VDD = 5 V

0 122 4 6 8 10FREQUENCY (GHz)

55

0

OIP

2 (d

Bm)

5

10

15

20

25

30

35

40

45

50


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0 122 4 6 8 10FREQUENCY (GHz)

55

0

OIP

2 (d

Bm)

5

10

15

20

25

30

35

40

45

50


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–120

–1801k 10k 100k 1M 10M

ADDI

TIVE

PHA

SE N

OIS

E (d

Bc/H

z)

OFFSET FREQUENCY (Hz)

–170

–160

–150

–140

–130

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Figure 66. Additive Phase Noise vs. Offset Frequency,

RF Frequency = 6 GHz, RF Input Power = 0 dBm



Rev. A | of 23

125

–250 8

I DQ

(mA)

VDD (V)

0

25

50

75

100

1 2 3 4 5 6 7

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Figure 67. IDQ vs. VDD, Representative of a Typical Device, RBIAS = 1.1 kΩ

90

0

4

8

12

16

2

6

10

14

0 40002000 6000 8000 10000BIAS RESISTOR VALUE (Ω)

I DQ

(mA)

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Figure 68. IDQ vs. Bias Resistor Value, VDD = 5 V



Rev. A | of 23

THEORY OF OPERATION The HMC8411LP2FE is a GaAs, MMIC, pHEMT, low noise wideband amplifier.

The HMC8411LP2FE is a cascode amplifier that uses a fundamental cell of two field effect transistors (FETs) in series, source to drain. The basic schematic for the cascode cell is shown in Figure 69, which forms a low noise amplifier operating from 0.01 GHz to 10 GHz with excellent noise figure performance.

RFOUT

RFIN

VDD15

859-

069

Figure 69. GaAs, MMIC, pHEMT, Low Noise Wideband Amplifier Schematic

The HMC8411LP2FE has single-ended input and output ports with impedances that nominally equal 50 Ω over the 0.01 GHz to 10 GHz frequency range. As a result, the device can be directly inserted into a 50 Ω system with external components on the RF input and output, as shown in Figure 70, without narrow-banded matching solutions. There is a need for an external bias choke for VDD on the RFOUT pin followed by a dc blocking capacitor, as well as a dc blocking capacitor on the RFIN port. On the RF input, there is an additional resistor, inductor, and capacitor (RLC) shunt network that aids unconditional stability below 100 MHz.

The HMC8411LP2FE is a single-supply bias amplifier using an external resistor on the RBIAS pin to set the IDQ current. To adjust the IDQ current, change the RBIAS resistor value.



Rev. A | of 23

APPLICATIONS INFORMATION The basic connections for operating the HMC8411LP2FE are shown in Figure 70. AC couple the input and output of the HMC8411LP2FE with appropriately sized capacitors. DC block capacitors are supplied on the RFIN and RFOUT pin of the evaluation board. A 5 V dc bias is supplied to the amplifier through the choke inductor connected to the RFOUT pin.

The HMC8411LP2FE operates in self-bias mode when the RBIAS pin is connected to a 1.1 kΩ external resistor to achieve a 55 mA supply current.

Refer to Table 7 for the recommended resistor values to achieve different supply currents.

RECOMMENDED BIAS SEQUENCING During Power-Up

The recommended bias sequence during power-up follows:

1. Set VDD to 5 V. 2. Apply the RF signal.

During Power-Down

The recommended bias sequence during power-down follows:

1. Turn off the RF signal. 2. Set VDD to 0 V.

The bias conditions, VDD = 5 V and IDQ = 55 mA, are the recommended operating point to achieve optimum performance. The data used in this data sheet was taken with the recommended bias conditions. Using the HMC8411LP2FE with different bias conditions can provide different performance than what is shown in the Typical Performance Characteristics section.

Table 7. Recommended Bias Resistor Values RBIAS (Ω) IDQ (mA) Amplifier Current, IDQ_AMP (mA) RBIAS Current, IDQ_BIAS (mA) 400 80 75.97 4.03 510 75 71.32 3.68 635 70 66.64 3.36 780 65 61.95 3.05 960 60 57.27 2.73 1100 55 52.47 2.53 1400 50 47.82 2.18 1800 45 43.16 1.84 2270 40 38.45 1.55 3000 35 33.75 1.25 4000 30 29.15 0.85 5700 25 24.93 0.07 9000 20 19.95 0.05



Rev. A | of 23

TYPICAL APPLICATION CIRCUIT

2

1

3

6

5

4

GND

GND

HMC8411LP2FE

R11.1kΩ

RFIN

C1

10nF

R243Ω

C110.1µF

GND

GND

RFOUT

L10.9µH

L2590nH

C2

10nF

VDD

C3

0.1µF

C4

10pF

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Figure 70. Typical Application Circuit



Rev. A | of 23

EVALUATION BOARD The EV1HMC8411LP2F evaluation board is a 4-layer board fabricated using Rogers 4350 and using best practices for high frequency RF design. The RF input and RF output traces have a 50 Ω characteristic impedance.

The evaluation board and populated components operate over the −40°C to +85°C ambient temperature range. For proper bias sequence, see the Applications Information section.

The evaluation board schematic is shown in Figure 72. A fully populated and tested evaluation board (see Figure 71) is available from Analog Devices upon request.

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Figure 71. EV1HMC8411LP2F Printed Circuit Board (PCB)

2

1

3

6

5

4

GND

GND

HMC8411LP2FE

R11.1kΩ

RFIN

C110nF

R243Ω

C110.1µF

GND

GND

DUT1

GND

RFOUT

L10.9µH

L2590nH

C210nF

VDDC3

0.1µF

C410pF

EPADNC

RFIN

RBIAS

NC

RFOUT/VDD

GND

GND

C14100pF

DNI

GND

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Figure 72. EV1HMC8411LP2F Evaluation Board Schematic



Rev. A | of 23

Table 8. Bill of Materials for Evaluation PCB EV1HMC8411LP2F Item Description RFIN, RFOUT PCB mount SMA RF connectors, SRI 21-146-1000-01 VDD, GND DC bias test points C1, C2 10 nF broadband dc blocking capacitors, Presidio LBB0201X103MET5C8L C3 Capacitor, 0.1 µF, 0402 package C4 Capacitor, 10 pF, 0201 package C11 Capacitor, 0.1 µF, 0201 package L1 Inductor, 0.9 µH, 0402, 5% ferrite, Coilcraft 0402DF-901XJRW L2 Inductor, 590 nH, 0402, 5% ferrite, Coilcraft 0402DF-591XJRU R1 1.1 kΩ resistor, 0201 package R2 43 Ω resistor, 0201 package DUT1 IC, HMC8411LP2FE Heat sink Heat sink



Rev. A | of 23

OUTLINE DIMENSIONS

1.701.601.50

0.300.250.20

TOP VIEW

SIDE VIEW

0.350.300.25

BOTTOM VIEW

PIN 1 INDEXAREA

0.900.850.80

1.101.000.90

0.203 REF

0.05 MAX0.02 NOM

1.30 REF

0.65BSC

EXPOSEDPAD

FOR PROPER CONNECTION OFTHE EXPOSED PAD, REFER TOTHE PIN CONFIGURATION ANDFUNCTION DESCRIPTIONSSECTION OF THIS DATA SHEET.

08-1

7-20

18-A

PKG

-004

251

2.052.00 SQ1.95

5 8

14

COPLANARITY0.08

SEATINGPLANE

PIN 1IN D ICATO R AR E A OP TIO N S(SEE DETAIL A)

DETAIL A(JEDEC 95)

Figure 73. 6-Lead Lead Frame Chip Scale Package [LFCSP],

2 mm × 2 mm Body and 0.85 mm Package Height (CP-6-12)

Dimensions shown in millimeters

ORDERING GUIDE Model1, 2 Temperature Range MSL Rating3 Package Description4 Package Option HMC8411LP2FE −40°C to +85°C MSL1 6-Lead Lead Frame Chip Scale Package [LFCSP] CP-6-12 HMC8411LP2FETR −40°C to +85°C MSL1 6-Lead Lead Frame Chip Scale Package [LFCSP] CP-6-12 EV1HMC8411LP2F Evaluation Board 1 The HMC8411LP2FE and HMC8411LP2FETR are RoHS compliant parts. 2 When ordering the evaluation board only, reference the model number, EV1HMC8411LP2F. 3 See the Absolute Maximum Ratings section for additional information. 4 The lead finish of the HMC8411LP2FE and HMC8411LP2FETR is nickel palladium gold (NiPdAu).

©2019 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D15859-0-5/19(A)


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