Logic Theory

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    1 M A T H E M A T I C A L L O G I C

    Statement : A declarative sentence which is either true or false but not both is called a

    statement or proposition. ( A statement cannot be interrogative, imperative or exclamatory ) .

    Law of excluded middle : We know that the statement is either true or false but not both at the

    same time. This is known as law of excluded middle.

    Truth value of a statement : If a statement is true, we say that its truth value is T. If a statement

    is false, we say that its truth value is F. Hence every statement has one and only one truth value

    i.e. T or F.

    Compound statement : It is a combination of one or more simple statements.

    Prime components : The statements which from a compound statement are called as prime

    components of the compound statement.

    Negation : If p is a statement then the negation of p is a statement not p and is denoted by ~ p.

    Truth table fornegation :

    OR ( ) ( Disjunction ) : Ifp and q are two statements,

    then the disjunction of p and q is the compound statement p or q and is denoted by p q.

    [ The compound statement p q is true if at least one of the two statements p, q is true. Otherwise

    it is false.]

    AND ( ) ( Conjunction ) :If p and q are two statements, then the conjunction of p and q is the

    compound statement p and q and is denoted by p q . [The compound statement p q is true if

    both p and q are true. Otherwise it is false. ]

    If_ then_ ( ) ( Implication or conditional statement ) : If p and q are two statements then

    p q should be read as if p is true then q is true or p implies q. [The compound statement

    p q is false when p is true and q is false and it is true in all other cases.]

    If and only if ( ) ( Double Implication or Bi conditional statement ) : If p and q are two

    statements then p q should be read as p iff q i.e. p implies q and q implies p. [ The compound

    statement p q is true when both p and q have the same truth value otherwise it is false.]

    Truth Table for OR , AND If _ then and If and only if :

    p q p q p q pq p qT T T T T T

    T F T F F F

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    P ~ p

    T F

    F T

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    F T T F T F

    F F F F T T

    Statement pattern or statement form : Compound statement obtain from statement letters by

    using one or more connectives is called statement pattern or statement form.

    Logical Equivalence : If the truth value of the two statement patterns are identical for all

    possibilities of the truth values of their statement letters, then the two statement patterns are called

    logically equivalent.

    Tautology: A statement pattern is said to be a tautology if it is always true for all possible

    combinations of truth value of its components statement letters.(T)

    Contradiction : A statement pattern that is false for all possible value of its proposition variables

    is called a contradiction.(C)

    Contingency : A statement pattern which is neither tautology nor contradiction is called

    contingency.

    Duality theorem : The dual of a proposition is the proposition which is obtained by

    interchanging and . And t by c and vice a versa..Dual ofis ~ p q. Dual of is (~ p q ) (~ q p )

    Converse , Contrapositive and Inverse of Conditional Statement : Statement is p q then

    Converse : q p , Contrapositive: ~q~ p , Inverse : ~p~ q

    pq ~q~ p ( implication Contrapositive) and

    qp ~p~ q ( converse inverse )

    Some Standard Equivalent Statements in Logic :

    ~ ( ~ p ) p

    Idempotent Laws : p p p ; p p p

    Commutative Laws : p

    q

    q

    p ; p

    q

    q

    p

    Associative Laws : (p q) r p ( q r ) ; (p q) r p ( q r )

    Distributive Laws : p ( q r ) (p q) ( p r ) ; p ( q r ) (p q) ( p r )

    De Morgans Laws : ~ ( p q ) ~ p ~ q ; ~ ( p q ) ~ p ~ q

    Implication : pq ~ p q ~ q ~ p

    Double Implication : p q ( pq ) ( qp) (~ p q ) (~ q p )

    Rules for negation of compound statement :

    i) ~ ( ~ p ) p

    ii) ~ ( p q ) ~ p ~ q De Morgans law

    iii) ~ ( p q ) ~ p ~ q De Morgans law

    iv) ~ ( pq ) p ~ q

    v) ~ ( p q ) ( p ~ q ) ( q ~ p)

    vi) every or all is interchanged by some orthere exists at least one

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    vii) some is interchanged by no

    viii) or is interchanged by and and vice versa.Application of Logic to switching circuit :

    Logic can be used to select the right positions and number of switches in the electrical

    circuit. It is possible to express the design of switching circuit through statement patterns. Using

    laws of logic ; the statement patterns can be simplified. Therefore it is possible to simplify the

    design of switching circuits.

    If current is passing through an electrical circuit, it is on and if the current is not passing

    through it, it is off.

    In fig (i), the switch is closed ( i.e. on) and the current can flow. In fig (ii), the switch is

    open ( i.e. off) and the current does not flow.

    We associate a closed switch, with a true statement and an open switch with a false

    statement so that we can say the truth value of closed switch is T and that of an open switch is F.

    In electric circuit the notation 1 is used if the switch is closed ( i.e. , on ) and 0 is used if the

    switch is open ( i.e., off ).

    (i) The switches are in series : p : the switch S1 is closed

    q : the switch S2 is closed

    l : the lamp is on

    In this case, the lamp is on , if and only if

    both the switches are closed we thus have,p q l.

    (ii) The switches are in parallel :

    p : the switch S1 is closed

    q : the switch S2 is closed

    l : the lamp is on

    Then, the lamp is on, if at least one of the

    switches is closed.

    p q l

    (iii) State of switch : If a statement p denoted any one state close or open of a switch S, then

    ~ p denotes the opposite state of the switch S.

    The state close or on of a switch S is expressed by the truth value True or T of the

    statement p. One can observe that any circuit design is the combination of the circuit

    designs of switches in series or in parallel.

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    Let us construct the tables showing all possible states of switches and lamp for the circuits in

    which switches are in series and parallel.

    In the following tables, the switches S1 and S2 are expressed by the letters p and q and the states

    of switches and lamp, closed or on are shown by the word True or T and open or off by the

    word False or F.

    The switches are in series : The switches are in parallel :

    Switches Lamp Switches Lamp

    S1 p S2 q l p q S1 p S2 q l pqClosed T Closed T On T Closed T Closed T On T

    Closed T Open F Off F Closed T Open F On T

    Open F Closed T Off F Open F Closed T On T

    Open F Open F Off F Open F Open F Off F

    Switches can be connected to each other so that they can be open or closed simultaneously.

    We can denote two connected switches by letters 1S and '1S It means whenever 1S closed , '1S is

    open.

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