Logic Programming Two possible work modes: 1.At the lab: Use SICstus Prolog. To load a prolog file...

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ogic Programming Two possible work modes: 1. At the lab: Use SICstus Prolog. To load a prolog file (*.pl or *.pro extension) to the interpreter, use: ?- ['myfile.pl']. 2. Install SWIProlog (See “Useful links ” in the course web page). You can work with the editor provided with SWIProlog: Use “File->edit” to open the editor. Use “File->Reload modified files” to load the changes to the interpreter. Use “File->Navigator” to view files and procedure definitions. 1

Transcript of Logic Programming Two possible work modes: 1.At the lab: Use SICstus Prolog. To load a prolog file...

Page 1: Logic Programming Two possible work modes: 1.At the lab: Use SICstus Prolog. To load a prolog file (*.pl or *.pro extension) to the interpreter, use: ?-

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Logic Programming

Two possible work modes:

1. At the lab: Use SICstus Prolog.

To load a prolog file (*.pl or *.pro extension) to the interpreter, use: ?- ['myfile.pl'].

2. Install SWIProlog (See “Useful links” in the course web page).

You can work with the editor provided with SWIProlog:

• Use “File->edit” to open the editor.

• Use “File->Reload modified files” to load the changes to the interpreter.

• Use “File->Navigator” to view files and procedure definitions.

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Logic Programming: Introduction

o A logic program is a set of procedures, defining relations in the problem domain.

o A procedure is a set of axioms (rules and facts) with equal predicate symbol and arity.

o The prolog interpreter loads a program; then operates in a read-eval-print loop.

Signature: parent (Parent, Child) /2Purpose: Parent is a parent of Child1. parent (erik, jonas).3. parent (lena, jonas).

Signature: male(Person) /1Purpose: Person is a male1. male (erik).

Signature: father (Dad, Child) /2Purpose: Dad is father of Child1. father (Dad, Child) :- parent(Dad, Child) , male (Dad).

program factrule axioms

arityprocedure

The relation father holds between Dad and Child

predicate

if parent holds and Dad is male

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Logic Programming: Introduction

Signature: parent (Parent, Child) /2Purpose: Parent is a parent of Child1. parent (erik, jonas).3. parent (lena, jonas).

Signature: male(Person) /1Purpose: Person is a male1. male (erik).

Signature: father (Dad, Child) /2Purpose: Dad is father of Child1. father (Dad, Child) :- parent(Dad, Child), male (Dad).

Given a query, the interpreter attempts to prove it. The answer is either: No (false) – If the

query isn’t provable under the program axioms, or Yes (true) Otherwise. All possible query

variable instantiations are given, for which the query is provable.

? - father (X,Y).X=erik, Y=jonas

? - parent (X,jonas).X=erik ;X=lena Next

possible variable instantiation

query

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Logic Programming: Example 1 – logic circuits

A program that describes (models) logic circuits. a logic circuit contains:

• Logic gates: resistor and transistor.

• Connection points: Either points on the wire, connecting logic gates or power and ground.

We will model a logic circuit as a program in Prolog, as follows:

Connection points – are individual constants.

Logic gates – are relations on the constants.

Connection point

Resistor

Ground

Transistor

Power Power

Ground

N1

N2 N3

N4N5

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Logic Programming: Example 1 – logic circuits

% Signature: resistor(End1,End2)/2% Purpose: A resistor component connects two ends1 resistor(power, n1). 2 resistor(power, n2).3 resistor(n1, power). 4 resistor(n2, power).

Resistor procedure

Connection point

Resistor

Ground

Transistor

Power Power

Ground

N1

N2 N3

N4N5

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Logic Programming: Example 1 – logic circuits

% Signature: resistor(End1,End2)/2% Purpose: A resistor component connects two ends1 resistor(power, n1). 2 resistor(power, n2).3 resistor(n1, power). 4 resistor(n2, power).

• power, n1, n2 are individual symbols (start with lowercase characters).

• resistor is a predicate symbol, a name for the relation.

• End1 and End2 are variable symbols (start with uppercase characters).

• resistor(power, n1) is an atomic formula. Atomic formulas are either true, false or of the

form relation(t1 , ..., tn) where ti are terms (individual symbols or variable symbols).

• Facts are atomic formulas with a "." at the end.

A procedure starts with a comment containing its contract.

Line numbers are for our reference only.

Constant symbols

Resistor procedure

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Logic Programming: Example 1 – logic circuits

% Signature: resistor(End1,End2)/2% Purpose: A resistor component connects two ends1 resistor(power, n1). 2 resistor(power, n2).3 resistor(n1, power). 4 resistor(n2, power).

A query is a conjunction of goals, which are atomic formulas:

“Is there an X such that the resistor relation holds for (power, X)?”

?- resistor(power, n1),resistor(n2, power). true.

?- resistor(X, n1).X = power;false

“Is there an X such that the resistor relation holds for (X, n1)?”?- resistor(power, X).X = n1 ;X = n2 ;false

Resistor procedure

Connection point

Resistor

Ground

Transistor

Power Power

Ground

N1

N2 N3

N4N5

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Logic Programming: Example 1 – logic circuits

% Signature: transistor (Gate, Source, Drain)/3% Purpose: …1 transistor(n2,ground,n1). 2 transistor(n3,n4,n2). 3 transistor(n5,ground,n4).

Note: In contrast to the resistor relation, the places of the arguments in the transistor predicate are important. Each place has a different role.

Transistor procedure

Connection point

Resistor

Ground

Transistor

Power Power

Ground

N1

N2 N3

N4N5

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% Signature: not_gate(Input, Output)/2% Purpose: Used as logic gate that has one Input and one Output.% We can construct a not gate from a transistor and a resistor. 1. not_gate(Input, Output) :- transistor(Input, ground, Output) , 2 . resistor(power, Output).

Not-gate procedure

Rule head: an atomic formula with variables

Rule body

Stands for “and”

power

ground gate

source

drain

transistor

resistor

The relations combined to determine weather or not the Not_gate relation stands for Input and Output, are described by a rule.

?- not_gate(X,Y).X=n2, Y=n1;no

Note: Variables, appearing in the rule’s head, are universally quantified: “For all Input and Output, the pair (Input, Output) is a not gate if (Input, ground, Output) is a transistor and (power, Output) is a resistor.”

Logic Programming: Example 1 – logic circuits

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Operational semantics: The unification algorithm

o A query is a trigger for execution. Program execution is an attempt to prove goals.

o The search for a proof, using the AnswerQuery algorithm, contains multiple attempts

to apply rules on a selected goal.

o This is done by applying a unification algorithm, Unify, on the rule's head and the goal.

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Operational semantics: The unification algorithm

1. A substitution is a set of bindings X=t, where X is a binding variable and t is a term.

Every binding variable appears once and binding variables do not appear in the terms.

2. The application of a substitution S (denoted º) to an atomic formula A replaces variables

in A with corresponding terms in S . The result is an instance of A. For example:

A=not_Gate(I, I) , B=not_Gate(X,Y), s={I=X}:

A º S = not_Gate(X, X)

B º S = not_Gate(X, Y)

Definitions:

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Operational semantics: The unification algorithm

Definitions:

3. A unifier of two atomic formulas A and B is substitution α such that the result of its

application to both A and B is the same. For example:

A=not_Gate(I, I) , B=not_Gate(X,Y), S={I=X} º{X=Y} = {I=Y, X=Y}

A º S = not_Gate(Y, Y)

B º S = not_Gate(Y, Y)

4. The Unify algorithm (see the lecture notes [do so!]) returns the most general unifier

of two atomic formulas, A and B. An mgu for the last example is: S={I=Y, X=Y}

A º S = not_Gate(Y, Y)

B º S = not_Gate(Y, Y)

Combination of substitutions! (see lecture notes or next slide)

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Operational semantics: The unification algorithm

Combinations of substitutions (shown in class): In the following example: We combine the

substitution S1={X=Y, Z=3, U=V} with the substitution S2= {Y=4, W=5, V=U, Z=X}. This is

denote by: S1 º S2.

(2nd step) Variables in S2 that have a binding in S1 are removed from S2.

So far : S1={ X=4 , Z=3 , U=U } , S2 remains the same

So far : S1={ X=4 , Z=3 , U=U } , S2= { Y=4 , W=5 , V=U}

(4rd step) Identity bindings are removed.

The result : S1={ X=4 , Z=3 , Y=4 , W=5 , V=U}

(3rd step) S2 is added to S1.

So far : S1={ X=4 , Z=3 , U=U , Y=4 , W=5 , V=U}

(1st step) S2is applied to the terms of S1: { X=Y , Z=3 , U=V } , { Y=4 , W=5 , V=U , Z=X }

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Operational semantics: Proof trees

Proof trees are formed by executing the AnswerQuery algorithm.The interpreter searches for a proof for a given query (a conjunction of formulae (goals)). The search is done by building and traversing a proof tree where all possibilities for a proof are taken into account.

The possible outcomes are either one of the following:o The algorithm finishes, and the possible values of the query variables are shown.o The proof attempt loops and does not end.

Q = ?- Q1, ..., Qn

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The tree structure depends on Prolog's goal selection and rule selection policies:

Query goals appear in the root node of the proof tree.

Choose a current goal (Prolog's policy: the leftmost goal).

Choose a rule to the current goal. (Prolog's policy by top to bottom program order).

Variables in rules are (consecutively) renamed before applying the unification algorithm.

If the unification succeeds, an edge in the proof tree is created.

A node in the proof tree is a leaf if: the goal list is empty (success), or the goal list is not

empty but no rule can be applied to the selected goal (failure).

When a leaf node is reached, the search travels to the parent node (redo, backtrack)

and tries to match another rule to it.

Operational semantics: Proof trees

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nand_gate(In1, In2, Out)

transistor(In1,X_1, Out), transistor(In2,ground,X_1),resistor(power, Out)

transistor(In2,ground,ground),resistor(power, n1)

transistor(In2,ground,n4),resistor(power, n2)

% Signature: nand_gate(Input1,Input2,Output)/3% Purpose: …1 nand_gate(Input1,Input2,Output) :-

transistor(Input1,X,Output), transistor(Input2,ground,X),resistor(power, Output).

{ In1=n2, X_1=ground, Out=n1} Fact 1 – transistor

% Signature: transistor (Gate, Source, Drain)/3…1 transistor(n2,ground,n1). 2 transistor(n3,n4,n2). 3 transistor(n5,ground,n4).{ In1=n3,

X_1=n4, Out=n2} Fact 2 – transistor

fail

{ In2=n3} Fact 2 – transistor

fail

{ In2=n5} Fact 3 – transistor

true

resistor(power, n2)

{ In2=n2} Fact 1 – transistor

fail fail

{ In2=n3} Fact 2 – transistor

{ In2=n5} Fact 3 – transistor { In2=n2}

Fact 1 – transistor

fail

Operational semantics: Proof trees

{ Input1_1=In1, Input2_1=In2, Output_1=Out }Rule 1 – nand_gate

mgu

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A success proof tree, has at least one success path in it.

A failure proof tree does not have a success path in it.

A proof tree is infinite if it contains an infinite path. For example, by repeatedly applying the rule p(X):-p(Y).

In the example above, the proof tree is a finite success tree, with a success path and a failure path.

Operational semantics: Proof trees

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It is sometimes useful to think of relations as tables in a database of facts. For example, the

relations resistor and transistor can be viewed as two tables:

An example: Relational logic programming & SQL operations.

Table name: resistorSchema: End1, End2Data: (power, n1), (power, n2), (n1, power), (n2, power).

Table name: transistorSchema: Gate, Source, DrainData: (n2, ground, n1) (n3, n4, n2), (n5, ground, n4).

% Signature: res_join_trans(End1, X, Gate, Source)/4 % Purpose: natural join between resistor and % transistor according to End2 of resistor and % Gate of transistor. res_join_trans(End1, X, Gate, Source):-

resistor(End1,X),transistor(X, Gate, Source).

End1 = power,X = n2,Gate = ground,Source = n1 ;

false.

?-res_join_trans(End1,X,Gate,Source).SQL Operation: Natural join

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It is sometimes useful to think of relations as tables in a database of facts. For example, the

relations resistor and transistor can be viewed as two tables:

An example: Relational logic programming & SQL operations.

Table name: resistorSchema: End1, End2Data: (power, n1), (power, n2), (n1, power), (n2, power).

Table name: transistorSchema: Gate, Source, DrainData: (n2, ground, n1) (n3, n4, n2), (n5, ground, n4).

%Signature: tr_res(X, Y)/2tr_res(X, Y) :- resistor(X, Y).tr_res(X, Y) :- resistor(X, Z), tr_res(Z, Y).

X = power,Y = n1 ;X = power,Y = n2 ;X = n1,Y = power ;X = n2,Y = power ;X = Y, Y = power ;

?- tr_res(X, Y).Transitive closure for the resistor relation

X = power,Y = n1 ;X = power,Y = n2 ;X = Y, Y = power ;X = power,Y = n1;...

We get the same answer an infinite number of times. The reason lies on the symmetric nature of the resistor relation.

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Relational logic programming does not have the ability to describe data structures, only relations. In contrast, in Full logic programming, composite data is described by value constructors, which are called functors.

Full logic programming:

% Signature: tree_member(Element,Tree)/ 2% Purpose: Testing tree membership, checks if Element is % an element of the binary tree Tree.tree_member (X,tree(X,Left,Right)).tree_member (X,tree(Y,Left,Right)):- tree_member(X,Left).tree_member (X,tree(Y,Left,Right)):- tree_member(X,Right).

In the following procedure, what symbol denotes a predicate? And a functor?

A Predicate symbol

A Functor containing three data items.

How can you tell? The functor looks the same as predicate, but its meaning and relative location in the program, are different:

• Predicate symbols appear as an identifier of an atomic formula.• A functor is way to construct a term. A term is a part of a formula. • A functor can be nested – a predicate can't.

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Full logic programming:

% Signature: tree_member(Element,Tree)/ 2% Purpose: Testing tree membership, checks if Element is % an element of the binary tree Tree.tree_member (X,tree(X,Left,Right)).tree_member (X,tree(Y,Left,Right)):- tree_member(X,Left).tree_member (X,tree(Y,Left,Right)):- tree_member(X,Right).

?- tree_member(1, tree(1,nil, nil)).true

?- tree_member(2,tree(1,tree(2,nil,nil), tree(3,nil, nil))).true.

?- tree_member(X,tree(1,tree(2,nil,nil), tree(3,nil, nil))).X=1;X=2;X=3;no.

?- tree_member(1, tree(3,1, 3)).False.

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Full logic programming:

% Signature: tree_member(Element,Tree)/ 2% Purpose: Testing tree membership, checks if Element is % an element of the binary tree Tree.tree_member (X,tree(X,Left,Right)).tree_member (X,tree(Y,Left,Right)):- tree_member(X,Left).tree_member (X,tree(Y,Left,Right)):- tree_member(X,Right).

?- tree_member(1, T).T = tree(1, _G445, _G446) ;T = tree(_G444, tree(1, _G449, _G450), _G446) ;T = tree(_G444, tree(_G448, tree(1, _G453, _G454), _G450), _G446) ;...

If we look for all trees that 1 is a member in we get an infinite success tree with partially instantiated answers (answers containing variables).

Note: X might be equal to Y in the 2nd and 3rd clauses. This means that different proof paths provide repeated answers.

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Full logic programming: Unification with functors

Unification is more complex with functors. Here is an execution of the Unify algorithm, step by step:

Unify(A,B) where A= tree_member (tree (X, 10, f(X)), W) ; B =tree_member (tree (Y, Y, Z), f(Z)).

Initially, S={} Disagreement-set = {X=Y} X does not occur in Y S=S {X=Y} = {X=Y}

As= tree_member (tree (X, 10, f(Y)), W )Bs= tree_member (tree (Y, Y ,Z ), f(Z)) As ≠ Bs

Disagreement-set = {Y=10} S=S {Y=10} = {X=10, Y=10}

As= tree_member (tree (Y, 10, f(Y)), W )Bs= tree_member (tree (Y, Y ,Z ), f(Z)) As ≠ Bs

Disagreement-set = {Z=f(10)} S=S {Z=f(10)} = {X=10, Y=10, Z=f(10)}

As= tree_member (tree (10, 10, f(10)), W )Bs= tree_member (tree (10, 10, Z ), f(Z)) As ≠ Bs

Disagreement-set = {W=f(f(10))} S={X=10, Y=10, Z=f(10), W=f(f(10))}

As= tree_member (tree (10, 10, f(10)), W )Bs= tree_member (tree (10, 10, f(10)), f(f(10))) As ≠ Bs

As= tree_member (tree (10, 10, f(10)), f(f(10)) )Bs= tree_member (tree (10, 10, f(10)), f(f(10)))

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Full logic programming: Unification with functors

Question: What is the result of Unify(A,B) with the following two atomic formulas? A= tree_member (tree (X, Y, f(X)), X)

B =tree_member (tree (Y, Y, Z), f(Z))

loop : X=Y, Z=f(Y), X=f(Z)=f(f(Y))=f(f(X)) the substitution cannot be successfully solved.