Load Current Feedforward Control of BoostConverter for Downsizing Output Filter Capacitor

Daisuke Takei*, Hiroshi Fujimoto**, Yoichi Hori***The University of Tokyo

5-1-5, Kashiwanoha, Kashiwa, Chiba, 227-8561 JapanPhone: +81-4-7136-3881*, +81-4-7136-4131**, +81-4-7136-3846***

Fax: +81-4-7136-3881*, +81-4-7136-4132**, +81-4-7136-3847***Email: takei@hflab.k.u-tokyo.ac.jp*, fujimoto@k.u-tokyo.ac.jp**, hori@k.u-tokyo.ac.jp***

Abstract—Boost converters are used for high voltage supplying,and they generally have to use large capacitors to suppressoutput voltage variations. However, this characteristic makes theconverter system very large. In this paper, three load currentfeedforward control methods, which are considered an unstablezero, are proposed for the boost converter. The proposed methodssuppress voltage variation compared to feedback control methodsand enable the converter to reduce output filter capacitor. Simu-lations and experiments are conducted to show the effectivenessof the proposed methods.

I. INTRODUCTIONBoost converters are used to boost output voltage for appli-

cations such as electric vehicles and hybrid electric vehicles.In such systems, the size of the output filter capacitor hasto be large due to the necessity to reduce voltage variation.Therefore, designing of output filter plays an important rolein downsizing of the system.

One of the methods to minimize the size of the outputfilter capacitor is using control theory. To suppress voltagevariation caused by load variation, [1][2]proposed a controllerwith high response, and the use of small output filter capacitoris achieved[1][2]. There are some approaches to suppressvoltage variation with feedback controllers[3][4]. However,these feedback controllers have problems in terms of responsespeed or switching frequency variation.

In this paper, it is assumed that the inverter is connectedto the secondary side of the boost converter. Therefore, theload current of the boost converter is measurable. To suppressvoltage variation quickly, it is important to design the load cur-rent feedfoward controller. There has been research conductedon load current feedforward control for boost converter[5]–[7]. Generally, a boost converter is a non-minimum phasesystem[8]. The transfer function from the duty ratio to theoutput voltage has an unstable zero. Moreover, the transferfunction from the duty ratio to the load current also hasan unstable zero, as well. Therefore, if a direct inversion ofthe plant is made, a load current feedforward controller hasunstable poles and the controlled system may become unstable.

In [5], current mode control including load current feed-forward is described for boost converters with constant powerload. In [6], a load current sensor-less feedforward methodusing digital control is proposed. In these methods, the unsta-ble zero of the plant is not considered. In [7], a feedforward

Cc

v

loadi

E

r L

ini

Fig. 1. Configuration of boost converter

controller design including how to deal with the unstable zerois described, however, it was only considered in the continuoustime domain. In addition, these papers did not mention how todesign a precise digital feedforward controller. Furthermore,if a digital feedforward controller is designed, future valuesare needed as references for the controller, but many of thepapers did not consider how to design proper input value forthe digital feedforward controller.

In this paper, load current feedforward controllers, whichare designed as precise digital controllers, are proposed for anon-minimum phase boost converter. Also, the design methodof a proper feedforward controller, which has no delay, isexplained. The proposed methods show better voltage vari-ation suppression in comparison to the conventional feedbackcontroller, which achieves downsizing of the output filtercapacitor.

II. MODELING OF BOOST CONVERTER

The circuit diagram of the boost converter is shown in Fig.1, where E is the input voltage, r is the resistance of thereactor coil, L is the inductance of the reactor coil, C is thecapacitance, iin is the input current of the converter, vc is theoutput voltage , and iload is the load current. In this paper,assuming that the boost converter is operated in a continuousconduction mode. The state space model of the boost converter

is expressed by

d

dtx(t) = A(d(t))x(t) +B

[E

iload(t)

], (1)

vc(t) = cx(t), x(t) := [iin(t) vc(t)]T , (2)[

A Bc O

]:=

− rL −d(t)

L1L 0

d(t)C 0 0 − 1

C

0 1 O

,

where d(t) is the duty ratio and d(t) := 1−d(t). (1) shows thatthe boost converter is a non-linear system. In order to designa controller, which uses linear control theory, (1) is linearizedaround an equilibrium point. The state equation of linearizedmodel is given by

d

dt∆x(t) = ∆A∆x(t) + ∆B∆u(t), (3)

∆vc(t) = ∆c∆x(t), (4)[∆A ∆B∆c O

]:=

− rL −D

L −Vc

L 0DC 0 Iin

C − 1C

0 1 O

,

x(t) := X +∆x(t), ∆x(t) := [∆iin(t) ∆vc(t)]T,

(5)

u(t) := U +∆u(t), ∆u(t) := [∆d(t) ∆iload(t)]T,

(6)

X := [Iin Vc]T,U := [D Iload]

T,

Iin =Iload

D, Vc =

ED − rIload

D2 . (7)

From (3) and (4), transfer functions from the duty ratio andthe load current to the input current and the output voltage ofthe boost converter are given by[

∆iin(s)∆vc(s)

]=

[∆Pi1(s) ∆Pi2(s)∆Pv1(s) ∆Pv2(s)

] [∆d(s)

∆iload(s)

],

(8)

∆Pi1(s) =bi1s+ bi0

s2 + a1s+ a0,

∆Pi2(s) =ci0

s2 + a1s+ a0, (9)

∆Pv1(s) =bv1s+ bv0

s2 + a1s+ a0,

∆Pv2(s) =cv1s+ cv0

s2 + a1s+ a0, (10)

a1 :=r

L, a0 :=

D2

LC, bi1 := −Vc

L,

bi0 := −IinD

LC, bv1 =

IinC

, bv0 =rIin −DVc

LC,

ci0 :=D

LC, cv1 := − 1

C, cv0 := − r

LC.

Note that the zero of ∆Pv1(s) is unstable. The larger theduty ratio and load current are, the slower the unstable zerois. On the other hand, the zero of ∆Pv2(s) is a slow stablezero which is a constant value determined by r and L.

lR

lL

invi

invv

loadi

cv

(a) Full bridge inverter

][kv

T

c

inverter][ki

inv][kT∆

][zCinv

+ −

+

+

]1[*

+kiinv

invcz

1−

)]([1

invinvazIkb

−−

][kvc

T

1 ][kiload

(b) Block diagram

Fig. 2. Single phase inverter model and 2DOF controller

Discretizing (3) and (4) using zero-order hold, the dis-cretized state equation is obtained as

∆x[k + 1] = ∆Ad∆x[k] + ∆Bd∆u[k] (11)∆vc[k] = ∆cd∆x[k], (12)[

∆Ad ∆Bd

∆cd O

]:=

[e∆AT ∆A−1(e∆AT − I)∆B∆c O

]

=

∆ad11 ∆ad12 ∆bd11 ∆bd12∆ad21 ∆ad22 ∆bd21 ∆bd22

0 1 O

.

III. LOAD CURRENT SIMULATOR

In this paper, arbitrary load variation is generated by acurrent controller of a full bridge inverter. For example, in thecase of a hybrid vehicle system, it is normal for the inverter,which is connected to the secondary side of the boost converterto change current to get any torque, causing voltage variation.Thus, the situation described above is possible in practice. Thecircuit diagram of a full bridge inverter is shown in Fig. 2(a),where Rl is the load resistance, Ll is the inductance of theload reactance, vinv is the output voltage of inverter, and iinvis the inverter current. The continuous-time state equation ofthe inverter and the discrete-time state equation using PWM

Boost

Converter

+

−

][*

kvc][kvc

][zCfb

+

][kd fb∆

D

+

][kiload

Current

source load

simulator

]1[*

+kiinv

Fig. 3. Voltage control of the conventional method

hold are given as [9].

diinv(t)

dt= −Rl

Lliinv(t) +

1

Llvinv(t), (13)

xinv[k + 1] = ainvxinv[k] + binv[k]∆T [k] (14)yinv[k] = cinvxinv[k], (15)

ainv = e−RlT

Ll , binv[k] =vc[k]

Lle−RlT

2Ll ,

cinv = 1, xinv[k] = iinv[k].

Note that it is difficult to measure iload[k] due to the carrierripple. Alternatively, iload[k] is expressed by (16) since iload[k]is equal to average value of iinv[k] during one carrier periodT .

iload[k] =∆T [k]

Tiinv[k] (16)

where iinv[k] is controlled with a 2 degree-of-freedom con-troller shown in Fig. 2(b). The feedforward controller isdesigned by using single-rate Perfect Tracking Control (PTC)[10]. The continuous-time feedback controller is a PI controllerdesigned with pole-zero cancellation, expressed as

Cinv(s) =Lls+Rl

τinvs, τinv = 1 [ms]. (17)

By discretizing Cinv(s) with the Tustin transform method,Cinv[z] is obtained.

IV. CONTROL SYSTEM DESIGN

A. Conventional method

The conventional voltage controller shown in Fig. 3 uses aPID controller which is expressed as

Cfb(s) = Kp +Ki

s+

Kds

τbcs+ 1. (18)

The conventional controller is designed by pole placementof the fourth root against ∆Pv1(s). By discretizing Cfb(s)with the Tustin transform, Cfb[z] is obtained.

B. Proposed method 1

The voltage controller of proposed method 1 is designedby using the Zero Phase Error Tracking Control [11] because∆Pv1(s) is a non-minimum phase system. Block diagram ofthe proposed method 1 is shown in Fig. 4. From (11) and (12),

Boost

Converter

+

−

][*

kvc][kvc][kd

][zCfb

+

][kd fb∆

D

+

Current

source load

simulator

]1[*

+kiinv

][kd ff∆

][zCff

+

][kiload∆

+

−

][kiload

loadI

Fig. 4. Voltage control of proposed method 1 and 2

the discrete-time transfer function from ∆d[k] and ∆iload[k]to ∆vc[k] is obtained by

∆vc[k] =bdv1z + bdv0

z2 + ad1z + ad0∆d[k]

+cdv1z + cdv0

z2 + ad1z + ad0∆iload[k], (19)

ad1 = −(∆ad11 +∆ad22),

ad0 = ∆ad11∆ad22 −∆ad12∆ad21, bdv1 = ∆bd21,

bdv0 = ∆ad21∆bd11 −∆ad11∆bd21, cdv1 = ∆bd22,

cdv0 = ∆ad21∆bd12 −∆ad11∆bd22.

Proposed method 1 controls ∆d[k] to cancel voltage vari-ation caused by ∆iload[k]. Then, from (19) at ∆vc[k] = 0,the discrete-time transfer function from ∆d[k] to ∆iload[k] isrepresented by

∆P [z] =∆iload[k]

∆d[k]= −bdv1z + bdv0

cdv1z + cdv0=

N [z]

D[z]. (20)

and the feedforward controller Cff [z] is given by

Cff [z] =D[z]N [z−1]

z2N2[1]. (21)

In proposed method 1, the feedforward controller needs 2samples before it begins controlling the system.

C. Proposed method 2

Proposed method 2 is designed by PTC which ignores theunstable zero in a continuous time plant [12]. Proposed method1 is a zero phase error controller but has a magnitude error.In particular, because the unstable zero of the boost converteris far from the pole of the transfer function from ∆d(s) to∆vc(s), its effect of unstable zero is much smaller. Thus, thedesigned feedforward controller, which ignores the unstablezero, can achieve high tracking performance. Block diagramof the proposed method 2 is same to the proposed method 1.

The transfer function from ∆d(s) and ∆iload(s) to ∆vc(s)is obtained by

∆vc(s) =bv1s+ bv0

s2 + a1s+ a0∆d(s)

+cv1s+ cv0

s2 + a1s+ a0∆iload(s). (22)

Boost

Converter

+

−

][*

kvc][kvc][kd

][zCfb

+

][kd fb∆

D

+

Current

source load

simulator

]1[*+kiinv

Converter load

current prediction

1−z

]2[*+kiinv

]1[ˆ +kiload

][kd ff∆

][zCff

+

+

−

][kiload

loadI

][kd ff∆

Error

compensation

+ +][kicomp

]1[*+kiload

Fig. 5. Voltage control of proposed method 3

∆iload(s) of proposed method 2 is calculated in the sameway as in proposed method 1. The continuous-time transferfunction ∆P (s) is represented by

∆P (s) =∆iload(s)

∆d(s)= −bv1s+ bv0

cv1s+ cv0

=

(− bv0cv1s+ cv0

)(bv1bv0

s+ 1

), (23)

where ∆P (s) has an unstable zero. Therefore ∆P (s) isdivided into the minimum phase transfer function ∆PMP (s)and the non-minimum phase transfer function nu(s).

∆P (s) = ∆PMP (s)nu(s) (24)

∆PMP (s) = − bv0cv1s+ cv0

(25)

nu(s) =bv1bv0

s+ 1 (26)

By discretizing ∆PMP (s) with carrier period T , the stateequations of the feedforward controller are obtained by

xptc[k + 1] = adxptc[k] + bduptc[k], (27)yptc[k] = cdxptc[k], (28)[

ad bdcd 0

]=

[e−

cv0cv1

T − bv0

cv1(e−

cv0cv1

T − 1)

1 0

],

From (27) and (28), the load current feedforward controllerCptc[z] is given as the following :

∆dff [k] = Cptc[z]∆iload[k + 1] (29)

Cptc[z] =

[O 1

−ad

bd1bd

]In proposed method 2, the feedforward controller needs 1

sample before it begins controlling the system.

D. Proposed method 3

Proposed method 3 uses the predicted value of the loadcurrent of the converter, because the load current of theconverter is used as the control input of proposed method1 and 2 is delay. Block diagram of the proposed method 3is shown in Fig.5. In practice, by delaying the input of thereference torque to the inverter control system by 1 samplingperiod, the predicted value of the load current is obtained bythe feedforward controller of the inverter current. From thereference inverter current after 2 sampling periods, the loadcurrent after 1 sampling period iload[k+1] is predicted. Here,vc[k + 1] is needed to calculate iload[k + 1] but vc[k + 1] is1 sample foregoing value and not able to be measured. Whenvoltage variation after 1 sample is assumed to be sufficientlysmall, vc[k] is used in place of vc[k + 1]. iload[k + 1] is thusobtained by

iload[k + 1] =∆T ∗[k + 1]

Ti∗inv[k + 1]

=i∗inv[k + 1]

T 2binv[k](1− ainvz

−1)i∗inv[k + 2].

(30)

In practice, the feedforward controller has modeling errorsand therefore iload[k+1] has errors. The compensation currenticomp[k] is defined as icomp[k] = iload[k] − i∗load[k] and thecompensated predicted load current of the converter i∗load[k+1] is used for the feedforward control input of the proposedmethod 3. i∗load[k + 1] is calculated by

i∗load[k + 1] = iload[k + 1] + icomp[k]. (31)

E. Defining equilibrium point

In this paper, the plant model represented by (3) and (4) isa small signal model around an equilibrium point. Therefore,an equilibrium point needs to be defined. In this paper,the equilibrium point is an operating point before the loadvariation. Vc and Iload are the reference voltage vc

∗ and theload current of the converter before the load variation i∗load.From (7), D and Iin are calculated. All equilibrium points aredescribed as the following:

Vc = v∗c (32)

Iload = i∗load =∆T ∗

Ti∗inv (33)

D =E +

√E2 − 4rVcIload

2Vc(34)

Iin =Iload

D(35)

V. SIMULATION

In this section, the effectiveness of the proposed methods isverified by simulation. Parameters of the boost converter areshown in table I. The closed loop pole from v∗c to vc is -500rad/s.

TABLE IPARAMETERS OF BOOST CONVERTER

DC-bus voltage E 50 VOutput voltage reference v∗c 100 V

Winding resistance r 113 mΩInductance L 300 µH

Carrier Frequency fc 10 kHzLoad Inductance Ll 9.35 mHLoad Resistance Rl 7.90 Ω

A. Voltage response against load variation

Simulation results are shown in Fig. 6, where the loadvariation occurs in the load current simulator at t = 0 ms.Large voltage variation occurs with the conventional methodafter t is 0 ms because the bandwidth of a feedback controlleris not high compared to the speed of the load variation. Onthe other hand, the proposed methods suppress peak voltagevariation significantly. The proposed methods 1, 2, and 3suppress voltage variation about 89.6 %, 93.1 %, and 96.9 %, respectively, compared with the conventional method. In thissimulation, the unstable zero before the load variation is a fastzero of 27.7 krad/s. Therefore, there is little impact when theload current feedforward controller ignores the unstable zeroas designed in proposed method 2. Thus, proposed method2 is better than proposed method 1. Furthermore, iload[k]which has a 1-sampling-period delay is used as the inputof Cff [z] in proposed methods 1 and 2, while i∗load[k + 1]which has no delay is used in proposed method 3. In Fig.6(d), compensated predicted load current i∗load[k] is the almostsame value compared with the measured load current iload[k].Therefore, much further voltage suppression can be achieved.

B. Comparison with different output filter capacitors

Simulation results are shown in Fig. 7, where small outputcapacitors are used to compare the performances of the controlmethods. A feedforward controller and a feedback controllerare designed against each output capacitor. Since the outputfilter capacitor is smaller, voltage variation is larger. Theproposed methods suppress voltage variation largely comparedwith the conventional method in each output filter capacitor.By using a load current control, voltage variation is suppressedsignificantly. As shown by these results, downsizing of theoutput filter capacitor is achieved.

VI. EXPERIMENT

In this section, the effectiveness of the proposed methods areverified by experiments. Experiments were conducted underthe same condition as the simulations.

A. Voltage response against load variation

Experimental results are shown in Fig. 8. In the same wayas simulations, large voltage variation occurs when t = 0in the conventional method while in the proposed methods,voltage variations are much smaller. It is assumed that steadystate error of the duty ratio between the simulation and theexperiment was caused by parameter mismatching.

B. Comparison with different output filter capacitors

Experimental results are shown in Fig. 9. The conventionalmethod allows large voltage variation in small capacitor com-pared with the proposed methods. On the other hand, theproposed methods suppress voltage variation at almost thesame rate of the case when C = 1600 µF.

VII. CONCLUSION

In this paper, a precise load current feedforward con-troller against the load variation of a boost converter wasproposed. Simulations and experiments were conducted toshow significant suppression effects of the voltage variation.By suppressing voltage variation significantly, smaller outputcapacitor can be utilized.

In this paper, it was assumed that the unstable zero whichthe transfer function from the duty ratio to the output voltage isfast because the duty ratio and the load current are very high.Design of feedforward controller when the unstable zero isslow will be considered in the future.

REFERENCES

[1] J. Xu, and Y. Sato: “An investigation of minimum DC-link capacitancein PWM rectifier-inverter systems considering control methods”, in Proc.IEEE Energy Conversion Congress and Exposition (ECCE), pp.1071–1077, 2012.

[2] J. Itoh, D. Sato, and T.Shibuya : “Investigation and optimal design ofoutput capacitance in chopper by high speed voltage response control”,in Proc. IEEE 15th International Conference on Electrical Machines andSystems (ICEMS), pp.1–6, 2012.

[3] Y. M. Roshan and M. Moallem: “Control of Nonminimum Phase LoadCurrent in a Boost Converter Using Output Redefinition”, IEEE Trans.Power Electron., Vol.29, No. 9, pp.5054–5062, 2014.

[4] J. -C. Tsai, C. -L. Chen, Y. -H. Lee, H. -Y. Yang, M. -S. Hsu, and K.-H. Chen: “Modified Hysteretic Current Control (MHCC) for ImprovingTransient Response of Boost Converter”, IEEE Trans. Circuits andSystems, Vol.58, No. 8, pp.1967–1979, 2011.

[5] Y. Li: “Current Mode Control for Boost Converters With Constant PowerLoads”, IEEE Trans. Circuits and Systems, Vol.59, No. 1, pp.198–206,2012.

[6] K. Choi, H. -J. Kim, and B. H. Cho: “Load Current-Sensor-Less Feed-Forward Method for Fast Load Transient Response using Digital Con-trol”, in Proc. IEEE 28th Annual Applied Power Electronics Conferenceand Exposition (APEC), pp.2769–2772, 2013.

[7] B. Johansson: “Analysis of DC-DC converters with current-mode controland resistive load when using load current measurements for control”,in Proc. IEEE Power Electronics Specialists Conference, pp.165–172,2002.

[8] Z. Chen, W. Gao, J. Hu, and X. Ye: “Closed-Loop Analysis and CascadeControl of a Nonminimum Phase Boost Converter”, IEEE Trans. PowerElectron., Vol.26, No.4, pp.1237–1252, 2011.

[9] K. P. Gokhale, A. Kawamura, and R. G. Hoft: “Deat beat microprocessorcontrol of PWM inverter for sinusoidal output wavefortm synthesis”,IEEE Trans. Ind. Appl., Vol.23, No. 3, pp.901–910, 1987.

[10] H. Fujimoto, Y. Hori, and A. Kawamura: “Perfect Tracking Controlbased on Multirate Feedforward Control with Generalized SamplingPeriods”, IEEE Trans. Ind. Eletron., Vol.48, No.3, pp636–644, 2001.

[11] M. Tomizuka: “Zero Phase Error Tracking Algorithm for Digital Con-trol”, Trans. ASME, Jounal of Dynamic Systems, Mesurement, andControl, Vol.109, pp.65–68, 1987.

[12] K. Fukushima, and H. Fujimoto: “Vibration Suppression PTC of HardDisk Drives with Multirate Feedback Control”, Proc. 26th AmericanControl Conference, pp.55–60, 2007.

−5 0 5 10 15 20 2595

96

97

98

99

100

101

Time [ms]

Vo

lta

ge

[V

]

conventional

proposed1

proposed2

proposed3

(a) Output Voltage

−5 0 5 10 15 20 25−0.5

0

0.5

1

1.5

Time [ms]

Vo

lta

ge

[V

]

conventional

proposed1

proposed2

proposed3

(b) Voltage Error

−5 0 5 10 15 20 25

0.5

0.52

0.54

0.56

0.58

0.6

Time [ms]

Duty

ratio

conventional

proposed1

proposed2

proposed3

(c) Duty ratio

−5 0 5 10 15 20 252

3

4

5

6

7

8

9

Time [ms]

Curr

ent [A

]

conventionalproposed1proposed2proposed3proposed3(prediction)

(d) Converter load current

Fig. 6. Simulation results of voltage variation suppression against load variation (C = 1600 µF)

−5 0 5 10 15 20 2582

87

92

97

100

102

Time [ms]

Vo

lta

ge

[V

]

conventional

proposed1

proposed2

proposed3

(a) Output Voltage (C = 1600 µF)

−5 0 5 10 15 20 2582

87

92

97

100

102

Time [ms]

Vo

lta

ge

[V

]

conventional

proposed1

proposed2

proposed3

(b) Output Voltage (C = 400 µF)

−5 0 5 10 15 20 25−0.5

0

0.5

1

1.5

Time [ms]

Vo

lta

ge

[V

]

conventional

proposed1

proposed2

proposed3

(c) Voltage Error (C = 1600 µF)

−5 0 5 10 15 20 25−0.5

0

0.5

1

1.5

2

2.5

Time [ms]

Vo

lta

ge

[V

]

conventional

proposed1

proposed2

proposed3

(d) Voltage Error (C = 400 µF)

Fig. 7. Simulation results of voltage variation suppression when small output filter capacitor is used

−5 0 5 10 15 20 2595

96

97

98

99

100

101

Time [ms]

Vo

lta

ge

[V

]

conventional

proposed1

proposed2

proposed3

(a) Output Voltage

−5 0 5 10 15 20 25−0.5

0

0.5

1

1.5

Time [ms]

Vo

lta

ge

[V

]

conventional

proposed1

proposed2

proposed3

(b) Voltage Error

−5 0 5 10 15 20 25

0.5

0.52

0.54

0.56

0.58

0.6

Time [ms]

Duty

ratio

conventional

proposed1

proposed2

proposed3

(c) Duty ratio

−5 0 5 10 15 20 252

3

4

5

6

7

8

9

Time [ms]

Curr

ent [A

]

conventionalproposed1proposed2proposed3proposed3(prediction)

(d) Converter load current

Fig. 8. Experiment results of voltage variation suppression against load variation (C = 1600 µF)

−5 0 5 10 15 20 2582

87

92

97

100

102

Time [ms]

Vo

lta

ge

[V

]

conventional

proposed1

proposed2

proposed3

(a) Output Voltage (C = 1600 µF)

−5 0 5 10 15 20 2582

87

92

97

100

102

Time [ms]

Vo

lta

ge

[V

]

conventional

proposed1

proposed2

proposed3

(b) Output Voltage (C = 400 µF)

−5 0 5 10 15 20 25−0.5

0

0.5

1

1.5

Time [ms]

Vo

lta

ge

[V

]

conventional

proposed1

proposed2

proposed3

(c) Voltage Error (C = 1600 µF)

−5 0 5 10 15 20 25−0.5

0

0.5

1

1.5

2

2.5

Time [ms]

Vo

lta

ge

[V

]

conventional

proposed1

proposed2

proposed3

(d) Voltage Error (C = 400 µF)

Fig. 9. Experiment results of voltage variation suppression when small output filter capacitor is used