Load-Adaptive Control Algorithm of Half-Bridge Series Resonant Inverter for Domestic Induction...

3106 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 56, NO. 8, AUGUST 2009

Load-Adaptive Control Algorithm of Half-BridgeSeries Resonant Inverter for Domestic

Induction HeatingÓscar Lucía, Student Member, IEEE, José M. Burdío, Member, IEEE, Ignacio Millán, Student Member, IEEE,

Jesús Acero, Member, IEEE, and Diego Puyal

Abstract—Domestic induction cookers operation is based ona resonant inverter which supplies medium-frequency currents(20–100 kHz) to an inductor, which heats up the pan. The variableload that is inherent to this application requires the use of a reli-able and load-adaptive control algorithm. In addition, a wide out-put power range is required to get a satisfactory user performance.In this paper, a control algorithm to cover the variety of loadsand the output power range is proposed. The main design criteriaare efficiency, power balance, acoustic noise, flicker emissions, anduser performance. As a result of the analysis, frequency limit andpower level limit algorithms are proposed based on square waveand pulse density modulations. These have been implemented in afield-programmable gate array, including output power feedbackand mains-voltage zero-cross-detection circuitry. An experimentalverification has been performed using a commercial inductionheating inverter. This provides a convenient experimental testbench to analyze the viability of the proposed algorithm.

Index Terms—Digital control, home appliances, inductionheating, pulsewidth modulation, resonant power conversion.

NOMENCLATURE

Req Equivalent resistance of the induction system.Leq Equivalent inductance of the induction system.Cres Resonance capacitor.f Excitation frequency.ω Angular excitation frequency.Q Quality factor.Qres Quality factor at resonant frequency.fres Resonant frequency of the induction system.ωres Angular resonant frequency of the induction system.Isw-off Transistor switch-off current.Po Converter output power.P Target output power.SW Square wave.ADC Asymmetrical duty cycle.fs Switching frequency.D Duty cycle.

Manuscript received October 15, 2008; revised April 28, 2009. First pub-lished May 15, 2009; current version published July 24, 2009. This work wassupported in part by the Spanish Ministry of Science and Innovation (MICINN)under Project TEC2007-64188 and University Professor Formation (FPU)Grant AP2007-03276, in part by Diputación General de Aragón (DGA) underProject PI008/08, and in part by the Bosch and Siemens Home AppliancesGroup.

The authors are with the Department of Electronic Engineering and Commu-nications and the Aragon Institute for Engineering Research (I3A), Universityof Zaragoza, 50018 Zaragoza, Spain (e-mail: [email protected]).

Digital Object Identifier 10.1109/TIE.2009.2022516

T Switching period.td Dead time.PDM Pulse density modulation.TPDM PDM pulse period.ton PDM pulselength.F Power fluctuation shape factor.U Mains rms voltage.V̂bus Peak bus voltage.I Mains current.PF Power factor.dc Stable relative power fluctuation.dmax Maximum relative power fluctuation.tf Equivalent holding time.PPDM Power fluctuation with PDM.Pst Short-time power fluctuation.Plt Long-time power fluctuation.LISN Line impedance stabilization network.ZLISN Mains impedance operating with an LISN.ZVS Zero-voltage switching.DCM Discontinuous current mode.PL Power level limit.FL Frequency limit.EMC Electromagnetic compatibility.VHSIC Very high speed integrated circuit.VHDL VHSIC hardware description language.FSM Finite-state machine.FPGA Field-programmable gate array.

I. INTRODUCTION

DOMESTIC induction technology has become more pop-ular in recent years due to features such as efficiency,

safety, and accurate output power control, which outperformother traditional domestic heating technologies. The designof these appliances involves the research and development ofefficient reliable cost-effective power electronics systems [1].

The main blocks of an induction cooking appliance areoutlined in Fig. 1. The energy taken from the mains is filteredby an EMC filter, which prevents the device from insertinginterferences, and it provides immunity to voltage transients.Afterward, the voltage is rectified and filtered, generating a dcbus. A low value of filter capacitor is chosen to get a highPF, and, as a consequence, a high-ripple dc bus is obtained.Then, the resonant inverter supplies variable-frequency current

0278-0046/$26.00 © 2009 IEEE

LUCÍA et al.: CONTROL ALGORITHM OF RESONANT INVERTER FOR DOMESTIC INDUCTION HEATING 3107

Fig. 1. Induction cooking appliance block diagram.

Fig. 2. Half-bridge series resonant inverter. (a) Schematic. (b) Main wave-forms and control parameters.

(20–100 kHz) to the induction coil. This current produces analternating magnetic field, which causes eddy currents andmagnetic hysteresis heating up the pan.

The half-bridge series resonant inverter (Fig. 2) is the mostemployed topology due to its simplicity, its cost-effectiveness,and the electrical requirements of its components [2]–[4]. Theresonant tank consists of the pan, the induction coil, and theresonance capacitor (Cres). Induction-coil-and-pan coupling ismodeled as a series connection of an inductor and a resistor,based on the analogy of a transformer, and it is defined bythe values of Leq and Req [5]. These values change mainlywith excitation frequency ω, pan material, temperature, andinductor–pan coupling.

Designing an appliance that is able to heat different ma-terials with the same precision has been a challenging tasksince the beginning of technology development [6], [7]. Inaddition, cooking appliances require accurate power controlover a wide range to fulfill the user requirements. This implies awide operation range, where a ZVS condition must be fulfilledto ensure high efficiency [8], [9]. Previous works proposeconstant-frequency modulations to achieve simply power con-trol. In [10], constant-frequency PDM for a 1.6-kW applianceis proposed. However, acoustic noise and flicker regulations arenot considered. Other approximations are based on constant-frequency ADC modulation [11], [12]. This provides an ef-ficient mode to control power, but it has some drawbacks,such as reduced power range and ZVS operation region, andasymmetrical device losses. Recent trends suggest DCM to

supply low/medium power with improved efficiency [13]. Nev-ertheless, control complexity and reduced power levels makeunfeasible to fulfill the requirements. In [14], several controlalgorithms are proposed but without detailing the flicker designand digital implementation.

The aim of this paper is to present the design of a load-adaptive control algorithm designed for a 3-kW output powerinverter. This paper is focused on EMC standard requirements,efficiency, easy digital integration, and user performance.

This paper is organized as follows. The main criteria consid-ered in designing the control algorithm are briefly outlined inSection II. Section III explains the modulation strategies andtheir combinations to complete the control algorithm. After-ward, the digital implementation of the control algorithm isdetailed in Section IV. Section V summarizes the experimentalanalysis performed, comparing power balance, user perfor-mance, flicker emission, and efficiency. Finally, in Section VI, acomparison with previous control strategies is performed. Themain conclusions of this paper are outlined in Section VII.In addition, the flicker design guidelines are presented in theAppendix.

II. DESIGN CRITERIA

Designing the control algorithm for an inverter operating un-der varying load conditions implies the proper balance betweenstandards fulfillment, efficiency, and performance. The mainfactor which determines the modulation strategy is the variable-load operation of the inverter. Moreover, the output powerrange, acoustic noise, user performance, and flicker standardsmust be also considered. The main implications of these factorsare highlighted in the following paragraphs.

A. Variable-Load Operation

Different pan materials, relative position between pan andinductor, excitation frequency, and temperature change theequivalent load (Req and Leq) of the inverter [15], [16]. Theload is usually described by its quality factor Q, defined bythe following, which depends on the excitation frequency ω

Q =Xeq

Req=

ωLeq

Req. (1)

In addition, it is common to classify the loads by the qualityfactor at the resonant frequency fres(Qres). The resonant fre-quency depends on Cres, and it is given by

fres =1

2π√

LeqCres

. (2)

Fig. 3 shows the Req and Leq variations for an inductor de-signed to deliver 3000 W coupled to a standard induction load.The variation of these parameters changes the inverter operationconditions, and, as a consequence, efficiency and power controlcapabilities are altered [17]. The proposed control algorithmmust be adaptable and reliable enough to supply the targetoutput power to different ferromagnetic materials.


Fig. 3. Experimental and calculated results from the analytical models forthe induction system. (a) Frequency-dependent resistance. (b) Frequency-dependent inductance.

B. Wide Output Power Range

Domestic cooking application requires accurate power con-trol to achieve satisfactory cooking experience. The outputpower (Po) for a standard inductor has to vary from 50 to3000 W. Inverter modulation strategies are not able to op-erate in the complete power range due to efficiency, EMCstandards, and user performance restrictions. As a conse-quence, an adequate combination of modulation strategies isrequired.

C. Acoustic Noise

Switching frequencies near to an audible range (20 Hz upto 20 kHz) generate acoustic noise [18] due to the vibration ofthe magnetic elements, the inductor, and the pan. Furthermore,for multiple-burner appliances operating at different switchingfrequencies, audible-frequency beating interferences could ap-pear. Since induction cooker users do not expect to hear anynoise coming from the electronics or the pan, restrictions inswitching frequency must be taken. Inverter switching frequen-cies must be above 20 kHz, and the transition between differentmodulations must be carried out at frequencies below 20 Hz. Acomplete noise sources analysis in induction heating appliancescan be found in [19].

D. Flicker Standards

EMC standards impose limits to flicker emission in orderto prevent failure of sensitive devices, particularly lighting ap-pliances [20], [21]. These regulations determine the maximumswitched power as a function of period, establishing limits topulsed control strategies. The design example of this paper hasbeen carried out following the International ElectrotechnicalCommission (IEC) standards [22], which have been studiedand proposed for use by the IEEE workgroup p1453 [23].This text provides an analytical method, based on experimentalresults, to calculate the maximum allowed power fluctuations.The complete design flow is detailed in the Appendix.

III. CONTROL STRATEGY

A. Modulation Strategies Overview

The modulation strategies traditionally used in domesticinduction heating are SW modulation [24], ADC modulation[25], [26], and PDM [27], [28]. The basic operation of thesemodulations is explained as follows.

SW modulation varies the output power by changing theswitching frequency fs [Fig. 4(a)], whereas ADC modulationvaries the fs and the duty cycle (D) to set the target power[Fig. 4(b)]. These modulations are used in the middle/highoutput power range (500–3200 W) because of their high ef-ficiency that is close to the resonant frequency. However, theefficiency decreases in the lower power range due to the highswitching frequency required, which implies higher switchinglosses. Considering the wide output power range required andthe low quality factor that is typical of induction loads, SW andADC modulations become unpractical in the low power range.

The power control curves and the ZVS region with SW andADC modulations for two different ferromagnetic loads withQres = 1.66 and Qres = 8 are shown in Fig. 5. It is shown thatthe ZVS region and the frequency and duty cycle ranges areconsiderably load dependent. To satisfy the ZVS condition, thesnubber capacitor (Cs) charge time (tsnubber) must be lowerthan the diode conduction time (tdiode). Considering the lowvalue of the snubber capacitor and the high switch-off currents,the charge current can be considered constant and equal tothe transistor switch-off current (Isw-off). Then, the followingcondition calculated as a function of Cs must be satisfied:

tsnubber =2CsVbus

Isw-off< tdiode. (3)

Since the voltage across the load vo is known, the con-verter simulation can easily be performed through harmonicdecomposition. The simulation has been carried out starting atmaximum fs for each D and finishing when the aforementionedZVS condition is not fulfilled. In addition, ADC modulationimplies asymmetrical switches current distribution, and, as aconsequence, the most restrictive condition must be considered.

PDM is used in the low output power range in order toimprove efficiency and to limit maximum fs. It is based onapplying SW or ADC modulations discontinuously along timeto reduce the output power (Fig. 6) [29]. As a consequence, the


Fig. 4. Continuous modulation schemes main waveforms. (a) SW modulation. (b) ADC modulation.

Fig. 5. Continuous modulation schemes. Power control and ZVS region withCs = 15 nF for different D for (a) Qres = 1.66 and (b) Qres = 8.

power fluctuation (PPDM) with this modulation strategy is thesame for all power levels. The control parameters are switchingfrequency (fs,PDM) and duty cycle (DPDM) of PDM, pulseperiod (TPDM), and pulselength (ton).

The maximum and minimum values of TPDM are deter-mined by user performance considerations and flicker emission

Fig. 6. PDM main waveforms and parameters.

limits, respectively. One of its main advantages is the lineardependence of output power with ton. Since the dynamics ofReq−Leq−Cres circuit is faster enough than TPDM and ton[30], the output power is calculated as follows:

Po =ton

TPDMPo(fs = fs,PDM) =

tonTPDM

PPDM. (4)

Usually, SW and ADC modulations are preferred to the PDMcontrol strategy due to the lower maximum power required,lower flicker emission, and the lack of user perceptible boilingpulses and bus capacitor discharge noises. However, a combina-tion of these strategies is required to cover the complete outputpower range. Table I summarizes the modulation strategies,their control parameters, and the application range.

B. Control Algorithms

A control algorithm that is composed of several modulationstrategies must be implemented to satisfy the power controlrequirements. The proposed algorithms are based on the useof SW modulation in the medium/high output power rangeand PDM in the low output power range. SW modulation ispreferred over ADC due to its symmetrical loss distribution inthe devices and lower harmonics content.

PDM is implemented, keeping the switching frequency con-stant and adjusting the output power through TPDM and ton.


TABLE IINVERTER MODULATION STRATEGIES

Fig. 7. Power control algorithm for different induction loads l1 and l2. (a) FLalgorithm. (b) PL algorithm.

This combination simplifies the final implementation by reduc-ing freedom degrees. Thus, the considered control parametersare fs, TPDM, and ton.

Transitions between SW modulation and PDM can be imple-mented through two different algorithms: maximum FL and PLalgorithms. These are shown in Fig. 7, where power as a func-tion of switching frequency for different ferromagnetic loads isrepresented. The switching frequency has been normalized withresonant frequency. Moreover, the different modulation strategyregions for both FL and PL algorithms are detailed.

The FL algorithm [Fig. 7(a)] is based on the change ofthe modulation when a certain maximum switching frequencyis reached (fs,t), independently of the output power. Thisalgorithm maximizes SW modulation use, but complexity isincreased because transition output power (Pt,i) and ton varywith the load.

The PL algorithm [Fig. 7(b)] is based on the change of themodulation when a certain power level is reached (Pt). Hence,PDM becomes easier since ton is equal for all loads. However,

Fig. 8. Induction heating appliance control loop block diagram.

transition frequency changes with the used load (fs,t,i), leadingto a bandwidth misuse.

IV. DIGITAL IMPLEMENTATION

The described control algorithms have been implemented inan FPGA to arrange a versatile test bench [31]. The descriptionhas been performed in VHDL, and it is divided into two blocks,the digital pulsewidth modulator (DPWM) and the control unit(CU), which are outlined in Fig. 8.

The control algorithm sets the modulation parameters to theDPWM, which generates the gating signals for the insulated-gate bipolar transistor. The control loop is closed with theoutput power measurement [32], [33], while the load cur-rent measurement ensures proper inverter operation. Powermeasurements include input-voltage feedforward which allowsadapting the modulation parameters to mains voltage andreducing devices stress [34]. Moreover, a mains-voltage zero-cross-detection circuit has been implemented in order to syn-chronize the PDM pulses with the mains frequency. Thus,appliance reliability and PF are improved by switching on themodulation at low voltage levels during an integer number ofmains half-cycles. The PWM (Fig. 9) is based on a 16-b counterand several comparators defining period (T ), duty cycle (D),and dead times (td1 and td2) [35].

The control algorithm in the CU is implemented through anFSM that is composed of three states: S_IDLE, S_SW, andS_PDM (Fig. 10). S_IDLE is the state for the target outputpower P = 0. When a certain P is set, S_SW state is reached,and SW modulation is applied. If the target output power is lowenough, S_SW-to-S_PDM transition condition can be satisfied,and PDM is applied. This transition condition depends on theimplemented algorithm FL, switching frequency dependent, orPL, output power dependent. Finally, if S_PDM is the current


Fig. 9. Counter-based DPWM.

Fig. 10. CU FSM: states, state actions, and transition conditions.

state and the output power is below the target, the transition toS_SW is carried out to supply the required output power.

Since power converter dynamics is much faster than thethermal system, the converter transient response is not critical.As a consequence, the changes in the control parameters aretaken in fixed steps to ensure converter reliability. Moreover,a certain hysteresis Δ = 3% is applied to the target outputpower to ensure algorithm stability. The FSM implemented inthe CU is shown in Fig. 10, where the states, state actions,and transition conditions are outlined. In addition, the transientresponses for a target output power variation from 0 W to 3 kWand from 3 kW to 100 W, applying FL algorithm with fs,t =75 kHz, are shown in Fig. 11. For the considered load, Po,max

is reached when fs = 30 kHz, and the output power with PDMcan be calculated as

Po =ton

TPDMPPDM =

0.452.25

· 500 W = 100 W. (5)

V. EXPERIMENTAL VERIFICATION

A. Experimental Test Bench

The FL and PL algorithms have been implemented and testedin the full output power range for different ferromagnetic loads.The experimental setup is based on a commercial inductionheating inverter and its associated inductor (Fig. 12). TheFL and PL algorithms have been implemented in a Xilinx

Spartan-3 FPGA. Measurements have been carried out withYokogawa PZ4000 power analyzer and Tektronix 5054B digitaloscilloscope.

The design parameters have been chosen according to flickerand acoustic noise considerations. It has been selected a transi-tion frequency of 75 kHz for the FL algorithm and a transitionoutput power of 900 W for the PL algorithm. A minimumswitching frequency of 20 kHz has been set to avoid acousticnoise emissions. In addition, Cres has been selected to set theload resonant frequency above 20 kHz to avoid the audiblerange for the most common induction loads. The main inverterspecifications are summarized in Table II.

The flicker design parameters for the FL and PL algorithmsare outlined in Table III. TPDM,min has been chosen to be2.25 s based on user performance considerations to avoidboiling pulses. Applying the flicker guidelines detailed in theAppendix, the short-time power fluctuation Pst for this applica-tion can be calculated as

Pst =(

2tfTPDM

) 13.2

(6)

where tf is the equivalent holding time, which is calculatedusing the following expression as a function of the relativevoltage fluctuation d:

tf =2.3(F · d)3.2 = 2.3(

1 · 100 · ΔU

U

)3.2

≈ 2.3(

100U2

PPDM · |ZLISN|)3.2

(7)

where F is the shape factor, and ZLISN is the LISN impedance.Then, applying (6) and (7) and considering Pst = 1, a maxi-mum power fluctuation (PPDM,max) of 900 W is obtained. Asa result, for these parameters, the maximum voltage fluctuationdmax is 0.8, which is lower than the standards limit.

The induction loads used for the experimental verificationand the resonant frequency for the selected Cres are shownin Table IV. It has been selected a 16-turn inductor designedfollowing the procedures shown in [36] and [37]. After that,the final experimental values have been obtained by meansof a versatile large-signal induction-load characterization testbench [38]. The measured parameters include fs, D, TPDM,ton, Po, and efficiency (η). Efficiency has been measured asthe relation between the output power (inductor) and the inputpower (mains).

B. Experimental Results

The experimental test performed compares FL and PL powerbalance, user performance, flicker emission, and efficiency.The experimental waveforms of SW modulation and PDM areshown in Fig. 13. Fig. 14 shows the power control as a functionof the control parameter for the considered ferromagnetic loadsA, B, and C. These values show the stationary Po point reachedby the control algorithm.

For the medium/high power range operating with SWmodulation, fs is the control parameter [Fig. 14(a) and (c)].Furthermore, when maximum frequency is reached, fs is


Fig. 11. Transient response to a target output power variation from 0 W to 3 kW and from 3 kW to 100 W, applying FL algorithm with fs,t = 75 kHz.

Fig. 12. Experimental setup: induction heating appliance inverter and induc-tion coil.

TABLE IIINVERTER SPECIFICATIONS

kept constant, and ton/TPDM becomes the control parameter[Fig. 14(b) and (d)].

The FL algorithm [Fig. 14(a) and (b)] applies the sametransition frequency for all loads, maximizing the use of SWstrategy. This implies better user performance behavior, since

TABLE IIIFLICKER DESIGN PARAMETERS

TABLE IVINDUCTION LOAD PARAMETERS AT RESONANT FREQUENCY

the user will not notice the boiling pulses, and lower flickeremission. Moreover, in Fig. 14(d), it is shown that, by applyingthe PL algorithm, the power is delivered by means of pulsesof 900 W regardless of the load, whereas, applying the FLalgorithm, the power is delivered in pulses of 500 W withcertain loads [Fig. 14(b)]. On the other hand, the PL algorithm[Fig. 14(c) and (d)] applies the same transition power, makingeasier power control in the PDM mode.

Despite the benefits shown by the FL algorithm, its efficiencyis compromised by the use of higher switching frequency.Fig. 15(a) shows that the efficiency decreases in the low powerrange due to the high switching frequencies, which are farfrom the resonant frequency. PDM strategy is intended to avoidefficiency degradation at low power levels, keeping switchingfrequency and efficiency constant. The PL algorithm achieves


Fig. 13. Experimental waveforms. (a) SW modulation: 20 A/div, 75 V/div,and 5 μs/div. (b) PDM: 20 A/div, 75 V/div, and 400 ms/div.

better average efficiency in the low power range as a conse-quence of its lower transition frequencies to PDM.

VI. DISCUSSION

Traditionally, power converters that are controlled with onlyone modulation technique have been proposed due to theirsimplicity and reliability. However, these are intended to op-erate with a well-defined load or output power. Furthermore,the domestic application implies additional restrictions due toEMC standards and user performance. The proposed controlalgorithms FL and PL and the converter design example focuson meeting all those requirements.

Table V compares the traditional control schemes SW, ADC,and PDM with the proposed control schemes applied to thesame converter. It is shown that the use of a single classicalcontrol strategy is unfeasible due to considerations concerningdevices stress, efficiency, user performance, flicker emission,or power controllability. Efficiency is decreased with SW andADC modulations in the low power range due to the higherswitching losses. PDM achieves higher efficiency, although itpresents poor user performance and higher flicker emissions.However, proper strategy combinations, as the proposed FLand PL algorithms, combine the good features in each powerrange to obtain the optimum control strategy. These strategiesincrease slightly the control complexity.

VII. CONCLUSION

This paper presents the design of a load-adaptive invertercontrol algorithm and its experimental implementation andverification for a 3-kW induction heating converter. The main

aspects concerning the design of a domestic induction heatingappliance have been analyzed, including load and power varia-tions, flicker emission, user performance, and efficiency.

Two different control algorithms have been proposed: max-imum FL and PL algorithms. Both of them are based onSW modulation and PDM. These have been implemented inan FPGA, which allows controlling a commercial inductionheating inverter to perform experimental verifications.

The experimental analysis carried out shows that the PLalgorithm has better efficiency in the low/medium power range.However, the lower power fluctuations with FL algorithm implylower flicker emission and better user performance due tothe lack of noticeable discontinuous boiling. Considering thedesirable features for a domestic appliance, the FL algorithm ispreferred due to its better user performance.

APPENDIX

CONVERTER DESIGN ACCORDING TO IECFLICKER STANDARDS

Flicker standards impose limits to power fluctuations inhome appliances. The IEC provides in [22] an analyticalmethod to estimate flicker emission and, thus, to design powerconverters properly. The following lines summarize the designmethod for a domestic induction heating device.

The maximum power fluctuations are considered in short-(Pst) and long-observation (Plt) times. However, for domesticcookers, only Pst is considered. According to the IEC stan-dards, Pst is based on a 10-min window, and it is defined asfollows:

Pst =(∑

tfTP

) 13.2

(8)

where tf is the equivalent holding time, and TP is the observa-tion time. Several measurements are often required to obtain anaverage value (Pst) of Pst. Thus, the flicker emission limit isexpressed as

Pst =

n∑i=1

Pst,i

n< 1. (9)

For electric cookers, n = 5 is required by the IEC standards.Moreover, the equivalent holding time tf for a given inputpower is

tf = 2.3(F · d)3.2 (10)

where F is the power fluctuation shape factor coefficient, and dis the relative voltage fluctuation. In the case of square-voltagefluctuations, F equals to one, and Pst is simplified to

Pst =(

2tfTPDM

) 13.2

= d

(4.3

TPDM

) 13.2

. (11)

Finally, the parameter d is calculated as follows:

d =ΔU

U(12)


Fig. 14. Experimental results of the output power as a function of control parameters for different ferromagnetic loads A, B, and C. FL algorithm with (a) SWmodulation and (b) PDM. PL algorithm with (c) SW modulation and (d) PDM.

Fig. 15. Experimental results of power converter efficiency. (a) FL algorithm.(b) PL algorithm.

where U is the mains rms voltage, and ΔU is the mains voltagefluctuation. In addition to Pst limits, d between 1-s stableconditions (dc) and maximum d (dmax) is also limited.

The mains impedance is stabilized through an LISN, withknown impedance ZLISN = RLISN + jXLISN. Thus, ΔU can

TABLE VCONTROL STRATEGY COMPARISON

easily be calculated using (10)

ΔU = |ΔU | = |ΔI · ZLISN|. (13)

For single-phase and equilibrated three-phase appliances,ΔU can be simplified as

ΔU =∣∣ΔRe(I) · RLISN + ΔIm(I) · XLISN

∣∣ . (14)


TABLE VIFLICKER EMISSION LIMITS

The guidelines presented in this paper have been used todetermine the PDM parameters (PPDM,max and TPDM,min)to achieve proper converter power control and limited flickeremissions. Table VI summarizes the flicker emission lim-its for domestic induction heating appliances according toIEC 1000-3-3.

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Óscar Lucía (S’04) received the M.Sc. degreein electrical engineering from the University ofZaragoza, Zaragoza, Spain, in 2006. He is currentlyworking toward the Ph.D. degree in the Departmentof Electronic Engineering and Communications,University of Zaragoza.

He is currently a member of the Aragon Insti-tute for Engineering Research (I3A), University ofZaragoza. His main research interests include in-duction heating applications, multiple-output powerconverters, resonant inverters, and digital control and

modulation strategies applied to power converters.

José M. Burdío (M’97) received the M.Sc. andPh.D. degrees in electrical engineering from the Uni-versity of Zaragoza, Zaragoza, Spain, in 1991 and1995, respectively.

He is with the University of Zaragoza, where he iscurrently a Professor in the Department of ElectronicEngineering and Communications and a member ofthe Aragon Institute for Engineering Research (I3A).His main research interests include modeling ofswitching converters and resonant power conversionfor induction heating applications.

Ignacio Millán (S’08) received the M.Sc. degreein electrical engineering from the University ofZaragoza, Zaragoza, Spain, in 2005. He is currentlyworking toward the Ph.D. degree in the Departmentof Electronic Engineering and Communications,University of Zaragoza.

He is currently a member of the Aragon Insti-tute for Engineering Research (I3A), University ofZaragoza. His main research interests include modu-lation strategies for resonant converters for inductionheating applications, analysis and modeling of losses

of switching devices, and multiple-output resonant inverter topologies.

Jesús Acero (M’06) received the M.Sc. and Ph.D.degrees in electrical engineering from the Universityof Zaragoza, Zaragoza, Spain, in 1992 and 2005,respectively.

From 1992 to 2000, he worked on several indus-try projects, particularly on custom power suppliesfor research laboratories. Since 2001, he has beenan Assistant Professor in the Department of Elec-tronic Engineering and Communications, Universityof Zaragoza. He is also a member of the Aragon In-stitute for Engineering Research (I3A), University of

Zaragoza. His main research interests include resonant converters for inductionheating applications, inductive-type load modeling, and magnetics.

Diego Puyal received the M.Sc. and Ph.D. degrees intelecommunication engineering from the Universityof Zaragoza, Zaragoza, Spain, in 2003 and 2009,respectively.

He has been an Assistant Professor in the De-partment of Electronic Engineering and Communi-cations, University of Zaragoza, where he currentlyworks in the fields of induction heating load char-acterization, high-frequency resonant power invert-ers, and performance comparison of inverter controlstrategies. He is also a member of the Aragon Insti-

tute for Engineering Research (I3A), University of Zaragoza.

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