Linear and Digital Integrated Circuits

8/12/2019 Linear and Digital Integrated Circuits

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EI332-LINEAR & DIGITAL INTEGRATED CIRCUITS

UNIT 1

FABRICATION OF INTEGRATED CIRCUITS

1.What is an integrated circuit?

The integrated circuit or IC is a miniature , low cost electronic circuit consisting of active andpassive components that are irreparably joined together on a single crystal chip of silicon.

.!ist the advantages of IC over discrete component circuit.

"iniature and hence increased e#uipment density. Cost reduction due to batch processing Increased system reliability due to the elimination of soldered joints. Improved functional performance "atched devices Increased operating speeds $eduction in power consumption.

%.&roadly classify IC's.

(igital ICs !inear ICs

).*how the classification of ICs.

Integrated circuits

"onolithic circuits +ybrid circuits

&ipolar nipolar

-n junction (ielectric "/*0T 20Tsolation isolation

3.What is a monolithic circuit?It means a circuit fabricated from a single stone or a single crystal.

4.What are the ) distinct layers if IC?

!ayer no.15r )66 m7, is a -type silicon substrate upon which the IC is fabricated.!ayer no.5r 33 m7, is a thin ntype material grown as a single crystal e8tensin of the substrateusing epita8ial deposition techni#ues.9ll active and passive components are fabricated within this

layer using selective diffusion of impurities.


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!ayer no.%56.6 m7, is a very thin *io layer for preventing diffusion ofmpurities wherever not

re#uired using photo lithographic techni#ue.

!ayer no.)5r 1 m7, is an aluminium layer used for obtaining interconnectionbetween components.


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:.What are the basic processes used to fabricate ICs using planar technology?

o *ilicon wafer5substrate7preparation

o pita8ial growth

o /8idation

o

-hotolithographyo (iffusion

o Ion implantation

o Isolation techni#ue

o "etalli;ation

o 9ssembly processing and pac.Write the basic chemical reaction used for the epita8ial growth of pure silicon.

The basic chemical reaction used for the epita8ial growth of pure silicon ishe hydrogen

reduction of silicon tetrachloride. 166

oc

*iCl) + *i )+Cl

16.What are the important properties of *io?*io has the property of preventing the diffusion of almost all impurities through it.It

serves very important purposes.

*io is an e8tremely hard protective coating and unaffected by almost all reagents e8cept by

+Cl.Thus it stands against any contamination.

&y selective etching of *io ,diffusion of impurities through carefully defined windows in the*io can be accomplished to fabricate various components.

11.Why is the o8idation process called the thermal o8idation?&ecause high temperature is used to grow the o8ide layer.

1.What are the process involved in photolithography?

-hotographic mas


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1).@ame the technologies used for the fabricators or ICs

"onolithic technology

+ybrid technology

13.8plain the word Apita8yB.

It means arranging atoms in single crystal fashion upon a single crystal substrate,so that the

resulting layer is an e8tension of the substrate crystal structure.

14.8plain the process of o8idation.

The silicon wafers are stac36 to 1136oC and at the same

time,e8posed to a gas containing / or +/ or both.The chemical reaction is

*i +6 *i/ +

1:.What are the advantages of ion implantation techni#ue?

It is performed at low temperature.Therefore previously diffused regions have alesser tendency for lateral spreading.

In diffusion process ,temperature has to be controlled over a large area inside theoven,whereas in ion implantation techni#ue,accelerating potential and the beamcontent are dielectrically controlled from outside.

1=.!ist any isolation techni#ues.

-n junction isolation (ielectric isolation

1>.Write short notes on dielectric isolation.

In dielectric isolation, a layer of solid dielectric such as silicon di o8ide oruby

completely surrounds each component, thereby producing isolation ,both electrical andphysical.This isolation dielectric layer is thic< enough so that its associated capacitance is

negligible.9lso,it is possible to fabricate both pnp and npn transistor within the same siliconsubstrate.

6."ention the use of dielectric isolation

sed for fabricating professional grade ICs re#uired for speciali;edpplications

vi;.aerospace and military,where higher cost is justified by superior performance.

1.What is metalli;ation?The process to produce a thin metal film layer that will serve to ma


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o 9luminium forms low resistance,nonrectifying contact with ptype silicon and the

heavily doped ntype silicon.

%.@ame the % different pac


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>.Write shot notes on vertical pnp transistors.The ptype substrate itself is used as pcollectors nepita8ial layer for the base and the ne8t

pdiffusion5base in npn structure7as the emitter region. This type of pnp transistor has the

limitation that collector has to be held at the most negative potential in the circuit

for

providing good isolation.

%6.What is a triple diffused pnp transistor?

If to a standard npn transistor, an e8tra ptype diffusion is added after the ndiffusion, it is

#uite possible to obtain a pnp transistor and is


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%4.What are silicon gate "/* transistors?

-olycrystallane silicon when doped with phosphorous is conductive and isused as the gate

electrode instead of aluminium.This reduces DTto about 1 to D.*uch device are called silicon

gate "/* transistors.

%:.Compare thic< and thin film technologies.

Thic< film ICs are made by the process of screen printing,usually sil.Why are series regulators called as series voltage regulators?

*ince the transistors conduct in the active or linear region,theseregulators are called linear regulators or series regulators or voltage regulators.

=6.What is an oscillator?It is basically a feedbac< circuit where,a fraction D0of the output voltage D/of an

amplifier is feedbac< to the input.

=1.What are the conditions to be satisfied for sustained oscillation?

The magnitude condition 9D H 1 9D H 6o or %46o

=.Classify sine wave oscillators based on the range of fre#uency.

$C /scillators for audio fre#uency

!C oscillators for radio fre#uency.

=%.Why there is no phase shift provided in the feedbac< networ< in Wein&ridge oscillator?In Weinbridge oscillator, the feedbac< signal is connected to the 57 input terminal so that,

the opamp is wor


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It is often a fre#uency selective circuit that passes a specified band of fre#uencies andbloc


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==.What are the advantages of active filters?

Gain and frequency adjustment flexibility:*ince the opamp is capable ofproviding a gain,the input signal is not attenuated.The active filter is easier to tune or

adjust.

No loading problem:&ecause of the high input resistance and low output

resistance of the opamp,the active filter does not cause loading of the source or load. Cost:Typically active filters are more economical.This is because of the

variety of cheaper opamps and the absence of inductors.

=>.What are the basic elements of filters?ach filter consists of opamp as an active element and resistors and capacitors as passive

elements.

>6.Why is the &utterworth filter called flatflat filter?

The main characteristic of &utterworth filter is that,it has flat passband as well as stop

band.*o &utterworth filter is called flatflat filter.

>1.What are the steps involved in designing a low pass filter?

Choose a value of high cutoff fre#uency f+. *elect a value of C less than or e#ual to 1 0 Calculate the value of $ using $ H 1

f+C 0inally select values of $1and $fdependent on the desired pass band gain90using,

9fH 15$fL$17.

>.What is fre#uency scaling?

The procedure used to convert an original cutoff fre#uency f+to a new cutoff fre#uency f+is called fre#uency scaling.

>%.What are the steps involved in designing second order low pass filter?

Choose a value of high cutoff fre#uency f+. *et $H$%H$ and CHc%HC and choose a value of C less than or e#ual to 1 0. Calculate the value of $ using $ H 1

f+C $0should be e#ual to 6.3=4$1.+ence choose a value of $1 166 and calculate the

value of $f.

>).The rolloff rate in the stop band of second orderlow pass filter is t6ie.

>3.What is a band pass filter?

9 filter that allows the signal to pass through it, between the cut off fre#uencies f+ and f!and attenuates all other fre#uencies outside this passband is called as a band pass filter.

>4.What are the types of band pass filters?


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Wide band pass filter,which has its figure of merit S,less than 16.

@arrow band pass filter,which has its figure of merit S,greater than 16.


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>. What is a register file?It is a collection of wordsi;e storage registers.

16. 8plain the half adder circuit.

9 half adder circuit has ; inputs58 and y7 and outputs5 the sum * and the carry out C7.The

outputs are given by the e#uation

* H 8 yCH8.y

11. Write the verilog behavourial description of half adder circuit.

"odule half adder5sum, cout,8,y7

Input 8,y

/utput sum,cout9ssign5cout,sum7H8 y

nd module.

1. Write the high level D+(! description of full adder circuit.

"odule full adder5sum, cout,a,b,cin7Input a,b,cin

/utput sum,cout

9ssign5cout,sum7Habcinnd module.

1%. What are the % operational modes of *$9"?

They are hold, write and read.When the cell is in hold state, the value of the bit is stored in

the cell for future use. (uring a write operation ,a logic 6 or 1 is fed to the cell for

storage.The value of the stored bit is transmitted to the outside world during a read operation.

1). What is static noise margin?It is the separation between the curves along a )36 slope in the drawing and has unit of

volts.

13. +ow is butterfly plot obtained?

It is obtained by forcing an input on one of the internal nodes and plotting the response on

the other side,then performing the same operation to the other side.

14. +ow are *$9" arrays obtained?They are created by replicating the basic storage cell and adding the necessary peripheral

circuitry.

1:. 9 1=X= *$9" chip holds 1=< =bit words for a total of 1"b of total storage.Whatshould be the

width of address word to select every =bit word location."Hlog51=Y7H1: to select every =bit word location.

1=. What is a floating gate?

9 reprogrammable $/" array is built using special 0Ts that use a pair of stac


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transistor.+owever,another poly gate layer is sandwiched in between the top poly and

silicon substrates.It is not electrically connected to any part of the transistor or au8illary

circuitry and is therefore called as electrically floating gate.

1>. What is gate array?

It is used to describe an entire class of devices.It refers to a user programmable chip thatcan be logically configured.

6. What is logic array?

It is a structural unit that can be AprogrammedB to provide various functions and systemtas


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9pply the data bits that must be stored in memory to the data input lines. 9ctivate the write input. The memory unit will then ta. What is the procedure followed to ta


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%. +ow does the read write input determines the type of operation?If read write is 1,the memory performs a read operation symboli;ed by the statement,

(ataout "emZ9ddress[If read write is 6,the memory performs a write operation symboli;ed by the statement,

"emZ9ddress[ (ataIn

%%. 8plain *$9".It is an operating mode.It consista of internal latches that stores the binary

information.The stored information remains valid as long as power is applied to the unit.It iseasier to use and has shorter read and write cycles.

%). 8plain ($9".

It is an operating mode,which stores the binary information in the form of electric charges oncapacitors.The capacitors are provided in inside the chip by "/* transistors.The stored charge on

the capacitors tend to discharge with time and the capacitors must be periodically recharged byrefreshing the dynamic memory. $efreshing is done by cycling through the words every few

milliseconds to restore the decaying charge.

%3. (ifferentiate volatile and non volatile memory.

%4.

%3.What is the use of dimensional decoding?Eive an e8ample.sed to arrange the memory cells in an array in the form of a s#uare.

0or e8ample9 decoder with Y inputs and


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%>. !ist out the advantage and disadvantage of dynamic $9" cell.

Ad0anta$e7

This type of cell is very simple thus allowing very large memory arrays to beconstructed on a chip at a lower cost per bit than in static memories.

Di'ad0anta$e7

The storage capacitor cannot hold its charge over an e8tended period of time and will

lose the stored data bits unless its charge is refreshed periodically.This process o f refreshingre#uires additional memory circuitry and complicates the operation of the dynamic $9".

%>.What is a ripple counter.

9 ripple counter is a counter that uses type T 0lip flops to

perform a counting

function where each T lead is connected to output of previous stage.

)6.(efine a decoder.

9 decoder is a device that ta


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"as< )Erow thic< o8ide over all and then etch for contact outs. "as< 3(eposits metal and pattern with mas< 3. "as< 4would be re#uired by the over glassing process step.

).What are the different approaches to C"/* fabrication?

o

-well processo @well process

o The twin tub process

o The silicononinsulator processes.

3. What are the % main steps of pwell process?

"as


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4.*how the main steps in a typical nwell process.

:.8plain the twin tub process.In this process, a substrate of high resistivity ntype material is started and

then nwell and pwell regions are created. Through this process it is possible to preserve

the performance of ntransistors without compressing the p transistors. (oping control is

more readily achieved some rela8ation in manufacturing tolerances results. This is

particularly important as far as latchup is concerned.

=.Compare C"/* and bipolar technologies.

C"/* technology &ipolar technology

1.!ow static power dissipation. +igh power dissipation.

.+igh input impedance.5low drive

current7.

!ow input impedance.5high drive

current7.

%.+igh pac


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>.!ist out the steps behind the fabrication process of single poly gate metal C"/*.

0orm n well

(elineate active areas

Channel stop

Threshold DTadjustment

(elineate polygate areas 0orm nactive areas

0orm pactive areas

(efine contacts

(elineate the metal areas.

16.E-ea a'8in$is one of the methods of mas< ma


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13.8plain the term reliability.It is concerned with projecting the lifetime of a component once it is placed

into

operation.It is defined as the probability that an item will perform a re#uired function

under stated conditions for a stated period of time.


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14.What are the % major regions of bathtub curve.

Infant mortalities are the failures that occur after a very short period of time ie early

in the system. These tend to arise from manufacturing defect that manifest themselves

after a few hours of operation. The central portion of the curve represents random failures

during normal operation, while wearout describe the end of life.

1:.What is a vector?

It is an array of binary inputs that are applied to the deviceundertest5(T7or

the chip under test.

1=.What is the main purpose of performing functional testing?sed to determine whether a chip is good or bad by forcing the circuit to perform

various functions and chec.8plain the shortcircuited 0T.9 shortcircuited 0T is one that always conducts the drain source current

withan applied drain source voltage D(*.The gate has no control over the operation.

6.What is fault dominance?

When sa1 fault occur at both the input and the output of an 9nd gate. Theoutput overrides the input fault, so that anything to the left of the gate may be ignored.

This is called fault dominance.

1.What is path sensiti;ation?When the gate to be tested is embedded on a larger logic networ751.:3 X 16>7 H 1 where 8 is the 0IT value.


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*olving gives 8H6.4: 0ITs as the re#uired rate.


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%4.What is the purpose of -Elass

-Elass5-hospho*ilicate Elass 7 serves important purposes.

i7 It reduces viscosity and at low temperatures ,glass will flow to

smooth the surface topography.

ii7 -rotects from mobile ion5@a7 contamination.


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%:. What is Abirds bea< encroachmentB

Erowth of field o8ide layer causes o8ide to penetrate under mas.What is hot electron problem.

This arises when device dimensions are reduced ,but supply voltage is

held

constant,and results in increase in electric field generated in *ilicon.Thus

electrons gainsufficient energy and gets injected into gate o8ide.@ow charging of gate

oside occurs

which raises DT. /ne approach to minimise this is to reduce electric field

at drain

region.

)6.What is ptub5pwell7 process.

This process involves ptype dopant into nsubstrate at a concentration

that is high

enough to compensate nsubstrate and tto have good control over

desired ptype

doping.

)6.What is ntub5nwell7 process.


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ntub is formed in a ptype substrate.nchannel device is formed by p

type substrate.

)1.What is Trench Isolation

Trench Isolation is etching a narrow deep groove in *ilicon and then

filling it with

o8ide or polysilicon.It is used to decouple bipolar transistors.

).+ow was the base width determined in &ipolar IC Technology.

It is determined by difference between two impurity diffusion profiles

and this

technology is used for high speed appcations.

)%.(efine Eummel @umber.

Total integrated charge in active base is called Eummel @umber.asEummel number decreases,gain of transistor increases.

)).What is Integrated Injection logic.5I! logic7

Integrated Injection logic.5I! logic7 also called merged transistor

logic5"T!7. 9nd

allows close pac


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\N 1) 0IT ,where 1 0IT H 1 0ailure nit H 1 0ailure

16>(evice+our

)=. (efine the term A*oft errorB

It refers to random failure not related to physically defectivedevice.These errors are

reduced by coating IC with a material of low density of radio active

contamination.

)>.(efine $ents $ule.

@umber of signal terminals or pac


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31.Eive the advantage of C"/* technology.

-ower consumed by the device is very less.This is due to the fact

that ,the logic element

draws significant power only during transitions from one state to another.

3.What are the future trends for devices.

Trends are towards

i7 *elf aligned structures

ii7 Three dimensional devices

3%.What are the different types of pac


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are prone to infant mortality are identified easily.The burnin process

involves


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=.When is (L9 converter used?9 digital to analog converter is used when a binary output from a digital system must

be converted to some e#uivalent analog voltage or current.

>.!ist out some applications of the 9L( and (L9 converters.

(igital audio recording and playbac


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16.!ist out the various resistive (9C techni#ues available. Weighted resistor (9C

$$ ladder

Inverted $$ ladder

11.What is the resolution for a (9C?

The resolution of the converter is the smallest change in voltage,which may beproduced at the

output of the convertor.

1.What are the broad classification of 9(Cs

(irect type 9(Cs

Integrating type 9(Cs

1%.!ist out the direct type 9(Cs.

0lash5comparator7type converter

Counter type converter

Trac


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%6. !ist out some (L9 converters.

(9C 6=66L6=61L6=6

(9C 6=%6L6=%1L6=%

(9C 166L161

(9C 16=L16>L116

%1.What is the main function of C*?

The input must be in its active low state for $( or W$ inputs to have any

effect.With C* high, the digital outputs are in the +iR state,and no conversions can ta


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%:.What is ac#uisition time?It is the amount of time the switch would have to remain closed.

%=.The ADC


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=. (raw the circuit of a Wien &ridge /scillator using /p9mp and derive an

e8pression for

fre#uency of an oscillator.

$efer -age @o. )) in T1.

>. With the schematic of a simplest reali;ation of Doltage Controlled

triangularL*#uare Wave

/scillator and e8plain its waveform too.

$efer -age @o.%41 in T1.

16. 8plain in brief, with necessary diagrams, the astable mode of operation

of a 333 timer IC.

$efer -age @o.%)1 in T1.

11.(iscuss about monolithic voltage regulator IC !":%.*how connectionsto supply

output voltage from to :D.

$efer -age @o.33 in T1.

1. (raw ^ 8plain the operation of a triangular wave generator and obtain

an e8pression for

its fre#uency.

$efer -age @o.%> in T1.

1%.&riefly e8plain about Instrumentatation amplifier with neat s


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mode 1,%,:,4,1,_ If initial state of se#uence counter is ),chec< the

circuit you have

designed.

$efer Class @otes.

1:. If f1 H 9.&.C and f H 9&C .$eali;e the logic using C"/*

$efer Class @otes.

1=.(iscuss in brief about *tatic $9"s.

$efer -age @o. in $%.

1>.(iscuss in brief about (ynamic $9"s.

$efer -age @o. in $%.

@IT1D

6. 8plain in detail about any C"/* process with clear s> in $.

%.In brief discuss about re#uirement of design for D!*I ^ 0ailure

mechanisms and $ates in

semiconductor devices.

$efer -age @o. 43 in $.

).8plain in detail about @"/* IC technology.

$efer -age @o.): in $.

3.&riefly e8plain about the pac3 in $.


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UNIT-(

4. 8plain in detail ,about $$ ladder (9C and Inverted $$ ladder

(9C.

$efer -age @o.%=: in T1.

:.8plain in detail about dual slope 9(C .

$efer -age @o.)6 in T1.

=.Write short notes on

i7 *witched Capacitor 0ilters

ii7 0unction Eenerators

$efer -age @o. )6> ^)>4 in T.

>. 8plain in brief about *uccessive 9ppro8imation 9(C.$efer -age @o.)66 in T1.

%6. 8plain in brief about 0lash type 9(C.

$efer -age @o.%>3 in T1.

TE=T BOO>S7

1. (.$oy Choudhury, *hail 2ain ,A !inear Integrated CircuitsB@ew 9ge

International

-ublishers, @ew (elhi .

.$ama

Linear and Digital Integrated Circuits

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