EE 105 Spring 1997Lecture 20

Totem Pole Voltage Sources

Define a series of bias voltages between the positive and the negative supply voltages.

In practice, output currents are small (or zero), so that the DC bias voltages are set by

I

REF

V+

IREF

VOUT1

VOUT2

VOUT3Q3

Q1

M2

EE 105 Spring 1997Lecture 20

MOSFET Current Sources

Bias n-channel MOSFET with a DC voltage source

Intuitively,

V

REF

is set by

I

REF

and determines the output current of

M

2

VDD

IREF iOUT

M1 M2+

−

VREF

+

−

vOUT

VREF VTn

IREF

W2L------

1µnCox

-------------------------------+ VGS1 VGS2= = =

EE 105 Spring 1997Lecture 20

MOSFET Current Sources (cont.)

Substituting into the drain current of

M

2

(and neglecting (1 +

λ

n

V

DS

2

) term)

Output current is scaled from

I

REF

by a geometrical ratio:

IOUT ID2W2L------

2µnCox VGS2 VTn–( )2

= =

IOUT ID2W2L------

2µnCox VTn

IREF

W2L------

1µnCox

-------------------------------+ VTn–

2

= =

IOUT

W L⁄( )2W L⁄( )1

--------------------

IREF=

EE 105 Spring 1997Lecture 20

MOSFET Current Source Equivalent Circuit

Small-signal model: source resistance is

r

o

2

by inspection

Combine output resistance with DC output current for approximate equivalent circuit ... actual

i

OUT

vs.

v

OUT

characteristics are those of

M

2

with

V

GS2

=

V

REF

gm1vgs1gm2vgs2ro1 ro2

+

−

vgs2 = 0 V

1/ro2ro2

iOUT iOUT

vOUT

vOUT(W/L)2(W/L)1

IREF

(W/L)2(W/L)1

IREF

(a) (b)

VDSSAT2

+

−

EE 105 Spring 1997Lecture 20

The Cascode Current Source

In order to boost the source resistance, we can study our single-stage building blocks and recognize that a common-gate is attractive, due to it high output resistance

Adapting the output resistance for a common gate amplifier, the cascode current source has a source resistance of

Penalty for cascode:

needs larger VOUT to function

VDD

IREF

M3 M4

M2M1

iOUT

RS 1 g+ m4ro2( )ro4 gm4ro4ro2≈=

EE 105 Spring 1997Lecture 20

MOSFET Current Sources and Sinks

n-channel current source sinks current to ground ... how do we source current from the positive supply? Answer: p-channel current sources...?

By mixing n-channel and p-channel diode-connected devices, we can produce current sinks and sources from a reference current connected to VDD or ground.

VDD

IREF

MR

M1 M2 M3

iOUT1 iOUT2 iOUT3

IREF

MR

VDD

M1M2

M4M3

iOUT1 iOUT2

iOUT4

EE 105 Spring 1997Lecture 20

Two-Stage BiCMOS Transconductance Amplifier

Concept: cascade two common-emitter stages to get more transconductance -- not an ideal solution but illustrates DC biasing and interstage coupling

DC Issues:

First stage: npn common-emitter amplifier (DC level shifts up)

Second stage: pnp common-emitter amplifier (DC level shifts down)

+

_vs

RS

Gm2vin2

Rin2

+

_

vin2

Gm1vin1

Rin1

+

_

vin1Rout2Rout1 RL

iout

CE (npn) CE (pnp)

EE 105 Spring 1997Lecture 20

Amplifier Topology

Basic structure -- connect output of CE (npn) to input of CE (pnp),attach small-signal voltage input (with RS) and load (RL)

Current source design:

assume that the reference current is generated by a resistor (to ground)

+

_+

_

vs

VBIAS

RS

V+ = + 2.5 V

Q2

Q1

iout

RL

V - = - 2.5 V

iSUP2

iSUP1

EE 105 Spring 1997Lecture 20

DC Currents from Reference

p-channel diode-connected M3 is used to generate source-gate voltages for M4 (which generates iSUP1) and for M5. The second current supply is generated by first using -ID5 to generate a DC gate-source voltage via diode-connected M7.

V+ = + 2.5 VM4

M3

M7

RREF

M5

M6

V - = - 2.5 V

IREF

iSUP1 - ID5

iSUP2

ID7

EE 105 Spring 1997Lecture 20

Two-Stage BiCMOS Transconductance Amplifier

Combine current source circuit with basic amplifier topology

+

_+

_

vs

VBIAS

RS

V+ = + 2.5 V

Q2

M4

Q1

M3

M7

RREF

M5

M6

iout

RL

V -= - 2.5 V

EE 105 Spring 1997Lecture 20

DC Bias of Transconductance Amplifier

Given: VOUT = 0 V (DC); V+ = 2.5 V, V - = -2.5 V; RS = RL = 50 kΩ

Standard simplifications: assume IB = 0 for bipolar transistors, neglect Early effect (BJT) and channel-length modulation (MOSFETs) for hand calculations

Device Properties: (for simplicity, make all n-channel and all p-channel MOSFETs the same dimensions)

MOSFETs: µn Cox = 50 µAV-2, (W/L)n = (50/2), VTn = 1 V, λn = 0.05 V-1

µp Cox = 25 µAV-2, (W/L)p = (80/2), VTp = - 1 V, λp = 0.05 V-1

BJTs: βon = 100, VAn = 50 V, βop = 50, VAp = 25 V

+

_+

_

vs

VBIAS

RS

V+ = + 2.5 V

Q2

M4

Q1

M3

M7

RREF

M5

M6

iout

RL

V -= - 2.5 V

EE 105 Spring 1997Lecture 20

Reference Resistor

Find RREF such that IREF = 50 µA and then find all node voltages and DC bias currents ...

Substituting IREF = - ID3 = 50 µA, the source-gate voltage drop is

Solve for the reference resistor:

M3

RREF

+2.5 V

- 2.5 V

IREF

0

- ID3

VSG3 VDD IREFRREF– VSS–=

+ _

VSG3 VTp–ID3–

W 2L( )⁄( )pµpCox---------------------------------------------+=

VSG3

VSG3 1 V–( )–50 µA

802 2( )( )

---------------- 50 µA/V

2( )----------------------------------------------------+ 1.22 V= =

RREF

VDD VSS–( ) VSG3–

IREF---------------------------------------------------- 2.5 V 2.– 5 V( )– 1.22 V–

50 µA----------------------------------------------------------------- 75.6 kΩ= = =

EE 105 Spring 1997Lecture 20

DC Operating Point

Since width-to-length ratios are identical for n-channel and p-channel devices (separately), the DC supply currents are equal to the reference current

Neglecting base currents, IC1 = 50 µΑ and IC2 = 50 µΑ

Q1: gm1 = 2 mS, rπ1 = 50 kΩ, ro1 = 1ΜΩ

Q2: gm2 = 2 mS, rπ2 = 25 kΩ, ro2 = 500 kΩ

Source resistances of the current supplies for first and second stages:

roc1 = ro4 = (λ4(-ID4))-1 = (0.05(0.05))-1 = 400 kΩ

roc2 = ro6 = (λ6(ID6))-1 = (0.05(0.05))-1 = 400 kΩ

+

_+

_

vs

VBIAS

RS

V+ = + 2.5 V

Q2

Q1

iout

RL

V - = - 2.5 V

ISUP2 =

ISUP1 =50 µA

50 µA

EE 105 Spring 1997Lecture 20

Overall Two-Port Model

Rin = Rin1 = 50 kΩ and Rout = Rout2 = ro2 || roc2 = 500 kΩ || 400 kΩ = 220 kΩ

Overall short-circuit transconductance Gm -- must apply procedure

Find input voltage to the second stage:

vin2 = - Gm1( Rout1 || Rin2 ) vin = - gm1 ( ro1 || roc1 || rπ 2 ) vin

Output current

iout = Gm2 vin2 = gm2 [- gm1 (ro1 || roc1 || rπ2)] vin

Overall transconductance:

Gm = iout / vin = - gm2 gm1 (ro1 || roc1 || rπ2)

Gm = - (2 mS)(2 mS)(1 MΩ || 400 kΩ || 25 kΩ) = - (2 mS)(2 mS)(23 kΩ)

Gm = - 92 mS

+

_vin

Gm2vin2

Rin2

+

_

vin2

Gm1vin1

Rin1

+

_

vin1Rout2Rout1

iout

CE (npn) CE (pnp)

EE 105 Spring 1997Lecture 20

Output Voltage Swing

Find the maximum and minimum values of vOUT

Determine how high the output node can rise before a device leaves its constant-current region

Q2 saturates when vOUT = VOUT(max) = 2.4 V ... VEC(sat) = 0.1 V

Note that M4 is still saturated since VSD4 = VEB4 = 0.7 V > vSG4 + VTp = 0.22 V

Determine how low the output node can drop ...

M6 goes triode when vOUT = VDS7(sat) = VGS7 - VTn = 1.22 V - 1 V = 0.22 V

VOUT(min) = - 2.5 V + 0.22 V = 2.23 V

+

_VBIAS

Q2

M4

Q1

M3

M7

RREF

M5

M6

vOUT

V -= - 2.5 V

V+= 2.5 V