Lecture 4:MIPS Subroutines and x86 Architecture

Professor Mike Schulte

Computer Architecture

ECE 201

MIPS Subroutine Calls• When making a subroutine (procedure) call, it is

necessary to– Place inputs where they can be accessed by subroutine

– Transfer control to subroutine

– Peform the desired task

– Place the result value(s) where the calling program can access it

– Return control to the point of origin

– The subroutine caller or callee should save and restore registers used by the subroutine

• MIPS – Provides instructions to assist in subroutine calls (jal) and returns (jr)

– Uses software conventions to

» place subroutine input and output values

» control which registers are saved/restored by caller and callee

– Uses a software stack to save/restore values

Subroutine CallsStacking of Subroutine Calls & Returns and Environments:

A: CALL B

CALL C

C: RET

RET

B:

A

A B

A B C

A B

A

Some machines provide a memory stack as part of the architecture (e.g., VAX)

Sometimes stacks are implemented via software convention (e.g., MIPS)

0 zero constant 0

1 at reserved for assembler

2 v0 expression evaluation &

3 v1 function results

4 a0 arguments

5 a1

6 a2

7 a3

8 t0 temporary: caller saves

. . . (callee can clobber)

15 t7

MIPS: Software conventions for registers

16 s0 callee saves

. . .

23 s7

24 t8 temporary (cont’d)

25 t9

26 k0 reserved for OS kernel

27 k1

28 gp Pointer to global area

29 sp stack pointer

30 fp frame pointer

31 ra Return Address (HW)

Call-Return Linkage: Stack Frames

FP Saved argumentregisters

SP

High Mem

Low Mem

Saved return address

Saved savedregisters

Local arrays andstructures

History of the Intel 80x86

• 1971: Intel invents microprocessor - 4004

• 1975: 8080 introduced– 8-bit microprocessor

– Accumulator machine

• 1978: 8086 introduced– 16 bit microprocessor

– Accumulator plus dedicated registers

• 1980: IBM selects 8088 as basis for IBM PC– 8088 is 8-bit external bus version of 8086

• 1980: 8087 floating point coprocessor – adds 60 floating point instructions

– 80 bit floating point registers

– uses hybrid stack/register scheme

History of the Intel 80x86• 1982: 80286 introduced

– 24-bit address

– memory mapping & protection

• 1985: 80386 introduced– 32-bit address

– 32-bit GP registers

• 1989: 80486 introduced

• 1992: Pentium introduced

• 1995: Pentium Pro introduced

• 1996: Pentium with MMX extensions– 57 new instructions

– Primarily for multimedia applications

• 1997: Pentium II (Pentium Pro with MMX)

History of the Intel 80x86• 1999: Pentium III Introduced

• Supports Intel’s Internet Streaming SIMD technology– Additional multimedia instructions– Four 32-bit floating point operations in parallel– Average, absolute difference, packed maximum/minimum– Useful in speech recognition, video encoding/decoding

• 2000: Intanium introduced– Release of IA-64 (RISC-like) architecture– Explicitly Parallel Instruction Computing (EPIC)– 128-bit bundle with three instructions and a template– 128 general purpose registers and 128 floating point registers– Done by a partnership between HP and Intel– Able to run both UNIX and Microsoft windows

• Intel architecture was due to the desire for backward compatability– Highly irregular architecture– Over 50 million sold per year

Intel 80x86 Integer Registers

X86 Operand Types• x86 instructions typically have two operands, where one

operand is both a source and a destination operand.

• Possible combinations include

Source/destination type Second source type

Register Register

Register Immediate

Register Memory

Memory Register

Memory Immediate

• No memory-memory or immediate-immediate

• Immediates can be 8, 16, or 32 bits

80x86 Instructions

• Data movement (move, push, pop)

• Arithmetic and logic (logic ops, tests CCs, shifts, integer and decimal arithmetic)

• Control flow (branches, jumps, calls, returns)

• String instructions (move and compare)

• FP data movement (load, load const., store)

• Arithmetic instructions (add, subtract, multiply, divide, square root, absolute value)

• Comparisons (can send result to ALU)

• Transcendental functions (sin, cos, log, etc.)

Top 10 80x86 Instructions° Rank instruction Integer Average Percent total executed

1 load 22%

2 conditional branch 20%

3 compare 16%

4 store 12%

5 add 8%

6 and 6%

7 sub 5%

8 move register-register 4%

9 call 1%

10 return 1%

Total 96%

° Simple instructions dominate instruction frequency - support these.

Addressing modes

• The x86 offers several different addressing modes for accessing memory

Register indirect Address in register (mem[R1])

Base with displacement (8, 16, or 32-bit displacement)

Base plus scaled index(8, 16, or 32-bit displacement)

Address in base register plusdisplacement (mem[R1+100])

Address is Base + 2scale x Indexscale = 0, 1, 2 or 3

Base plus scaled index with displacement(8, 16, or 32-bit displacement)

Address is Base + 2scale x Index + disp.scale = 0, 1, 2 or 3

80x86 Instruction Format

• Instructions sizes vary from 1 to 17 bytes

80x86 Length Distribution

Le

ng

th in

by

tes

% instructions at each length

0% 10% 20% 30%

1

2

3

4

5

6

7

8

9

10

11

24%

23%

21%

3%

12%

13%

3%

0%

0%

1%

19%

17%

16%

1%

15%

27%

4%

0%

0%

1%

24%

24%

27%

4%

13%

6%

2%

0%

0%

0%

25%

24%

29%

3%

12%

4%

2%

0%

0%

0%

Espresso

Gcc

Spice

NASA7

Performance ComparisonPentium Pro vs. MIPS R10000

Benchmark Pro MIPSMIIPS÷Pro

SPECint95 8.7 8.9 1.02

SPECfp95 6.0 17.2 2.87

• The Pentium Pro and MIPS R1000 have comparable performance on integer computations.

• The MIPS R10000 has much better performance than the Pentium Pro for floating point computations.

Comparison

• How would you expect the x86 and MIPS architectures to compare on the following.– CPI on SPEC benchmarks

– Ease of design and implementation

– Ease of writing assembly language & compilers

– Code density

– Overall performance

• What other advantages/disadvantages are there to the two architectures.