Lecture 4 Assembly Language Topics Finish IEEE Floating Point multiplication, addition Lab 1...
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Transcript of Lecture 4 Assembly Language Topics Finish IEEE Floating Point multiplication, addition Lab 1...
Lecture 4Assembly Language
Lecture 4Assembly Language
TopicsTopics
Finish IEEE Floating Pointmultiplication, addition
Lab 1 comments Assembly Language Intro
January 25, 2011
CSCE 212 Computer Architecture
– 2 – CSCE 212H Spring 2011
OverviewOverviewLast TimeLast Time
Lecture 03 – slides 1-14, 16? Denormalized floats Special floats, Infinity, NaN Tiny Floats Error in show bytes code!!!
NewNew Finish denormals from last time Rounding, multiplication, addition Lab 1 comments
Libraries Masks Unions
Assembly Language
– 3 – CSCE 212H Spring 2011
Rebuttals on 211 Student EvaluationsRebuttals on 211 Student Evaluations
..
– 4 – CSCE 212H Spring 2011
Last Pop Quiz – Normal floatsLast Pop Quiz – Normal floatsValueValue
Float F = 212; 21210 =
SignificandSignificandM = 1. 2
frac = 2
ExponentExponentE = Bias =
Exp = = 2
Floating Point Representation:
Hex:
Binary:
exponent:
212:
– 5 – CSCE 212H Spring 2011
Jan 25 Pop Quiz - denormalsJan 25 Pop Quiz - denormals
1.1. What is the representation of the largest What is the representation of the largest denormalized IEEE float (in binary)?denormalized IEEE float (in binary)?
2.2. In hex?In hex?
3.3. What is its value as an expression, i.e., (-1)What is its value as an expression, i.e., (-1)signsign m * m * 22expexp
4.4. How many floats are there between 1.0 and 2.0?How many floats are there between 1.0 and 2.0?
5.5. What is a/the representation of minus infinity?What is a/the representation of minus infinity?
6.6. In C are there more ints or doubles?In C are there more ints or doubles?
7.7. In Math are there more rationals than integers ?In Math are there more rationals than integers ?
8.8. Extra credit for pop quiz 1: what is aleph-0?Extra credit for pop quiz 1: what is aleph-0?
– 6 – CSCE 212H Spring 2011
Lab01Lab01
msb.c – extract and print most significant bytemsb.c – extract and print most significant byte Unions Pointers Masks and such
sin.c – using math librarysin.c – using math library gcc sin.c -lm
– 7 – CSCE 212H Spring 2011
label_show_byteslabel_show_bytes
void label_show_bytes(char *label, pointer start, int len)void label_show_bytes(char *label, pointer start, int len)
{{
int i;int i;
printf("%s\n", label);printf("%s\n", label);
for (i = 0; i < len; i++)for (i = 0; i < len; i++)
printf("0x%p\t0x%.2x\n",printf("0x%p\t0x%.2x\n",
start+i, start[i]);start+i, start[i]);
printf("\n");printf("\n");
}}
– 8 – CSCE 212H Spring 2011
Unions and suchUnions and such
float f, pi;float f, pi;
union {union {
float fl;float fl;
unsigned int ui;unsigned int ui;
} un;} un;
pi = 3.14159265358979323846; /* what precision!*/pi = 3.14159265358979323846; /* what precision!*/
un.fl = -1*pi;un.fl = -1*pi;
printf("float %f assigned to unsigned %ud\n", pi, un.ui);printf("float %f assigned to unsigned %ud\n", pi, un.ui);
label_show_bytes("un.fl", (pointer)&un.fl, 4);label_show_bytes("un.fl", (pointer)&un.fl, 4);
label_show_bytes("un.ui", (pointer)&un.ui, 4);label_show_bytes("un.ui", (pointer)&un.ui, 4);
– 9 – CSCE 212H Spring 2011
PointersPointers
DeclarationsDeclarations
DereferencesDereferences
Address-of operatorAddress-of operator
Explicit CastingExplicit Casting
– 10 – CSCE 212H Spring 2011
Masks and such Masks and such
– 11 – CSCE 212H Spring 2011
Math libraryMath library
/usr/lib/usr/lib
ar ar t /usr/lib/libm.at /usr/lib/libm.a
gcc sin.c -lmgcc sin.c -lm
– 12 – CSCE 212H Spring 2011
FP MultiplicationFP MultiplicationOperandsOperands
(–1)s1 M1 2E1 * (–1)s2 M2 2E2
Exact ResultExact Result(–1)s M 2E
Sign s: s1 ^ s2 Significand M: M1 * M2 Exponent E: E1 + E2
FixingFixing If M ≥ 2, shift M right, increment E If E out of range, overflow Round M to fit frac precision
ImplementationImplementation Biggest chore is multiplying significands
– 13 – CSCE 212H Spring 2011
FP AdditionFP AdditionOperandsOperands
(–1)s1 M1 2E1
(–1)s2 M2 2E2
Assume E1 > E2
Exact ResultExact Result(–1)s M 2E
Sign s, significand M: Result of signed align & add
Exponent E: E1
FixingFixing If M ≥ 2, shift M right, increment E if M < 1, shift M left k positions, decrement E by k Overflow if E out of range Round M to fit frac precision
(–1)s1 M1
(–1)s2 M2
E1–E2
+
(–1)s M
– 14 – CSCE 212H Spring 2011
Floating Point in CFloating Point in CC Guarantees Two LevelsC Guarantees Two Levels
float single precision
double double precision
ConversionsConversions Casting between int, float, and double changes numeric
values Double or float to int
Truncates fractional part Like rounding toward zero Not defined when out of range
» Generally saturates to TMin or TMax
int to double Exact conversion, as long as int has ≤ 53 bit word size
int to float Will round according to rounding mode
– 15 – CSCE 212H Spring 2011
IEEE 754 Rounding AlgorithmsIEEE 754 Rounding Algorithms
1.1. Round to nearest, ties to even – rounds to the nearest value; if Round to nearest, ties to even – rounds to the nearest value; if the number falls midway it is rounded to the nearest value with the number falls midway it is rounded to the nearest value with an even (zero) least significant bit, which occurs 50% of the an even (zero) least significant bit, which occurs 50% of the time; this is the default algorithm for binary floating-point and time; this is the default algorithm for binary floating-point and the recommended default for decimalthe recommended default for decimal
2.2. Round to nearest, ties away from zero – rounds to the nearest Round to nearest, ties away from zero – rounds to the nearest value; if the number falls midway it is rounded to the nearest value; if the number falls midway it is rounded to the nearest value above (for positive numbers) or below (for negative value above (for positive numbers) or below (for negative numbers)numbers)
3.3. Round toward 0 – directed rounding towards zero (also called Round toward 0 – directed rounding towards zero (also called truncation)truncation)
4.4. Round toward – directed rounding towards positive infinityRound toward – directed rounding towards positive infinity
5.5. Round toward – directed rounding towards negative infinity.Round toward – directed rounding towards negative infinity.
http://en.wikipedia.org/wiki/IEEE_754
– 16 – CSCE 212H Spring 2011
Ariane 5Ariane 5
Exploded 37 seconds after liftoff
Cargo worth $500 million
WhyWhy Computed horizontal
velocity as floating point number
Converted to 16-bit integer
Worked OK for Ariane 4 Overflowed for Ariane 5
Used same software
– 17 – CSCE 212H Spring 2011
IA32 ProcessorsIA32 Processors
Totally Dominate Computer MarketTotally Dominate Computer Market
Evolutionary DesignEvolutionary Design Starting in 1978 with 8086 Added more features as time goes on Still support old features, although obsolete
Complex Instruction Set Computer (CISC)Complex Instruction Set Computer (CISC) Many different instructions with many different formats
But, only small subset encountered with Linux programs
Hard to match performance of Reduced Instruction Set Computers (RISC)
But, Intel has done just that!
– 18 – CSCE 212H Spring 2011
X86 Evolution: Programmer’s ViewX86 Evolution: Programmer’s ViewNameName DateDate TransistorsTransistors
80868086 19781978 29K29K 16-bit processor. Basis for IBM PC & DOS Limited to 1MB address space. DOS only gives you 640K
8028680286 19821982 134K134K Added elaborate, but not very useful, addressing scheme Basis for IBM PC-AT and Windows
386386 19851985 275K275K Extended to 32 bits. Added “flat addressing” Capable of running Unix Linux/gcc uses no instructions introduced in later models
– 19 – CSCE 212H Spring 2011
X86 Evolution: Programmer’s ViewX86 Evolution: Programmer’s View
NameName DateDate TransistorsTransistors
486486 19891989 1.9M1.9M
PentiumPentium 19931993 3.1M3.1M
Pentium/MMXPentium/MMX 19971997 4.5M4.5M Added special collection of instructions for operating on 64-
bit vectors of 1, 2, or 4 byte integer data
PentiumProPentiumPro 19951995 6.5M6.5M Added conditional move instructions Big change in underlying microarchitecture
– 20 – CSCE 212H Spring 2011
X86 Evolution: Programmer’s ViewX86 Evolution: Programmer’s View
NameName DateDate TransistorsTransistors
Pentium IIIPentium III 19991999 8.2M8.2M Added “streaming SIMD” instructions for operating on 128-bit
vectors of 1, 2, or 4 byte integer or floating point data Our fish machines
Pentium 4Pentium 4 20012001 42M42M Added 8-byte formats and 144 new instructions for streaming
SIMD mode
– 21 – CSCE 212H Spring 2011
X86 Evolution: ClonesX86 Evolution: Clones
Advanced Micro Devices (AMD)Advanced Micro Devices (AMD) Historically
AMD has followed just behind IntelA little bit slower, a lot cheaper
RecentlyRecruited top circuit designers from Digital Equipment Corp.Exploited fact that Intel distracted by IA64Now are close competitors to Intel
Developing own extension to 64 bits
– 22 – CSCE 212H Spring 2011
X86 Evolution: ClonesX86 Evolution: Clones
TransmetaTransmeta Recent start-up
Employer of Linus Torvalds
Radically different approach to implementationTranslates x86 code into “Very Long Instruction Word” (VLIW)
codeHigh degree of parallelism
Shooting for low-power market
– 23 – CSCE 212H Spring 2011
New Species: IA64New Species: IA64
NameName DateDate TransistorsTransistors
ItaniumItanium 20012001 10M10M Extends to IA64, a 64-bit architecture Radically new instruction set designed for high performance Will be able to run existing IA32 programs
On-board “x86 engine”
Joint project with Hewlett-Packard
Itanium 2Itanium 2 20022002 221M221M Big performance boost
– 24 – CSCE 212H Spring 2011
Assembly Programmer’s ViewAssembly Programmer’s View
Programmer-Visible StateProgrammer-Visible State EIP Program Counter
Address of next instruction
Register FileHeavily used program data
Condition CodesStore status information about
most recent arithmetic operationUsed for conditional branching
EIP
Registers
CPU Memory
Object CodeProgram Data
OS Data
Addresses
Data
Instructions
Stack
ConditionCodes
Memory Byte addressable array Code, user data, (some) OS
data Includes stack used to support
procedures
– 25 – CSCE 212H Spring 2011
text
text
binary
binary
Compiler (gcc -S)
Assembler (gcc or as)
Linker (gcc or ld)
C program (p1.c p2.c)
Asm program (p1.s p2.s)
Object program (p1.o p2.o)
Executable program (p)
Static libraries (.a)
Turning C into Object CodeTurning C into Object Code Code in files p1.c p2.c Compile with command: gcc -O p1.c p2.c -o p
Use optimizations (-O)Put resulting binary in file p
– 26 – CSCE 212H Spring 2011
Compiling Into AssemblyCompiling Into Assembly
C CodeC Code
int sum(int x, int y){ int t = x+y; return t;}
Generated Assembly
_sum:pushl %ebpmovl %esp,%ebpmovl 12(%ebp),%eaxaddl 8(%ebp),%eaxmovl %ebp,%esppopl %ebpret
Obtain with command
gcc -O -S code.c
Produces file code.s
– 27 – CSCE 212H Spring 2011
Assembly CharacteristicsAssembly CharacteristicsMinimal Data TypesMinimal Data Types
“Integer” data of 1, 2, or 4 bytesData valuesAddresses (untyped pointers)
Floating point data of 4, 8, or 10 bytes No aggregate types such as arrays or structures
Just contiguously allocated bytes in memory
Primitive OperationsPrimitive Operations Perform arithmetic function on register or memory data Transfer data between memory and register
Load data from memory into registerStore register data into memory
Transfer controlUnconditional jumps to/from proceduresConditional branches
– 28 – CSCE 212H Spring 2011
Code for sum
0x401040 <sum>:0x550x890xe50x8b0x450x0c0x030x450x080x890xec0x5d0xc3
Object CodeObject CodeAssemblerAssembler
Translates .s into .o Binary encoding of each instruction Nearly-complete image of executable
code Missing linkages between code in
different files
LinkerLinker Resolves references between files Combines with static run-time
librariesE.g., code for malloc, printf
Some libraries are dynamically linkedLinking occurs when program begins
execution
• Total of 13 bytes
• Each instruction 1, 2, or 3 bytes
• Starts at address 0x401040
– 29 – CSCE 212H Spring 2011
Machine Instruction ExampleMachine Instruction ExampleC CodeC Code
Add two signed integers
AssemblyAssembly Add 2 4-byte integers
“Long” words in GCC parlanceSame instruction whether signed
or unsigned
Operands:x: Register %eaxy: Memory M[%ebp+8]t: Register %eax
» Return function value in %eax
Object CodeObject Code 3-byte instruction Stored at address 0x401046
int t = x+y;
addl 8(%ebp),%eax
0x401046: 03 45 08
Similar to expression x += y
– 30 – CSCE 212H Spring 2011
Disassembled00401040 <_sum>: 0: 55 push %ebp 1: 89 e5 mov %esp,%ebp 3: 8b 45 0c mov 0xc(%ebp),%eax 6: 03 45 08 add 0x8(%ebp),%eax 9: 89 ec mov %ebp,%esp b: 5d pop %ebp c: c3 ret d: 8d 76 00 lea 0x0(%esi),%esi
Disassembling Object CodeDisassembling Object Code
DisassemblerDisassemblerobjdump -d p Useful tool for examining object code Analyzes bit pattern of series of instructions Produces approximate rendition of assembly code Can be run on either a.out (complete executable) or .o file
– 31 – CSCE 212H Spring 2011
Disassembled
0x401040 <sum>: push %ebp0x401041 <sum+1>: mov %esp,%ebp0x401043 <sum+3>: mov 0xc(%ebp),%eax0x401046 <sum+6>: add 0x8(%ebp),%eax0x401049 <sum+9>: mov %ebp,%esp0x40104b <sum+11>: pop %ebp0x40104c <sum+12>: ret 0x40104d <sum+13>: lea 0x0(%esi),%esi
Alternate DisassemblyAlternate Disassembly
Within gdb DebuggerWithin gdb Debuggergdb p
disassemble sum Disassemble procedure
x/13b sum Examine the 13 bytes starting at sum
Object0x401040:
0x550x890xe50x8b0x450x0c0x030x450x080x890xec0x5d0xc3
– 32 – CSCE 212H Spring 2011
What Can be Disassembled?What Can be Disassembled?
Anything that can be interpreted as executable code Disassembler examines bytes and reconstructs assembly
source
% objdump -d WINWORD.EXE
WINWORD.EXE: file format pei-i386
No symbols in "WINWORD.EXE".Disassembly of section .text:
30001000 <.text>:30001000: 55 push %ebp30001001: 8b ec mov %esp,%ebp30001003: 6a ff push $0xffffffff30001005: 68 90 10 00 30 push $0x300010903000100a: 68 91 dc 4c 30 push $0x304cdc91
– 33 – CSCE 212H Spring 2011
Moving DataMoving Data
Moving DataMoving Datamovl Source,Dest: Move 4-byte (“long”) word Lots of these in typical code
Operand TypesOperand Types Immediate: Constant integer data
Like C constant, but prefixed with ‘$’E.g., $0x400, $-533Encoded with 1, 2, or 4 bytes
Register: One of 8 integer registersBut %esp and %ebp reserved for special useOthers have special uses for particular instructions
Memory: 4 consecutive bytes of memoryVarious “address modes”
%eax
%edx
%ecx
%ebx
%esi
%edi
%esp
%ebp
– 34 – CSCE 212H Spring 2011
movl Operand Combinationsmovl Operand Combinations
Cannot do memory-memory transfers with single instruction
movl
Imm
Reg
Mem
Reg
Mem
Reg
Mem
Reg
Source Destination
movl $0x4,%eax
movl $-147,(%eax)
movl %eax,%edx
movl %eax,(%edx)
movl (%eax),%edx
C Analog
temp = 0x4;
*p = -147;
temp2 = temp1;
*p = temp;
temp = *p;
– 35 – CSCE 212H Spring 2011
Simple Addressing ModesSimple Addressing Modes
NormalNormal (R)(R) Mem[Reg[R]]Mem[Reg[R]] Register R specifies memory address
movl (%ecx),%eax
DisplacementDisplacement D(R)D(R) Mem[Reg[R]+D]Mem[Reg[R]+D] Register R specifies start of memory region Constant displacement D specifies offset
movl 8(%ebp),%edx
– 36 – CSCE 212H Spring 2011
Using Simple Addressing ModesUsing Simple Addressing Modes
void swap(int *xp, int *yp) { int t0 = *xp; int t1 = *yp; *xp = t1; *yp = t0;}
swap:pushl %ebpmovl %esp,%ebppushl %ebx
movl 12(%ebp),%ecxmovl 8(%ebp),%edxmovl (%ecx),%eaxmovl (%edx),%ebxmovl %eax,(%edx)movl %ebx,(%ecx)
movl -4(%ebp),%ebxmovl %ebp,%esppopl %ebpret
Body
SetUp
Finish
– 37 – CSCE 212H Spring 2011
Understanding SwapUnderstanding Swap
void swap(int *xp, int *yp) { int t0 = *xp; int t1 = *yp; *xp = t1; *yp = t0;}
movl 12(%ebp),%ecx # ecx = yp
movl 8(%ebp),%edx # edx = xp
movl (%ecx),%eax # eax = *yp (t1)
movl (%edx),%ebx # ebx = *xp (t0)
movl %eax,(%edx) # *xp = eax
movl %ebx,(%ecx) # *yp = ebx
Stack
Register Variable
%ecx yp
%edx xp
%eax t1
%ebx t0
yp
xp
Rtn adr
Old %ebp %ebp 0
4
8
12
Offset
•••
Old %ebx-4
– 38 – CSCE 212H Spring 2011
Understanding SwapUnderstanding Swap
movl 12(%ebp),%ecx # ecx = yp
movl 8(%ebp),%edx # edx = xp
movl (%ecx),%eax # eax = *yp (t1)
movl (%edx),%ebx # ebx = *xp (t0)
movl %eax,(%edx) # *xp = eax
movl %ebx,(%ecx) # *yp = ebx
0x120
0x124
Rtn adr
%ebp 0
4
8
12
Offset
-4
123
456
Address
0x124
0x120
0x11c
0x118
0x114
0x110
0x10c
0x108
0x104
0x100
yp
xp
%eax
%edx
%ecx
%ebx
%esi
%edi
%esp
%ebp 0x104
– 39 – CSCE 212H Spring 2011
Understanding SwapUnderstanding Swap
movl 12(%ebp),%ecx # ecx = yp
movl 8(%ebp),%edx # edx = xp
movl (%ecx),%eax # eax = *yp (t1)
movl (%edx),%ebx # ebx = *xp (t0)
movl %eax,(%edx) # *xp = eax
movl %ebx,(%ecx) # *yp = ebx
0x120
0x124
Rtn adr
%ebp 0
4
8
12
Offset
-4
123
456
Address
0x124
0x120
0x11c
0x118
0x114
0x110
0x10c
0x108
0x104
0x100
yp
xp
%eax
%edx
%ecx
%ebx
%esi
%edi
%esp
%ebp
0x120
0x104
– 40 – CSCE 212H Spring 2011
Understanding SwapUnderstanding Swap
movl 12(%ebp),%ecx # ecx = yp
movl 8(%ebp),%edx # edx = xp
movl (%ecx),%eax # eax = *yp (t1)
movl (%edx),%ebx # ebx = *xp (t0)
movl %eax,(%edx) # *xp = eax
movl %ebx,(%ecx) # *yp = ebx
0x120
0x124
Rtn adr
%ebp 0
4
8
12
Offset
-4
123
456
Address
0x124
0x120
0x11c
0x118
0x114
0x110
0x10c
0x108
0x104
0x100
yp
xp
%eax
%edx
%ecx
%ebx
%esi
%edi
%esp
%ebp
0x124
0x120
0x104
– 41 – CSCE 212H Spring 2011
Understanding SwapUnderstanding Swap
movl 12(%ebp),%ecx # ecx = yp
movl 8(%ebp),%edx # edx = xp
movl (%ecx),%eax # eax = *yp (t1)
movl (%edx),%ebx # ebx = *xp (t0)
movl %eax,(%edx) # *xp = eax
movl %ebx,(%ecx) # *yp = ebx
0x120
0x124
Rtn adr
%ebp 0
4
8
12
Offset
-4
123
456
Address
0x124
0x120
0x11c
0x118
0x114
0x110
0x10c
0x108
0x104
0x100
yp
xp
%eax
%edx
%ecx
%ebx
%esi
%edi
%esp
%ebp
456
0x124
0x120
0x104
– 42 – CSCE 212H Spring 2011
Understanding SwapUnderstanding Swap
movl 12(%ebp),%ecx # ecx = yp
movl 8(%ebp),%edx # edx = xp
movl (%ecx),%eax # eax = *yp (t1)
movl (%edx),%ebx # ebx = *xp (t0)
movl %eax,(%edx) # *xp = eax
movl %ebx,(%ecx) # *yp = ebx
0x120
0x124
Rtn adr
%ebp 0
4
8
12
Offset
-4
123
456
Address
0x124
0x120
0x11c
0x118
0x114
0x110
0x10c
0x108
0x104
0x100
yp
xp
%eax
%edx
%ecx
%ebx
%esi
%edi
%esp
%ebp
456
0x124
0x120
123
0x104
– 43 – CSCE 212H Spring 2011
Understanding SwapUnderstanding Swap
movl 12(%ebp),%ecx # ecx = yp
movl 8(%ebp),%edx # edx = xp
movl (%ecx),%eax # eax = *yp (t1)
movl (%edx),%ebx # ebx = *xp (t0)
movl %eax,(%edx) # *xp = eax
movl %ebx,(%ecx) # *yp = ebx
0x120
0x124
Rtn adr
%ebp 0
4
8
12
Offset
-4
456
456
Address
0x124
0x120
0x11c
0x118
0x114
0x110
0x10c
0x108
0x104
0x100
yp
xp
%eax
%edx
%ecx
%ebx
%esi
%edi
%esp
%ebp
456
0x124
0x120
123
0x104
– 44 – CSCE 212H Spring 2011
Understanding SwapUnderstanding Swap
movl 12(%ebp),%ecx # ecx = yp
movl 8(%ebp),%edx # edx = xp
movl (%ecx),%eax # eax = *yp (t1)
movl (%edx),%ebx # ebx = *xp (t0)
movl %eax,(%edx) # *xp = eax
movl %ebx,(%ecx) # *yp = ebx
0x120
0x124
Rtn adr
%ebp 0
4
8
12
Offset
-4
456
123
Address
0x124
0x120
0x11c
0x118
0x114
0x110
0x10c
0x108
0x104
0x100
yp
xp
%eax
%edx
%ecx
%ebx
%esi
%edi
%esp
%ebp
456
0x124
0x120
123
0x104
– 45 – CSCE 212H Spring 2011
Indexed Addressing ModesIndexed Addressing ModesMost General FormMost General Form
D(Rb,Ri,S)D(Rb,Ri,S) Mem[Reg[Rb]+S*Reg[Ri]+ D]Mem[Reg[Rb]+S*Reg[Ri]+ D] D: Constant “displacement” 1, 2, or 4 bytes Rb: Base register: Any of 8 integer registers Ri: Index register: Any, except for %esp
Unlikely you’d use %ebp, either
S: Scale: 1, 2, 4, or 8
Special CasesSpecial Cases
(Rb,Ri)(Rb,Ri) Mem[Reg[Rb]+Reg[Ri]]Mem[Reg[Rb]+Reg[Ri]]
D(Rb,Ri)D(Rb,Ri) Mem[Reg[Rb]+Reg[Ri]+D]Mem[Reg[Rb]+Reg[Ri]+D]
(Rb,Ri,S)(Rb,Ri,S) Mem[Reg[Rb]+S*Reg[Ri]]Mem[Reg[Rb]+S*Reg[Ri]]
– 46 – CSCE 212H Spring 2011
Address Computation ExamplesAddress Computation Examples
%edx
%ecx
0xf000
0x100
ExpressionExpression ComputationComputation AddressAddress
0x8(%edx)0x8(%edx) 0xf000 + 0x80xf000 + 0x8 0xf0080xf008
(%edx,%ecx)(%edx,%ecx) 0xf000 + 0x1000xf000 + 0x100 0xf1000xf100
(%edx,%ecx,4)(%edx,%ecx,4) 0xf000 + 4*0x1000xf000 + 4*0x100 0xf4000xf400
0x80(,%edx,2)0x80(,%edx,2) 2*0xf000 + 0x802*0xf000 + 0x80 0x1e0800x1e080
– 47 – CSCE 212H Spring 2011
– 48 – CSCE 212H Spring 2011
– 49 – CSCE 212H Spring 2011
– 50 – CSCE 212H Spring 2011
– 51 – CSCE 212H Spring 2011