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Lecture 1: VLSI Overview Digital CMOS VLSI Design Digital CMOS VLSI Design Instructor: Saraju P. Mohanty, Ph. D. NOTE: The figures, text etc included in slides are borrowed from various books websites authors pages and other from various books, websites, authors pages, and other sources for academic purpose only. The instructor does not claim any originality . Digital CMOS VLSI Design 1

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  • Lecture 1: VLSI Overview

    Digital CMOS VLSI DesignDigital CMOS VLSI Design

    Instructor: Saraju P. Mohanty, Ph. D.

    NOTE: The figures, text etc included in slides are borrowedfrom various books websites authors pages and otherfrom various books, websites, authors pages, and othersources for academic purpose only. The instructor doesnot claim any originality.

    Digital CMOS VLSI Design 1

    y g y

  • Lecture Outline

    • Historical development of computersIntroduction to a basic digital computer• Introduction to a basic digital computer

    • Five classic components of a computer• Microprocessor• IC design abstraction levelIC design abstraction level• Processor Trend

    Developmental trends of ICs• Developmental trends of ICs• Moore’s Law

    Digital CMOS VLSI Design 2

  • Introduction to Digital Circuits

    Digital CMOS VLSI Design 3

  • What is a digital Computer ?

    A fast electronic machine that acceptsdigitized input information, processes itg p paccording to a list of internally storedinstruction, and produces the resultingp goutput information.

    List of instructions Computer program

    Internal storage Memory

    Digital CMOS VLSI Design 4

  • Different Types and Forms of Computer

    • Personal Computers (Desktop PCs)• Notebook computers (Laptop computers)• Handheld PCsHandheld PCs• Pocket PCs

    W k t ti (SGI HP IBM SUN)• Workstations (SGI, HP, IBM, SUN)• ATM (Embedded systems)• Supercomputers

    Digital CMOS VLSI Design 5

  • Five classic components of a Computer

    Computer

    Processor

    Computer

    Memory Devices

    Control Input

    Datapath Output

    (1) Input (2) Output (3) Datapath (4) Controller and (5) Memory(1) Input, (2) Output, (3) Datapath, (4) Controller, and (5) Memory

    Digital CMOS VLSI Design 6

  • What is a microprocessor ?

    • A microprocessor is an integrated circuit (IC) built on a tiny piece ofsilicon. It contains thousands, or even millions, of transistors, which aresilicon. It contains thousands, or even millions, of transistors, which areinterconnected via superfine traces of aluminum. The transistors worktogether to store and manipulate data so that the microprocessor canperform a wide variety of useful functions The particular functions aperform a wide variety of useful functions. The particular functions amicroprocessor performs are dictated by software. (source : Intel)

    • Simply speaking, microprocessor is the CPU on a single chip. CPU standsfor “central processing unit” also known as processor.

    • Processor can be “general purpose” or “special purpose”. A special purposeprocessor is also known as “application specific integrated circuit” (ASIC).

    Digital CMOS VLSI Design 7

  • What is an Integrated Circuit ?

    • An integrated circuits is a silicon semiconductorcrystal containing the electronic components forcrystal containing the electronic components fordigital gates.Integrated Circuit is abbreviated as IC• Integrated Circuit is abbreviated as IC.

    • The digital gates are interconnected toimplement a Boolean function in a IC .

    • The crystal is mounted in a ceramic/plasticmaterial and external connections called “pins”are made available.

    • ICs are informally called chips.

    Digital CMOS VLSI Design 8

  • How does a microprocessor look?

    (1) ASIC (2) Sun UltraSparc (3) PentiumPro

    Digital CMOS VLSI Design 9

  • Historical Development

    Digital CMOS VLSI Design 10

  • VLSI Technology: Highest Growth in History• 1958: First integrated circuit

    – Flip-flop using two transistorsFlip flop using two transistors– Built by Jack Kilby at Texas Instruments

    • 20032003– Intel Pentium 4 processor (55 million transistors)– 512 Mbit DRAM (> 0.5 billion transistors)512 Mbit DRAM ( 0.5 billion transistors)

    • 53% compound annual growth rate over 45yearsy– No other technology has grown so fast so long

    • Driven by miniaturization of transistorsDriven by miniaturization of transistors– Smaller is cheaper, faster, lower in power!– Revolutionary effects on societyy y

    Digital CMOS VLSI Design 11

  • VLSI Industry : Annual Sales• 1018 transistors manufactured in 2003

    – 100 million for every human on the planet100 million for every human on the planet• 340 Billion transistors manufactured in 2006.

    (World population 6 5 Billion!)(World population 6.5 Billion!)200

    Globa

    100

    150

    l Sem

    icon(B

    illions o

    50

    nductor Bil

    of US

    $)

    01982 1984 1986 1988 1990 1992 1994 1996 1998 2000 2002

    Year

    lings

    Digital CMOS VLSI Design 12

  • Invention of the Transistor• Invention of transistor is the driving factor of

    growth of the VLSI technologygrowth of the VLSI technology• Vacuum tubes ruled in first half of 20th century

    Large expensive power hungry unreliableLarge, expensive, power-hungry, unreliable• 1947: first point contact transistor

    – John Bardeen and Walter Brattain at Bell Labs– Earned Nobel prize in 1956

    Digital CMOS VLSI Design 13

  • Transistor Types

    • Bipolar transistorsn p n or p n p silicon structure– n-p-n or p-n-p silicon structure

    – Small current into very thin base layer controls largecurrents between emitter and collectorcurrents between emitter and collector

    – Base currents limit integration density• Metal Oxide Semiconductor Field Effect• Metal Oxide Semiconductor Field Effect

    Transistors (MOSFET)MOS d MOS MOSFETS– nMOS and pMOS MOSFETS

    – Voltage applied to insulated gate controls currentbetween source and drainbetween source and drain

    – Low power allows very high integration

    Digital CMOS VLSI Design 14

  • The Babbage Difference Machine in 1832g

    Digital CMOS VLSI Design 15

  • The First Electronic Computer in 1946 (ENIAC)p ( )

    Digital CMOS VLSI Design 16

  • How a Home PC Looks Today??

    Digital CMOS VLSI Design 17

  • First Integrated Circuit - 1958• The First Integrated Circuit – Jack Kilby, Texas Instruments• 1 Transistor and 4 Other Devices on 1 Chip1 Transistor and 4 Other Devices on 1 Chip• Winner of the 2000 Nobel Prize

    Digital CMOS VLSI Design 18

  • First Commercial Planar IC - 1960

    • Fairchild -- One Binary Digital (Bit) Memory Device on a Chip4 Transistors and 5 Resistors• 4 Transistors and 5 Resistors

    • Start of Small Scale Integration (SSI)!! We are in VLSI!!

    Digital CMOS VLSI Design 19

  • First IC Created with Computer-Aided D i T l 1967Design Tools -- 1967

    MOSAIC – FairchildMOSAIC Fairchild

    Digital CMOS VLSI Design 20

  • First 1,024 Bit Memory Chip -- 1970

    1970’• 1970’s processesusually had onlynMOS transistors

    – Inexpensive, butconsume power whileidlidle.

    • 1980s-present: CMOSprocesses for low idleprocesses for low idlepower

    Intel Corporation DRAM

    Digital CMOS VLSI Design 21

  • Intel 4004 : 2.3K Transistors (1971)

    Digital CMOS VLSI Design 22

  • Pentium : 3.1M Transistors (1993)

    Digital CMOS VLSI Design 23

  • Pentium II : 7.5M Transistors (1997)

    Digital CMOS VLSI Design 24

  • Pentium III : 28.1M Transistors (1999)

    Digital CMOS VLSI Design 25

  • Pentium IV : 52M Transistors (2001)

    Digital CMOS VLSI Design 26

  • Core 2 Duo: 291M Transistors (2006)

    Core 2 Duo T5000/T7000 series mobile processors, calledPenryn uses 800M of 45 nanometer devices (2007)

    Digital CMOS VLSI Design 27

    Penryn uses 800M of 45 nanometer devices (2007).

  • Nvidia GT200 Graphics Processing Unit• This GPU contains 1.4 billion transistors.• This uses a 65 nm CMOS fabrication process.p

    Source: http://www.gdiamos.net

    Source: http://nvidiathepoweroffuture.files.wordpress.com/

    Digital CMOS VLSI Design 28

    p g

  • Intel’s Tukwila – 2B Transistors

    • Quad core i.e. 4 cores per die.• 30 MB of cache.• 2 billion transistors on the die.• 64-bit Itanium family.• 65nm CMOS technology.• Release in early 2010.

    Digital CMOS VLSI Design 29

    Release in early 2010.

  • Circuit Design Flow

    Digital CMOS VLSI Design 30

  • Integrated Circuits Categories There are many different types of ICs as listed below.

    IC Categories FunctionsIC Categories FunctionsAnalog ICs Amplifiers

    FiltersDigital ICs Boolean Gates

    Encoders/DecodersMultiplexers / DemultiplexersFlip-flopsCountersCountersShift Registers

    Hybrid ICs Mixed Signal Processorsy gInterface ICs Analog-Digital Converters

    Digital-Analog Converters

    Digital CMOS VLSI Design 31

  • Levels of Integration (Chip Complexity)Categorized by the number of gates contained in the chip.

    IC Number of Functional ExamplesComplexity Gates Complexity

    p

    SSI 100 000 Complete systems Single chip computers digital signalULSI >100,000 Complete systems Single chip computers, digital signalprocessors

    WSI >10,000,000 Distributed systems Microprocessor systems

    Digital CMOS VLSI Design 32

  • Digital Logic Families• Various circuit technology used to implement an IC at

    lower level of abstraction.• The circuit technology is referred to as a digital logic family• The circuit technology is referred to as a digital logic family.

    RTL - Resistor-transistor Logic obsoleteDTL Diode transistor logic obsoleteDTL - Diode-transistor logic obsoleteTTL - Transistor-transistor logic not much used

    ECL - Emitter-coupled logic high-speed ICsECL - Emitter-coupled logic high-speed ICsMOS - Metal-oxide semiconductor high-component densityCMOS - Complementary Metal-oxide widely used, low-power high-C OS Co p e e a y e a o desemiconductor

    de y used, o po e gperformance and high-packingdensity IC

    BiCMOS Bi l C l t hi h t d hi h dBiCMOS - Bipolar ComplementaryMetal-oxide semiconductor

    high current and high-speed

    GaAs - Gallium-Arsenide very high speed circuitsy g p

    Digital CMOS VLSI Design 33

  • Design Abstraction Levels

    SYSTEM

    MODULE

    +

    GATE

    MODULE

    CIRCUIT

    GATE

    GDEVICE

    n+n+S

    GD

    Digital CMOS VLSI Design 34

  • Digital Circuits : Logic to Device

    (NAND Gate) (IEC Symbol)( Gate) ( C Sy bo )

    (Transistor Diagram) (Layout Diagram)

    Digital CMOS VLSI Design 35

    ( g ) (Layout Diagram)

  • Implementation Approaches for Digital ICs

    Digital Circuit Implementation Approaches

    Custom Semi-custom

    Cell-Based Array-Based

    St d d C llStandard Cells Macro Cells Pre-diffused Pre-wired(FPGA)Compiled Cells (Gate Arrays)

    Digital CMOS VLSI Design 36

  • Implementation Approaches for Digital ICs• Full-custom: all logic cells are customized. A general purpose

    microprocessor is designed this way.• Semi-custom: all of the logic cells are from predesigned cell libraries

    (reduces the manufacture lead time of the IC)• Standard-cell based IC uses predesigned logic cells such as ANDStandard cell based IC uses predesigned logic cells such as AND

    gates, OR gates, MUXs, FFs,.., etc.• Macrocells (also called megacells) are larger predesigned cells,

    h i t ll i tsuch as microcontrollers, even microprocessors, etc.• Gate-Array, Sea-of-Gates or prediffused arrays contains array of

    transistors or gates which can be connected by wires to implementg y pthe chip.

    • Programmable-Logic-Array (PLA) is an example of fuse-basedFPGA design (NOTE: Fuse based nonvolatile and volatile areFPGA design. (NOTE: Fuse-based, nonvolatile and volatile arethree types of FPGAs)

    Digital CMOS VLSI Design 37

  • Digital IC Fabrication Flow

    Digital CMOS VLSI Design 38

  • Technology Growth and Moore's Law

    Digital CMOS VLSI Design 39

  • Different Attributes of an IC or chipWe will briefly discuss the VLSI technological

    growth based on these attributes.g

    • Transistor count of a chip

    • Operating frequency of a chip

    • Power consumption of a chip

    • Power density in a chip

    • Size of a device used in chip

    NOTE: Chip is informal name for IC

    Digital CMOS VLSI Design 40

    NOTE: Chip is informal name for IC.

  • Moore’s Law

    G• 1965: Gordon Moore plotted transistor oneach chip– Transistor counts have doubled every 26 months

    • Many other factors grow exponentially– clock frequencyclock frequency– processor performance

    Digital CMOS VLSI Design 41

  • VLSI Trend

    PowerPower,Operatingfrequency andfrequency, andThroughputhavehaveincreased.

    1967 2007

    VLSI technology is the fastest growing technology in human history.

    42

    1967 2007

    Digital CMOS VLSI Design

  • Technology Scaling Trend

    Source: Bendhia 2003

    Digital CMOS VLSI Design 43

  • Evolution in Complexity

    Digital CMOS VLSI Design 44

  • Why Scaling?

    • Technology shrinks by 0.7/generationWi h i i 2 f i• With every generation can integrate 2x more functionsper chip; chip cost does not increase significantly

    • Cost of a function decreases by 2x• Cost of a function decreases by 2x• But …

    – How to design chips with more and more functions?g p– Design engineering population does not double every two

    years…• Hence a need for more efficient design methods• Hence, a need for more efficient design methods

    – Exploit different levels of abstraction

    Digital CMOS VLSI Design 45

  • Increase in Transistor Count

    Pentium IV (55 Million transistors)

    Transistors on Lead Microprocessors double every 2 years

    Digital CMOS VLSI Design 46

  • Die Size Growth

    100m

    m)

    8080 8086 286386

    486 Pentium ® procP6

    10

    e si

    ze (m

    40048008

    80808085

    8086Die ~7% growth per year

    ~2X growth in 10 years

    11970 1980 1990 2000 2010

    Year

    Die size grows by 14% to satisfy Moore’s Law

    Digital CMOS VLSI Design 47

  • Increase in Operating Frequency

    10000D bl

    P6

    1000

    Mhz

    )

    Doubles every2 years

    P6Pentium ® proc

    486386286808510

    100

    quen

    cy (

    28680868085

    80808008

    1

    10

    Freq

    800840040.1

    1970 1980 1990 2000 2010C t I t lYear

    Lead Microprocessors frequency doubles every 2 years

    Courtesy, Intel

    Digital CMOS VLSI Design 48

  • Power will be a major problem

    5KW18KW

    100000

    5KW 1.5KW

    500W 1000

    10000

    Wat

    ts)

    8086286

    386486

    Pentium® proc

    10

    100

    ower

    (W

    400480088080

    8085 386

    1

    10P

    0.11971 1974 1978 1985 1992 2000 2004 2008

    YearYear

    Power delivery and dissipation will be prohibitive

    Digital CMOS VLSI Design 49

  • Power density

    10000) Rocket

    1000

    (W/c

    m2

    Nuclear

    RocketNozzle

    100

    Den

    sity

    Reactor

    40048008 8085

    8086

    286 386 486Pentium® proc

    P610

    Pow

    er

    Hot Plate

    8080 286 48611970 1980 1990 2000 2010

    YYear

    Power density too high to keep junctions at low temp

    Digital CMOS VLSI Design 50

  • Challenges in Digital Design

    “Microscopic Problems” “Macroscopic Issues”Microscopic Problems• Ultra-high speed design• Interconnect• Noise, Crosstalk

    p• Time-to-Market• Millions of Gates• High-Level Abstractions,

    • Reliability, Manufacturability• Power Dissipation• Clock distribution.

    • Reuse & IP: Portability• Predictability• etc.

    Everything Looks a Little Different…and There’s a Lot of Them!

    Digital CMOS VLSI Design 51

  • Productivity TrendsProductivity Trends

    10,000,000 100,000,00010,000(M)

    100,000

    100,000

    1,000,000

    1,000,000

    10,000,000Logic Tr./ChipTr./Staff Month.

    1,000

    100

    r per

    Chi

    p

    1,000

    10,000

    ty f -M

    o.

    xity

    1,000

    10,000

    10,000

    100,00058%/Yr. compoundedComplexity growth rate10

    1

    Tra

    nsis

    tor

    10

    100

    Prod

    uctiv

    itTr

    ans.

    /Sta

    ff

    Com

    plex

    10

    100

    100

    1,000xx

    xx

    xx

    x21%/Yr. compound

    Productivity growth rate

    x0.1

    0.01

    0 001

    Logi

    c

    0 01

    0.1

    1

    P(K

    ) T

    1

    2003

    1981

    1983

    1985

    1987

    1989

    1991

    1993

    1995

    1997

    1999

    2001

    2005

    2007

    2009

    100.001 0.01

    S S t hSource: Sematech

    Complexity outpaces design productivity

    Digital CMOS VLSI Design 52

    Courtesy, ITRS Roadmap

  • Circuit Design Metrics

    Digital CMOS VLSI Design 53

  • Design Metrics

    H t l t f f di it l• How to evaluate performance of a digitalcircuit (gate, block, …)?

    C t– Cost– Reliability

    Scalability– Scalability– Speed (delay, operating frequency)– Power dissipation– Power dissipation– Energy to perform a function

    Digital CMOS VLSI Design 54

  • Cost of Integrated Circuits

    • NRE (non-recurrent engineering) costsdesign time and effort mask generation– design time and effort, mask generation

    – one-time cost factorR t t• Recurrent costs– silicon processing, packaging, test– proportional to volume– proportional to chip area

    Digital CMOS VLSI Design 55

  • NRE Cost is Increasing

    Digital CMOS VLSI Design 56

  • Die Cost

    Single die

    Wafer

    G i t 12” (30 )Going up to 12” (30cm)

    Digital CMOS VLSI Design 57

  • Cost per Transistor

    0 10 111

    cost: cost: ¢¢--perper--transistortransistor

    Fabrication capital cost per transistor (Moore’s law)

    0 0010 001

    0.010.01

    0.10.1 Fabrication capital cost per transistor (Moore s law)

    0.000010.00001

    0.00010.0001

    0.0010.001

    0.00000010.0000001

    0.0000010.000001

    19821982 19851985 19881988 19911991 19941994 19971997 20002000 20032003 20062006 20092009 20122012

    Digital CMOS VLSI Design 58

  • Die Yield%100

    per wafer chipsofnumber Totalper wafer chips good of No.

    Ypp

    yieldDieper waferDiescostWafer cost Die

    yieldDieper waferDies

    areadie2

    diameterwafer areadie

    diameter/2wafer per wafer Dies2

    areadie2areadie

    Digital CMOS VLSI Design 59

  • Die Defects

    area dieareaunit per defects1yield die

    is approximately 3

    44area)(diecost die f

    Digital CMOS VLSI Design 60

  • Some Examples (1994)So e a p es ( 99 )Chip Metal

    lLine idth

    Wafer t

    Def./ 2

    Area 2

    Dies/f

    Yield Die tlayers width cost cm2 mm2 wafer cost

    386DX 2 0.90 $900 1.0 43 360 71% $4

    486 DX2 3 0.80 $1200 1.0 81 181 54% $12

    Power PC 601 4 0.80 $1700 1.3 121 115 28% $53

    HP PA 7100 3 0.80 $1300 1.0 196 66 27% $73

    DEC Alpha 3 0.70 $1500 1.2 234 53 19% $149

    Super Sparc 3 0 70 $1700 1 6 256 48 13% $272Super Sparc 3 0.70 $1700 1.6 256 48 13% $272

    Pentium 3 0.80 $1500 1.5 296 40 9% $417

    Digital CMOS VLSI Design 61

  • Reliability―Noise in Digital Integrated Circuits

    v(t) VDDi(t)

    v(t) VDD

    Inductive coupling Capacitive coupling Power and groundnoise

    Digital CMOS VLSI Design 62

  • Mapping between analog and digital signalspp g g g g

    V

    Slope = -1V OH

    Vout

    V

    VOH“ 1”

    OHVIH

    Undefined

    DC Operation:Voltage Transfer

    Ch t i tiUndefinedRegion

    Characteristic

    Slope = -1

    V OL“ 0” V

    VIL

    V IL V IH V in

    OL0 VOL

    Digital CMOS VLSI Design 63

  • Definition of Noise Marginsg

    "1"

    VNoise margin high

    VIHUndefined

    VOH NMH

    Noise margin lowVIL

    UndefinedRegion

    VONML g

    "0"

    VOL

    Gate Output Gate Input

    Digital CMOS VLSI Design 64

  • Noise Budget

    • Allocates gross noise margin to expectedsources of noisesources of noise

    • Sources: supply noise, cross talk, interference,offsetoffset

    • Differentiate between fixed and proportionalnoise sources

    Digital CMOS VLSI Design 65

  • Key Reliability Properties• Absolute noise margin values are deceptive

    – a floating node is more easily disturbed than a node driven by alow impedance (in terms of voltage)

    • Noise immunity is the more important metric – thebilit t icapability to suppress noise sources

    • Key metrics: Noise transfer functions, Output impedance of thedriver and input impedance of the receiver;driver and input impedance of the receiver;

    Digital CMOS VLSI Design 66

  • Fan-in and Fan-out

    MN

    M

    Fan-out N Fan-in M

    Digital CMOS VLSI Design 67

  • The Ideal Gate

    V out

    Ri = Ro = 0o Fanout = NMH = NML = VDD/2

    g = NMH NML VDD/2

    V in

    Digital CMOS VLSI Design 68

  • Delay Definitions

    Vin

    50%

    t t

    t

    VouttpHL tpLH

    90%90%

    50%

    tf trt10%

    Digital CMOS VLSI Design 69

  • A First-Order RC Network

    voutR

    vin C

    tp = ln (2) t = 0.69 RC

    Important model – matches delay of inverter

    Digital CMOS VLSI Design 70

  • Power Dissipation

    Instantaneous power:Instantaneous power: p(t) = v(t)i(t) = Vsupplyi(t)

    Peak power: P = V iPpeak = Vsupplyipeak

    Average power:Average power:

    Tt Ttsupply d

    VdP )(1 t t supply

    supplyave dttiT

    dttpT

    P )(1

    Digital CMOS VLSI Design 71

  • Energy and Energy-Delay

    Power-Delay Product (PDP) =

    E = Energy per operation = Pav tp

    Energy-Delay Product (EDP) =Energy Delay Product (EDP)

    quality metric of gate = E tp

    Digital CMOS VLSI Design 72

  • Summary

    • Digital integrated circuits have come a long way and stillg g g yhave quite some potential left for the coming decades

    • Some interesting challenges ahead– Getting a clear perspective on the challenges and potential

    solutions is the purpose of this book• Understanding the design metrics that govern digitalUnderstanding the design metrics that govern digital

    design is crucial– Cost, reliability, speed, power and energy dissipation

    Digital CMOS VLSI Design 73