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    Non Ideal Characteristics of

    Differential Amplifier

    Integrated Circuits

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    Introduction

    Input offset voltage

    Input Bias and offset currents

    Input common mode range

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    Input offset Voltage

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    Conti

    Both inputs are grounded.

    If two sides are perfectly matched then

    current I would split equally b/w the Q1 and

    Q2, and Vo would be zero.

    Practical circuits exhibit mismatches that

    results in a dc output voltage Vo even with the

    inputs grounded.

    Vo is the output dc offset voltage.

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    Conti

    Input offset voltage Vos can be obtained

    simply by dividing Vo by differential gain of

    the amplifier.

    Vos=Vo/Ad

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    Second Case

    If we apply a voltageVos Between the input

    terminal of differential amplifier then output

    voltage reduced to zero.

    The offset voltage results from the

    mismatches in the load resistance Rc1 and Rc2

    and from mismatches in Q1 and Q2.

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    Conti..

    1 = (

    )

    2 =

    Then

    1 = (

    )( (

    )2 = (

    )( (

    )

    Vo=Vc2-Vc1

    As

    Vos=

    Vos=( (

    )())/

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    Conti

    Now consider the effects of mismatches in

    transistors Q1 and Q2, means in particular let

    transistors have a mismatch in their emitter

    base junction.

    There are other possible sources for input

    offset voltage such as mismatches in the

    values of and r0.

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    Solution

    For compensating offset voltages it involves a

    deliberate mismatch in the values of two

    collector resistances such that the differential

    output voltage is reduced to zero when both

    input terminals are grounded.

    Offset-nulling scheme

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    Input Bias and Offset Currents

    In a perfectly symmetric differential pair thetwo input terminals carry equal DC currents.

    1 = 2 = (/2)/ 1

    This is the input Bias current of the differential

    amplifier.

    Mismatches in the amplifier circuit and mostly

    a mismatch in makes the two input currentsunequal. The resulting difference is the inputoffset current, Ios

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    Conti

    1 = 2 =

    +

    = 1 2

    1=

    2=

    After calculation

    Ios=

    +(

    )

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    Input common mode range

    The input common mode range of adifferential amplifier is the range of inputvoltage Vcm over which the differential pair

    behaves as a linear amplifier for differentialinput signals.

    The upper limit of the common mode range isdetermined by Q1 and Q2 leaving the activemode and entering the saturation mode ofoperation.

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    Conti

    Thus the upper limit is approximately equal to

    the dc collector voltage of Q1 and Q2.

    The lower limit is determined by the

    transistors that supplies the biasing current I

    leaving its active region of the operation and

    no longer functioning as a constant current

    source.

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    Biasing in BJT IC

    With the present IC technology it is almost

    impossible to fabricate large capacitors and it is

    uneconomical to manufacture large resistances.

    Basically biasing in the integrated circuit design isbased on the use of constant current sources.

    On a IC chip with a number of amplifier stages a

    constant dc current is generated at one locationand then reproduced at various other locations

    for biasing the various amplifier stages.

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    Diode Connected Transistors

    Shorting the base and the collector of the BJT

    together results in a two terminal device

    having an i-v characteristics identical to the iE-

    VbE.

    Fig on white board

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    Conti

    Fig shows the two diode connectedtransistors, one npn and the other is pnp.

    BJT is still operating in active mode, so the

    current I divides b/w the base and collectoraccording to the value of the BJT .

    Thus internally BJT still operates as a transistor

    in the active mode this is the reason the i-vcharacteristic of the resulting diode is identicalto the IE-V be.

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    Current Mirror

    Current mirror is a circuit designed to copy acurrent through one active device by controllingthe current in another active device of a circuit,

    keeping the output current constant regardless ofloading. The current being 'copied' can be, andsometimes is, a varying signal current.Conceptually, an ideal current mirror is simply an

    ideal current amplifier. The current mirror is usedto provide bias currents and active loads tocircuits

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    Conti

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    Mirror characteristics

    There are three main specifications that characterize a currentmirror.

    1. The first is the current level it produces.

    2. The second is its AC output resistance, which determines howmuch the output current varies with the voltage applied to the

    mirror.3. The third specification is the minimum voltage drop across the

    mirror necessary to make it work properly. This minimum voltageis dictated by the need to keep the output transistor of the mirrorin active mode.

    The range of voltages where the mirror works is called thecompliance range and the voltage marking the boundary betweengood and bad behavior is called the compliance voltage. There arealso a number of secondary performance issues with mirrors, forexample, temperature stability.

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    Simple Current Source

    Current source is an electrical or electronic

    device that delivers or absorbs electric

    current.

    Fig On White Board

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    Conti

    This circuit will be used in BJT current steering

    circuitry.

    It utilizes a pair of matched transistors with

    the input reference current, determined by

    the resistor R connected to the positive power

    supply V cc then the current I ref will be

    =

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    Conti

    V be is the base emitter voltage corresponding

    to an emitter current. Neglecting the effects of

    and Dependence of Io on Vo the output

    currents Io will be equal to I ref.

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    Current Steering Circuits

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    Conti

    Dc reference current is generated in one location andthen its is reproduced at other locations for thepurpose of biasing the various amplifier stages in IC

    From Fig I ref is generated in the branch that consists ofthe diode connected transistors Q1 and resistor R

    Now for the sake of the simplicity assume that alltransistors have high and thus base currents arenegligibly small.

    Diode-connected transistors Q1 forms a current mirrorwith the Q3.

    Thus Q3 will supply a constant I equal to I ref

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    Conti

    To generate the DC current twice the value of

    the I ref then two transistors should be

    connected in parallel.

    Current mirrors are indeed used to provide

    multiples of the reference current by simply

    designing the transistors to have an area ratio

    equal to the desired multiple.

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    Comparison with MOS Circuits

    The MOS mirror doesnt suffer from finite effect.

    Current transfer ratio in a bipolar mirror is

    determined by the relative areas of thetransistors , where as in MOS mirror its isdetermined by relative (W/L) ratios

    Both basic bipolar and MOS mirrors have anoutput resistance r0=VA/I

    However VA is usually lower for MOS devices.

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