LADDER DIAGRAM - Arab Academy for Science...

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LADDER DIAGRAM

Transcript of LADDER DIAGRAM - Arab Academy for Science...

Page 1: LADDER DIAGRAM - Arab Academy for Science ...aast.edu/papers/staffcourses/53_36765_ME593_2014_1__1_1...LADDER DIAGRAM Timers T4, Timer File • The timer file stores only timer elements.

LADDER DIAGRAM

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Timers

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T4, Timer File

• The timer file stores only timer elements.

• An element is a word or group of words that work together as a unit.

• A timer is made of three pieces or words.

– Preset value

– Accumulated value

– Status bits

• The preset value and accumulated value are 16-bit signed integers.

• Status bits are single bits that make up one 16-bit word.

• These three words work together as a unit.

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One Timer Element Is Made of Three 16-bit Words

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Timer Addressing

• Sample timer element addressT4:2

– T4 = timer file 4

– :2 = timer element #2 (0-255 timer elements per file)

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Sub-element

• A sub-element is part of an element addressable as a unit.

• The preset value and accumulated value are sub-elements of a timer.

– T4:0.PRE

– T4:0.ACC

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Timer Status Bits

• Timers have three status bits.

• Done bit (DN) is true when the accumulated value and preset are equal.

• Timer timing bit (TT) is true when the timer is timing.

• Enable bit (EN) is true when the timer instruction is enabled or true.

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Timer Bit Addressing

• Status bit addresses for timer file 4, timer element 2 (T4:2) are listed below:

– T4:2/DN is the address for the done bit.

– T4:2/EN is the address for the enable bit.

– T4:2/TT is the address for the timer timing bit.

Page 10: LADDER DIAGRAM - Arab Academy for Science ...aast.edu/papers/staffcourses/53_36765_ME593_2014_1__1_1...LADDER DIAGRAM Timers T4, Timer File • The timer file stores only timer elements.
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Retentive Timer and Its Reset Instruction

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Timer Instructions

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Counters

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C5, Counter File (1 of 2)

• The counter file stores only counter elements.

• An element is a word or group of words that work together as a unit.

• A counter is made of three pieces or words.

– Preset value

– Accumulated value

– Status bits

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C5, Counter File (2 of 2)

• The preset value and accumulated value are 16-bit signed integers.

• Status bits are single bits that make up one 16-bit word.

• These three words work together as a unit.

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One Counter Element Is Made of Three 16-bit Words

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Counter Addressing

• Sample counter element address C5:2

– C5 = timer file 5

– :2 = counter element #2 (0-255 timer elements per file)

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Sub-element

• A sub-element is part of an element addressable as a unit.

• The preset value and accumulated value are sub-elements of a counter.

– C5:0.PRE

– C5:0.ACC

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Counter Status Bits (1 of 2)

• Counters have five status bits.

• Done bit (DN) is true when the accumulated value and preset are equal.

• Count up enable bit (CU) is true when the up counter is true or enabled.

• Count down enable bit (CD) is true when the count down counter is enabled or true.

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Counter Status Bits (2 of 2)

• The overflow bit (OV) is true when the up counter has overflowed above +32767.

• The underflow bit (UN) is true when the down counter has underflowed below -32768.

• The update accumulator bit (UA) is a high-speed counter status bit for fixed SLC 500 PLCs.

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Counter Status Bit Addressing

• Status bit addresses for counter file 5, counter element 0 (C5:0) are listed below:

– C5:0/DN is the address for the done bit.

– C5:0/CU is the address for the count up enable bit.

– C5:0/CD is the address for the count down enable bit.

– C5:0/OV is the address for the count up overflow bit.

– C5:0/UN is the address for the count down underflow bit.

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Counters

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SLC 500 Count Up Counter

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SLC 500 Count Down Counter

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SLC 500 Count Down Counter Instruction

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Reset Instruction to Reset Counter C20:7

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Using the Clear Instruction to Clear C5:0.ACC and C5:1.ACC

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Comparison Instructions

• Input instructions that test the relationship between two values, source A and source B

– Source A is an address.

– Source B can be an address or a constant value.

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Equal Instruction (EQU)

• Test when two values are equal.

• Instruction is true when source A is equal to source B.

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An Equal Instruction Controlling OTE Instruction

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Not Equal Instruction (NEQ)

• Test when two values for inequality.

• Use this instruction to determine if two specified sources are not equal.

• Instruction is true when source A is not equal to source B.

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Not Equal Instruction

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Less Than Instruction (LES) (1 of 2)

• Test when one value is less than another.

• Instruction is true when the data stored in source A is less than either the data stored in the address specified as source B or a constant entered in source B.

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The Less Than Instruction (2 of 2)

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Less Than or Equal (LEQ)

• Determine if one source of data is less than or equal to another.

• Instruction is true when the data stored in source A is less than or equal to either the data stored in the address specified as source B or a constant entered in source B.

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Less Than or Equal Instruction

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Greater Than Instruction (GEQ)

• Determine if one source of data is greater than another.

• Instruction is true when the data stored in source A is greater than either the data stored in the address specified as source B or a constant entered in source B.

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The Greater Than Instruction

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Greater Than or Equal (GEQ)

• Determine if one source of data is greater than or equal to another.

• Instruction is true when the data stored in source A is greater than or equal to either the data stored in the address specified as source B or a constant entered in source B.

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Greater Than or Equal Instruction

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Data-handling Instructions

• Used when data needs to be moved or copied from one data file source to another

• When data needs to be converted to a different radix

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Move Instruction (MOV) (1 of 2)

• This is an output instruction that moves a copy of one data file element to a specified destination.

• The source can be an address or constant.

• When instruction is true, a copy of the source data will be moved to the specified destination address.

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Move Instruction (2 of 2)

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Masked Move Instruction (MVM) (1 of 2)

• This is an output instruction that moves a copy of one data file element through a mask to a specified destination.

• When true, a copy of the data specified in the source is moved through a hexadecimal mask to the specified destination.

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Masked Move Instruction (2 of 2)

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Hexadecimal Masking

• Source data is passed through the mask bit by bit.

• Mask bit in same position as source bit determines if data is to pass or not.

• To pass data through mask, set appropriate mask bit.

• To mask data from passing, reset the appropriate mask bit.

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Source Data Moved through the Mask to the Destination

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Mask Rules

• Mask is either a hexadecimal value or the address where the mask will be found.

• Data is evaluated on a bit by bit basis.

• Mask 1 bits allow data to pass.

• Mask 0 bits hold data from passing.

• Destination bits that correspond to zeros in the mask are not changed.

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FRD Instruction Converting BCD Input Data to Integer

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TOD Instruction Converting Integer Output Data to BCD

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Copy File Instruction (COP)

• Output instruction that copies a user-defined group of 16-bit data file words

• Must copy consecutive dat file elements

• Copy up to 128 one-word elements

• Source and destination can be different file types

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Copy File Programming Parameters (1 of 2)

• Source is the address of the file to be copied.

• The # symbol in front of the source address specifies this address as the beginning of a user-defined source file.

• Destination is the starting address from which the number of source elements specified in the length parameter will be copied.

• # specifies copying a user-defined file.

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Copy File Programming Parameters (2 of 2)

• Length parameter is the number of consecutive elements to be copied.

• Because different file types can be copied, the destination file type and length specify how many elements will be transferred.

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Example of Copy File Instruction Operation

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Ladder Containing Copy Instruction

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AND Instruction

• The AND instruction performs a logical AND operation on two 16-bit words.

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OR Instruction on a Ladder Rung

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Exclusive-OR Instruction on a Ladder Rung

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Not Logic As an Output Instruction on a PLC Ladder Rung

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The Limit Test Instruction Testing for Values between 0 and 1750

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The Limit Test Instruction Testing for Values outside the Range of 0 to 100

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Data Flow from a VFD into the PLC

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Scale with Parameters

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