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King Fahd University of Petroleum and MineralsComputer Engineering Department

A Draft for a Revised Computer Engineering Program

November 2010

I. Introduction

The Computer Engineering department at KFUPM is currently embarking on a major program revision. This process was motivated by several factors which are listed below:

1. Computer Engineering is a very dynamic field and there is a continuous need for updating a COE program to cope with the fast advances in the field. The last curriculum revision was undertaken by the COE department over six years ago

2. In 1423 H (2002 G) a National Science, Technology and Innovation Plan (NSTIP) was approved by the Council of Ministers and a budget of 7.9billion SR1 was allotted for a five year implementation plan encompassing eight major tracks2, 3. Two of these programs are directly related to Computer Engineering, namely; the Information Technology (IT) track, and Electronics, Communication, and Photonics (ECP) track. As such the COE department is proposing this revision to better align its program with these NSTIP technology tracks (IT and ECP) and help in the transition to a knowledge-based economy in KSA

3. To better serve the local market needs, where a shortage in IT sectors of 30,000 jobs is expected by the year 20144

4. To provide students with more choices and flexibility within the program

5. To provide more in-depth knowledge within certain areas of COE deemed to be of critical importance

The main features of the newly proposed program are:

1. It features two main tracks within the COE program. These are two tracks within the same program, i.e. one degree is issued to all COE graduates irrespective of the track they followed. Both tracks will share the same foundation courses (University requirements, basic sciences, and basic COE courses). They will only differ in track-specific courses (a total of 3 courses). The proposed tracks are:

a. Computer Systems Engineering Track (CSYS) and

b. Computer Networks (CNET)Track

2. It allows students to take all courses specific to any track (through electives). For instance, a student in the Computer Networks track can still elect to take all the courses particular to the Computer Systems track. This would also help students change tracks at any time they want.

3. It maximizes the sharing of courses between the two tracks (necessary for 2 above).

4. The Capstone project course is required upon all students (coop or non-coop) and is based on track-core courses.

5. Non-technical engineering skills and knowledge were injected into the new program through the introduction of two new core courses; Computer Engineering Design Principles and Engineering Economy. These courses will introduce students to such concepts and skills as requirements analysis, brain storming, project planning and management, risk analysis, product cycle, product financing, cost amortization …etc.

1 The Government Expenditure on R&D is planned to be 1.6% of the GDP by 1438 AH (2017 AD).2 “Kingdom of Saudi Arabia: Toward Knowledge-Based Economy,” Mohammed I. Al-Suwaiyel, President, KACST, 2008 Global Competitiveness Forum, 20-22 January 2008, Riyadh (http://www.hightrusted.com/GCF2009/media/p/12/download.aspx)3 “Strategic Priorities for Electronics, Communications and Photonics Technology Program,” http://www.kacst.edu.sa/en/research/Documents/ECP.pdf4 “ نقص ستعاني بحلول 30السعودية المعلومات تقنية كوادر من 2014ألفاً ” http://international.daralhayat.com/internationalarticle/139679

http://international.daralhayat.com/internationalarticle/139679

http://www.kacst.edu.sa/en/research/Documents/ECP.pdf

http://www.hightrusted.com/GCF2009/media/p/12/download.aspx

The new program structure is illustrated in the chart in Figure 1 below. As mentioned above, both tracks share all courses except for 3 track-specific courses.

5

Table 1 below shows major universities with similar program structure (i.e. tracks with a COE program).

5 For the coop option, the COOP (9cr. hrs) and the Database course (4 cr. hrs) replace two COE electives, the general elective and a general studies elective yielding a total of 133 cr. hrs.

University Requirements (29 cr. Hrs)Islamic & Arabic (12 cr. Hrs.), English (9cr. Hrs), General studies (6cr. Hrs.) and Physical Education courses (2 cr. Hrs)

Logic Design (4 cr. Hrs), Comp. Organization (4cr. Hrs), Data & Comp. Communications (3 cr. Hrs), Comp. Networks (4 cr. Hrs), Introduction to Embedded Systems (4 cr. Hrs), Comp. Eng. Design Principles (2 cr. Hrs) and Eng. Economy (3 cr. hrs)Track Specific courses (9 cr. Hrs)

Computer Systems Track: Students must takeCOE 302 Digital System Design (3cr. hrs) and two of the following courses:COE 403 Computer ArchitectureCOE 420 Parallel ComputingCOE 460 Principles of VLSI Design

Computer Networks Track: Students must takeCOE 345Network Design & Management (3cr. hrs) and two of the following coursesCOE 445 Internet Engineering & TechnologyCOE 446 Mobile ComputingCOE 451 Computer & Network Security

Basic Sciences (29 cr. Hrs)Math & Probability (17 cr. Hrs.), Physics (8cr. Hrs) and Chemistry (4cr. Hrs.)

Electric Circuits and Electronics from EE dept. (8 cr. Hrs)

Computer Sciences including Discrete Structures (18 cr. Hrs)

Foundation Courses in Computer Engineering and Engineering Economy (24 cr. Hrs)

Electives (12 Cr. Hrs: 2 COE Electives, one technical elective and one free elective)

COE Capstone Project (3 cr. Hrs of Computer Engineering Design Experience taken by all COE students)

Total of 132 cr. Hrs

Figure 1: The structure of the newly proposed COE program.

University Total Credits

Common Core Common Electives % of common courses

Track Specific % Track Specific

KFUPM (Proposed):Computer Networks Track

132 105 credits of University requirements, Basic Sciences, English, Computer Science, Eng. Economy, Circuits and Electronics

18 credits (6 courses: 9 COE/Technical Electives + 6 General Studies + 3 Free Elective)

93% 9 credits (3 courses): Network Design and Managements and two of the following three coursesNetwork Security,Internet Eng. & Tech.,Mobile Computing

7%

KFUPM (Proposed):Computer Systems Track

132 105 credits of University requirements, Basic Sciences, English, Computer Science, Eng. Economy, Circuits and Electronics

18 credits (6 courses: 9 COE/Technical Electives + 6 General Studies + 3 Free Elective)

93% 9 credits (3 courses): Design and Simulation of Digital Systems and two of the following three coursesComputer Architecture,Parallel Computing,VLSI Design

7%

COE at Texas A&M(VLSI Track)

130 104 credits of University requirements: Basic Sciences, COE Core and English

18 credits (7 courses: 6 Area Electives + 3 Technical Elective + 3 Social Science Elective + 3 Visual and Performing Arts Elective + 3 Writing Skills Elective)

94% 8 credits (2 courses of 4 credits each)

6%

COE at MichiganTech (General Purpose Systems Track)

128 94 credits of University requirements: Basic Sciences, COE Core and General Studies

28 credits (10 courses: 3 Technical Elective + 6 Engineering Design Elective + 15 General Education Electives + 3 Co-Curricular Elective + 1 Free Elective)


5%

ECE at Carnegie Mellon University(Computer Hardware Area)

379 199 units of University requirements: Basic Sciences, ECE Core and General Education

120 units(24 units Engineering Elective + 60 units Free Electives + 18 units Maths/Science Elective + 18 units General Education Elective)

84% 60 units (24 units or 2 Area Core courses + 24 units or 2 Breadth Area Electives + 12 units or 1 Depth Area Elective)

16%

COE at University of Wisconsin at

126 95 credits of University requirements: Basic

15 credits of General Education

87 % 16 credits (4 courses: 12 credits of Technical

13 %

Milwaukee(Computer Architecture and Embedded Systems)

Sciences, Engineering Core, COE Core and General Education

Requirements Electives) Depth Electives + 4 credits of Capstone Elective)

COE at University of California Davis(Digital Systems Area)

180 130 units of University requirements: Basic Sciences, Engineering Core, COE Core and General Education

31 units (12 Lower Division GE Electives + 12 Upper Division GE Electives + 7 Free Electives)

89% 19 units (10 units for Upper Division Electives + 9 units for Technical Electives)

11%

COE at University of North Carolina at Charlotte(Hardware Systems Area)

125 110 credits of University requirements: Basic Sciences, COE Core and Liberal Studies

9 credits (3 courses: 3 Math Elective + 3 Restricted Elective + 3 Liberal Studies Elective)


5%

COE at Rutgers(Digital Systems Design or VLSI Design Track)

126 96 credits of University requirements: Basic Sciences, and COE

18 credits (3 credits Technical Elective + 6 credits Lower Level Hum/Soc Elective + 6 credits Higher Level Hum/Soc Elective + 3 credits Science and Eng. Elective)

90% 12 credits (At least 3 electives must be taken from an approved list based on the capstone design track + 3 credits for Capstone Track Elective)

10%

COE at the New Jersey Science and Technology University (NJIT)(Advanced Computer Systems Track)

129 106 credits of University requirements: Basic Sciences, COE Core and Humanities

12 credits (4 courses: 6 Technical Electives + 3 Humanities Elective + 3 GUR Elective)

91% 11 credits (9 credits: 3 Track Elective + 2 credits: 1 Track Laboratory Elective )

9%

COE at the University of Washington

180 124 credits of University requirements: Basic Sciences, COE Core, Writing and Oral Communication and Humanities

28 credits (21 credits Free Electives + 7 credits Engineering Electives)

84% 28 credits (16 credits of Core Track courses + 5 credits Capstone Track course + 7 credits CSE Electives)

16%

COE at Texas A&M6 Depth Tracks• Communications and Networks • VLSI• Software Systems• Signal/Image Processing &

128 98 credits (33 courses)- 20 Math and Stat core credit hours (6 courses)- 12 Sciences core credit hours (4 courses)- 6 English core credit hours (2 courses)- 3 Humanities core credit

18 credits (6 courses)- 3 COE depth credit hours (1 open area elective course)- 3 ENGR elective credit hours (1 Engineering Technical Elective Course)

91% 12 credits (4 courses)- 12 COE depth credit hours (4 area elective courses from 2 depth tracks)Depth Tracks• Communications and Networks

9%

Graphics• Robotics/Embedded Systems• Information

hours (1 course)- 2 PE core credit hours (2 courses)- 6 Citizenship core credit hours (2 courses)- 27 CSCE core credit hours (9 Computer Science and Engineering courses)- 18 ECEN core credit hours (5 Electrical and Computer Engineering courses)- 4 ENGR core credit hours (2 Engineering courses (100 level courses))

- 3 Visual & Performing Arts elective credit hours (1 course)- 3 Social Science elective credit hours (1 course)- 6 Citizenship elective credit hours (2 courses)- 6 International and cultural diversity elective credit hours (2 courses) (may be taken to meet another requirement in one of the above three categories)

o ECEN 455 (4), Digital Communicationso CSCE 463 (3), Computer Networkso MATH 470 (3), Comm. & Cryptographyo ECEN 478 (3), Wireless Communications• VLSIo ECEN 468 (4), Advanced Logic Designo ECEN 474 (4), VLSI Circuit Designo ECEN 475 (4), Intro. to VLSI Sys. Designo ECEN 326 (4), Electronic Circuits• Software Systemso CSCE 431 (3), Software Engineeringo CSCE 434 (3), Compiler Designo CSCE 442 (3), Scientific Programmingo CSCE 410 (3), Advanced OSo CSCE 314 (3), Programming Languages• Signal/Image Processing & Graphicso ECEN 444 (3), Digital Signal Processingo ECEN 447 (4), Digital Image Processingo CSCE 441 (3), Computer Graphicso ECEN 448 (3), Real time DSP• Robotics/Embedded Systems

o CSCE 452 (3), Roboticso ECEN 420 (3), Linear Control systemso CSCE 456 (4), Real-time Computingo ECEN 421 (3), Digital Control Systemso CSCE 420 (3), Artificial Intelligence• Informationo CSCE 310 (3), Database systemso CSCE 436 (3), Computer Human Interactiono CSCE 444 (3), Structures of Interactive Info.o CSCE 470 (3), Information Storage & Retrievalo CSCE 438 (3), Distributed Objectso ECEN 455 (3), Digital Communications

Vanderbilt University(Embedded Systems, Computer Systems and Networks, Intelligent Systems and Robotics)

127 73 Credits (18 credits of Math, 16 credits of Basic Sciences, 6 credits of Eng. Fundamentals, 7 credits of Design experience, 26 credits of Computer Engineering required Cores)

33 credits (15 Technical + > 6 credits approved Eng. Electives + 3 credits of Open elective + 9 hrs Optional electives)

88% 21 credits (7 courses);Two each from two different areas + One course out of these 6 is a track-specific core, + 1 core design domain expertise course from a major track

12%

Villanova University 131 95 Credits: Basic Sciences, Math, Computer Programming, Computer Engineering

24 Credits 91% 7 12 Credits (4 courses); 9%

Iowa State University, Computer Engineering (Computing &

126.5 94.5 credits: General Education

Electives: 15 cr Basic Program

32 credits: 2 Computer

engineering electives: 6 cr

75% Flexible

Networking Systems Track)

(Chemistry, English, Engineering, Math, Physics): 26.5 cr

Math and Physical Science: 20 cr.

Computer Engineering Core: 33 cr

3 technical electives: 9 cr

1 electrical engineering elective: 3 cr

1 computer science elective: 3cr.

Senior project: 5 cr

English: 3 cr Stat: 3 cr.

Iowa State University, Computer Engineering (Secure & Reliable Computing)













75% Flexible

Iowa State University, Computer Engineering (Software Engineering/Systems)












75% Flexible


Iowa State University, Computer Engineering (VLSI Design)













75% Flexible

University of Washington 14 Depth Tracks Communications Wireless

Communications Embedded

Computing Systems

Digital VLSI Circuits

Analog Circuits Biomedical

Instrumentation Sensors and

Devices Electromagnetics Signal Processing Large Scale Power

Systems Sustainable

Electric Energy Power Electronics

and Electric

180 General Education Requirements (81 credits)

Major Requirements (80-81 credits)

- Electrical Engineering Core (14 credits)

- Mathematics (24 credits) - Statistics (3 credits)- Natural Science

(20 credits)- Computer

Programming (9 credits)

- English language and Communication (24 credits)

- Arts and Individuals and Societies (25 credits)

Electrical Engineering Electives (up to 20 credits

Total number of credits of the major concentration and electives should total 44.

Engineering Electives (10 credits)

Electives (18-19 credits) 1. Approved Non-

Electrical Engineering Electives (10 credits)

2. Free Electives (8-9 credits)

86% Electrical Engineering Major Concentration Area (at least 24 credits)

14%

http://www.ee.washington.edu/academics/undergrad/MajorConcentrationAreas.html#PowerElectronics


http://www.ee.washington.edu/academics/undergrad/MajorConcentrationAreas.html#Sustain

http://www.ee.washington.edu/academics/undergrad/MajorConcentrationAreas.html#Sustain

http://www.ee.washington.edu/academics/undergrad/MajorConcentrationAreas.html#LargeScale

http://www.ee.washington.edu/academics/undergrad/MajorConcentrationAreas.html#LargeScale

http://www.ee.washington.edu/academics/undergrad/MajorConcentrationAreas.html#SigProc-1D

http://www.ee.washington.edu/academics/undergrad/MajorConcentrationAreas.html#EM-antenna

http://www.ee.washington.edu/academics/undergrad/MajorConcentrationAreas.html#SensorsDevices

http://www.ee.washington.edu/academics/undergrad/MajorConcentrationAreas.html#SensorsDevices

http://www.ee.washington.edu/academics/undergrad/MajorConcentrationAreas.html#BioMedInstrumentation

http://www.ee.washington.edu/academics/undergrad/MajorConcentrationAreas.html#BioMedInstrumentation

http://www.ee.washington.edu/academics/undergrad/MajorConcentrationAreas.html#Analog_Circuits:

http://www.ee.washington.edu/academics/undergrad/MajorConcentrationAreas.html#DigIntCircuits

http://www.ee.washington.edu/academics/undergrad/MajorConcentrationAreas.html#DigIntCircuits

http://www.ee.washington.edu/academics/undergrad/MajorConcentrationAreas.html#DigCompCircuits



http://www.ee.washington.edu/academics/undergrad/MajorConcentrationAreas.html#wirelesscomm

http://www.ee.washington.edu/academics/undergrad/MajorConcentrationAreas.html#wirelesscomm

http://www.ee.washington.edu/academics/undergrad/MajorConcentrationAreas.html#Comm

Drives Controls

University of Toronto

Streams: Communications, Systems Control, Computer Engineering, Electronics, Electromagnetic, Energy Systems, Biomedical, Photonics

A student in ECE at the University of Toronto can choose your own path of study. The first two years of study will cover the foundation required for the choices you can make in your third and fourth years. ECE students can choose a stream or they can create their own areas of study from the many courses offered

CSYS-like Tracks CNET-like

http://www.ee.washington.edu/academics/undergrad/MajorConcentrationAreas.html#Controls


II. Program Educational Objectives

As an institution of higher learning, the KFUPM is committed to (University Mission):

a. Preparing professionals empowered with the knowledge, skills, values and confidence to take a leadership role in the development of the Kingdom in the fields of science, engineering, environmental design and business.

b. Producing research that contributes to the knowledge and sustainable development of the Kingdom and the region by providing innovative solutions to identified economic and technical problems and opportunities.

c. Providing a stimulating campus environment for the welfare of its students, faculty and staff, and offering outstanding professional services and out-reach programs to the society at large.

The mission of the college of Computer Sciences and Engineering (CCSE) is:

a. To prepare competent professionals in the areas specified in the college line of business who are competitive worldwide and will be the leaders in Saudi industry, academia and government.

b. To conduct innovative basic and applied research that advances the frontiers of knowledge and addresses local problems.

c. To provide high quality service to society in the areas of applied projects, consultation and training.

The mission of the Computer Engineering Program at KFUPM is to develop and train the human intellect needed for meeting the continued technological advances in the discipline of Computer Engineering and IT-related areas. This includes graduating well-trained computer engineers to participate in the industrial development which is taking place in the Kingdom of Saudi Arabia.

In consistency with the missions of the University, the CCSE and the COE department, and following the guidelines established by the Accreditation Board for Engineering and Technology (ABET), the following Educational Objectives were adopted for the Computer Engineering Program:

“The Objective of the COE program is to produce graduates who, after few years from graduation, will have:

1. Established themselves as successful professional computer engineers with demonstrated leadership capabilities,

2. Demonstrated an ability to pursue a successful professional and career growth, and

3. Enrolled and succeeded in graduate and professional studies/programs if they chose to do so.”

The Computer Engineering PEOs are closely linked to, and consistent with, the KFUPM and CCSE missions. For instance, KFUPM and CCSE missions are directly served by the first and second COE PEOs, while the third PEO directly serves the above two mission statements. Specifically:

PEO 1 supports the expected leadership and global competitiveness roles of COE graduates' in the development of the Kingdom in the field of Computer Engineering,

PEO 2 ensures the qualities for self-development and professional growth and addresses responsibilities and ethical values and

PEO 3 describes how the broad knowledge, skills, and practices acquired during the course of study serve as the basis for quality research during graduate studies. Therefore, these three program educational objectives contribute indirectly to the accomplishment of the university mission statement.

The COE PEOs are aligned with the department’s mission. PEO 1 provides the first step towards a career of achievement and service. The needed background of knowledge and skills are acquired to achieve PEO 1. Students acquire quality education through several avenues, including knowledge, skills and values as reflected in PEO 1 and 2. The professional and ethical issues are also preserved in PEO 2. The COE program provides enough depth, breadth and elective courses that are needed academic/professional developments, which contribute to PEO 3.

III. Program Learning Outcomes

Following a review of the ABET Criteria and the program objectives, it has been decided by the Computer Engineering faculty that the ABET Criteria (a - k) encompass the spirit of our educational vision. Therefore, outcomes (a - k) were adopted as the Computer Engineering Program Outcomes in addition to three additional outcomes as recommended by ABET criteria for Computer Engineering programs. The Computer Engineering Program Outcomes are:

(a) an ability to apply knowledge of mathematics, science, and engineering.

(b) an ability to design and conduct experiments, as well as to analyze and interpret data.

(c) an ability to design a system, component, or process to meet desired needs.

(d) an ability to function on multi-disciplinary teams (Our interpretation of multidisciplinary teams includes teams of individuals with similar educational backgrounds focusing on different aspects of a project as well as teams of individuals with different educational backgrounds).

(e) an ability to identify, formulate, and solve engineering problems.

(f) an understanding of professional and ethical responsibility.

(g) an ability to communicate effectively.

(h) the broad education necessary to understand the impact of engineering solutions in a global and societal context.

(i) a recognition of the need for, and an ability to engage in life-long learning (Our interpretation of this includes teaching students that the underlying theory is important because the technology changes, coupled with enhancing their self-learning ability).

(j) knowledge of contemporary issues (Our interpretation of this includes presenting students with issues such as the impact of globalization, the outsourcing of both engineering and other support jobs as practiced by modern international companies).

(k) An ability to use the techniques, skills, and modern engineering tools necessary for engineering practice.

(l) Knowledge of probability and statistics and their applications in computer engineering.

(m) Knowledge of discrete Mathematics.

(n) The ability to design a system that involves the integration of hardware and software components.

Table 2 below shows the mapping between the program’s learning outcomes and educational objective.

Table 2. Mapping program outcomes to program educational objectives.Program Educational Objectives Program Outcomes

1. Established successful professional career as computer engineers with demonstrated leadership capabilities a, b, c, d, e, g, k, l, m , n2. Demonstrated an ability to pursue a successful professional and career growth f, i, h, j

3. Success in graduate and professional studies/programs if they chose to do so a, b, e, g, i, k

IV. List of Courses

Table 3 below shows a listing of all courses in the new program along with their mapping to the program’s learning outcomes.

Table 3: Course Listing and their Coverage of Program Outcomes.

Outcome

Course (a) a

pply

kno

wle

dge

of m

athe

mat

ics,

scie

nce,

and

eng

inee

ring

(b) d

esig

n an

d co

nduc

t exp

erim

ents

, ana

lyze

and

inte

rpre

t dat

a

(c) d

esig

n a

syst

em, c

ompo

nent

, or

proc

ess t

o m

eet d

esir

ed n

eeds

(d) f

unct

ion

on m

ulti-

disc

iplin

ary

team

s

(e) i

dent

ify, f

orm

ulat

e, a

nd so

lve

engi

neer

ing

prob

lem

s

(f) u

nder

stan

ding

of p

rofe

ssio

nal a

nd e

thic

al r

espo

nsib

ility

(g) e

ffec

tive

com

mun

icat

ions

(h) u

nder

stan

ding

the

impa

ct o

f eng

inee

ring

solu

tions

(i) li

fe-lo

ng le

arni

ng

(j) k

now

ledg

e of

con

tem

pora

ry is

sues

(k) u

se o

f tec

hniq

ues,

skill

s, an

d m

oder

n en

gine

erin

g to

ols i

n de

sign

(l) K

now

ledg

e of

pro

babi

lity

and

stat

istic

s and

thei

r ap

plic

atio

ns

(m) k

now

ledg

e of

dis

cret

e M

athe

mat

ics

(n) d

esig

n a

syst

em th

roug

h in

tegr

atio

n of

har

dwar

e an

d so

ftw

are

MATH 101, MATH 102, MATH 201, MATH 260, PHYS 101, PHYS 102 and CHEM 101

X

STAT 319 Prob.& Stat. for Engrs X XENGL & IAS courses XIAS 212 Professional Ethics XICS 102, ICS 201, ICS 202 and ICS 431 X XICS 253 Discrete Structures I XEE 201 Electric Circuits I X XEE 203 Electronics I X X X X XSE 307 Eng. Economics Analysis XCOE 200 Digital Logic Design X X X X X XCOE 300 Principles of Computer Eng. Design X X X X X X X X X X X XCOE 301 Computer Organization X X X XCOE 305 Introduction to Embedded Systems X X X X X X X XCOE 241 Data and Network Communications X X X XCOE 344 Computer Networks X X X X XCOE 351 COE Coop Training X X X X X X X X X X XCOE 399 COE Summer Training X X X X XCOE 485 Senior Design Project X X X X X X X X X X X XComputer Networks Track Courses:COE 345 Network Design and ManagementCOE 445 Internet Engineering and TechnologiesCOE 446 Mobile ComputingCOE 451 Computer and Network Security

X XXXX

XXXX

XXXX

Computer Systems Track Courses:COE 302 Design and Modeling of Digital SystemsCOE 403 Computer Architecture COE 420 Parallel Computing COE 460 Principles of VLSI Design

X

X

XXXX

XXXX

XXXX

V. Degree Plan

Tables 4-7 below show the degree plans for both tracks for coop and non-coop (summer training option) degree options.

Table 4: Degree plan the Computer Networks (CNET) Track (non-coop)Second Year (Freshman)

MATH 101 Calculus I 4 0 4 MATH 102 Calculus II 4 0 4PHYS 101 General Physics I 3 3 4 PHYS 102 General Physics II 3 3 4

ENGL 101

An Intro to Academic Discourse 3 0 3 ENGL 102

Intro to Report Writing 3 0 3

CHEM 101 General Chemistry I 3 4 4 ICS 102 Intro. To Computing I 2 3 3

IAS 111Belief & its Consequences 2 0 2 IAS 101 Practical Grammar 2 0 2

PE 101 Physical Education I 0 2 1 15 7 17 1

48 1

7Third Year (Sophomore)

COE 200 Digital Logic Design 3 3 4 ICS 202 Data Structures 3 3 4

ICS 201Intro. To Computing II 3 3 4 Stat 319 Prob.& Stat. for Engrs 3 0 3

EE 201 Electric Circuits I 3 3 4 COE 301Computer Organization 3 3 4

MATH 201 Calculus III 3 0 3 COE 241Info. Representation & Systems 3 0 3

PE 102 Physical Education II 0 2 1 IAS 201 Objective Writing 2 0 2 ICS 253 Discrete Structures I 3 0 3

12 11 16 1

7 619

Fourth Year (Junior)

MATH 260Diff. Eqs. & Lin. Algebra 3 0 3 COE 305

Introduction to Embedded Systems 3 3 4

ENGL 214Academic & Prof Comm 3 0 3 COE 345

Network Design and Management 3 0 3

EE 203 Electronics I 3 3 4 COE 4xx CNET Elective 1 3 0 3

IAS 212 Professional Ethics 2 0 2 COE 300Principles of Computer Eng. Design 1 3 2

COE 344 Computer Networks 3 3 4 GS xxx GS Elective 1 3 0 3

IAS 322Human Rights in Islam 2 0 2

14 6 16

15 6

17

Fifth Year (Senior)

ICS 431 Operating Systems 3 3 4 COE 485 Senior Design Project 1 6 3COE 4xx CNET Elective 2 3 0 3 T.E.↓ xxx Technical Elective 3 0 3COE xxx Coe Elective 1 3 0 3 xxx xxx Free Elective 3 0 3

SE 307Eng. Economics Analysis 3 0 3 COE xxx Coe Elective 3 3 0 3

IAS 301 Language Comm. 2 0 2 GS xxx GS Elective 2 3 0 3

Skills 14 3 15 13 6 15↓The Technical Elective could be either a COE elective or a course from a list of specific ICS, SWE and EE courses

Total credits: 132 CNET Elective Pool: COE 445 Internet Engineering and Technologies COE 446 Mobile Computing COE 451 Computer and Network Security

Table 5: Degree plan the Computer Networks (CNET) Track (Coop)Second Year (Freshman)


ENGL 101






48 1

7

Third Year (Sophomore)





PE 102 Physical Education II 0 2 1 IAS 212 Professional Ethics 2 0 2IAS 201 Objective Writing 2 0 2 ICS 253 Discrete Structures I 3 0 3

14 11 18 1

7 619





Network Design and Management 3 0 3

EE 203 Electronics I 3 3 4 COE 4xx CNET Elective 1 3 0 3

IAS 301Language Comm. Skills 2 0 2 COE 300

Principles of Computer Eng. Design 1 3 2

COE 344 Computer Networks 3 3 4 ICS 324 Database 3 3 4

SE 307Eng. Economics Analysis 3 0 3 IAS 322

Human Rights in Islam 2 0 2

17 6 19 1 9 1

5 8

Fifth Year (Senior)

COE 351 COOP 9 0 9

COE 485 Senior Design Project 1 6 3COE xxx Coe Elective 1 3 0 3COE 4xx CNET Elective 2 3 0 3ICS 431 Operating Systems 3 3 4GS xxx GS Elective 2 3 0 3

9 0 9 13 9 16

Total credits: 133 CNET Elective Pool: COE 445 Internet Engineering and Technologies COE 446 Mobile Computing COE 451 Computer and Network Security

Table 6: Degree plan for the Computer Systems (CSYS) Track (non-coop)Second Year (Freshman)


ENGL 101






48 1

7




EE 201 Electric Circuits I 3 3 4 EE 203 Electronics I 3 3 4


PE 102 Physical Education II 0 2 1 IAS 201 Objective Writing 2 0 2ICS 253 Discrete Structures I 3 0 3

12 11 16 1

7 619





Design & Modeling of Digital Systems 3 0 3

COE 301Computer Organization 3 3 4 COE 4xx CSYS Elective 1 3 0 3

IAS 212 Professional Ethics 2 0 2 COE 300Principles of Computer Eng. Design 1 3 2

COE 344 Computer Networks 3 3 4 GS xxx GS Elective 1 3 0 3

IAS 322Human Rights in Islam 2 0 2

14 6 16

15 6

17

Fifth Year (Senior)

ICS 431 Operating Systems 3 3 4 COE 485 Senior Design Project 1 6 3COE xxx Coe Elective 1 3 0 3 T.E.↓ xxx Technical Elective 3 0 3COE 4xx CSYS Elective 2 3 0 3 XXX xxx Free Elective 3 0 3

SE 307Eng. Economics Analysis 3 0 3 COE xxx Coe Elective 2 3 0 3

IAS 301Lang. Communication skills 2 0 2 GS xxx GS Elective 2 3 0 3

14 3 15 13 6 15↓The Technical Elective could be either a COE elective or a course from a list of specific ICS, SWE and EE courses

Total credits: 132 CSYS Elective Pool: COE 403 Computer Architecture COE 420 Parallel Computing COE 460 Principles of VLSI Design

Table 7: Degree plan for the Computer Systems (CSYS) Track (Coop)Second Year (Freshman)


ENGL 101






48 17






IAS 201 Objective Writing 2 0 2 IAS 212 Professional Ethics 2 0 2

PE 102 Physical Education II 0 2 1 ICS 253 Discrete Structures I 3 0 3

14 11 18 1

7 6 19





Design & Modeling of Digital Systems 3 0 3

EE 203 Electronics I 3 3 4 COE 4xx CSYS Elective 1 3 0 3

COE 344 Computer Networks 3 3 4 COE 300Principles of Computer Eng. Design 1 3 2

SE 307Eng. Economics Analysis 3 0 3 ICS 324 Database 3 3 4

IAS 301Lang. Communication skills 2 0 2 IAS 322

Human Rights in Islam 2 0 2

17 6 19

15 9 18

Fifth Year (Senior)

COE 351 COOP 9 0 9

COE 485 Senior Design Project 1 6 3COE xxx Coe Elective 1 3 0 3COE 4xx CSYS Elective 2 3 0 3

ICS 431 Operating Systems 3 3 4

GS xxx GS Elective 3 0 3

9 0 9 13 9 16Total credits: 133

CSYS Elective Pool: COE 403 Computer Architecture COE 420 Parallel Computing COE 460 Principles of VLSI Design

VI. New Course DescriptionsBelow is a detailed description of new courses in the proposed program.

Course Title: COE 200 Digital Logic Design (3-3-4)

Course Objectives

After successfully completing the course, students will be able to:1. Use math and Boolean algebra in performing computations in various number systems and

simplification of Boolean algebraic expressions.2. Design efficient combinational and sequential logic circuit implementations from functional

description of digital systems.3. Use CAD tools to simulate and verify logic circuits.

Course Outcomes

O1. Ability to use math and Boolean algebra in performing computations in various number systems and simplification of Boolean algebraic expressions.

O2. Ability to design efficient combinational and sequential logic circuit implementations from functional description of digital systems.

O3. Ability to use CAD tools to simulate and verify logic circuits.

Course Description Introduction. Information processing, and representation, Numbering Systems, Binary codes,

Boolean algebra, Manipulation and minimization of Boolean functions, Combinational circuits analysis and design, multiplexers, decoders and adders. Sequential circuit analysis and design, basic flip-flops, synchronous sequential circuits, registers, counters, timing sequences. ROM, PLA, PAL and FPGAs.

Prerequisites: PHYS 102

Text book(s) and references: Introduction to Logic Design, Alan Marcovitz, 2nd Eddition, McGraw-Hill, 2005.

Weekly Breakdown

Week Topics

1

Introduction. Information processing, and representation. Digital vs Analog quantities. Number systems: Binary system.

Weighted Number Systems. Decimal, Binary, Octal and Hexadecimal. Arithmetic in Binary and Hex (addition, subtraction& Multiplication) Number base conversion (Dec to Bin, Oct, and Hex, General). Conv (Bin, OCT, Hex).

2

Number base conversion (Bin, OCT, Hex). Machine Representation of Unsigned & Signed Numbers: sign-magnitude, 1`s complement, and 2`s

complement. Signed Binary Arithmetic. (Addition and Subtraction). Decimal Codes: BCD, Excess-3, other codes, BCD Arithmetic, Parity Bits.

3 Binary logic and gates, Boolean Algebra, Basic identities of Boolean algebra. Principle of duality. Basic identities of Boolean algebra, DeMorgan’s law, Algebraic manipulation. Algebraic manipulation: Absorption, Consensus.

4 Complement of a function. Canonical and Standard forms, minterms, Maxterms, Sum of products & Products of Sums. Physical properties of gates: fan-in, fan-out, propagation delay. Timing diagrams. Tri-state drivers.

5

Map method of simplification: Two-, and Three-variable K-Map. Implicants , Prime Implicants, Essential Prime Implicants. Map manipulation: Simplification procedure. Four-variable k-map. POS simplification

6

Don’t care conditions and simplification. Five-variable & six-variable K-map simplification. Implementation using Nand and NOR gates:

2-level & Multilevel implementation. Exclusive-OR (XOR) and Equivalence (XNOR) gates, Odd and Even Functions, Parity generation

and checking.

7

Combinational Circuit Design Procedure & Examples: o Code Converter. o BCD to 7-Segment Display Conversiono Magnitude Comparatoro Half and Full Adders, o Ripple Carry Adder design

8 Carry Look-ahead adder. Binary Adder-Subtractor. BCD Adder,

9

Decoders 2x4, 3x8, 4x16. Designing large decoders from smaller decoders. Function implementation using decoders.

Encoders: Priority Encoders. Applications of decoders and priority encoders. Multiplexers: 2x1, 4x1. Constructing large MUXs from smaller ones. Function implementation

using multiplexers. Function implementation using multiplexers. Decoders/ Demultiplexers.

10

MSI Design Examples Sequential Circuits: Latches, Clocked latches: SR, D, T and JK. Race problem in clocked JK-

Latch. . Flip-Flops: Master-Slave, D-FF. Designing flip-flops from other flip-flops.

11

Asynchronous/Direct Clear and Set Inputs. Setup, Hold, FF propagation delay. Sequential Circuit Design. Design procedure, State diagrams and state tables. Analysis of Sequential Circuits. State table, State diagram. Registers, Registers with parallel load.

12

Synchronous Binary Counters: Up-Down Counters Counters with Parallel load, enable, synchronous clear and asynchronous clear. Use of available counters to build counters of different count. Design with unused States Shift Registers. Bi-directional shift register.

13

Mealy vs. Moore machine. The workings of a state machine as to when do states and outputs change wrt changes in the clock

and the presented inputs should be stressed Design Examples and Calculation of maximum clock frequency.

14 Memory devices: RAMs & ROMs . Combinational Circuit Implementation with ROM. Sequential Circuit Implementation using ROMs.

15 Programmable Logic Devices: PLAs, PALs, FPGA’a. Review

Computer Usage

Students will use CAD software tools from Xilinx in the lab to design, simulate and implement digital logic circuits on FPGA prototyping boards.

Lab Experiments

Week Lab

1 Introduction to the lab policies

2Bits and Signals: Binary data representation using voltages Bread-boarding, components, Switches and LEDs

3 Standard Parts: TTL parts, data sheets, placement and connection using bread bards, viewing the output

4Introduction to FPGA: FPGAs, Xilinx prototyping board, ISE software

5

Simple Combinational Circuit implementation with an FPGA: Schematic Design entry Simulations Synthesis and testing on the FPGA

6 Combinational Circuit implementation with MSI

7 Arithmetic Circuits8 Counters as dividers9 FSM10 Combining an FSM with a data path (1)11 Combining an FSM with a data path (2)

12

Project13

14

15

Content breakdown: 3-credit hours of engineering science and 1-credit hour of engineering design.

Course Title: COE 241 Data and Computer Communications (3-0-3)

Course Objectives

After successfully completing the course, students will be able to:

4. Appreciate the importance of data communication standards, protocols, and protocol architectures.

5. Describe fundamental concepts in communications, including signal spectrum, power spectral density, effective bandwidth, filtering, signal to noise ratio, channel capacity, and error rate.

6. Compare and contrast various types of transmission media for both guided and guided propagation regarding cost, transmission impairments and applications.

7. Identify tradeoffs governing the choice of analog/digital and synchronous/asynchronous transmission techniques and different signal encoding and modulation schemes.

8. Analyze and design simple communication links using guided and unguided media, hardware for generating CRC error detection codes and performing error detection, HDLC flow and error control mechanisms, and basic PCM and Delta modulation systems.

9. Compare and contrast different multiplexing techniques, e.g. FDM, WDM, TDM, and statistical TDM.

Course Outcomes

O1. Ability to apply knowledge of mathematics to understand basic concepts in communication engineering.

O2. Ability to analyze and/or design basic communication systems, processes, and components.

O3. Ability to identify, formulate, analyze, and solve basic communication engineering problems.

O4. Ability to use modern programming tools and skills for the simulation, analysis, and design of basic communication systems and components.

O5. Ability to demonstrate self learning skills and aptitudes.

Course Description Introduction to data communication. Brief overview of the OSI model. Frequency response,

bandwidth, filtering, and noise. Fourier series and transform. Information theory concepts such as Nyquist theorem, Shannon theorem, and Sampling theorem. Analog and digital modulation techniques. Pulse Code Modulation (PCM). Communication systems circuits and devices. Data encoding. Physical Layer Protocols. Data Link Control (point to point communication; design issues; link management; error control; flow control). Multiplexing.

Corequisites: STAT 319

Text book(s): Data Communications and Networking. Behrouz A Forouzan, McGraw-Hill Science/Engineering/ Math; 4th edition, 2007.

Weekly Breakdown

Week Topics

1 Communication Model, Data Communications, Networking

2 Brief introduction to protocol Architecture (The OSI model) Introducing the tool to be used in the programming assignment

3 Data Transmission (concepts and terminology) Analog and Digital Data Transmission

4 Analog and Digital Data Transmission (continued) Fourier Series Analysis and Fourier Transform Representation Introduction to z-transform

5 Transmission Impairments. Nyquist formula and Shannon’s Capacity

6 continue

7 Digital Data – Digital Signals

8 Digital Data – Analog Signals

9 Analog Data - Digital Signals

10 Analog Data – Analog Signals

11 Asynchronous and synchronous transmission Types of errors, Error Detection

12 Flow Control (stop-and-wait and sliding window flow) Error Control (ARQ)

13 Error Control (continued) HDLC

14 FDM and Synchronous TDM

15 Statistical TDM, ADSL

Computer Usage

Students will use Matlab and/or LabView (or other appropriate tool(s)) to perform the programming assignments.

Content breakdown: 3-credit hours of engineering science.

Course Name: COE 300 Principles of Computer Engineering Design (1-3-2)

Course Objectives

The objective of this course is to provide a treatment of the design process in computer engineering with a sound academic basis that is integrated with practical applications and projects. It provides a solid understanding of the Design Process, Design Tools, and the right mix of Professional Skills that are critical for project and career success. These can be summarized as:

1. To teach students the nature of computer engineering as a profession,

2. To equip the students with the necessary knowledge and skills required to conduct a successful project,

3. To teach students the ethical and professional responsibility of engineering in the society,

4. To improve students` technical and professional communication skills.

Course Outcomes

1. Understanding of the engineering design process,

2. Ability to carry out the different phases of engineering design,

3. Ability to manage projects efficiently,

4. Knowledge of contemporary issues,

5. Ability to communicate effectively (oral and written communications),

6. Knowledge of professional and ethical responsibility,

7. Understanding the impact of engineering solutions in a global and societal context,

8. Ability to engage in life-long learning.

Course Description

This course instills in Computer Engineering students many of the practical skills necessary for the practice of their profession. It also provides them with the knowledge required to conduct successful projects. It provides guidance through the steps necessary for the successful execution of design projects. It also helps improve students` ability to work in teams, manage projects and professionally and efficiently present their technical work. It also teaches students about the nature of engineering as a profession, codes of professional conducts, ethics & responsibility, and the role of engineering societies and organizations world-wide. Students, working in teams, conduct projects with the sole purpose of executing the different stages of project completion.

Prerequisite: Junior Standing

Text book: Ralph M. Ford and Chris S. Coulston, Design for Electrical and Computer Engineers: Theory, Concepts, and Practice. McGraw-Hill, 2008.

Weekly BreakdownWeek Topics (lecture & Lab)

1-2 Introduction: Computer engineering disciplines

Professional societies The potential role of computer engineers in modern society Contemporary issues; liabilities and opportunities for computer engineers

3-5

The Engineering Design Process: Needs Identification Requirements Specification, Constraints, Standards Concept Generation and Evaluation

6-8Design Tools:

System Design, Functional Decomposition, Behavioral ModelsTesting and System Reliability

9-13

Professional Skills: Team work Project Management Ethical and professional issues

Communication skills

14-15 Students project presentations (2 weeks)

Computer Usage

Students will use the following softwares:

CAD software tools to design, simulate and implement their design,

Project planning/management tools for their project management,

Productivity tools (spread sheets, word processors, presentation software …etc.) to document and present their work

In addition students will use computers to control and connect to their projects.

Content breakdown: 2-credit hours of engineering design.

Course Title: COE 301 Computer Organization (3-3-4)

Course Objectives

After successfully completing the course, students will be able to:10. Describe the instruction set architecture of a MIPS processor11. Analyze, write, and test MIPS assembly programs12. Describe organization and operation of integer and floating-point arithmetic units13. Design the datapath and control of a single-cycle (non-pipelined) CPU14. Design the datapath and control of a pipelined CPU and handle hazards15. Describe the organization and operation of memory and caches16. Analyze the performance of processors and caches

Course Outcomes

O1. Ability to apply knowledge of mathematics in computer arithmetic and performance analysis [ABET Criterion 3a].

O2. Ability to write assembly language programs and design the datapath & control of a processor [ABET Criterion 3c].

O3. Ability to use tools to edit, assemble, debug assembly language programs, and to simulate and verify the correctness of the datapath and control of a processor [ABET Criterion 3k].

Course Catalog Description Introduction to computer organization, machine instructions, addressing modes, assembly language programming, integer and floating-point arithmetic, CPU performance and metrics, non-pipelined and pipelined processor design, datapath and control unit, pipeline hazards, memory system and cache memory.

Prerequisites: COE 200 and ICS 201

Textbook:Computer Organization & Design: The Hardware/Software Interface, 4th edition, David A. Patterson and John L. Hennessy, Morgan Kaufmann, 2009.

Weekly Breakdown

Week Topics

1 Introduction to computer organization, high-level, assembly, and machine languages,

components of a computer system, processor datapath, control, memory hierarchy, disk storage, technology improvements, chip manufacturing process.

2 Review of signed/unsigned integers, binary addition and subtraction, carry and overflow. Instruction set architecture, registers, instruction formats, arithmetic instructions,

immediate operands, bit manipulation.

3 Load and store instructions, flow control instructions, pseudo-instructions, and addressing modes.

Translating expressions, if-else statements, loops, array indexing and traversal.

4 MIPS assembly language programming, tools, program template, directives, text, data, and

stack segments, defining data, arrays, and strings, symbol table, memory alignment, byte ordering, and console input and output.

5 Defining procedures, procedure calls and return address, nested procedure calls, passing

arguments in registers, runtime stack, stack frames, local variables, value and reference parameters, saving and restoring registers.

6 Integer multiplication, unsigned and signed multiplication, sequential multiplier hardware,

faster (tree) hardware multiplier, integer division, sequential divide hardware, integer multiplication and division in MIPS.

7 Floating point representation, IEEE 754 standard, normalized and de-normalized numbers,

zero, infinity, NaN, FP comparison, FP addition, FP multiplication, rounding and accurate arithmetic. Floating-point instructions.

8 CPU performance and metrics, CPI, performance equation, MIPS as a metric, Amdahl’s

law, benchmarks and performance of recent processors.

9 Designing a processor, register transfer level, datapath components, clocking

methodology, single-cycle datapath, implementing a register file and multifunction ALU.

10 Control signals and control unit, ALU control, single-cycle delay analysis and clock cycle,

multi-cycle instruction execution, CPI of a multi-cycle processor, Performance comparison of a single-cycle versus a multi-cycle processor.

11 Pipelining versus serial execution, MIPS 5-stage pipeline, pipelined datapath, pipelined

control, pipeline performance.

12 Pipeline hazards: structural, data, and control hazards, load delay, hazard detection, stall

and forwarding unit, and delayed branching.

13 Main memory organization and performance, SRAM, DRAM, latency and bandwidth,

memory hierarchy, cache memory, locality of reference.

14 Cache memory organization: direct-mapped, fully-associative, and set-associative caches,

handling cache miss, write policy, and replacement policy.

15 Cache performance, memory stall cycles, and average memory access time. Review

Computer Usage

Students will use a programming tool (MARS) to edit, assemble, and debug assembly-language programs. They will also use a logic design tool (Logisim) to design the datapath and control of a simple CPU, and to verify its logic correctness.

Lab Experiments

Week Lab

1 Introduction and orientation, individual and group work, grading, introduction to

the MARS assembly programming environment (MARS: MIPS Assembler and Runtime Simulator)

2 Syntax of assembly language programs, defining data and symbolic constants,

viewing memory data segment, byte ordering.

3 Instruction formats, integer arithmetic and logic instructions, system calls and I/O,

writing simple programs in assembly language.

4 Jumps and conditional branch instructions, translating if statements, switch

statements, and loops.

5 File reading and writing, arrays and strings, array indexing, address calculation,

application to 2D arrays and images.

6 Procedures, call and return, parameters, results, local variables, runtime stack,

stack frame.7 Floating-point registers, instructions, and applications. MIPS coprocessor 1.

8 Interrupts and exceptions, more on SYSCALL instruction, hardware interrupts,

interrupt processing and handling, MIPS coprocessor 0.

9 Introduction to a logic design tool (Logisim or another tool can be introduced to

simplify the design and simulation of a processor), designing and verifying the correctness of a multi-ported register file.

10 Designing and verifying the correctness of a multifunction ALU: add/subtract,

shift/rotate, and logic instructions.

11 Designing a single-cycle datapath and its control for a small subset of MIPS-like

instruction set, providing test cases, and verifying correctness (group work)

12 Designing a pipelined datapath and its control, inserting pipeline registers,

observing the pipelined flow of instructions and their control signal (group work)

13 Completing the pipelined processor design, handling pipeline hazards, designing

test cases, and writing a report document (group work).

14 Experiment on cache memory and its performance. Completing the pipelined

processor implementation (group work).

15 Submitting the pipelined processor project, report document, and demonstrating its

correctness (group presentation).


Corse Name: COE 302 Digital Systems Design & Simulation (3-0-3)

Course ObjectivesIntroduce students to the design methodologies of digital systems with special emphasis on FPGA implementations.

Course OutcomesOutcome 1: Data Path and Control Unit designOutcome 2: Digital systems modeling using hardware description languages (Verilog HDL)Outcome 3: Simulation of digital systemsOutcome 4: Synthesis and FPGA implementation of digital systems

These outcomes directly serve program learning outcomes number c, d, e, and n

Course Description: Review of sequential circuits design and analysis, Data path and control unit design, Design with Verilog Hardware Description language, Design with Field-Programmable Gate Arrays (FPGAs), Block interfacing, and high-level-synthesis.

Prerequisites: COE 200 Logic Design

Text book(s) and references: M. D. Ciletti, “Advanced Digital Design with the Verilog HDL,” (Prentice Hall), 2003.

References:1. “Verilog Styles for Synthesis of Digital Systems”, David R. Smith and Paul D. Franzon,

Prentice Hall, ISBN 0-201-61860-52. On line Verilog resources:

i. http://www.doulos.com/knowhow/verilog_designers_guide/ ii. http://www.sutherland-hdl.com/online_verilog_ref_guide/vlog_ref_top.html

Weakly Break down

Week Topics

1-2Review of Sequential circuit design, Mealy versus Moore Machines, timing constraints … etc.

3-5Design of a digital system by partitioning it into a Data Path and Control unit -- Design of DP and CU

6-10

Logic Design with Verilog: Structural Models of Combinational Logic. Logic Simulation, Design

Verification, and Testbenches Data Types Continuous Assignments Procedural blocks Behavioral constructs Functions and Tasks

11-12FPGA architectures, Configurable logic blocks (CLBs) and I/Os (CIOBs) – Design with FPGAs

http://www.doulos.com/knowhow/verilog_designers_guide/

13 Block interfacing (Buses, NoCs, asynchronous interconnects …etc.)

14 Introduction to high-level synthesis

15 Project Presentations

Course Project: Students should start from a word description of a required function, go through DP/CU partitioning, design the DP and CU and implement the design on an FPGA.

Computer Usage: MG FPGA advantage tool (or whatever the equivalent tool right now).


Course Title: COE 305 Introduction to Embedded Systems (3-3-4)

Course Objectives

After successfully completing the course, students will be able to:1. Use math, basic logic algebra and basic electrical knowledge to design microcontroller-based

embedded systems2. Design efficient microcontroller-based embedded systems that meet given specifications3. Use state-of-the-art tools to develop, troubleshoot and debug microcontroller-based embedded

systems

Course Outcomes

O1. Ability to apply knowledge of mathematics and science to design an embedded system using state-of-the-art microcontroller subsystems;

O2. Ability to design a microcontroller-based embedded system to meet given specifications

O3. Ability to troubleshoot, debug and test a microcontroller-based embedded system using learned debugging techniques and tools;

O4. Ability to identify formulate and solve engineering problems in microcontroller-based embedded systems design

Course Description Introduction to Embedded Systems. Microcontroller Hardware. ARM Processor. CPU

Programming. Memory and I/O. Interfacing: Parallel and Serial Communication. A/D and D/A conversion Embedded system design methodologies. Specifications. Designing robust software for embedded systems. RTOS features.

Prerequisites: COE 301

Text book(s) and references: Wayne Wolf, "Computers as Components: Principles of Embedded Computing System Design", Second Edition, Morgan Kaufmann, 2008, ISBN-10: 0123743974

Weekly Breakdown

Week Topics

1

Introduction to Embedded Systems; Requirements Analysis; Specifications Design methodologies overview; Formalism

2 Microcontroller Organization: Structure of Microcontrollers, CPU, Memory and I/O Structure,

3 Various Microcontrollers, PIC, Rabbit and ARM

4

CPU and Bus Systems I/O and Memory mapping, Addressing modes, Interrupts and Traps, Bus protocols,

5

DMA, System Bus Configurations, the AMBA and AHB Buses, Memory devices: RAM, ROM, SDRAM, Flash, Basic I/O Interfaces

6

Parallel Ports, LEDs, Pushbutton, Keypad, 7-Segment Display & LCD Display,

7 Touchscreen, Timers and Counters, Serial Interface: UART RS-232, RS-422, RS-485

8 SPI, I2C, Synchronous, A/D and D/A conversion, Audio I2S,

9

PWM, Input Capture, Servo and DC Motor Control, Networked Embedded Systems: Ethernet, WiFi and ZigBee

10 Embedded Programming Techniques: C-language primer, State machines, Streams, Circular buffers, Queues,

11

Models of programs, Program Optimization, Using Compilers, Power-aware programming, Multitasking, Scheduling and Introduction to RTOS

12

Development and Debugging: Development Environment, Hardware/Software Debugging Techniques, The use of hardware debugging modules: ICE, JTAG, Scopes, Multimeters and Logic Analyzers, Verification and Tests, Testplan Performance Analysis,

13

1. Multiprocessor Embedded Systems: 2. CPU and Hardware Acceleration, 3. Mutiprocessor Performance Analysis, 4. Using FPGAs, 5. Case Study Consumer Electronics Architecture: Cell Phone, Digital Camera, Audio

Player, DVD Player

14

System Design Techniques: Design Methodologies and Flows, Requirements Analysis, Specifications Description, System Analysis and Architecture Design, Quality Assurance

15 Review

Computer Usage

Students will use various microcontroller development system software tools in the lab to design, simulate and implement microcontroller-based embedded systems.

Lab Experiments

Week Lab

1 Hands-on the ARM-based Embedded Systems Board2 Hands-on the ARM-based Embedded Systems Board (continued)

3 Blinking LEDs Controlling 7-segment Displays

4 Input using Pushbutton and Keypads

5 Using Timers

6 Serial Interface RS-232 SPI and I2C

7 A/D and D/A experiments8 PWM: Servo and DC Motor Control9 Interfacing External Memories

10

The Integrated Development Environment Exception and Interrupt Handling

o Exception Handlingo Interruptso Interrupt Handling Schemes

11 uC Linux/ RTOS Programming

12-15 Project


Course Title: COE 345 Network Design and Management (3-0-3)

Course Objectives

After successfully completing the course, students will be able to:4. Describe bridging/switching technologies and apply them to network design.5. Differentiate between switching/bridging and routing.6. Analyze and design an enterprise network.7. Compare and contrast the different options in designing a network.8. Develop a suitable network security solution9. Apply algorithms to solve network design problems.10. Analyze network traffic flow and evaluate its performance. 11. Demonstrate understanding of network management standards, e.g., SNMP.

Course Outcomes

O1. Ability to apply knowledge of mathematics, probability, and statistics to model and analyze some network design problems.

O2. Ability to analyze and design an enterprise network that meets desired requirements.

O3. Ability to function as an effective team member in the analysis and design of an enterprise network.

O4. Ability to identify, formulate, and solve network design problems.

O5. Ability to demonstrate self-learning capability.

O6. Ability to use techniques, skills, and modern networking tools necessary for network analysis, design, and management.

Course Description Overview of computer networks. Principles of internetworking. Internetworking hardware.

Bridging and switching technologies. Virtual LANs. Routing strategies. The network development life cycle. Network analysis and design methodology. Enterprise network design model. Backbone design concepts. Network security design.Structured cabling systems. Network design algorithms. Traffic flow analysis. Network reliability. Network management (SNMP). Network administration. Case studies.


Text book(s) and references: Top-Down Network Design, P. Oppenheimer, Cisco Press, 2nd Edition, 2004.

Weekly Breakdown

Week Topics

1Overview of Computer NetworksTypes of computer networks. LANs and WANs. Protocols and protocol families. The OSI reference model. The TCP/IP protocol.

2-4 Internetworking

Basic terminology. Principles of internetworking. Types of internetworking devices. Repeaters, hubs, bridges, routers, switches and gateways. Transparent and source-routing bridges. Multilayer switches. VLANs. Routing strategies. Addressing.

5The Network Development Life CycleNetwork analysis. Network design methodology. Writing of a Request For Proposal (RFP) and quotation analysis. Prototyping/simulation. Implementation.

6-7Enterprise Network DesignEnterprise Network Design Model. Backbone design concepts. Structured cabling systems. Case studies.

8-9Network Security DesignNetwork security policies. Firewalls. Intrusion Detection Systems. Intrusion Prevention Systems.

10-12Topology design and analysisTopology design. Network design algorithms. Terminal assignment. Concentrator location. Traffic flow analysis and performance evaluation. Network reliability.

13-14

Network ManagementNetwork management standards & models. ISO Functional areas of management. Network management tools and systems. SNMP architecture & operations. Network administration.

15 Project Presentations

Computer Usage

Students may use OPNET or other simulation tool to evaluate the performance of their proposed network design.


Course Title: COE 403 Computer Architecture (3-0-3)

Course Objectives

After successfully completing the course, students will be able to:1. Describe and classify different instruction set architectures2. Describe the organization and operation of a dynamic out-of-order execution pipeline 3. Describe the organization and operation of multi-level caches and virtual memory4. Use simulator tools to analyze the performance of processors and caches5. Classify parallel architectures and their parallel programming models.

Course Outcomes

O1. Ability to apply knowledge of mathematics, probability, and statistics in computer performance analysis. [ABET Criterion 3a, 3L].

O2. Ability to identify, formulate, and solve computer architecture problems. [ABET Criterion 3e].

O3. Ability to use simulator tools to assess the performance of the micro-architecture of a processor. [ABET Criterion 3k]

Course Catalog Description

Fundamentals of computer design, power, cost, performance, instruction set principles, instruction and arithmetic pipelines, dynamic and speculative execution, precise exception, memory hierarchy, multilevel caches, virtual memory, storage and I/O, multicores, multiprocessors, and clusters.


Textbook and References:

Computer Organization & Design: The Hardware/Software Interface, 4th edition, David A. Patterson and John L. Hennessy, Morgan Kaufmann, 2009.

Modern Processor Design: Fundamentals of Superscalar Processors, John P. Shen and Mikko H. Lipasti, McGraw Hill, 2005.

Computer Architecture: A Quantitative Approach, 4th Edition, John L. Hennessy and David A. Patterson, Morgan Kaufmann, 2007.

Weekly Breakdown

Week Topics

1 Defining computer architecture, classes of computers, technology trends, power in

integrated circuits, cost, performance metrics, Amdahl’s law, and benchmarks.

2 Classifying instruction set architectures, survey of architectures for the desktop,

server, and embedded computers, examples of different instruction sets such as: Intel x86, MIPS, and ARM.

3 Review of MIPS 5-stage pipeline. Complex arithmetic and floating-point pipelines for functional units.

4 Extending the pipeline to handle long latency operations. Hazards in long latency

pipelines, out-of-order completion, maintaining precision exceptions.

5 Instruction-Level Parallelism (ILP) concepts, data and control dependences, loop

unrolling and compiler scheduling.

6 Static and dynamic branch prediction, Tomasulo dynamic scheduling, hardware-

based speculation and precise exceptions.

7 Memory hierarchy and caches, cache organization, latency versus bandwidth,

cache controller, cache performance.

8 Multi-level caches, cache optimizations, multi-level cache performance.

9 Virtual memory, demand paging, page table architecture, translation lookaside

buffers, handling TLB misses and page faults, integration of virtual memory, TLB, and caches.

10 I/O devices and controllers, Disk and Flash storage, Connecting processors,

memory, and I/O, Interrupt-driven I/O, Introduction to parallel I/O and RAID.

11 - 12 Classification of parallel architectures, models for communication and memory

architecture, shared memory multiprocessors, clusters and message-passing, introduction to multiprocessor interconnection networks.

13 - 14 Multicore processors, hardware multithreading, memory consistency, cache

coherence, multimedia and vector extensions.

15 Introduction to Graphics Processing Units (optional). Review.

Computer Usage

Students will use and develop simulation tools to assess the performance of the micro-architecture of a processor core.


Course Title: COE 420 Parallel Computing (3-0-3)

Course Objectives

After successfully completing the course, students will be able to1. Understand the performance and scalability issues in parallel programming 2. Analyze a sequential program and identify means of decomposing it into a set of

communicating modules.3. Design a parallel program through the use of message-passing, threads, and directive based

constructs.4. Design parallel programs for applications in areas like matrix, sorting, graphs, and search.

Course OutcomesO1. Ability to apply knowledge of mathematics in parallel program performance analysisO2. Ability to design parallel algorithms and programs O3. Ability to identify, formulate, and solve parallelization problemsO4. Ability to use program profiling tools O5. Ability to engage in self-learning

Course Description Introduction to parallel computing. Parallel architectures: MIMD, SIMD, communication, and mapping. Performance measures, speedup, efficiency, and limitations of parallel processing. Problem decomposition and parallel algorithm design. Basic communications. Modeling of parallel programs: granularity, scalability, and execution time. Parallel programming: message-passing and threads. Examples of parallel algorithms and applications: matrix, sorting, graph, and search.


Text book(s) and references: Introduction to Parallel Computing, Ananth Grama, Anshul Gupta, George Karypis, Vipin Kumar, The Addison Wesley Pub., ISBN 0-201-64865, 2nd Edition or newer.

Weekly Breakdown

Week Topics

1Concept of Parallel Computing: Parallel Programming Platforms: Implicit parallelism, limitations of memory system, performance, parallel platforms, communication and mapping techniques.

2 Principles of Parallel Algorithm Design: Decomposition, mapping, and load balancing.

3 Basic Communication: Broadcast, reduction, scatter and gather

4Analytical Modeling of Parallel Programs: Overhead, performance, granularity, data mapping, scalability, minimum execution time. (4 lectures)

5Parallel Programming: Programming distributed-memory: message-passing, send and receive, interface,

6Overlapping communication with computation, collective communication, and communicators.

7Programming Shared Address: thread, API, synchronization, control, composite constructs,

8 Standard for directive based parallel programming. 9 Parallel algorithms and applications

10 Dense matrix, matrix multiplication, solving a system of linear equations11 Sorting: bubble sort and bucket sorting

12Graph algorithms: spanning tree, single-source shortest paths, transitive closure, algorithms for sparse graphs.

13 Search Algorithms: sequential search, parallel depth-first search, 14 parallel best-first search and speedup anomalies

15 Review

Computer Usage

Students will use Intel C++ compiler, MPI library, pthread, and OpenMP software for parallelizing sequential programs using the IBM 1350 Cluster Computer.


Course Title: COE 445 Internet Engineering and Technologies (3-0-3)

Course Objectives

After successfully completing the course, students will be able to:

6. pursue a career in architecting Internet based services as a designer, developer, or administrator;

7. pursue postgraduate studies in the areas of information services and architectures, network programming, and multimedia networking

Course Outcomes

O1. Ability to apply knowledge of mathematics, probability, and statistics to model and analyze some networking protocols.

O2. Ability to design, implement, and analyze simple computer networks.

O3. Ability to identify, formulate, and solve network engineering problems.

O4. Knowledge of contemporary issues in computer networks.

O5. Ability to use several Internet based applications: web servers, streaming media servers, audio-video conferencing, etc.

Course Description

This course focuses on current internet challenges and its next generation architecture. Several modern Internet protocols and supporting algorithms for delivery of multimedia content and communications will be surveyed. Information retrieval architecture, design, and performance evaluation: search engines, proxy servers, and content distribution networks. Network programming: socket and advanced socket programming.

Prerequisites: COE 344 (Computer Networks)

Text book(s) and references:

Networking: A Top-Down Approach Featuring the Internet, J. Kurose & K. Ross, 5th Edition, Addison Wesley, 2010. J. Crowcroft, M. Handley, I. Wakeman, Internetworking Multimedia, Morgan Kaufmann, 1999,

online: http://www.cs.ucl.ac.uk/staff/J.Crowcroft/mmbook/book/book.html Computer networks by A. Tanenbaum, 4th edition, 2003 High-Speed Networks and Internets, W. Stallings, 2nd edition, 2002 Voice over IP Fundamentals, Cisco Press Internet Architectures by Daniel Minoli and Andrew Schmidt, John Wiley, 1998/ Internet Application Workbook by Eve Andersson, Philip Greenspun, and Andrew Grumet.

Available on-line from: http://philip.greenspun.com/internet-application-workbook/ ACM Transactions on Internet Technologies

http://philip.greenspun.com/internet-application-workbook/

http://www.cs.ucl.ac.uk/staff/J.Crowcroft/mmbook/book/book.html

Weekly Breakdown

Date Topic ReadingWeek 1 Overview, goals, logistics

Internet architecture, layering, end-to-end arguments

handout

Week 2 Socket programming handoutWeek 3 Socket programming handoutWeek 4 Multimedia Networking Kurose: Ch 6Week 5 ContinueWeek 6 ContinueWeek 7 ContinueWeek 8 Multicast Routing Kurose: Ch 4Week 9 Network Security Kurose: Ch 7Week 10 Continue Week 11 ContinueWeek 12 Continue

Exam II-Thursday May 10, MorningWeek 13 Next Generation Internet Architecture handoutWeek 14 Project presentationWeek 15 Project presentation

Computer Usage

Through the lab, the students will use computers, networking tools, and traffic analyzers to collect, analyze, troubleshoot networking problems, and to design and configure multimedia computer networks.

Content breakdown: 3-credit hours of engineering science

Course Title: COE 451 Computer & Network Security (3-0-3)

Course Objectives

After successfully completing the course, students will be able to:I. Learn the fundamental concepts and terminology associated with computer and network

security.II. Learn about network security standards and technologies.

III. Describe a computer system and a network in terms of threats, assets and countermeasures.IV. Identify different classes of computer threats and attacks.V. Differentiate between different classes of cryptographic algorithms and protocols.

VI. Learn about non-cryptographic countermeasures such as user authentication, data integrity tests, and access control.

VII. Learn about the specific security issues associated with databases.

Course Outcomes

O1. Ability to apply knowledge of mathematics, science, and engineering to model and analyze security threats and countermeasures.

O2. Ability to identify, formulate, and propose countermeasures to security threats at both the hardware as well as the software level..

O3. Ability to apply knowledge of contemporary issues and cutting-edge trends in computer security.

Q4. Ability to use techniques, skills, and modern engineering tools (mostly software-based) for the design of security solutions.

Course Description Introduction to computer security (concepts, threats, attacks, assets, scope, trends).

Cryptographic Protocols (Public Key Infrastructure, Symmetric Shared Keys), and standards (AES, DES, Blowfish, ElGamal, etc.). Integrity verification mechanisms (Hash functions, Message Authentication Codes, etc.). Wireless network security and associated protocols (IPSEC). Software tools to apply security in user environments (symmetric key, public key, hash functions). Access Control models and mechanisms (RBAC, Subject-based). Database security, Intrusion detection systems, Firewalls. Malicious software, DoS attacks, Trusted computing and multilevel security.


Text book(s) and references: William Stallings and Lawrie Brown, Computer Security: Principles and Practice, Pearson 2008.

Weekly Breakdown

Week Topics1 Computer Security Overview

2-4 Cryptography (Public key and Symmetric key)

5User Authentication/Authentication Systems (Kerberos, Needham-Schroeder)

6-7 Access Control (Role-based Access Control, DACs)8-9 Database Security

10Intrusion Detection Systems (Design, Performance Measures)

11 Malicious Software

12Denial of service/Distributed Denial of Service Attacks (Attack Models, Detection/Prevention/Mitigation techniques)

13 Firewalls and Intrusion Prevention Systems14 Trusted computing and Multilevel Security15 Project presentations

Computer UsageStudents use programming and simulation tools to develop and analyze security solutions.


Course Name: COE 460 Principles of VLSI Design (3-0-3)

Course Objectives: The objective of this course is to introduce the students to the design of digital integrated circuits and the tools involved in this process.

Course Outcomes:

Outcome 1: Ability to apply knowledge of mathematics, science, and engineering in the design, analysis and modeling of digital integrated circuits [ABET Criterion 3a]

Outcome 2: Ability to Design, Verify, Analyze and Evaluate the performance (speed, Power, Area, Noise margins) of different MOS digital integrated circuits for different design specifications [ABET Criterion 3c] Outcome 3: Ability to use CAD tools in the design and verification of digital integrated circuits [ABET Criterion 3k]

Course Description: MOS Transistor operation and limitations, MOS digital logic circuits (NMOS & CMOS), static & dynamic logic, combinational and sequential circuits, propagation delay, transistor sizing, MOS IC fabrication, layout and design rules, stick diagrams, IC Design and Verification Tools, subsystem design and case studies, and practical considerations.

Prerequisites: EE 203

Textbook: CMOS VLSI Design: A Circuits and Systems Perspective, 4/E, Neil Weste and David Harris, Addison-Wesley

Weekly breakdown

Week Topics Book Section(s)*

1 Review & Introduction 1.1

2 MOS Transistor & CMOS Logic 1.3 – 1.4

3

MOS Transistor Theory and analysis of CMOS inverter: - Ideal I-V Characteristics - C-V Characteristics - Non-ideal I-V Characteristics - DC-Transfer Characteristics- Switch-level RC Delay models

2.1 – 2.6

4-5CMOS Processing Technology: - CMOS Fabrication and Layout - Layout Design Rules

1.5, 3.3

6

- Delay Estimation - Sizing - Power Dissipation - Interconnects

4.3-4.6, 5.1-5.3, 6.1-6.2

7Circuit Simulations - Introduction 8.1-8.2

- SPICE Tutorial

8-9

Combinational Circuit Design (static & Dynamic) - Introduction - Circuit Families (Static, Dynamic and Pass-transistor logic) - Circuit Pitfalls

9.1-9.3

10

Sequential Circuit Design: - Introduction - Sequencing Static Circuits (Sequencing Methods, Max- Delay Constraints, Min-Delay Constraints) - Circuit Design of Latches and Flip-Flops

10.1 – 10.3

11-12 Design Methodologies & Tools Ch. 14 (14.1-14.3)

13-14 Case Studies Ch. 11 * Based on 4th edition

Computer Usage

Students will use CAD software tools from Mentor Graphics to design, simulate and layout digital integrated circuits.


VIII. Description of Existing Courses

Below is a listing of the catalog description of existing courses that are core courses in the proposed program.

Course Name: COE 202 Digital Logic Design (will be offered for SWE students only)

Catalog Description Introduction to Computer Engineering. Digital Circuits. Boolean algebra and switching theory. Manipulation and minimization of Boolean functions. Combinational circuits analysis and design, multiplexers, decoders and adders. Sequential circuit analysis and design, basic flip-flops, clocking and edge-triggering, registers, counters, timing sequences, state assignment and reduction techniques. Register transfer level operations.

Prerequisite: PHYS 101 & MATH 101

Course Title: COE 344 Computer Networks (3-3-4)

Catalog Description

This course will be taught using the top-down approach. Topics covered include introduction to computer networks, OSI model, WAN and LAN design issues. Application layer design issues and protocols are discussed. Then, Transport layer design issues, protocols as well as congestion control mechanisms are presented. Socket programming is explained. An in-depth analysis is presented of the Network layer design issues, and internetworking. MAC layer design issues and protocols are presented.

Prerequisite: Data and Computer Communications (COE 241) and Probability and Statistics for Engineer and Scientists (STAT 319).

Course Title: COE 351 Cooperative Work

Catalog Description A continuous period of 28 weeks spent in industry with the purpose of acquiring practical experience in different areas of Computer Engineering. During this period, a student is exposed to the profession of Computer Engineering by working in the field. Students are required to submit a final report and give a presentation about their experience and the knowledge they gained during their Cooperative work.

Prerequisite: COE 350 if registering in the Fall semester, and ENGL 214, Completion of 90 Credits, and department requirements if registering in Spring semester.

Course Title: COE 399 Summer Training

Catalog Description The aim of the summer training is to provide students with direct on-the-job experience working with professionals in the field. This training provides an opportunity to expose students to the reality of professional practice. Students are required to submit a report and make a presentation on their summer training experience and the knowledge gained.

Prerequisite: ENGL 214, Junior Standing, Approval of the Department.

Course Name: COE 446 Mobile Computing (3-0-3)

Catalog Description Introduction to mobile computing. Designing computer networks to support user mobility. Models for indoor and outdoor mobile networks. System issues such as performance, quality of service, reliability, and security in mobile computing environment. Hardware, and access protocols, for mobile networks. Adapting existing protocols to support mobility.

Prerequisite: COE 344* (new pre-requisite)

Course Title: COE 485 Senior Design Project

Catalog Description

This course is designed to give students the experience of tackling a realistic engineering problem. The intent is to show how to put theoretical knowledge gained into practical use by starting from a word description of a problem and proceeding through various design phases to end up with a practical engineering solution. Various projects are offered by COE faculty in their respective specialization areas. The project advisor guides the student in conducting feasibility study, preparation of specifications, and the methodology for the design. Detailed design and implementation of the project are carried out followed by testing, debugging, and documentation. An oral presentation and a final report are given at the end of the semester.

Prerequisite: Senior Standing

IX. Program RequirementsThe Computer Engineering Department has the majority of resources required to support the new

program in terms of faculty, labs, software tools, and facilities. The following table summarizes the resources available at the COE department.

Table 7: Program Support available at the COE department.Faculty Total number of faculty is 25, 20 of them are of professorial ranks, distributed

over the following COE areas (many faculty serve more than one area):1. 15 faculty in the Computer networks and data communications area2. 14 faculty in the Computer architecture and embedded systems area3. 9 faculty in the VLSI and digital systems design area4. 16 faculty in the Computer applications area (e.g. neural networks, fault

tolerant computing, etc.)Labs Three labs:

1. Digital Logic Design Lab with FPGA boards, 74xx components, oscilloscopes, function generators and logic analyzers, EEPROM programmers, PCs with installed Xilinx software, a 32-port switch and internet access.

2. Embedded Systems lab (current Digital Systems lab), with embedded software development boards, wireless transceivers, logic analyzers, power supplies, oscilloscopes, function generators, PCs with various CAD tools pre-installed, a 32-port switch and internet access.

3. Networks lab, with PCs, routers, switches, wireless access points/cards and software

Facilities 1. PCB fabrication lab with state of the art computer-controlled fabrication2. 2 PC labs (CCSE labs) for programming assignments and assembly

programming lab Software The department boast a large variety of software used in the different fields of

COE, to mention a few:1. OpNet (a professional network design and simulation software)2. NS2 (another network design and simulation software)3. Assemblers, compilers, instruction set simulators, Java VM …etc.4. Xillinx ISE and ModelSim for the design and simulation of Digital circuits

using FPGAs5. The department has recently obtained the Synopsys Tool Suite, a complete

set of software tools for the design, simulation and layout of integrated circuits

6. In addition the depart has a wide variety of open-source or free software (e.g. LogiSim & LogicWorks for logic simulations, WinSpice for circuit simulations)

7. Digital and embedded systems design tools are being currently acquired with faculty training planned in the near future

Currently the department is interviewing for a lab supporting staff position to support both the current and proposed COE program.

1. Preliminary Implementation PlanThe new program can commence as soon as the approval process ends. Due to the overlap with the

current program, a very smooth transition for students in the current program is expected. The following actions would ensure such a smooth transition:

1. The course COE 200 Digital Logic Design (3-3-4) would be made equivalent to the current courses COE 202 Digital Logic Design (3-0-3) and COE 203 Digital Logic Lab (0-3-1)

2. During the transition period the department will continue to offer the COE 203 Digital Design Lab for students who have already taken COE 202 Logic Design. These sections however could be offered at the same time slots as the new COE 200 lab.

3. The department will continue to offer COE 202 Digital Logic Design (3-0-3) since it is taken by SWE students

4. The new course COE 301 Computer Organization (3-3-4) would be made equivalent to the current course COE 205 Computer Organization & Assembly Language (3-3-4)

5. The new course COE 305 Introduction to Embedded Systems (3-3-4) would be made equivalent to the current course COE 305 Microprocessor based systems (3-3-4)

6. The new course COE 241 Data & Computer Communications (3-0-3) would be made equivalent to the current course COE 341 Data & Computer Communications (3-0-3)

7. The new course COE 403 Computer Architecture (3-0-3) would be made equivalent to the current course COE 308 Computer Architecture (3-0-3). So for a student who have already taken COE 308 it will be counted for him as; Track elective if he selects the CSYS track or COE elective if he elects to go into the CNET track.

8. The new course COE 345 Network Design and Management (3-0-3) would be made equivalent to the current elective course COE 444 Network Design and Management (3-0-3). So for a student who have already taken COE 444 it will be counted for him as; COE elective if he selects the CSYS track or a track core if he elects to go into the CNET track.

9. The new course COE 460 Principles of VLSI Design (3-0-3) would be made equivalent to the current course COE 360 Principles of VLSI Design (3-0-3). So for a student who have already taken COE 360 it will be counted for him as; Track elective if he selects the CSYS track or COE elective if he elects to go into the CNET track.

10. Coop students will have to take COE 485 senior design project.

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