K L University Department of E.C.E Course Handout for III ... · 2 Develop micro Programs for...

K L University Department of E.C.E

Course Handout for III/IV Year B.TECH A.Y.2016-17, I Semester

Course Name : COMPUITER ORGANIZATION

Course Code : 13EM201

L-T-P structure : 3-0-2

Course Credits : 4

Course Coordinator : Mr. S.SRIDHAR BABU

COURSE INSTRUCTORS : Dr.ASCS Sastry,Dr G Vijay kumar,Dr I Govardhini , DR J K R Sastry,Mr G.V.Ganesh,

Mr B. Muralikrishna.

COURSE OBJECTIVE:

This courses aims at providing a comprehensive knowledge on the structure and behavior of computer hardware

architecture and application of the design concepts with combinational or sequential digital systems including various

peripheral devices. It culminates in realization of the concepts with logical verification through hardware description

language and various case studies.

COURSE RATIONALE:

The purpose of learning this course is a set of components like Processor, Memory and Storage, Input / Output Devices

interconnected by bus in such a way as to enable the execution of a program stored in memory. It encompasses the

definition of the machine’s instruction set architecture, its use in creating a program, and its implementation in hardware.

The Course addresses the bridge between gate logic and executable software, and includes programming both in

assembly language (representing software) and HDL (representing hardware). The course emphasizes performance and

cost analysis, instruction set design, pipelining, memory technology, memory hierarchy, virtual memory management,

and I/O systems. Starting with the design of gate logic with combinational logic circuits to sequential logic circuits and

some complex digital systems will be carried out in this course which is essential for design engineers in the industry.

Course Outcomes (CO):

CO No:

CO SO BTL

1 Understand the logical gates to construct combinational & sequential circuits to perform arithmetic µ-operations.

a 1

2 Develop micro Programs for design of Control Unit, CPU a 1

3 Analyze and realize operations like Multiplication, Floating Point algorithms using supporting modern engineering tools.

a 2

4 Understand the Peripherals, I/O interface and Direct Memory Access. a 1

5 Design and Simulation of System Design using Logisim Tool.

k 2

COURSE OUTCOME INDICATORS:

CO No. COI-1 COI-2 COI-3

CO-1 Understand the fundamental logical operations. Different arithmetic micro operations

Understand Different shift micro operations and Design of one stage ALU, Stored program organization

Describe the Control unit of basic computer Control timing signals, Instruction Cycle

CO-2 Understand Memory-Reference Instruction, Input-Output and interrupt, Design of Basic Computer and Accumulator logic

Describe the Micro programmed control organization, Design of Control Unit.

Understand General Register Organization &stack organization. Instruction formats, addressing modes

CO-3 Understand Program control, RISC Instruction. Implementation of Addition and subtraction

Contrast the Multiplication and Division algorithms and various Floating Arithmetic operations

The Memory hierarchy, Main memory and Associative memory. Cache memory, Virtual memory

CO-4 Describe the Peripheral devices and input-output interface. Asynchronous data transfer

Understand the Modes of transfer, Priority interrupt, and Direct memory access. Input-Output processor

CO-5 Design and Simulation of System Design using Logisim Tool.

SYLLABUS (As approved by BoS):

REGISTER TRANSFER & MICRO-OPERATIONS: Register Transfer Language, Register Transfer, Bus & memory Transfers, Arithmetic Micro-operations, Logic Micro Operations, Shift Micro-operation, and Arithmetic Logic Shift Unit. BASIC COMPUTER ORGANISATION AND DESIGN: introduction codes, Computer Registers, Computer instructions, Timing and Control, Instruction Cycle, Memory-Reference Instruction, Input-Output and interrupt, Design of Basic Computer, Design of accumulator Logic, MICRO PROGRAMMED CONTROL: Control Memory, Address Sequencing, Micro-Program example, Design of Control Unit. CENTRAL PROCESSING UNIT: General registers Organization, Stack Organization, Instruction Formats, Addressing Modes, Data Transfer and Manipulation, Program Control, Reduced instruction Set Computer (RISC). COMPUTER ARITHMETIC: Addition and Subtraction, Multiplication Algorithms, Division Algorithms, Floating-point Arithmetic Operations. MEMORY ORGANIZATION: Memory Hierarchy, Main Memory, Associative Memory, Cache Memory, Virtual Memory. INPUT-OUTPUT ORGANIZATION: Peripheral Devices, input-Output interface, Asynchronous Data Transfer, Modes of Transfer, Priority interrupt, Direct Memory Access (DMA), input –output Processor. Text Books: 1. Morris M.Mano,”Computer Systems Arichitecture”,3rd Edition. 2. William Stallings,”Computer Organization and Architecture:Designing for Performance”, 6th Edition. Reference Books: 1. John P Hayes,” Computer Arichitecture and Organization”2nd Edition. 2. V.Carl Hamacher et.al,”Computer Organization”2nd Edition. 3. Computer Architecture and organization by Raja Raman and Radha Krishna-PHI

COURSE DELIVERY PLAN:

Sess. No.

CO COI Topic (s) Teaching-Learning Methods

Evaluation Components

0 0 0 Course Handout Explanation --- --

1 1 1 Understand the fundamental logical operations. Chalk and Talk Test-1

2 1 1 Different arithmetic micro operations Chalk and Talk Test-1

3 1 2 Different shift micro operations and Design of one stage ALU Chalk and Talk Test-1

4 1 2 Stored program organization Chalk and Talk Test-1

5 1 3 Control unit of basic computer Control timing signals Chalk and Talk Test-1

6 1 3 Instruction Cycle Chalk and Talk Test-1

7 2 1 Memory-Reference Instruction Chalk and Talk Test-2

8 2 1 Input-Output and interrupt

Chalk and Talk Test-2

9 2 1 Design of Basic Computer and Accumulator logic Chalk and Talk Test-2

10 2 2 Micro programmed control organization Chalk and Talk Test-2

11 2 2 Design of Control Unit. Chalk and Talk Test-2

12 2 3 General Register Organization &stack organization. Chalk and Talk Test-2

13 2 3 Instruction formats, addressing modes Chalk and Talk, PPT.

Test-2

14 3 1 Program control, RISC Instruction Chalk and Talk, PPT.

Test-3

15 3 1 Implementation of Addition and subtraction Chalk and Talk, Test-3

16 3 2 Multiplication and Division algorithms Chalk and Talk Test-3

17 3 2 various Floating Arithmetic operations Chalk and Talk, PPT

Test-3

18 3 3 Memory hierarchy, Main memory and Associative memory Chalk and Talk Test-3

19 3 3 Cache memory, Virtual memory Chalk and Talk, PPT

Test-3

20 4 1 Peripheral devices and input-output interface Chalk and Talk, PPT

SEE

21 4 1 Asynchronous data transfer Chalk and Talk SEE

22 4 2 Modes of transfer, Priority interrupt Chalk and Talk SEE

23 4 2 Direct memory access Chalk and Talk, PPT

SEE

24 4 2 DMA transfer Chalk and Talk

SEE

25 4 2 Input-Output processor Chalk and Talk, PPT

SEE

SESSION PLAN:

Session – 0

1. Understand about course handout

2. Understand about course pre requisite

Time Topic

BTL Teaching – Learning Method

5 Introduction - -

30 Course Handout explanation 1 Chalk and Talk

10 Discussion on Prerequisite subjects 1

Chalk and Talk

30 Basics of Pre Requisite 1

Chalk and Talk

Session – 1

1. Understand about basic symbols for register transfer, Block diagram of register, Timing

Diagram.

2. Understand about bus system for 4 registers, three state bus buffers, and Memory transfer

Time Topic


5 Introduction - -

30 Basic symbols for register transfer Block diagram of register, Timing diagram

1 Chalk and Talk

10 Active learning 1 Quiz

30 Register transfer language, Bus system for 4 registers, Three state bus buffers, Memory transfer 1 PPT ,chalk and Talk

10 Active learning - One minute paper

10 Conclusion/Summary --- --

Session – 2

1. Understand different arithmetic micro operations, Binary adder, binary adder-subtractor,4-bit arithmetic circuit

2. Understand list of logic micro operations, Hardware implementation

Time Topic


5 Recap on session 1 - -

30 Different arithmetic micro operations, List of logic micro operations

1 Chalk and Talk

10 Active learning - Quiz

30 Binary adder, binary adder-subtractor,4-bit arithmetic circuit, Hardware implementation 1 Chalk and Talk


10 Conclusion/Summary --- --

Session – 3

1. Understand different shift micro operations, Design of 4-bit combinational circuit shifter

2. Design of one stage ALU, Implementation of one stage ALU

Time Topic


5 Recap session2 - -

30 Different shift micro operations, Design of 4-bit combinational circuit shifter 1 Chalk and Talk

10 Active learning -- Fish bowl

30 Design of one stage ALU , Implementation of one stage ALU 1

Chalk and Talk

10 Active learning -- Group Discussion

10 Conclusion/Summary -- ---

Session – 4

1. Understand about Stored program organization, List of computer registers, Common bus system.

2. Understand Basic Computer Instruction format, Instruction set completeness

Time Topic


5 Recap session 3 - -

30 Stored program organization ,List of computer registers, Common bus system

1 PPT, Chalk and Talk


30 Instruction codes, Computer Registers, Basic Computer Instruction format, Instruction set completeness 1 PPT, Chalk and Talk


10 Conclusion/Summary --

Session – 5

1. Understand Clarify various Computer Instructions

2. Understand control unit of basic computer and timing control signals.

Time Topic



30 Control timing signals, Timing & Control, Instruction cycle 1 Chalk and Talk


30 Design a Control unit for a basic computer 2 Chalk and Talk


10 Conclusion/Summary - --

Session – 6

1. Remember the Flow chart for instruction cycle

2. Understand the types of instructions, Register reference instructions

Time Topic BTL

Teaching – Learning Method


30 Steps in Instruction cycle 1 Chalk and Talk


30 Register reference instructions, table for Register reference instructions

2 Chalk and Talk

10 Active learning - Group Discussion


Session – 7

1. Understand various Memory reference Instructions,

2. Remember the Flow chart for Memory reference Instructions

Time Topic



30 Memory reference instructions 1 Chalk and Talk


30 Flow chart for Memory reference Instructions 2

PPT,Chalk and Talk



Session – 8

1. Understand about Input-Output configuration, Input-output instructions

2. Remember the Flow chart for interrupt cycle

Time Topic



30 Input-Output configuration, Input-output instructions 1 Chalk and Talk


30 Flow chart for interrupt cycle 2

PPT, Chalk and Talk

10 Active learning - Fish bowl


Session – 9

1. Design of a basic computer

2. Design of Accumulator logic.

Time Topic



30 Design of basic computer 2 Chalk and Talk

10 Active learning -

Group discussion

30 Design of Accumulator logic. 2 Chalk and Talk

10 Active learning -- Quiz


Session – 10

1. Discuss about Micro programmed control organization, Selection address for control memory, Timing diagram

2. Understand about Control Memory, Address sequencing, Selection of address for control memory.

Time Topic



30 Micro programmed control organization, Selection address for control memory, Timing diagram



30 Control Memory, Address sequencing, Selection of address for control memory. 2 PPT, Chalk and Talk

10 Active learning - Group Discussion


Session – 11

1. Observe microinstruction format, symbolic micro instructions, micro program

2. Design of control unit

Time Topic BTL



30 microinstruction format, symbolic micro instructions, micro program 1 PPT, Chalk and Talk


30 design of control unit 2 PPT, Chalk and Talk



Session – 12

1. Understand about general register organization

2. Understand about Stack organization

Time Topic



30 General register organization 1 , Chalk and Talk


30 Stack organization 1

PPT, Chalk and Talk



Session – 13

1. Understand about Instruction formats

2. Understand various addressing instructions.

Time Topic



30 Instruction formats, three- address instructions, two -address instructions

1 PPT, Chalk and

Talk


30 One-address instructions, zero-address instructions 1

PPT, Chalk and Talk



Session –14

1. Understand the Functionality of Program control

2. Understand about RISC instructions

Time Topic



30 Program control 2 PPT, Chalk and Talk


30 RISC instructions 2 Chalk and Talk

10 Active learning - Group discussion


Session – 15

1. Implementation of Addition and subtraction algorithms.

2.

Time Topic



30 Addition 2 PPT, Chalk and Talk


30 Subtraction 2 PPT, Chalk and Talk



Session – 16

1. Implementation of Multiplication algorithms

2. Division algorithms with examples

Time Topic



30 1. Multiplication algorithms 2 Chalk and Talk


30 1. Division algorithms 2 Chalk and Talk



Session – 17

1. Understand various Floating Arithmetic operations

2. Understand various Integer Arithmetic operations

Time Topic



30 Floating Arithmetic operations, register configuration 2 PPT, Chalk and Talk


30 Addition subtraction, Multiplication and Division




Session – 18

1. Understand Memory hierarchy

2. Understand about Main memory and Associative memory

Time Topic



30 Memory hierarchy 2 PPT, Chalk and Talk


30 Main memory and Associative memory 2 PPT, Chalk and Talk



Session – 19

1. Understand Cache memory

2. Understand about Virtual memory

Time Topic



30 Cache memory 1 PPT, Chalk and Talk

10 Active learning - Debate

30 Virtual memory 1 PPT, Chalk and Talk



Session – 20

1. Understand about Peripheral devices

2. Understand about Input-Output interface

Time Topic



30 1. Peripheral devices 1 Chalk and Talk


30 1. Input-Output interface 1 Chalk and Talk

10 2. Active learning - Debate


Session – 21

1. Understand the Functionality of Strobe control and hand shaking

2. Understand about Asynchronous serial and communication transfer

Time Topic BTL Teaching – Learning Method


30 Strobe control and hand shaking

1 Chalk and Talk


30 Asynchronous serial and communication transfer

1 Chalk and Talk



Session – 22

1. Understand the Working principle of various Modes of transfer

2. Handle Interrupts on Priority.

Time Topic BTL



30 1. Modes of transfer

1 Chalk and Talk


30 Priority interrupt 1 Chalk and Talk



Session – 23

1. Understand about Direct memory access controller

2. Direct memory access transfer

Time Topic BTL



30 Direct memory access Direct memory access controller



30 Direct memory access transfer




Session – 24

1. Understand about Burst transfer

2. Understand about cycle stealing transfer

Time Topic BTL



30 DMA Initialization Process 1 PPT, Chalk and Talk


30 3. DMA Transfer 1 PPT, Chalk and Talk



Session – 25

1. Understand about CPU-IOP communication

2. Understand about IBM 370 I/O channel

Time Topic BTL



30 CPU-IOP communication 1 Chalk and Talk


30 3. IBM 370 I/O channel 2 PPT, Chalk and Talk



Computer Organization Lab Experiments List

Computer Organization Lab Experiments List

List of Experiments intended as basic experiments of the course:-

1) Implementation of Boolean expressions using multiplexers

2) Implementation of common bus system using multiplexers

3) Implementation of 4-bit combinational circuit shifter

4) Design of 4-bit adder-subtractor

5) Design of Carry-Look-Ahead Adder

List of Experiments supposed to finish in Open Lab Sessions:-

1) Design of 4-bit Universal shift register using D-FF

2) Design of 4-bit ALU

3) Design of combinational multiplier

4) Design of Ripple carry Adder

5) Design of logic circuit to implement 10’s complement of BCD

LIST OF PROJECTS IN PROJECT BASED LAB

1) Design and Interface Binary to Gray & Gray to Binary Code Converters with 2x1 Multiplexer and Implement using FPGA

2) Design 32-bit odd/even parity generator/checker 3) Design 4-bit excess-3 adder/subtractor 4) Design of 15-bit hamming code generator 5) Design any 4 code converters and interface with 4x1 mux 6) Design sequence detector 7) Encode the given sequence and decode the same using mux/demux and encoder/decoder 8) Design 4-bit LFSR(linear feedback shift register) 9) Design 4-bit synchronous mod-9 gray counter. 10) Design and Implementation of SIPO and PIPO. 11) Random test pattern generation using 4-bit LFSR and gray counter with 2x1 mux 12) Design of 16-bit ALU 13) Count number of one’s and zero’s in a given sequence 14) Design of 8-bit barrel shifter 15) Design of 8-bit Berger code 16) Design 8-bit carry select adder. 17) Design of 8-bit ALU using reversible logic gates

Evaluation :

CONTINUOUS INTERNAL

EVALUATION SEM END EVALUATION

L-T-P Credits TEST-1 TEST 2 TEST-3 LTC

ACTIVE LEARNING

ATTEN DANCE

LAB EXPERIMENT-

PROJECT THEORY

LAB EXEPRIME

NT LAB PROJECT

3-0-2 4 7.5 7.5 7.5 -- 7.5 5 5 45 5 10

Evaluation Component

Wieghtage (%) Marks

Date

Duration (Min

CO1 CO2 CO3

CO5

CO4

COI No. 1 2 3 1 2 3 1 2 3 1 2 1

BTL 1 1 1 1 1 1 2 2 2 1 1 3

CONTINUOUS INTERNAL EVALUATION

TEST 1

Weightage 7.5%

90

2.5 2.5 2.5

Marks 30

10 10 10

TEST 2

Weightage 7.5%

90

2.5 2.5 2.5

Marks 30

10 10 10

TEST 3

Weightage 7.5%

90

2.5 2.5 2.5

Marks 30

10 10 10

Active Weightage 7.5%

20

0.5 0.5 1 1 1 0.5 0.5 1 1 0.5

Learning Marks 30

2.5 2.5 5 2.5 2.5 2.5 2.5

5 2.5

2.5

Attendance

Weightage 5% Marks 5

Equal Wieghtage for all the lecture session (5%)

Lab Exam-

Projects Weightage 5% Marks 5

100

5

5

SEM END EVALUATION

SE Lab Weightage 5%

100

5

Exam Marks 5

5

SE Project Weightage 10%

100

10

m Marks 10

10

SE Theory

Weightage 45% 3 3 3 3 3 3 3 3 3 9 9

Marks 60

180 4 4 4 4 4 4 4 4 4 12 12

Exam

Question No. 1(a) 1(b) 1[c] 2(a) 2(b) 2[c] 3(a) 3(b) 3(c) 4(a) 4(b)

Endorsement Signatures of: Teaching Associates: Course Team: COURSE COORDINATOR HEAD OF DEPARTMENT Approved By: DEAN-ACADEMICS

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K L University Department of E.C.E Course Handout for III ... · 2 Develop micro Programs for...

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