Jung - Platform Technology for Form Factor Equivalent Microsystems Derived From COTS Components

7/27/2019 Jung - Platform Technology for Form Factor Equivalent Microsystems Derived From COTS Components

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D I ' ~ . 1 _ 3 April, Rome, IMyPlatform Technology For Form Factor EquivalentMicrosystems Derived From COTS Components

Erik lung, Mathias Minkus, Karl-Friedrich Becker, Mathias KochFraunhofer IZMGustav-Meyer-Allee 25email: [email protected] Berlin, GermanyAbstract

Recent years have shown the tremendous growth of electronicuse in medical devices. Especially active implants and hearingaids have driven th at tr end to today's ultra-small devicesembedded into the body. While the integrated circuits' featuresa ever-decreasing critical geometries and surging performancenumbers, the delivery format of such advanced chips is seldomproviding the engineering teams with a fully tes ted, bare die.Miniature implanted devices are hindered in their proliferationby the use of COTS devices, which fail to meet theminiaturization requirements, while on the other hand adedicated chip run or the procurement of a KGD tested baredie is often cost prohibitive for single and multi chip devices.This paper describes a miniaturization approach usingadvanced packaging techniques for the electronic system usingthe example of a miniature camera system (bare die assemblyin stack-wirebond and flip chip) suitable for medical imaging.Fo r prototypes, some electronic bare dice are mimicked by decapsulating the IC f rom the plastic housing and re-bumping itfor use as f lip chip. This prototype platform allows to createform factor equivalent circuits with known good chips enablingthe demonstration and qualification of miniature devices. Inaddition, the approach can be used to create 3D stackedsystems - this approach is depicted as well.

I. INTRODUCTIONNew visual imaging teclmologies are not driven only bythe race to score the highest number of pixels (also known asthe "mega-pixel hype") but also by the miniaturization of theassociated electronics and optical systems. While consumercameras in mobile phones boast now 5MP, the opticalsystem so far has been limited to fixed focus or (veryrecently) to sophisticated zoom mechanisms with limited

miniaturization capabilities. Getting the entire sensorelectronic-optical system down to a couple ofmm instead ofcm could enable next generation high quality mobile deviceswith visualization capabilities.First steps using liquid lenses (e.g., byLucent and Variopticuse of electrowetting effect) have been endorsed by OEMmanufacturers /1, 2, 3/ in evaluation stages. However, thatapproach requires some sophisticated control circuitry andneeds to retain the position of the optical element actively byapplying a continuous electrical field.

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A MEMS based camera with self-locking mechanism couldovercome the associated energy consumption issue. Electronicsignal processing on-chip has gone a long way since camerachips have evolved. Still, additional active and passive circuitryis required to form a fully functional camera system. A side-toside concept requires much real estate on the substrate of amobile device. 3D integration is therefore a direct pathway tominimize the impact ofthis issue.The first section describes the fmal goal of a 3D integratedvision system based on 3D assembly techniques and a MOEMsoptical system. It highlights the current shortcomings /availability issues for a full integration and describes anintermediate implementation path pursued in this paper. Thesecond section discusses the used components, system designand implementation.

2. VISION OF A CAMERA SYSTEMA fully integrated camera system as depicted in Figure 1,

(recent publication in /41) has been described nearly ten yearsago, lacking at that time the implementation teclmologiesrequired.

Figure I: Vision of a fully integrated camera system, depicting a fly-eyemicro lens arrangementSchott has created a through silicon via teclmology (TSV)

;S/ for their Opto-CSP that lends itself directly to the respectivesystem design, minus the optics. Together with a MEMS basedlens control system incorporating an iris and a tunable lens /6/,using wafer/chip stacking, and on.chip rerouting of thecontacts, the highest integration level could be achievedtherewith [Figure 2]. However, such an optical system willrequire holographic elements to maximize N.A. and would noteasily be adapted to changes in either product chip.As many of the techniques to manufacture such amaximally integrated system are not readily available,protected by licenses or just not feasible for a prototype phasedue to unavailability of full wafers required for through-silicon

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D I ' ~ . 1 _ 3 April, Rome, IMyvia fabrication, an intermediate approach compiling today'smainstream packaging technologies (ie. Fine pitchwirebondingand flip chip) with advanced substrate manufacturing waschoosen for the current research work. This approach canresult in nearly the same dimensions as achievable with themost sophisticated approach as depicted.

Figure 2: MOEMS enhanced camera system (concept based on 3D TSV andBCB re-routing technology)

Based on a CM OS 768 x 576 pixels ACC sensor /7/, a fullcamera system was designed, providing a IEEE 1394 output.The implementation focused on establishing the interfaceelectronics on a footprint smaller than the actual sensor andmounting the circuitry on the backside ofthe sensor chip.3. COMPONENTS

The camera system is comprised of three major functionalblocks:Image sensorOptical systemProcessing and interface electronics

Their specifications and details are given below:3.a) CMOS Image SensorThe image sensorwas taken from a previous production runby Fraunhofer IMS, Duisburg, and was delivered on a nondiced 6" wafer. The characteristics are given in table 1.Table l ' Specifications of elF image sensor

Acquisition Progressive scan, rollingshutter

Sensitive area 768 x 576 pixelsTotal # of pixels 796 x 604Pixel size 10 /lm x 10 /lmfilling factor 50%total chip area 90 mm2 (0,5 /lm CMOS)Power supply 3.3VPower consumption typo 120 mWFull frame-rate (20 ms integration time)

50/sMaximum frame rate 66/s(full frame)Pixel clock 16 MHzon chip gain 6


3. b) MEMS Iris and LensThe MEMS device had been designed by our partneringresearch institute, The University of Utah, and fabricated in aSUMMiT--Vrunprovided by Sandia.The principle is based on a macro-scale structure /8,9/ for aconcentric joint mechanism [Figure 3]. The deployment of themoving structures was based on electrostatic actuation,providing a full open/close cycle in


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D I ' ~ . 1 _ 3 April, Rome, IMyThe Ie's -except for the CIF sensor- were procured throughstandard distribution channels, none of them was available asbare die. From a designer's perspective, this is a quite normalsituation - for small numbers/prototypes, usually theprocurement of full wafers is prohibitive due to the associated

cost.4. SYSTEM DESIGN AND IMPLEMENTATION

4.a) Building a libraryfor bare dieThe development target was now to realize a subminiature

camera module slightly larger in x/y dimensions than the actualimage sensor. While previously discussed techniques usingThrough Silicon Vias (TSV) were at this prototype stageprohibited by cost and material' s availability (i.e. only thesensor was available in wafer format) the principal vision as offigure Figure 1 and Figure 2 was still retained.

Figure 6: Subminiature camera module - 3D representation

To reach this goal, firstly the required electroniccomponents needed to be converted in a bare die format. Forthis, a technique developed at IZM was utilized, whichforegoes all issues with respect to chemical or plasma etchingof hard-to-etch mold compounds or sensitive/predamaged bondpads.

High precision mechanical micro milling (x-y-z precision~ 5 I l m ) was employed to remove all mold material from backand frontside, exposing the bare silicon (backside) and the goldbonds ("nailheads") on the frontside, respectively [Figure 7].

Figure 7: Gold bond heads embedded in mold compound aftermicromilling exposure

Carefully measuring the chip pad positions using a JenoptikOKM coordinate machine, for all ICs a library with padposition and allocation was established and used to derive fromthe circuitry schematics a physical layout.


4.b) Preparing the chipsfor assemblyOn the exposed gold an additional gold stud bump wasbonded to create a defined starting point for subsequent

processes [Figure 8].

Figure 8: Ball bumping process andbumped exposed chip pads

The exposed and bumped chip, being ~ 2 0 x smaller and 5xthinner than the COTS package with respect to themicrocontroller [Figure 9], could now be used in a CSP/FC likefashion. The other dies had die-to-package footprint ratios of 3(ADC) .. 36 (CPLD) and 15 ... 150x volume ratio, respectively.This clearly shows that the size advantage of bare die vs.COTS component becomes more significant when dealing withhigh-pincount Ie's. As a caveat, this advantage (retained alsoover COB assembly) comes at the price of increased challengesat the substrate level - see next section.

Figure 9: Exposed bare die vs. package outline (/lController)

5.PHYSICAL LAYOUT & SUBSTRATE FABRICATION

Using the properties of the Xilinx CPLD, routing could beminimized by selecting the pin infout's ofthis component in anoptimized fashion. Still, the result ing design came out withDRC violations even for advanced HDI flexprints (60llmlines/spaces). After careful optimization and leveraging thepad-to-bump overlap size provided by the flip chip assemblyprocess to accommodate for +/-lOllm misalignment, the DRCerrors could be removed, sacrificing tolerances in thesubsequent placement process [Figure 10].

The flexprint i tself was a two layer PI (50llm) with 251lmcoverlay. The electronic's site had a 0,25mm thick FR4stiffener included, providing a mounting basis for the imagesensor, which was attached to the frontside via goldwirebonding. These contacts were routed using drilled (150llm)through-vias to the flex. The entire substrate was prefabricated

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D I ' ~ . 1 _ 3 April, Rome, IMyon a FR4 frame to prevent coiling and warping of the flex tailduring the thermal processes.

Figure 10: DRC violations (red) and improved sitnation (detail) aftercareful pad relocation on the flexpring backside

With the reduced tolerances due to the design, anisotropicconductive adhesive (ACA) interconnects were selected asassembly technology for the signal conditioning and interfaceelectronics on the backside of the flexprint. The dies were allprepared according to the previous description, the SMD'swere mounted into pre-dispensed solder deposits prior ACAassembly.

6. BUILDING THE CAMERAHaving all components in place, fIrstly the SMD's weremounted. With a 30gauge (O.16mm) ID needle, solder deposits(SnAgCuO.5) were dispensed via time-pressure controlleddispense system. A Fineplacer manual pick&place equipmentproviding ~ 5 u m accuracy by microscope assisted alignmentwas used to put the SMD components in place. Reflowsoldering was done using a fIve zone convection oven with a

peak temperature of250aCFor the ACA assembly process of the bare dies, ACA foilwas precut with 1OOum overlap and positioned using theFineplacer again on the mounting sites of each flip chip.

A FC150 bond system from Suss providing a sub-11mprecision and simultaneously allowing to excert force andtemperature to the interconnects was used to bond the chips tothe substrate. The ACA fIlm melts during the process, allowingthe gold stud bumps to penetrate down to the substrate's goldprotected pads. The thermoset adhesive cures during theassembly process and thereby fulfIls three tasks:a) providing mechanical contactb) stabilizing the established electrical contact andc) protecting the assembly from thermal stress(similar to an underfiller)The backside was not protected by a molding, as in a [malgoal the entire assembly was piarmed to be put into apolymeric, protective camera holder anyway [Figure 11].After full curing, the assembly was turned around and theCIF sensorwas prepared for chip&wire assembly.As the contact pitch for this die is moderate, no specifIcchallenges were noted. Die-bonding was done at l50aC andgold-ball-wedge bonding connected the CIF sensor to thecontact pads, which were routed by through via holes to thepopulated electronics side.


Figure 11: Compleded backside of the micro cameramodule withACAassembled circuits

SpecifIcally for the CIF Sensor, protecting the contact wiresfrom any damage required a two-fold dam-and-fIll process forthe glob top protection [Figure 12].First, a medium viscosity material with good shaperetaining properties was used to dispense a frame close to thegold bond nailheads on the chip (inner frame) and directlyadjacent to the substrate bonds on the flex (outer frame). Thisleft the sensitive area ofthe CIF sensor completely untouched.

Figure 12: Dual dam approach, leaving thesensor area exposed

With a low viscosity material, the created trench was fIlledto level, safely enclosing the wires into the epoxy fIller. Theresulting epoxy bar had a +/-lOum surface topography due tothe dispense process and flow properties [Figure 13].

Figure 13: Trench fill process to protect the wirebonds and leave thesensor area exposed

The [mal (electronic) camera device had an overalldimension of l2.5xlO.9x1.54mm versus the CIF sensoralone with 8,77x9.8xO.38mm. As clearly visible in [Figure11], the additional footprint required is attributed to thethrough holes and the design requirement for the wire-

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D I ' ~ . 1 _ 3 April, Rome, IMy

10. REFERENCES

proposed [Figure 15].

8. CONCLUSION ANDNEXT STEPSBased on COTS devices and a MEMS optical system, a

concept for a subminiature camera has been demonstrated.Features not available without sophisticated processes likefull wafer TSV's could be demonstrated by de-capsulatingthe COTS devices and using high density flex circuitry,creat ing a 1OxlOx2mm thick electronic camera system. AMEMS type of optical system featuring a fixed corneal lens,a deployable iris and a variable focus, flexible polymer lens

9. ACKNOWLEDGMENTThe authors would like to acknowledge Mr. Dallmann,

and Mr. Scholles (both Fraunhofer IPMS, Dresden)contribut ion to the work, designing the electr ical system.The discussions with Mr. Heinemann (Fraunhofer Center forLasertechnology, Plymouth) on laser milling/drilling aregratefully acknowledged.Part ofthe work was funded by a FraunhoferMEF Project"Tysmikat" , and part by a University of Utah Technology

Commercialization Project. MEMS proof of conceptdemonstration of the iris design through Sandia UniversityAll iance Design competi tion, winners Ronnie Boutte andTaylorMeecham.

Figure 15: Schematic of a MID integrated optical system holderwithMEMS elements und corneal lens cap. Excisions in the holderfor the corneallens allow thewirebonds to stay untouched.

1 1. Aizenberger et aI, "Lenses with tunable liquid opticalelements", US Patent 6,891,682, May 2005

2 B. Bergea, 1. Peseux, "Variable focal lens controlled by anexternal voltage: An application of electrowetting", Eur.Phys. 1. E 3, 159-163 (2000)

3 Samsung Press Release, online versionhttp://www.sem.samsung.com/cms/ worklen/company/news/newsView.jsp?seg=262&pg=3, June 20061. Duparre, R. Voelkel, "Novel optics/micro-optics forminiature imaging systems", Proc. Photonics Europe 2006,Strassbourg, April 20061. Leib, M. Topper., "NewWafer-Level-PackagingTechnology using silicon via contacts for optical and othersensor applications", ECTC, Las Vegas, USA, 2004.

6 R. Boutte, T. Meecham, I. Harvey, invention disclosure ofthe UniversityofUtah to the USPTO

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Figure 14: Manipulator for MEMSdevice with cavity

bonding. Processing these as through silicon vias and usinginstead of the flex circuit a wafer level appl ied re-routing,another 30% of area could be saved.

The cavi ty is designed to accommodate both the 3x4 and4x4mm MEMS chips. Applied vacuum drag will retain thechips in position during the bond procedure, without doingany damage to the surface.Bonding of the MEMS chips on each other with aprecision of better than 51lm (i.e. 1% of the overallopening) is achieved using aligned camera vision on a FC950 Suss Flip Chip bonder. A thin o11m) adhesive layer isspread and the top chip is with its backside "dipped" into thereservoir, taking a minute amount of adhesive to the rim ofthe cavity. This is suff icient to ensure mechanically stablebonding.As the used adhesive is no t thermally stable, all wire

bonding steps are done withAl wire at room temperature.A significant challenge encountered was the optical spacerrequired to allow a full image project ion from the iris downto the sensitive area ofthe sensor chip. While the mechanicalcontour of the lens holder [see detail in Figure 6] can easilybe realized in a stereo-lithographic (STL) prototype process,assembling and interconnecting of the sensitive structuresinto a 3D element with ~ 1 5 1 l m required precision posed asignificant challenge and needs further development.The STL process allows to mimick the high precision of 5

modem molded interconnect devices (MID) without theirbuilt in electrical routing functionality. However, using MIDas a h igh volume capable process, a schematic assemblycapable of low cost manufacturing can be envisioned and is

7. PREPARING THE MEMS & OPTICAL ELEMENTSThe MEMS devices received from the SUMMiT-VTM

process were in an "open iris" configuration and were still inneed of through hole fabrication and MEMS release.The enacted concept uses a laser to drill mill a cavity from

the backside and subsequently drill a centered hole throughthe optical axis of the MEMS device. After release, allcontaminations are as well removed from the mechanicallymoving levers.Bonding the MEMS dice on top of each other requires ahigh precision and would need to exclude any mechanicalhandling of the surface (ie. no flat vacuum pipette would beallowed). To overcome these issues, a design for a suctiontool keeping the sensitive areas untouched was made.

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D I ' ~ . 1 _ 3 April, Rome, IMy7 W. Brockherde, C. Nitta, "Automotive CMOS Camera",Fraunhofer IMS, annual report, pp. 30,2003, onlineavailable at ..http://www.ims.fhg.de/uploads/mediaJ

IMS_Annual_Report_2003 .pdf'8 http://www.waymarking.comlwaymarks/WMIVQO9 C.Hobermann, US Patent 5024031

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Jung - Platform Technology for Form Factor Equivalent Microsystems Derived From COTS Components

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