IWAPS2020 - 16025079.s21d-16.faiusrd.com

35
© Hitachi High-Tech Corporation. 2020. All rights reserved. Electron Beam Metrology for Advanced Patterning IWAPS2020 Hitachi High-Tech Corporation Metrology Systems Solution Development Dept. 11/5/2020 Masami Ikota

Transcript of IWAPS2020 - 16025079.s21d-16.faiusrd.com

Page 1: IWAPS2020 - 16025079.s21d-16.faiusrd.com

© Hitachi High-Tech Corporation. 2020. All rights reserved.

Electron Beam Metrology for Advanced Patterning

IWAPS2020

Hitachi High-Tech Corporation

Metrology Systems Solution Development Dept.

11/5/2020

Masami Ikota

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© Hitachi High-Tech Corporation. 2020. All rights reserved.

1. Device Trend and Requirement for Metrology Tools

2. High Precision Measurement by CD-SEM

2.1 Tool to Tool Matching

2.2 LCDU (Roughness) Measurement

3. New Metrology

3.1 Overlay Measurement with Buried Patterns by HV-SEM

3.2 3D NAND BCD Monitor with Auto Beam Tilt Function

3.3 EUV Issues and Solutions

4. Summary

Contents

1

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© Hitachi High-Tech Corporation. 2020. All rights reserved.

1. Device Trend and Requirement for Metrology Tools

2. High Precision Measurement by CD-SEM

2.1 Tool to Tool Matching

2.2 LCDU (Roughness) Measurement

3. New Metrology

3.1 Overlay Measurement with Buried Patterns by HV-SEM

3.2 3D NAND BCD Monitor with Auto Beam Tilt Function

3.3 EUV Issues and Solutions

4. Summary

Contents

2

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3© Hitachi High-Tech Corporation. 2020. All rights reserved.

1.1 Device Trend and Metrology Needs (Logic)

2020IRDS More Moore

* Edge Placement Error** Local CD Uniformity

σEPE*2 = σCD

2 + σOverlay2 + σLCDU**

2

For logic, 1D/2D pattern shrink and 3D technology proceed concurrently. For 1D/2D pattern shrink EPE is becoming critical. For further shrink, EUV light source is being implemented and overlay with buried patterns need to be monitored.

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4© Hitachi High-Tech Corporation. 2020. All rights reserved.

1.2 Device Trend and Metrology Needs (Memory)

D. James, ”Nano-scale flash in the mid-decades ,” ASMC2007D. James, ”Recent advances in memory technology ,” ASMC2013A. Tilson, ”STEM/EDS metrology and statistical analysis of 3D NAND devices ,” IPFA2018

For NAND memory, 1D/2D pattern shrink is reaching its limit and structure is switching to 3D.New process issues related to high aspect ratio pattern are arising.

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1.3 Required EPE Based on IRDS

σEPE2 = σCD

2 + σOverlay2 + σLCDU

2

For Fin/LGAA patterns, sub-nanometer level of CD/LCDU control is required and its target is tighter than Overlay.

Based on 2020IRDS Metrology tables

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1.4 Required Precision for Metrology Tools

Generally, required metrology tool uncertainty is less than 20% of tolerance. For Fin/LGAA patterns, less than 0.15nm of precision is necessary for metrology tools.

σEPE2 = σCD

2 + σOverlay2 + σLCDU

2

Si latticeconstant~0.543 nm

Based on 2020IRDS Metrology tables

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© Hitachi High-Tech Corporation. 2020. All rights reserved.

1. Device Trend and Requirement for Metrology Tools

2. High Precision Measurement by CD-SEM

2.1 Tool to Tool Matching

2.2 LCDU (Roughness) Measurement

3. New Metrology

3.1 Overlay Measurement with Buried Patterns by HV-SEM

3.2 3D NAND BCD Monitor with Auto Beam Tilt Function

3.3 EUV Issues and Solutions

4. Summary

Contents

7

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8© Hitachi High-Tech Corporation. 2020. All rights reserved.

2.1.1 Metrology Budget Analysis

Process Metrology factors

CD uniformity (global & local) : ~0.10 nm

Repeatability <0.10 nm

Inter wafer

Intra wafer

Intra chip

Intra

pattern

σ(𝑃𝑟𝑜𝑐𝑒𝑠𝑠)2 + σ(𝑚𝑒𝑡𝑟𝑜𝑙𝑜𝑔𝑦)2

Process variation =

σ (𝑚𝑒𝑡𝑟𝑜𝑙𝑜𝑔𝑦) =

σ(𝑚𝑎𝑡. )2 +σ(𝑢𝑛𝑖. )2 +σ(𝑟𝑒𝑝. )2

Tool matching: 0.10 ~ 0.20nm

Tool matching tops metrology topic

Z. Wang, et al., “High-accuracy, high speed, and smart metrology in the EUV era,”Proc. of SPIE 11325, 113251Q-1 (2020)

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9© Hitachi High-Tech Corporation. 2020. All rights reserved.

2.1.2 What is Atomic Tool Matching?

Z. Wang, et al., “High-accuracy, high speed, and smart metrology in the EUV era,”Proc. of SPIE 11325, 113251Q-1 (2020)

-0.15

-0.10

-0.05

0.00

0.05

0.10

0.15

#1

#2

#3

#4

#5

#6

#7

#8

#9

#1

0#

11

#1

2#

13

#1

4#

15

#1

#2

#3

#4

#5

#6

#7

#8

#9

#1

0#

11

#1

2#

13

#1

4#

15

CG5000 CG6300

CD

ma

tchin

g (

nm

)Tool

CD

[n

m]

Daily Control chart

Device size5.00nm

Process tolerance0.50nm

Metrology budget≦0.05nm

Productivity (~100kWPM) for tool fleet consisting 10-100 prevalent CD-SEMs

Courtesy ofIMEC

100.11nm

100.09nm100.11nm

100.09nm

100.10nm

H atom radius ~0.053 nm

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10© Hitachi High-Tech Corporation. 2020. All rights reserved.

2.1.3 Budget Analysis of CD-SEM Matching

Hardware variation

Optics,

Contamination, etc.

Signal processing and imaging

Sample geometry

Beam control

QC monitor errors

Measurement

repeatability, Sample

variation, etc.

Tool calibration errors

Column/Beam

alignment, Focus offset,

etc.

Environment effects

Electro-magnetic

noise, Mechanical

vibration, etc.

Z. Wang, et al., “High-accuracy, high speed, and smart metrology in the EUV era,”Proc. of SPIE 11325, 113251Q-1 (2020)

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11© Hitachi High-Tech Corporation. 2020. All rights reserved.

2.1.4 Efforts for Matching Improvement

Hardware variation

Optics,

Contamination, etc.

Signal processing and imaging

Sample geometry

Beam control

QC monitor errors

Measurement

repeatability, Sample

variation, etc.

Tool calibration errors

Column/Beam

alignment, Focus offset,

etc.

Environment effects

Electro-magnetic

noise, Mechanical

vibration, etc.

H/W

uniformity

Precise column

manufacturing

Beam

Adjustment

Focus height

adj.

Noise Robustness

with shield

equipped

Detection / image

level matching Detector

AdjustmentImage level

tuning

Z. Wang, et al., “High-accuracy, high speed, and smart metrology in the EUV era,”Proc. of SPIE 11325, 113251Q-1 (2020)

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12© Hitachi High-Tech Corporation. 2020. All rights reserved.

2.1.5 Evaluation Data of Atomic Tool Matching

Hitachi standard wafer, HR mode, 800 V and 8pA

Atomic level of tool matching can be achieved.

Before Shipping

After Installation

H atom radius ~0.053 nm

Z. Wang, et al., “High-accuracy, high speed, and smart metrology in the EUV era,”Proc. of SPIE 11325, 113251Q-1 (2020)

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© Hitachi High-Tech Corporation. 2020. All rights reserved.

1. Device Trend and Requirement for Metrology Tools

2. High Precision Measurement by CD-SEM

2.1 Tool to Tool Matching

2.2 LCDU (Roughness) Measurement

3. New Metrology

3.1 Overlay Measurement with Buried Patterns by HV-SEM

3.2 3D NAND BCD Monitor with Auto Beam Tilt Function

3.3 EUV Issues and Solutions

4. Summary

Contents

13

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14© Hitachi High-Tech Corporation. 2020. All rights reserved.

2.2.1 LCDU(Roughness) Measurement Issue

bia

s

bia

s

left right

Equalized bias still

remains in both sides.

LER

normal-direction

scanalternative directed

scan

left right

LER

bia

s

bia

s

bia

s

bia

s

tru

eL

ER

tru

eL

ER

tru

eL

ER

tru

eL

ER

① ②

① Due to asymmetric SEM-

signal, bias in right-LER

is larger than left-LER.

② By the alternative scan,

bias remains equally in

right- and left-LERs.

③ To remove the bias, we

calculate it individually

in right- and left- LERs.

left right

LER

tru

eL

ER

tru

eL

ER

H. Kawada, et al., “How to measure a-few-nanometer-small LER occurring inEUV processed features,” Proc. of SPIE 10585 (2018)

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2.2.2 Bias Removal by Random Noise Reduction (RNR)

Random noise contribution is large especially for resist patterns and it cannot be negligible. Even after RNR, roughness is far beyond the target and eats up EPE budget.Accurate roughness monitoring is important.

K. Takamasu, et al., “Line Width Roughness of Advanced Semiconductor Featuresby Using FIB and Planar-TEM as Reference Metrology,” Proc. of SPIE 10585 (2018)

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2.2.3 Accuracy Verification of Roughness with RNR

H. Kawada, et al., “How to measure a-few-nanometer-small LER occurring inEUV processed features,” Proc. of SPIE 10585 (2018)

Frequency (1/ nm)

No random-noise (bias)

in high-frequency band

( ~ 1nm) .

Accuracy of RNR function of CD-SEM was verified by Planar-TEM.The reference PSD of Planar-TEM has no random noise and has good agreement with PSD of CD-SEM after RNR.

Pow

er

Spectr

al D

ensity(n

m3)

Frequency (1/ nm)

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© Hitachi High-Tech Corporation. 2020. All rights reserved.

1. Device Trend and Requirement for Metrology Tools

2. High Precision Measurement by CD-SEM

2.1 Tool to Tool Matching

2.2 LCDU (Roughness) Measurement

3. New Metrology

3.1 Overlay Measurement with Buried Patterns by HV-SEM

3.2 3D NAND BCD Monitor with Auto Beam Tilt Function

3.3 EUV Issues and Solutions

4. Summary

Contents

17

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18© Hitachi High-Tech Corporation. 2020. All rights reserved.

Upper SE※1

Detector

Electron Source

Lower BSE※2

Detector

Objective Lens

Wafer

Top BSE※2

Detector

SE

BSE

BSE

High Vacc

※1 SE(Secondary Electron)※2 BSE(Back Scattering Electron)

3.1.1 Overlay Measurement by HV-SEM

K. Hasumi et al., “SEM based overlay measurement between Via patterns and buried M1 patterns using high voltage SEM,” Proc. of SPIE 10145, 101451J (2017)

BSE image(Under-Layer)

SE image(Upper-Layer)

SiO2_HM Trench

Resist Trench

++++++++

++++++++

++++++++

++++++++

++++++++

++++++++

++++++++

++++++++

++++++++

++++++++

x

x

x

x

x

x

x

x

x

x

x

x

x

x

x

x

x

x

x

x

x

x

x

x

x

x

x

x

x

x

x

x

x

x

x

x

x

x

x

x

x

x

x

x

x

x

x

x

x

x

x

x

x

x

x

x

x

x

x

x

x

x

x

x

x

x

x

x

x

x

x

x

x

x

x

x

x

x

x

x

x

x

x

x

x

x

x

x

x

x

x

x

x

x

x

x

Overlay

M1B

M1A

M1B

M1A

M1B@ADI

SE is used to observe the surface while BSE is used to observe material contrast of the lower layer. Thus, overlay between upper and under layer can be measured.

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Vacc

5kV 10kV 15kV 20kV 25kV 30kV

SEM

image

SEUpper-Layer

M1B resist

SEM

image

BSEUnder-Layer

M1A Trench

Pitch 96nm, Upper/M1B_Resist 48nmTrench, Lower/M1A_HM 24nmTrench

0.9um

M1B@ADI

M1B

M1A

Accelerated Voltage 15kV was chosen based on image contrast.SEM OVL results at ADI show good correlation to Optical OVL.

K. Hasumi et al., “SEM based overlay measurement between Via patterns and buried M1 patterns using high voltage SEM,” Proc. of SPIE 10145, 101451J (2017)

y = 0.95x + 0.22 R² = 0.99y = 0.92x - 0.51 R² = 0.98

-10

-5

0

5

10

15

20

-10 -5 0 5 10 15 20

OVL_Y

OVL_X

SE

M_

OV

L a

t A

DI

Correlation SEM – μDBO

μDBO at ADI

3.1.2 Overlay by HV-SEM (M1B-M1A)

225nm

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20© Hitachi High-Tech Corporation. 2020. All rights reserved.

Vacc

5kV 10kV 15kV 20kV 25kV 30kV

SEM

image

SEUpper-Layer

V0B resist

SEM

image

BSEUnder-Layer

V0A Hole

1.1um

Pitch 64nm, Upper/V0B_Resist 40nm Hole, Lower/V0A_HM 40nm Hole

V0B@ADI

V0B

V0A

y = 1.00x - 1.17 R² = 1.00

y = 0.98x - 0.79 R² = 0.99-20

-10

0

10

20

30

-20 -10 0 10 20 30

SE

M_

OV

L a

t AD

I

Yield Star at ADI

y

x

Correlation SEM – μDBO

μDBO at ADI

Accelerated Voltage 25kV was chosen based on image contrast.SEM OVL results at ADI show good correlation to Optical OVL.

K. Hasumi et al., “SEM based overlay measurement between Via patterns and buried M1 patterns using high voltage SEM,” Proc. of SPIE 10145, 101451J (2017)

3.1.3 Overlay by HV-SEM (V0B-V0A)

225nm

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21© Hitachi High-Tech Corporation. 2020. All rights reserved.

Accelerated Voltage 30kV was chosen based on image contrast.SEM OVL results at ADI show good correlation to Optical OVL.

K. Hasumi et al., “SEM based overlay measurement between Via patterns and buried M1 patterns using high voltage SEM,” Proc. of SPIE 10145, 101451J (2017)

3.1.4 Overlay by HV-SEM (V0B-M1A)

Vacc

5kV 10kV 15kV 20kV 25kV 30kV

SEM

image

SEUpper-Layer

V0B resist

SEM

image

BSEUnder-Layer

M1A Trench

1.1um

V0B@ADI

V0B

M1A

370nm

y = 0.96x - 0.32 R² = 1.00

y = 1.02x + 1.14 R² = 0.97-30

-20

-10

0

10

20

30

40

-30 -20 -10 0 10 20 30 40

SE

M_

OV

L a

t AD

I

Yield Star at ADI

y

x

Correlation SEM – μDBO

μDBO at ADI

Pitch 96nm, Upper/V0B_Resist 40nm Hole, Lower/M1A_HM 24nm Trench

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© Hitachi High-Tech Corporation. 2020. All rights reserved.

1. Device Trend and Requirement for Metrology Tools

2. High Precision Measurement by CD-SEM

2.1 Tool to Tool Matching

2.2 LCDU (Roughness) Measurement

3. New Metrology

3.1 Overlay Measurement with Buried Patterns by HV-SEM

3.2 3D NAND BCD Monitor with Auto Beam Tilt Function

3.3 EUV Issues and Solutions

4. Summary

Contents

22

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23© Hitachi High-Tech Corporation. 2020. All rights reserved.

3.2.1 3D NAND Process Issues

L. Tu, et al., “3D-NAND wafer process monitoring using high voltage SEM with auto e-beam tilt technology,” Proc. of SPIE 11325, 113250L-1 (2020)

Bending

Top / Bottom CD

Under Etch

Bowing

Tilt structure (Slant hole)

3D NAND suffered from several process issues such as Under Etch Bending Bowing Top/Bottom CD difference Slant

Today’s topic

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24© Hitachi High-Tech Corporation. 2020. All rights reserved.

3.2.2 Auto Electron Beam Tilt Function

Distance( The gravity center of Top – that of Bottom)

Bottom CD

[ Step-0 ]

Calculate the correlation between

beam tilt and overlay.

[ Step-1 ] Measure overlay with no tilt.

[ Step-2 ] Measure Bottom CD with beam tilt

matched with the hole (trench) slope.

L. Tu, et al., “3D-NAND wafer process monitoring using high voltage SEM with auto e-beam tilt technology,” Proc. of SPIE 11325, 113250L-1 (2020)

Auto beam tilt function is for accurate bottom CD measurement when hole slant exists.

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25© Hitachi High-Tech Corporation. 2020. All rights reserved.

large

small

large

small

Top CD does not change

【After beam tilt】【Before beam tilt】

【Before beam tilt】 【After beam tilt】

large

small

large

small

Real BCD measurement are demonstrated

【Before beam tilt】 【After beam tilt】

For slant hole

Real BCD is available after beam tilt

Not real BCD Real BCD

Slant hole Slant hole

L. Tu, et al., “3D-NAND wafer process monitoring using high voltage SEM with auto e-beam tilt technology,” Proc. of SPIE 11325, 113250L-1 (2020)

3.2.3 BCD Monitor with Auto Electron Beam Tilt Function

After Beam tilt measurement, CDU of Top CD does not change while BCD becomes larger .This means Real Bottom CD can be measured.

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© Hitachi High-Tech Corporation. 2020. All rights reserved.

1. Device Trend and Requirement for Metrology Tools

2. High Precision Measurement by CD-SEM

2.1 Tool to Tool Matching

2.2 LCDU (Roughness) Measurement

3. New Metrology

3.1 Overlay Measurement with Buried Patterns by HV-SEM

3.2 3D NAND BCD Monitor with Auto Beam Tilt Function

3.3 EUV Issues and Solutions

4. Summary

Contents

26

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27© Hitachi High-Tech Corporation. 2020. All rights reserved.

3.3.1 EUV Lithography Challenges

Britt. Turkot, “Preparing for EUV Lithography in High Volume Manufacturing,”2017 International Workshop on EUV Lithography

It is necessary to monitor 1E12 vias!!

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28© Hitachi High-Tech Corporation. 2020. All rights reserved.

3.3.2 EUV Lithography Challenges (Cont.)

J. Biafore, et al., “Statistical simulation of resist at EUV and ArF,” Proc. of SPIE7273, 727343 (2009)

Problematic variations—also known as stochastic effects --- by Mark Lapedus (Semiconductor Engineering)

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29© Hitachi High-Tech Corporation. 2020. All rights reserved.

3.3.3 Mass Measurement System with AI-SEM

Novel SEM FOV 80um

Large FOV image

Imaging time:15sec @ 2nm/pixel

Electron Source

Corrector

・Aberration・Distortion

Correction lens <LFOV Uniformity>

・Resolution<0.2nm・Distortion<0.02%

Extremely uniform large FOV imaging by aberration/distortion correction technology

Schematic of Large FOV imaging issues Poor Signal /

Time consuming…

Charge-up

Conventional SEM: FOV 1um

Z. Wang, et al., “High-accuracy, high speed, and smart metrology in the EUV era,”Proc. of SPIE 11325, 113251Q-1 (2020)

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30© Hitachi High-Tech Corporation. 2020. All rights reserved.

Area Inspection SEM results compatible to conventional SEM, with higher sensitivity and throughput , applicable to stochastic defect evaluation

Courtesy of Peter De Bisschop - imec

Z. Wang, et al., “High-accuracy, high speed, and smart metrology in the EUV era,”Proc. of SPIE 11325, 113251Q-1 (2020)

3.3.4 Mass Measurement System with AI-SEM

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© Hitachi High-Tech Corporation. 2020. All rights reserved.

1. Device Trend and Requirement for Metrology Tools

2. High Precision Measurement by CD-SEM

2.1 Tool to Tool Matching

2.2 LCDU (Roughness) Measurement

3. New Metrology

3.1 Overlay Measurement with Buried Patterns by HV-SEM

3.2 3D NAND BCD Monitor with Auto Beam Tilt Function

3.3 EUV Issues and Solutions

4. Summary

Contents

31

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32© Hitachi High-Tech Corporation. 2020. All rights reserved.

4. Summary

EPE is the critical parameter and it consists of 3 components, CD error,

overlay error and LCDU such as line edge roughness. For Fin/LGAA patterns,

less than 0.15nm of precision is necessary for metrology tools.

High precision measurement with atomic level of tool to tool matching can be

realized by HW/ Calibration/ Environment /QC monitor improvement.

Accurate LCDU can be measured by RNR function.

Overlay with buried patterns can be measured by HV-SEM and correlation

with optical overlay tool was verified.

Auto electron beam tilt function is effective for channel hole slant monitor for

3D NAND.

Stochastic defect monitor is critical for EUV process and mass measurement

with AI-SEM can be a solution.

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© Hitachi High-Tech Corporation. 2020. All rights reserved.

Masami Ikota

11/5/2020

Hitachi High-Tech Corporation

Metrology Systems Solution Development Dept.

END

Electron Beam Metrology for Advanced Patterning

33

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