Investigation of a Class J Power Amplifier With a Nonlinear Cout for Optimized Operation

Copyright 2010 IEEE. Reprinted from the IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES, VOL. 58, NO. 11, PP 2800-2811, NOVEMBER 2010

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FINAL MANUSCRIPT (MANUSCRIPT NUMBMER:7977) TO IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES 1

Investigation of a Class-J Power Amplier with aNonlinear Cout for Optimized Operation

Junghwan Moon, Student Member, IEEE, Jungjoon Kim, and Bumman Kim, Fellow, IEEE

AbstractThis paper presents the operation principle of Class-J power ampliers (PAs) with linear and nonlinear output ca-pacitors (Couts). The efciency of a Class-J amplier is enhancedby the nonlinear capacitance because of the harmonic generationfrom the nonlinear Cout, especially the second-harmonic voltagecomponent. This harmonic voltage allows the reduction of thephase difference between the fundamental voltage and currentcomponents from 45 to less than 45 while maintaining ahalf-sinusoidal shape. Therefore, a Class-J amplier with thenonlinear Cout can deliver larger output power and higher ef-ciency than with a linear Cout. As a further optimized structureof the Class-J amplier, the saturated PA, a recently-reportedamplier in our group, is presented. The phase difference of theproposed PA is zero. Like the Class-J amplier, the PA uses anonlinear Cout to shape the voltage waveform with a purelyresistive fundamental load impedance at the current source,which enhances the output power and efciency. The PA isfavorably compared to the Class-J amplier in terms of thewaveform, load impedance, output power, and efciency. Theseoperations are described using both the ideal and real modelsof the transistor in Agilent Advanced Design System. A highlyefcient amplier based on the saturated PA is designed byusing a Cree GaN HEMT CGH40010 device at 2.14 GHz. Itprovides a power-added efciency of 77.3% at a saturated powerof 40.6 dBm (11.5 W).

Index TermsClass-J, saturated amplier, efciency, nonlinearoutput capacitor, power amplier.

I. INTRODUCTION

H IGHLY efcient power ampliers (PAs) are an essentialRF component for wireless communication systems toachieve small, reliable, and low cost transmitters [1] [3].To date, a lot of topologies have been proposed to providehighly efcient operation. Among the various PAs, the Class-F delivers a good efciency by controlling the odd-harmonicimpedances to make a rectangular voltage waveform [3] [6].However, to get the proper third-harmonic voltage, the outputcapacitor (Cout) should be accurately tuned out. Moreover,depending on the capacitance and the operating frequency, insome cases, the impedance of the capacitance might be a short-circuit for the third-harmonic frequency. Class-E amplier pro-vides excellent efciency by acting as a ideal switch [7], [8].

Manuscript received December 8, 2009; revised June 15, 2010. Thiswork was supported by the MKE (The Ministry of Knowledge Economy),Korea, under the ITRC (Information Technology Research Center) sup-port program supervised by the NIPA (National IT Industry PromotionAgency)(NIPA-2010-(C1090-1011-0011)), by WCU (World Class University)program through the Korea Science and Engineering Foundation funded bythe Ministry of Education, Science and Technology(Project No. R31-2008-000-10100-0), and by the Brain Korea 21 Project in 2010.

J. Moon, J. Kim, and B. Kim are with the Department of Electrical Engi-neering, Pohang University of Science and Technology, Pohang, Gyungbuk,790-784, Korea (e-mail: [email protected]; [email protected];[email protected]).

However, the actual ideal switching operation of the powertransistor might or might not be possible depending on theoperating frequency and the power transistor. In addition, thehigh order frequency components of the drain voltage maybe shorted and the switching time may not be negligible,making the zero-voltage switching and zero voltage derivativeswitching difcult. Such limitations degrade the efciency ofthe Class-E PA at high frequency.

In 2006 [3] and 2009 [9], S. C. Cripps proposed Class-J amplier that provides the same efciency and linearity asClass-AB or Class-B ampliers across a broad frequency rangedue to absence of the resonant impedance condition, such asshort-circuit or open-circuit. The Class-J PA increases the fun-damental voltage component assisted by the second-harmonicvoltage by employing a capacitive harmonic load [10] [12].However, a complex load impedance at the fundamentalfrequency is required to shape the voltage waveform. As aresult, the performance of the Class-J PA is degraded dueto the phase mismatch, making it comparable to that of aharmonic tuned linear PA, such as a Class-AB or a Class-B, but the reported Class-J PA provides better efciency thanthe theoretical expectation [13] [15].

The highly efcient PAs have been extensively analyzed inthe past, but most of these analyses have been carried out underthe assumption of a linear Cout [3] [15]. However, the Coutpresents a heavily nonlinear behavior at the low voltage acrossthe capacitor [16], [17], resulting in unexpected operationand the abstrusity of the analyses. Although some researchershave made an effort to describe PA operations accounting thenonlinear capacitor [18] [23], they only focused on the class-E topology at low frequencies, below 400 MHz.

In this paper, the harmonic-generation property of thetransistors nonlinear Cout is explored, and the behaviors ofthe PAs with the linear and nonlinear Cout are investigated.Especially, Class-J ampliers, which use the output capacitorsas a second harmonic load, are further analyzed in terms ofthe time-domain voltage and current waveforms, load-lines,load impedances, and continuous wave (CW) performances.The Class-J ampliers are compared with a saturated poweramplier, and it is shown that the amplier is an optimizedversion of the Class-J PA to obtain better efciency and outputpower. In [24] and [25], we explained the operation of thesaturated PA. It uses the nonlinear Cout as a harmonic load,which is the same of the Class-J amplier, and a purelyresistive fundamental load, which is different from the Class-JPA. The resistive fundamental load impedance increases thepower factor, resulting in better efciency and output powerthan those of the Class-J amplier.


(a)

(b)

(c)

Fig. 1. (a) Simplied transistor equivalent circuit model. (b) Capacitancesfor the linear and nonlinear Couts. (c) DC-IV characteristic.

II. ANALYSIS FOR OPERATION CHARACTERISTICS OF ACLASS-J AMPLIFIER

A. Ideal Transistor Model for Simulations

To analyze the fundamental behaviors of the PAs, we haveconstructed a simplied transistor equivalent circuit model inthe Agilent Advanced Design System (ADS) using the sym-bolically dened device, as shown in Fig. 1(a). To simplify theanalysis, the transistor model contains two essential nonlinearparts: Cout and the drain current source. Cout represents allnonlinear capacitors of the transistor output, including thedrain-source capacitor Cds and gate-drain capacitor Cgd. Eventhough Cds and Cgd are modulated according to both thedrain-source and the gate-source voltages, we assume only a

TABLE ISUMMARIZED PARAMETERS FOR OUTPUT CAPACITOR Cout

Cout0 A B C

1.9 1192.4 0.0594714 2.94696

Fig. 2. Half-sinusoidal voltage and current waveforms for the various phasedifferences (In particular, = pi/4 represents the Class-J PA).

dependence on the drain-source voltage in this model. Thus,Cout is given by

Cout (Vds) = Cout0+A [1 + tanh (B Vds + C)] [pF] , (1)where Cout0, A, B, and C are summarized in Table I.Fig. 1(b) illustrates the characteristic of the nonlinear Cout ac-cording to the drain-source voltage. The capacitance increasesdramatically as the drain-source voltage becomes small. Thedrain-source current is given by

Ids (Vgs, Vds) =

0, Vgs 0gmVgs

(1 exp

(VdsVt

)),

0 < Vgs Vgs,maxgmVgs,max

(1 exp

(VdsVt

)),

Vgs Vgs,max

,

where gm is the trans-conductance, and Vgs,max is the gate-source voltage when Ids is equal to Imax. For simplicity, weassume the pinch-off voltage is zero. As depicted in Fig. 1(c),the transistor model exhibits strongly nonlinear effects ofcutoff and saturation. In the intermediate region between thecutoff and saturation, the transistor provides a highly linearoperation. In particular, gm and Imax are set to 1 S and1.5 A, respectively, in this model, and Vk is about 4 V. Theseparameters are based on the model of the Cree GaN HEMTCGH60015 used for the implementation. It is well known thatthe input nonlinear capacitor Cgs has nonlinear characteristic,which results in the generation of harmonic components [10][12], [26], [27]. However, compared with the output nonlinearcapacitor, Cgs has a minor effect on the performance, as willbe described in Section III, so the effect of Cgs nonlinearityis eliminated in this model.

B. Class-J Amplier with Linear Output Capacitor

First, we review the operation of Class-J amplier withlinear Cout. Linear Cout refers to a constant capacitance, asshown in Fig. 1(b). Class-J amplier can be characterized by


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0

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rain Curre

nt [A

]10 20 30 40 50 60 70 800 90

0.5

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1.5

0.0

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Fig. 3. Simulated (a) time-domain voltage and current waveforms and (b)load-lines for Class-B and Class-J ampliers with linear Cout.

half-sinusoidal voltage and current waveforms with a phaseshift between them, as depicted in Fig. 2. These waveformscan be expressed by

I () = Imax (1pi+

12sin 2

3picos 2

)(2)

V () = piVdc (1pi 1

2sin ( + ) (3)

23pi

cos (2 ( + )) ),

where is a phase difference between the voltage and currentfrom the normal 180. Thus, the load impedances of eachharmonic frequencies can be calculated by

Zn = VnIn

, (4)

where n denotes the nth frequency component. For Imax = 1and Vdc = 1/pi, the fundamental and second-harmonic loadsare given by

Z1 = 1, Z2 = 1 (2 pi) (5)For Class-J amplier, is pi/4 because the second harmonicloading is made by the capacitive component. Thus, to shapethe half-sinusoidal voltage waveform, the fundamental loadimpedance is set to 1(pi/4). This leads to the degradation ofthe output power by a factor of cos (pi/4).

The operation of the Class-J PA is further investigated byusing the model described in Section II-A. Since the Class-Joperation biased at the Class-B condition is assumed in this

(a)

(b)

Fig. 4. Fundamental (a) current and (b) voltage components for the Class-Band Class-J ampliers with the linear Cout.

work, the Class-B amplier is also simulated for comparisonpurpose. For the Class-B design, the optimum fundamentalload impedance is chosen to obtain the maximum outputpower.

Ropt =Vdc VkImax/2

. (6)

In the simulation, Vdc is set to 30 V, so Ropt is chosen to be34.6 .

For the Class-J amplier, the voltage waveform is half-sinusoidal. It consists of all even harmonic voltage compo-nents. However, the voltage components at the higher-orderfrequencies are assumed to be zero because of the deviceslarge output capacitor. We believe that, in the real designenvironment, the half-sinusoidal voltage waveform is mainlymade up the DC, fundamental, and second-harmonic volt-age components. Among the various half-sinusoidal voltagewaveforms manipulated by up to second-harmonic component,the maximum-voltage gain condition is assumed in thisstudy [10] [12]. Accordingly, the magnitude of the funda-mental load impedance should be set to

2Ropt because the

maximum value of the fundamental voltage extracted from


Fig. 5. Simulated efciencies of the Class-B and Class-J ampliers with thelinear Cout.

Fig. 6. Simulation setup to investigate the behavior of the ampliers and theharmonic-generation property of the nonlinear Cout.

the half-sinusoidal waveform is increased by a factor of2

above that of Class-B amplier. In addition, to properly shapethe half-sinusoidal voltage waveform, the appropriate amountof the second-harmonic voltage is required. In particular, themaximum-voltage gain condition can be achieved whenthe ratio of the second-harmonic to the fundamental voltageis 2/4. Thus, assuming the ideal half-sinusoidal currenthaving the fundamental current of Imax/2 and the second-harmonic current of 2Imax/3pi, the required second-harmonicload impedance is given by

|Z2| = 3pi8 Ropt. (7)Consequently, the load condition for Class-J amplier isrepresented by

Z1 =2Ropt45, Z2 =

3pi8Ropt 90. (8)

In the simulation of the Class-J amplier, the fundamental andsecond-harmonic load impedances are selected to be 34.6 +j34.6 and j40.768 , respectively.

C. Class-J Amplier with Nonlinear Output Capacitor

Fig. 3 depicts the simulated time-domain voltage and cur-rent waveforms and load-lines for the designed Class-J andClass-B ampliers with linear Cout. Because of the complex

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1.0

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Fig. 7. Simulated (a) time-domain voltage and current waveforms and (b)load-lines for the Class-J ampliers with the linear and nonlinear Couts.

Fig. 8. Average capacitance for the Class-J with the nonlinear Cout accordingto the power level.

fundamental load impedance, the Class-J amplier providesa loadline having looping-characteristic. Fig. 4 shows thefundamental current and voltage components for the Class-Band Class-J ampliers. In the saturated region, the fundamentalcurrent of the Class-B is slightly larger than that of the Class-J, because the Class-J has an asymmetric current waveformdue to the complex fundamental load impedance, as shownin Fig. 3(a). However, the bifurcated current of the Class-B requires slightly larger DC current than the Class-J, andthe efciency of the Class-B at the highly saturated region isslightly lower than that of the Class-J amplier, as depicted


Fig. 9. Simulated efciencies for the Class-J amplier with a linear Coutand the Class-B and -J ampliers with the nonlinear Cout according to thepower level.

Fig. 10. Fundamental and second harmonic-load impedance trajectoriesaccording to the power level.

in Fig. 5. Although the fundamental voltage of the Class-Jamplier is increased by a factor of

2 compared to the Class-

B, as shown in Fig. 4(b), the output power and efciency of theClass-J are equal to those of the Class-B amplier due to thephase mismatch between the current and voltage waveforms by45. In short, although the Class-B and Class-J ampliers withlinear Cout have different fundamental loads and harmonicterminations, the performances of the two PAs are nearly thesame except at the highly saturated condition. However, evenat the highly saturated condition, the difference is very small.

Although Section II-B explains clearly the fundamentaloperation of the Class-J amplier and provides the properload conditions, it does not describe the real behavior ofthe amplier because Cout is not a linear element but anonlinear element, as shown in Fig. 1(b). In this section,the basic operation of a Class-J amplier with the nonlinearCout is investigated using the setup shown in Fig. 6. Here,

(a)

(b)

(c)

Fig. 11. Simulation results to demonstrate the harmonic generation of thenonlinear Cout. (a) Current owing from the linear and nonlinear Couts.The resultant capacitor voltage waveforms in the (b) time- and (c) frequency-domain.

we dene the load impedance at the current source ZLoadand the capacitance is tuned for the fundamental frequencyat low power level. Fig. 7 represents the simulated time-domain voltage and current waveforms and load-lines of theClass-J ampliers with linear and nonlinear Couts, and Fig. 8describes the average capacitance according to the outputpower level for the Class-J amplier with the nonlinear Cout.In the low-power region, below 32 dBm (1.6 W) of theoutput power, the swing of the drain voltage is within therange where the nonlinear Cout could be regarded as a linearcapacitance, as shown in Fig. 7 and Fig. 1. At the outputpower of 32 dBm (1.6 W), the voltage is varied from 20 V to50 V so that the average capacitance remains around 2.1 pF.Therefore, the waveforms and load-lines with the nonlinearCout case are the same as those with the linear Cout case.This results in nearly the same performances for the output


power and efciency, as shown in Fig. 9. In addition, theoutput fundamental and second-harmonic load impedances forboth the linear and nonlinear Couts are the same, properlyshaping the half-sinusoidal voltage waveforms, as describedin Fig. 10. However, as the output power increases above32 dBm (1.6 W), the average capacitance also enlarges witha large capacitance at a low voltage. Thus, as shown inFig. 7(a), the current waveform has a large dip at the middle,generating a large third-harmonic current and enhancing theefciency. Moreover, the magnitude of the fundamental loadimpedance increases, but the phase decreases as depicted inFig. 10. As a result, unlike the Class-J amplier with the linearCout, the voltage waveform moves toward the direction toreduce the phase difference between the current and voltagewaveforms while maintaining the half-sinusoidal shape of thevoltage. This results in enhanced output power and efciencyperformances compared to the Class-J amplier with the linearCout. What is interesting here is that these waveforms can bemade with of less than 45. However, from (5), less than45 leads to a negative resistance value of the second harmonicimpedance. This means that the nonlinear Cout generatesthe second-harmonic voltage component. This phenomenoncannot be expected from the operation of a Class-J amplierwith a linear Cout.

Fig. 11 shows the simulation results to demonstrate theharmonic generation of the nonlinear Cout. The simulationis carried out using the circuit in Fig. 6. The simulationresults include the current owing through the linear andnonlinear Cout and the resultant capacitor voltage waveformsin the time-domain and frequency-domain. Differently fromthe linear capacitor, the nonlinear capacitor generates a voltagewaveform consisting of the fundamental and harmonic voltagecomponents. Although only the fundamental current is injectedto the capacitor, the voltage contains a large second-harmoniccomponent with small higher-order frequency components.Since the transistor can be regarded as a voltage controlledcurrent source, the current owing through the capacitor isdetermined by the input voltage. The voltage across thecapacitor is proportional to the integral of the current, thecharge in the capacitor, scaled by the capacitance. It can beexpressed by

VDS (tx) = VDD +1

Cout (VDS (tx))

tx

i (t) dt

= VDD +Q (tx)

Cout (VDS (tx)). (9)

Q (tx) indicates the charge on Cout until tx. As Q (tx)decreases with negative i (t), Cout increases rapidly. Aroundthe bottom of the voltage, the output voltage VDS (tx) cannotchange much because of the large variation of Cout with thelimited current drive. That is, Q (tx) /Cout (VDS (tx)) remainsnearly constant, VDD, around the region. As a result, thevoltage waveform has a attened characteristic in the lowvoltage region, like the half-sinusoidal shape, as shown inFig. 11(b). Thus, the second-harmonic impedance can be inthe negative resistance region as shown in Fig. 10 becausethe second-harmonic component in the voltage waveform isgenerated not by the second-harmonic current and load but by

the nonlinear Cout. This second harmonic component allowsthe phase difference between the fundamental current andvoltage less than 45. Additionally, the harmonic componentsgenerated by the nonlinear capacitor can be varied according tothe nonlinear Cout prole. The more the nonlinear capacitorchanges, the more the second-harmonic is generated. If thesecond-harmonic load impedance attached parallel to the non-linear Cout is larger than the impedance of the nonlinear Cout,the half-sinusoidal voltage waveform can be maintained. Thesecond-harmonic current component generated by the currentsource can assist this behavior, generating the half-sinusoidalvoltage waveform. However, the saturated current with alarge dip at the middle has a signicant third-harmonic andrather small second-harmonic current. Together with the lowharmonic impedance, the second-harmonic voltage is mainlybuilt up by the harmonic voltage generation of the nonlinearcapacitor. We will revisit this issue in the simulation using areal device model in Section III.

D. Optimization of Class-J Amplier with Nonlinear OutputCapacitor: Saturated Amplier

The Class-J amplier can be further optimized to achievehigher efciency and output power by reducing the phasemismatch between the fundamental voltage and current com-ponents, adopting the resistive fundamental loading condition.This is possible due to the second-harmonic voltage generationby the nonlinear Cout. To obtain the highly efcient operation,the voltage waveform should be shaped to minimize thedissipated power of the device by reducing the concurrent non-zero voltage and current. However, as mentioned in SectionII-C, if the external second-harmonic loading is greater thanthe impedance level generated by the output capacitor, thehalf-sinusoidal voltage waveform can be generated by thenonlinear Cout. In [24] and [25], we proposed a novel highefciency PA, saturated power amplier, taking advantage ofthe nonlinear Cout to shape the voltage waveform with theresistive fundamental load, and it is the optimized operationof the Class-J amplier. Since its waveform is similar to thatof the Class-F1, the fundamental load impedance is adjustedbetween

2Ropt to 2Ropt to achieve the highest efciency

with an acceptable output power [6]. The harmonic load haslarge tolerance because the voltage waveform is mainly shapedby the nonlinear Cout. It means that the half-sinusoidal voltagecan be generated if the second harmonic load impedanceis larger than the impedance level of the nonlinear Cout.The harmonic load impedance comparable to or less thanthe nonlinear Cout disturbs the generation of the harmonicvoltage. However, to achieve the maximum efciency, thesecond harmonic should be carefully matched to a particularimpedance.

Fig. 12 shows the simulated time-domain voltage and cur-rent waveforms and load-lines for the Class-J and saturatedampliers with nonlinear Cout. Unlike the waveforms of theClass-J amplier depicted in Fig. 7(a), the phase differencebetween the current and voltage is nearly zero due to theresistive fundamental load impedance, as shown in Fig. 13.Moreover, since the second-harmonic voltage to shape the


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0.5

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1.5

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Drain Voltage [V]

Drain Current [A]

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0

80

0.5

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Fig. 12. Simulated (a) time-domain voltage and current waveforms for thesaturated amplier and (b) load-lines for the Class-J and saturated ampliers.

half-sinusoidal voltage waveform is generated mainly by thenonlinear Cout, the second-harmonic impedance remains in thenegative resistance region. However, in the low-power regionwhere the nonlinear Cout can be regarded as a linear capacitor,the phase of the fundamental-load impedance of the saturatedamplier is not 45 while the phase of the second-harmonicis 90, so it does not provide the half-sinusoidal voltagewaveform. Fig. 14 shows the simulated efciencies for theClass-J and saturated ampliers. Since the saturated amplierhas a smaller phase mismatch between the voltage and currentcompared to the Class-J amplier, it produces a higher outputpower and efciency than the Class-J amplier.

In short, for the linear Cout, the Class-J amplier doesnot have any merit compared to the Class-B amplier withrespect to the output power and efciency because of thephase mismatch between the voltage and current waveforms.However, for the nonlinear Cout case, the Class-J amplier hasa chance to improve the performance because the nonlinearcapacitor generates harmonic-voltage components, especiallythe second-harmonic voltage component. Thus, the phasedifference can be reduced below 45. A further improvementcan be achieved by selecting a purely resistive load forthe fundamental frequency to eliminate the phase mismatchbetween the voltage and current, while maintaining the half-sinusoidal voltage waveform. This can be carried out if theexternal second-harmonic impedance is greater than the levelof the nonlinear Cout, which is a saturated PA, the furtheroptimized version of the Class-J amplier for highly efcientoperation.

Fig. 13. Fundamental and second-harmonic load impedance trajectories forthe Class-J and saturated ampliers according to the power level.

Fig. 14. Simulated efciencies of the Class-J and saturated ampliers.

III. IMPLEMENTATION AND EXPERIMENTAL RESULTS

To validate the voltage waveform shaping by the nonlinearCout and the highly efcient operation, a saturated ampli-er was designed and implemented at 2.14 GHz using aCree GaN HEMT CGH40010 package device containing aCGH60015 bare chip. Since the commercial device modelincludes packaging effects, due to bonding wires, packageleads, and parasitics, the simulation is conducted using a bare-chip model to show the inherent operation of the saturatedPA. In addition, the simulation for the implementation isconducted using the model of the packaged-device. Fig. 15shows the simulated second-harmonic load-pull contours of theoutput power and efciency when the fundamental and third-harmonic impedances are set to 18.23 + j25.15 and 0 ,respectively, at the drain pad of the bare chip. The load-pullsimulation was carried out using Agilent ADS 2008 Update 1.The device model, CGH60015 and package information, were


Fig. 15. Simulated second-harmonic load-pull contours of the output powerand efciency when the fundamental and third-harmonic impedance are setto 18.23+ j25.15 and 0 , respectively, at the drain pad of the bare chip.

Fig. 16. Simulated second-harmonic source-pull contours of the efciencywhen the fundamental source impedance is conjugate-match condition andthe output load terminations are set to the condition of the saturated PA. Thecharacteristic impedance of the smith chart is 5 .

provided by Cree Inc.. As mentioned in Section II, a highefciency and output power can be achieved when the second-harmonic load impedance is large, proving that the nonlinearCout is enough to shape the voltage to the half-sinusoidal.Since a large second-harmonic load impedance provides a highefciency, it is set to 2 + j80 . For the high efciency andoutput power operation, a fundamental-load impedance at thedependent current source is determined to be about 60 . Sincethe efciency changes a little according to the third-harmonicmatching impedance, the impedance is set to 0.

(a)

(b)

Fig. 17. Simulated (a) Vgs and (b) Vds waveforms at the marked pointson the Smith chart in Fig. 16 (A = 0 , B = 0.01 + j1.3 , C =0.01 + j2.8 , D = 0.01 j2.8 , E = 5 , and F = 100 ).

So far, the fundamental and harmonic-load impedances atthe output have been considered to achieve high power andefciency capabilities, and the fundamental input componentis conjugately matched. However, it has been observed that theinput harmonic terminations should be properly placed due tothe nonlinear input capacitor Cgs. In particular, to preservethe sinusoidal input drive at the gate, the input harmonicterminations are frequently set to be short-circuit [26], [27].On the other hand, in [10] [12], they make an effort to shapethe output voltage waveform by using the nonlinear effect ofCgs. To nd the optimum input termination for the secondharmonic, the source-pull simulation for the second harmonicis carried out, as shown in Fig. 16. During the simulation,the fundamental source impedance is conjugately matched,and the output load terminations are set to the condition ofthe saturated amplier. A simulation of source-pull for thesecond-harmonic termination indicates only a minor effect onthe efciency if the termination is not in the gray coloredregion. This result supports that the output voltage waveform ismainly shaped by the nonlinear output capacitor. Fig. 17 showsthe simulated Vgs and Vds waveforms for second harmonic


impedances at the marked points on the Smith chart in Fig. 16.Except for the points marked by A and C, the Vgs waveformsare very similar due to the harmonic voltage generation of Cgs.Not just for these points, almost regions of the smith chart,except for the gray colored part, provide the analogous Vgswaveforms. For the point marked by A, due to the short-circuitfor the second harmonic, the sinusoidal voltage is presented.In spite of the different Vgs waveforms, the output voltages atthe drain are similar shapes. Those waveforms clearly showthat the output voltage shape is not much affected by theharmonic generation of Cgs while considering the nonlinearCds. However, even though most of regions provide the sameperformance, the output power and efciency deterioratedwhen the source impedance for the second harmonic is locatedat the gray-colored region. In this region, the conduction angleof the drain current is reduced, resulting in low output powerand efciency. Therefore, in this work, the input terminationfor the second harmonic is set to the short-circuit.

Fig. 18 indicates the simulated time-domain voltagewaveform and the fundamental and second-harmonic loadimpedance trajectories according to the power level. Likethe simulation conducted in Section II-D, the half-sinusoidalvoltage waveform is achieved at the high power level wherea large amount of the second harmonic is generated bythe nonlinear Cout, so that the second-harmonic impedanceremains in the negative resistance region. For comparison, theClass-B amplier is also simulated using the same device. Toprovide the sinusoidal voltage waveform, all harmonics areshort-circuited. In addition, the fundamental-load impedanceof the Class-B PA is set to 36.5 at the maximum powerlevel to provide the full swings of the voltage and currentwaveforms. Fig. 19 shows the simulated gain and efciencycomparisons between the saturated PA and Class-B amplier.Because the load impedance of the saturated PA is larger thanthat of the Class-B amplier, the saturated PA provides highergain than the Class-Bs one in the low power region. At thehigh power level, compared with the Class-B amplier, thesaturated PA delivers the better efciency performance withcomparable output power, resulting from the second-harmonicmanipulation caused by the nonlinear Cout. In particular, themaximum efciency of the saturated PA is 81.5%, which isan improvement of 9.3%.

Fig. 20(a) shows a photograph of the designed PA imple-mented on a Taconic TLY-5 substrate with r = 2.2 andthickness of 31 mil. The detailed microstrip dimensions areshown in Fig. 20(b). In the experiment, the gate bias is setto 3.1 V (IDSQ = 94 mA) at a supplied drain voltage of30 V. Unlike the conventional high efciency PAs, any specialharmonic-loading circuit is not used in the output matching.The simulated and measured output power, efciency, andgain characteristics for a CW signal are well matched, asshown in Fig. 21. In particular, the implemented PA providesa maximum PAE of 77.3% at a saturated output power of40.6 dBm (11.5 W). Fig. 22 depicts the measured adjacentchannel leakage ratio (ACLR) and PAE for LTE signal with6.6 dB PAPR and 10 MHz signal bandwidth. The proposedPA delivers a PAE of 42.3% and a power gain of 21 dBat an average output power of 34.2 dBm (2.6 W). To val-

(a)

(b)

Fig. 18. (a) Simulated time-domain voltage waveforms of the saturated am-plier and Class-B PA. (b) Fundamental and second-harmonic load impedancetrajectories of the saturated amplier and Class-B PA according to the powerlevels.

Fig. 19. Simulated gain and efciency comparison between the saturated PAand Class-B amplier.


(a)

10pF

10pF

50Ohm

10pF

10pF

0.2pF

10uF

10uF

r=2.2,31milthickMicrostripdimension

(width/lengthinmm)

8.8/4.414.8/5.415.6/22.8

15.6/2.38 15.6/3.0

2.38/22.2

3.2/1.63.2/2.38

3.2/6.5211.2/3.3513.75/3.05

5.9/12.6

2.38/25.0

(b)

Fig. 20. (a) Photograph and (b) circuit schematic of the implemented PA.

idate potential of the proposed PA as a main block of alinear power amplier (LPA), the linearization of the PA iscarried out by employing the digital feedback predistortiontechnique (DPBPD) [28]. Fig. 23 shows the measured outputspectra before and after the linearization. The ACLR at anoffset of 7.5 MHz is 45.1 dBc, which is an improvementof 23 dB at an average output power of 34.2 dBm (2.6 W).The linearization results are summarized in Table II. Theseexperimental results clearly show that the proposed saturatedamplier can provide excellent efciency without any specialharmonic loading circuit. Moreover, by applying the lineariza-tion technique, it is well suited to be a highly efcient mainamplier of a LPA for use in a LTE transmitter.

Comparison of the performance among the designed PAwith state-of-the-art results for high-efciency is summarizedin Table III. The comparison shows the excellent performanceof the saturated PA, the optimized Class-J PA, without anyharmonic control circuitry.

IV. CONCLUSION

The operation principles of Class-J ampliers with linearand nonlinear Couts are analyzed using a simple transistormodel in an ADS simulator. The performance of the Class-J

Fig. 21. Simulated and measured (a) output power, (b) efciency and gaincharacteristics for a CW signal.

Fig. 22. Measured ACLR and PAE characteristics for an LTE signal.

TABLE IILINEARIZATION PERFORMANCE AT AN AVERAGE OUTPUT POWER OF

34.2 dBm (2.6 W) FOR LTE SIGNAL

ACLR [dBc] ACLR [dBc] PAE

at 7.5-MHz at 12.5-MHz [%]

Before Linearization 22.3 33.1 42.3

After Linearization 45.1 47.9 43.8


Fig. 23. Output spectra before and after the linearization using DFBPD.

TABLE IIISTATE-OF-THE-ART HIGH EFFICIENCY PAS USING GAN HEMT DEVICE

ABOVE 2 GHz

Referencefo* Psat VDC PAE Topoplgy

[GHz] [W] [V] [%]

[29] 2.10 11.2 50.0 79.7 Class-E

[30] 2.00 11.5 50.0 74.3 Class-E

[31] 2.00 16.5 42.5 85.5 Class-F[32] 2.10 12.0 28.0 79.6 Class-F1

[33] 2.14 7.2 28.0 68.0 HT PA[34] 2.14 12.0 40.0 74.0 Class-E

This work 2.14 11.5 30.0 77.3 Saturated PA

*fo denotes the operating frequency.HT PA denotes the harmonically tuned PA.Internal matching circuitry is optimized for the class-E.PA is fabricated using bare-chip.Performance is measured on the load-pull measurement setup.

PA with linear Cout is comparable to that of the conventionalClass-B amplier. However, due to the harmonic generationproperty of the nonlinear Cout, the half-sinusoidal voltagewaveform can be properly shaped while the phase overlap be-tween the voltage and current components are reduced below45. This allows the improvement of the efciency beyondthat of a Class-J amplier with a linear Cout. The furtheroptimization of the amplier can be carried out by adoptingthe phase difference to zero degree using the purely resis-tive fundamental load impedance. It minimizes the dissipatedpower caused by the concurrent non-zero voltage and currentwhile maintaining the half-sinusoidal voltage waveform. Sincethe voltage shaping is achieved by the nonlinear Cout, effortsto control the harmonic components are unnecessary. If theexternal harmonic load impedances are larger than the level ofthe capacitor, a highly efcient voltage waveform is obtained.This is supported by the ADS simulation using both ideal andreal models of the transistor. This is the optimized version ofClass-J PA, which is the saturated PA we have reported. Ahighly efcient saturated PA is implemented by using a CreeGaN HEMT CGH40010 device at 2.14 GHz. It provides a PAEof 77.3% and a saturated output power of 40.6 dBm (11.5 W)

without any special harmonic loading network.

ACKNOWLEDGEMENT

The authors would like to thank Cree Inc. for providing theGaN HEMT transistors and models used in this work.

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Junghwan Moon (S07) received the B.S. degreein electrical and computer engineering from theUniversity of Seoul, Seoul, Korea, in 2006 andis currently working toward the Ph.D. degree atthe Pohang University of Science and Technology(POSTECH), Pohang, Gyungbuk, Korea.

His current research interests include highly linearand efcient RF PA design, memory-effect com-pensation techniques, digital predistortion (DPD)techniques, and wideband RF PA design.

Mr. Moon was the recipient of the Highest Ef-ciency Award at Student High-Efciency Power Amplier Design Competitionin IEEE MTT-S International Microwave Symposium (IMS), 2008.

Jungjoon Kim received the B.S. degree in electri-cal engineering from Han-Yang University, Ansan,Korea, in 2007, and the Master degree in electricalengineering from the Pohang University of Scienceand Technology (POSTECH), Pohang, Gyungbuk,Korea, in 2009. He is currently working toward thePh.D. degree at the POSTECH, Pohang, Gyungbuk,Korea.

His current research interests include RF PA de-sign and supply modulator design for highly efcienttransmitter system.

Bumman Kim (M78-SM97-F07) received thePh.D. degree in electrical engineering from CarnegieMellon University, Pittsburgh, PA, in 1979.

From 1978 to 1981, he was engaged in ber-opticnetwork component research with GTE LaboratoriesInc. In 1981, he joined the Central Research Labo-ratories, Texas Instruments Incorporated, where hewas involved in development of GaAs power eld-effect transistors (FETs) and monolithic microwaveintegrated circuits (MMICs). He has developed alarge-signal model of a power FET, dual-gate FETs

for gain control, high-power distributed ampliers, and various millimeter-wave MMICs. In 1989, he joined the Pohang University of Science andTechnology (POSTECH), Pohang, Gyungbuk, Korea, where he is a POSTECHFellow and a Namko Professor with the Department of Electrical Engineering,and Director of the Microwave Application Research Center, where he isinvolved in device and circuit technology for RF integrated circuits (RFICs).He has authored over 300 technical papers.

Prof. Kim is a member of the Korean Academy of Science and Tech-nology and the National Academy of Engineering of Korea. He was anassociate editor for the IEEE TRANSACTIONS ON MICROWAVE THEORY ANDTECHNIQUES, a Distinguished Lecturer of the IEEE Microwave Theory andTechniques Society (IEEE MTT-S), and an AdCom member.

Investigation of a Class J Power Amplifier With a Nonlinear Cout for Optimized Operation

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