Inverse e-beam lithography on photomask for computational...

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Inverse e-beam lithography on photomask for computational lithography Jin Choi Ji Soong Park In Kyun Shin Chan-Uk Jeon Downloaded From: http://nanolithography.spiedigitallibrary.org/ on 04/09/2014 Terms of Use: http://spiedl.org/terms

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Inverse e-beam lithography onphotomask for computationallithography

Jin ChoiJi Soong ParkIn Kyun ShinChan-Uk Jeon

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Inverse e-beam lithography on photomask forcomputational lithography

Jin ChoiJi Soong ParkIn Kyun ShinChan-Uk JeonSamsung Electronics Co., Ltd.San #16 Banwol-DongHwasung City, Gyeonggi-Do 446-711 Republic of

KoreaE-mail: [email protected]

Abstract. Computational lithography, e.g., inverse lithography technique(ILT) and source mask optimization, is considered necessary for the“extremely low k1” lithography process of sub-20 nm device node. Theideal design of a curvilinear mask for computational lithography requiresmany changes during photomask fabrication. These range from prepara-tion of the mask data to measurement and inspection. The manufacturabil-ity of a photomask for computational lithography is linked to predictableand manageable quality of patterning. Here, we have proposed the useof “inverse e-beam lithography” on photomask for computational lithogra-phy, which overcomes the patterning accuracy limits of conventionale-beam lithography. Furthermore, the preferred target design for ILT, anew verification method, and the accuracy required for the mask modelare also discussed; with consideration of acceptable writing time(<24 h) and computing power. © 2014 Society of Photo-Optical InstrumentationEngineers (SPIE) [DOI: 10.1117/1.JMM.13.1.011003]

Subject terms: photomask; lithography; inverse lithography technique; model-basedfracturing.

Paper 13102SSP received Jun. 24, 2013; revised manuscript received Sep. 1,2013; accepted for publication Oct. 1, 2013; published online Dec. 2, 2013.

1 IntroductionThe patterning resolution of a lithography process is gov-erned roughly by this well-known formula, i.e., theRayleigh equation:

CD ¼ pitch

2¼ k1

λ

NA; (1)

where CD is the critical dimension of pattern which corre-sponds to the half pitch in case of 1∶1 line and space pattern,λ is the wavelength of light, and NA is the numerical apertureof the projection optics for lithography. According to Eq. (1),smaller resolution can be achieved by smaller λ and higherNA. Here, the value of k1 is defined by Eq. (1) and this valuerepresents the contrast of the aerial image and the difficultyof fabrication.

Given Eq. (1), the process margin for wafer patterning canbe understood to decrease as the pitch of the device decreases.To overcome this limit in the patterning process, several can-didate lithography techniques have been proposed, e.g., multi-ple patterning technology, extreme ultraviolet lithography(EUV) lithography, and computational lithography.

Among these, computational lithography techniques, suchas inverse lithography technique (ILT) and source mask opti-mization (SMO), have been attractive because they do notrequire additional processing, nor are they expensive, if opticalproximity correction (OPC) can obtain an accurate inverse sol-ution, and the photomask can be written accurately.

2 Tradeoff Between Mask Writing Time and DesignComplexity

Figures 1 and 2 show that the ILT design is based on theinverse ideal solution for the desired wafer target, and the

depth of focus can be two times wider than that for conven-tional OPC design.1

By convention, the photomask for a high-end device isusually manufactured by an e-beam writer with a variableshaped beam (VSB) mode because this enables high-speed writing and fine pattern resolution. Because VSBmode can generate only one rectangular or triangular beamper shot, we can understand that the ILT design has a specialmeaning in the manufacture of masks. As shown in Fig. 1,the ILT mask design is composed of rounded or angled pat-terns, a large number of assist features, and small assist pat-terns. The rounded or angled patterns of ILT designs must befinely segmented by fracturing steps, so that the number ofshots required spikes sharply.

The total writing time needed by the VSB mask writer iscalculated by Eq. (2), based on factors including current den-sity, dose, and the number of shots, among others.

Mask writing time ¼ NS × NP ×�

DNP × J

þ ts

�þ to; (2)

where NS is the number of shots, NP is the number of pass inmultiple writing,D is the e-beam dose in the unit of uC∕cm2,J is the current density in A∕cm2, ts is the settling time ofdeflector in the unit of ns, and to is the overhead time (e.g.,stage movement).

Here, we introduce “shot complexity” (S), which reducesEq. (2) to a simpler form.2

S ¼ ðNI∕NRÞ × ðn∕0.5Þ (3)

Mask writing time ¼ fTN × ðNI∕NRÞ × ðn∕0.5Þg þ to

¼ ðTN × SÞ þ to; (4)

where TN is the normal writing time at reference design, NI

is the average shot count for the areas of interest in mask, NR0091-3286/2014/$25.00 © 2014 SPIE

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is the average shot count of reference design in unit area, andn is the average pattern density of the design. Here, the refer-ence design corresponds to net lines with 50% patterndensity.

The shot complexity S is defined by the average shotcount of the design-of-interest with respect to the 50% netline, and we also added the effect of pattern density, n.

The scanning electron microscope (SEM) images in Fig. 3show examples on the shot complexities of ILT designs forcontact printing on wafers. Based on Eq. (4), the total maskwriting time becomes the function of shot complexity andwriter specifications. In the case of 100 A∕cm2 current den-sity, and 70 ns settling time, Fig. 4 shows that the mask writ-ing time for a 15-nm device node becomes about 40 h at ashot complexity of 4.

For a current density of 800 A∕cm2, the writing timedecreases to <24 h. This means that a shot complexity of12 is acceptable and that the complex ILT mask can be real-ized. However, if the pattern density is considered, we cansee that the mask writing is still a big problem for manufac-ture of ILT photomask (Fig. 5).

3 Model-Based FracturingRecently, many electronic design automation companies thathandle mask data, and some institutes, have proposed data-handling techniques that reduce the number of shots by anefficient fracturing method.3 Here, we will call that technol-ogy “model-based fracturing,” simply as MBF.

Based on MBF, we have confirmed that the ideal curvi-linear pattern can be optimized from a shot complexity of23.6 to 9.9 using overlapping shots, as in Fig. 6, and thatthey have nearly the same patterning performance for maskand on wafer. The reduction in the number of shots by over-lapping them is based on the change of rounding at the cor-ners of the pattern, as shown in Fig. 7.

Since the MBF is a totally different approach from con-ventional data fracturing, there are many issues to beresolved for the realization of that technology. The big prob-lems for MBF are how to convert the design target, how toobtain accurate patterns, and how to guarantee the quality ofthe converted result. Conventional fracturing can be verifiedusing an XOR Boolean operation. However, the design dataof MBF is generated and optimized, rather than fractured, bytargeting the desired mask or wafer pattern. Furthermore,small edge error of high spatial frequency should be acceptedfor the tolerance of the shot optimization.4

3.1 Data Flow for MBF

Given this background, we herein propose a new data flowfor MBF (Fig. 8). The conventional data flow for mask writ-ing is straightforward. Computer aided design (CAD) data isprocessed by OPC and OPC verification. Then, after OPC,the design is fractured for e-beam writing and verified byXOR step.

Fig. 1 Mask design of the inverse lithography technique (ILT) and conventional optical proximity correction (OPC) for contact printing in wafer.

Fig. 2 Benefit of the ILT in view point of depth of focus.

Fig. 3 Shot complexity and SEM image of the ILT design for contact printing. (a) S ¼ 17, (b) S ¼ 8.8, (c) S ¼ 6.3, and (d) S ¼ 1.3.

Fig. 4 Mask writing time according to half pitch of device and shotcomplexity (S).

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The new, alternative, MBF should use a different dataflow. First, an accurate mask model should be preparedfor MBF. Then, the result optimized by MBF should be veri-fied. We have named this verification step “model-based pat-tern verification” (MPV). The result of the manufacturedmask should be checked by measurement and inspection,and the information should be fed back into the maskmodel and the MBF step. To use the MBF efficiently, theinefficiency information of the MBF should be transferredto the OPC, and the OPC verification step.

3.2 Techniques to Overcome the Resolution Limit ofVSB Writing

When using an energy beam for lithography, whether of pho-tons or electrons, the number of energy quanta is the mostfundamental parameter to determine the limit of patterningresolution or accuracy. Figure 9 shows the number of energyquanta in a 30 × 30 × 100 nm3 volume, for ArF, EUV, and e-beam lithography. Compared with ArF or EUV lithography,e-beam lithography has more limited number of electrons inthe same volume. In the case of a 10 uC∕cm2 dose, with a

Fig. 5 Mask writing time according to (a) shot complexity, S, and (b) pattern density, n.

Fig. 6 Shot number reduction by model-based fracturing (MBF) technique.

Fig. 7 Effect of overlap shot at pattern corner.

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resist height of 100 nm and area of 1 × 1 nm2; there are just0.6 electrons. Based on the Monte Carlo simulation, we haveestimated the limit of local CD uniformity (LCDU) accord-ing to the resist blur and the electron dose. Figure 10 showsthat a high dose is necessary if the LCDU of “sub-1 nm” isrequired. However, the electron dose cannot be increased dueto the limit on writing time during manufacture. This limit onthe electron dose creates fidelity error in the photomask pat-tern (Fig. 11) and results in a limit to the minimum assistfeature allowed in photomask design for computationallithography; that means the limit of margin improvement.In 2012, an idea for improvement of resolution in ILT designwas proposed by our group. By using overlapping shots atthe design edges and corners, we have obtained improvedpatterning resolution,5 as shown in Figs. 12 and 13.

3.3 Inverse e-Beam Lithography

We have extended the basic concept for margin improvementdue to additional dose into “inverse e-beam lithography”(IEL). We have compared IEL with conventional VSB writ-ing based on the following calculations, which describe themask patterning process as a linear system valid forconvolution.

Conventional VSB writing corresponds to the convolu-tion between VSB shot data and mask model at the intensitythreshold of Ith

fVSBðx; yÞ ⊗ Mðx; yÞgI¼Ith ; (5)

where VSBðx; yÞ is the e-beam data and Mðx; yÞ is the maskmodel when the mask patterning is approximated as a linearsystem.

The inverse e-beam lithography can be described by thefollowing equation:

Lðx; yÞ ¼�XNn¼1

fWn · Gnðx; yÞg ⊗ Mðx; yÞ�I¼Ith

; (6)

Fig. 8 Proposed data flow of MBF and model-based pattern verifica-tion (MPV) for the ILT photomask.

Fig. 9 Number of energy quanta in (a) ArF lithography, (b) EUV lithography, and (c) e-beam lithography.

Fig. 10 Local CD uniformity according to the resist blur and the dosefor e-beam lithography.

Fig. 11 (a) Intensity profile of rectangle pattern, (b) gradient distribu-tion of intensity, and (c) SEM image of photomask pattern.

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where Gnðx; yÞ is the plural shot data, and Wn is the weight-ing factor for Gnðx; yÞ and the index n represents the addi-tional shot information when n is larger than 1. As for theinverse lithography, the inverse e-beam lithography uses theoptimized Gnðx; yÞ and Wn. The Gnðx; yÞ and Wn areobtained by minimization of the error function and maximi-zation of the margin, as in

Error function; E ¼ jFðx; yÞ − Lðx; yÞj;Margin; M ¼ ∇Lðx; yÞ (7)

and

Condition ofW∶ MinðEÞ&MaxðMÞ; (8)

where Fðx; yÞ is the target contour of the mask. This shouldbe determined after considering the mask process and thedesign size.

Figure 14 shows the data flow for inverse e-beam lithog-raphy. First, the photomask design for computational lithog-raphy is processed in a step which detects the weak point bymodeling or rule. After defining the target contour and mar-gins, the e-beam shot data is optimized by iterative calcula-tion for the inverse solution. This step corresponds to theminimization of error function, E. Last, the optimizedshot data is checked by MPV. We have confirmed experi-mentally that the data flow for inverse e-beam lithographyis valid and its benefits are clear (Fig. 15). Furthermore,

this inverse e-beam lithography can be applied not onlyfor VSB writing of a single beam but also for gray writingof multibeam mask writer.

3.4 Issues on Manufacture of Photomask forComputational Lithography

According to the data flow shown in Figs. 8 and 14, webelieve that there are four items that need further develop-ment to improve the manufacturability of ILT masks, eventhough the patterning accuracy and minimum resolutionare improved by use of inverse e-beam lithography.6 Forthe ILT mask, this is consideration of the best choice ofthe mask design: segmented or ideal diagonal. Second,while we accept a reasonable edge placement error (EPE)for the number of shots to decrease, how can the MBF resultbe verified with satisfactory accuracy? Third, MBF andMPVare based on prediction of the mask pattern using a mask

Fig. 12 Simulation results on (a) pattern edge or corner of rectangle pattern by (b) additional dose allocation to obtain (c) improved patterningquality.

Fig. 13 Intensity profile and mask contour of rectangle pattern in caseof (a) conventional VSB writing and (b) overlap shot writing at patternedge or corner.

Fig. 14 Data flow for “inverse e-beam lithography.”

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model; therefore, the model accuracy and its range of cover-age should be considered. Last, since the ILT design requiresprocessing a high volume of data, the computing powerneeded for MBF and MPV of full chip should also beconsidered.

3.5 Practical Approach for the Manufacture of ILTPhotomask

Initially, we compared the accuracy of segmented and idealdiagonal designs as the targets of the MBF for ILT masks.The convolution calculation, explained in Fig. 16, provesthat the ideal target design has smaller patterning errordue to the mask model error, than the segmented diago-nal does.

Second, we considered how to verify the MBF data con-verted from an ideal diagonal design based on patterningresult in the photomask. As for the conventional mask proc-ess, design data is converted by mask-data-preparation soft-ware, but a special verification algorithm should be addedfor mask plane and wafer plane verifications (Fig. 17).The e-beam data obtained is used for mask writing and

Fig. 15 SEM images of the ILT photomask by (a) conventional VSBwriting and (b) improvement by overlap shot.

Fig. 16 Patterning error comparison between a segmented design and an ideal curvilinear design.

Fig. 17 Process flow for the ILT mask manufacturing.

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the mask-pattern quality is checked by SEM measurementand inspection tools. Here, we propose aerial image simula-tion in mask scale as a new verification method of the MBFresult for ILT masks. Since the criteria for determining EPEbecome ambiguous in MBF due to the patterning tolerancefor shot optimization, we used aerial image simulation forverification. Compared with the aerial image simulation atwafer scale, an aerial image simulation at mask scale is ofhigher sensitivity. If the aerial image difference is definedas AID (Fig. 18), we can obtain mask scale simulationthat is of about 40% greater sensitivity.

Since the MBF and the MPV are based on model accu-racy, the required accuracy and the effect of model error havebeen considered. If the mask model is assumed to be multipleGaussian functions, and the mask patterning process is a lin-ear system, the patterning effect due to mask model errorgives rise to size error at corners and edges, according tothe relation between pattern shape and interaction rangeof model (Fig. 19). For a specific pattern of the ILT design,we obtained model sensitivity of CD error due to model errorthat was about 0.5 nm per 3% model error.

Now, consider the manufacturing potential of ILT masksin relation to allowable manufacturing area and requirementsfor the future. Considering the writing time (<24 h) and com-putation limit on convolution, there is a limit to the area of

Fig. 18 Advantage of mask scale aerial image simulation.

Fig. 19 Effect on mask pattern simulation due to mask model error.

Fig. 20 (a) Allowable maximum shot complexity corresponding to 24-h writing time and (b) estimated computation time for MBF or MPV.

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application when using current ILT manufacturing proc-esses. In Fig. 20(a), the x-axis and y-axis show the patterndensity and allowable maximum shot complexity, respec-tively. After calculation of the writing time, the dot graphin Fig. 20(a) represents 24 h of writing time. Because ILTdesign uses high-shot complexity, the pattern density canreaches the allowable maximum. Here, the pattern densityis defined by the pattern area divided by the total area.On the other hand, the MBF and MPV are based on convo-lution calculations involving pattern designs and the maskmodel. Considering the computation time for convolution,we can see that the allowable pattern area also exists in atheoretical maximum. This means the total area of ILT appli-cation, on a full chip, is limited. To increase the applicationarea on a full chip, a high-throughput writer and computationmethod for full chip should be developed.

4 ConclusionsComputational lithography techniques have many benefits,e.g., improvement of the margin during the wafer patterningprocess. However, there is tradeoff relation between maskwriting time and design complexity. Here, for the manufac-ture of ILT masks, we have proposed a new data flow whichcovers the preferred target design for the ILT, a new verifi-cation method, the accuracy required of the mask model,and a method to improve patterning resolution (i.e., inversee-beam lithography). Furthermore, considering acceptable

writing time (<24 h) and computation limits on convolution,the current ILT mask is shown to have a limited area of appli-cation. Based on these, a high-throughput writer and a com-putation method for high-volume data should be developedfor ILT manufacture of full chip designs.

References

1. B. G. Kim et. al., “Trade-off between lithographic performance andmask cost of masks made by inverse lithography technology,” Proc.SPIE 7379, 73791M (2009).

2. Jin Choi et al., “E-beam shot count estimation at 32 nm HP andbeyond,” Proc. SPIE 7379, 737917 (2009).

3. G. S. Chua et al., “Optimization of mask shot count using MB-MDP andlithography simulation,” Proc. SPIE 8166, 816632 (2011).

4. H. Tanabe et. al., “LER transfer from a mask to wafers,” Proc. SPIE6607, 66071H (2007).

5. B. G. Kim et. al., “Improving CD uniformity using MB-MDP for 14 nmnode and beyond,” Proc. SPIE 8522, 852205 (2012).

6. J. Choi et. al., “Manufacturability of computation lithography mask:current limit and requirements for sub-20 nm node,” Proc. SPIE8683, 86830L (2013).

Jin Choi joined Samsung Electronics Company in 2006 and he hasbeen engaged in e-beam engineering projects. Currently, he is a prin-cipal engineer related to e-beam lithography on the photomask devel-opment team of Samsung semiconductor research center. Hereceived his BS degree in physics from Korea University and hisPhD degree in optical system design from Korea AdvancedInstitute of Science and Technology in 1999 and 2006, respectively.

Biographies of the other authors are not available.

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