Introduction to Microeletromechanical Systems (MEMS) · Electroplating • Plating processes use...

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Texas Christian University Department of Engineering Ed Kolesar

Introduction toMicroeletromechanical Systems

(MEMS)

Lecture 3 Topics• MEMS Fabrication Techniques• Review of the Si Crystal Lattice• Review of Wet Etching• Dry Etching• Plasma Etching• Reactive Ion Etching• Additive Processes• Sacrificial Processes


MEMS Fabrication Techniques

• Dry EtchingVapor PhasePlasmaRIE

• Additive ProcessesCVDSputteringElectroplating

Sacrificial LayersLift-offWet Release Issues

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• Unit Cell: most basic structural element in a crystal, repeated regularly over all three dimensions

• IV group elements: Diamond Lattice

Review Of The Si Crystal Lattice

(Figures: Campbell, 1996.)


Review Of The Si Crystal Lattice

Notation: (100) particular crystal plane{100} all equivalent planes: (100), (010), (001) in cubic lattice[100] direction normal to crystal plane

Wafer characterization: in 100 wafer, 100 plane is parallel to the wafer surface

Several useful Internet WEB sites for visualization of Si crystals• ostc.physics.uiowa.edu/~wkchan/SOLIDSTATE/CRYSTAL• et.nmsu.edu/ETCLASSES/vlsi/files/CRYSTAL.HTM• www.izzy.net/~jc/CrystalGallery/crystalgallery.html• stm2.nrl.navy.mil/~lwhitman/Projects.html#sisum

Location of atoms in various planes of the diamond lattice.

Figures: [email protected] (1996)

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Review Of Wet Etching

Figure: G. Kovacs, 1996.


Review Of Wet EtchingAnisotropic Wet Etching:• Convex corners are

undercut• Concave corners stop at

[111] intersections

Figures: G. Kovacs, 1996.

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Dry Etching

Overview• Vapor Phase Etch:

Use of reactive gasesNo drying necessary

• Plasma Etch:RF energy generates reactive ions and free radicalsNo high temperatures required (250°C down to room temperature)

• Reactive Ion Enhanced (RIE) Etch:Higher energy ionsHigher anisotropy


Vapor Phase EtchXeF2 Isotropic Silicon Etch

Simple setupDoes not attack:

- Silicon oxide- Silicon nitride- Metals- Photoresist

• Basic reaction:2XeF2 + Si → 2Xe +SiF4

• Caveat:2XeF2+2H2O → Xe2+4HF+2O2exothermic!

Hoffman et al., 1995 (UCLA)


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XeF2 Isotropic Silicon Etch• Post processing for

standard CMOS• Suspended and 3D structures• Fold-up structures with

conducting Al hinges

Storment et al., JMEMS 1994 (Stanford)Tahhan et al., SPIE 1999 (UC Berkeley)


Plasma Etch• RF energy drives etching reaction: accelerates stray

electrons between pair of plates in low pressure gas

• Electrons generate reactive ions and free radicals (e.g., monoatomic fluorine)

• Substrate surface is bombarded with reactive ions (physical and chemical etching)

• Si or other materials are etched by forming volatile components

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Plasma Etch

• RIE allows higher ion energies: higher etch rates, higher anisotropy



Reactive Ion Etch• Often, multiple etching and deposition reactions take

place simultaneously and reach equilibrium

• Example:High concentration SF6 etches SiLow concentration O2 removes resputtered photoresist but also forms SiO2 and polymeric filmsCHF3 removes oxide and polymers

• Selection of etch parameters (concentration, pressure, RF power, bias, …) gives (limited) control over anisotropy, selectivity, etch rate, surface roughness

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Reactive Ion EtchSCREAM

(Single Crystal Reactive Etching And Metallization)

• Multiple anisotropic and isotropic dry etches

• Low temperature etching and deposition

Zhang et al., 1993 (Cornell) Figure: G. Kovacs, 1996.


Reactive Ion Etch

RIE postprocessing of CMOS to release thin film structures(Fedder et al. 1996)


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Deep RIE“Bosch Process” (Patent: Lärmer & Schilp, 1994)

• Idea: alternate between etching and thin film deposition that protects sidewalls but is removed in trenches

• Etching phase: SF6 / Ar• Polymerization phase: CHF3 (or C4F8/SF6) / Ar forms

Teflon-like polymer layer• Ion bombardment can prevent formation of polymer

on horizontal surfaces• Several DRIE systems are on the market (after only 5

years!): STS, Plasma Therm, Oxford Instruments, Trion


Deep RIE Examples

Ayon et al., 1998 (MIT)

Klaassen et al., 1995 (Stanford)

STS 1999

20µm

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Additive Processes• Formation of films on surface of substrate

(“surface micromachining”)• Structural layers• Sacrificial layers (spacers to be removed later)

Wide Variety Of Techniques:• Oxidation of Si• CVD, PECVD• Evaporation• Sputtering• Epitaxial growth• Molding


Chemical Vapor Deposition

• CVD uses thermal energy to drive reactions that deposit thin films on substrate surface

• PECVD (Plasma Enhanced CVD) substitutes thermal energy (partially) by RF energy: greater control over stresses and other film properties

• Note analogy to Plasma Etching, RIE etching• Commonly deposited thin films with PECVD:

SiO2, Si3N4, SiC, poly-Si

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Epitaxial Growth

• SCS grows selectively on exposed Si surfaces• 2H2 + SiCl4 → Si + 4HCl (hydrogen reduction)• SiH4 → Si + 2H2 (pyrolysis)



Electroplating• Plating processes use the reduction of metal ions in solution to

form solid metal• Many metals and alloys (Au, Ag, Cu, Hg, Ni, Pt, Permalloy

[NiFe], …)

• Electroplating uses electrical current to drive the reduction• Electroless plating uses reducing agents to drive metal

deposition

• Pulsing the electroplating current allows to replenish reactants(stress control, control over morphology, etc., possible)

• Under diffusion-limited conditions, amorphous metal layers can be plated (very high surface areas, e.g., “platinum black”)

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ElectroplatingFastest growing crystal planes disappear

Note analogy to anisotropic etching

Figure: G. Kovacs, 1996,after Bockris, Reddy, 1970.


Evaporation And SputteringEvaporation of metals by

Heating (thermal evaporation)Bombardment with electron beam (e-beam evaporation)

Sputtering: bombardment of target with inert ions (Ar+)MetalsSiCompoundsDielectrics

Better stress control


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Sputtering vs. Evaporation

Geometry of evaporation and sputtering chambers (as well as electromagnetic fields) determine directionality of deposition:

Good or bad step coverage (can be advantage or disadvantage) Figure: G. Kovacs, 1996.


Shadowing

• Directionality of evaporation can be exploited to form features smaller than the lithographic resolution


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Sub-Resolution Feature Sizes

How can we build structures that are smaller than the resolution of our lithography equipment?


Sacrificial Layers• Frequent goal in MEMS: released, movable structures• Concept: use spacer layers as temporary support

between structural materials• Commonly used sacrificial layers:

SiO2 (etched with HF)Photoresist (etched with acetone, O2 plasma)Others

• Example: SiO2 in multi-layer polysilicon structures


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Sealed Cavity FormationMore complex

example for sacrificial layers:

• Form cavity with SiO2 layer

• Removal of sacrificial layer

• Reactive sealing



Sacrificial Layer In Electroplating

• Note: requires sufficient step coverage, otherwise…


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Removal of deposited thin film (usually metal) without etching:

Positive resist: Negative resist:

Lift-Off Process

Substrate

resist resist

Substrate

Substrate Substrate

Lift-Off


Wet Release IssuesAttractive Forces Between

Surfaces:• Electrostatic forces• Surface tension• Hydrophilic surfaces:

hydrogen bonds (attraction between a hydrogen atom of one molecule and a pair of unshared electrons of another molecule)

• Hydrophobic surfaces: van der Waals forces (attractive and repulsive electrostatic dipole-dipole interactions between molecules)


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Critical Point Drying• Adhesion forces during wet release can be a major

problem. Possible solutions:• Geometric surface modification

(dimples)• Chemical surface modification• Sublimation methods

• Critical point drying:CO2: 25°C at 1200psi (liquid)

35°C at 1200psi (supercritical)gas is then removed Figure: G. Kovacs, 1996, after

Mulhern et al., 1993.

Introduction to Microeletromechanical Systems (MEMS) · Electroplating • Plating processes use...

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