Introduction to Formal Equivalence Verification (FEV) Erik Seligman CS 510, Lecture 4, January 2009.
-
Upload
william-hoosier -
Category
Documents
-
view
257 -
download
5
Transcript of Introduction to Formal Equivalence Verification (FEV) Erik Seligman CS 510, Lecture 4, January 2009.
![Page 1: Introduction to Formal Equivalence Verification (FEV) Erik Seligman CS 510, Lecture 4, January 2009.](https://reader035.fdocuments.net/reader035/viewer/2022081718/551bd41b550346b4588b566f/html5/thumbnails/1.jpg)
Introduction to Formal Equivalence Verification (FEV)
Erik Seligman
CS 510, Lecture 4, January 2009
![Page 2: Introduction to Formal Equivalence Verification (FEV) Erik Seligman CS 510, Lecture 4, January 2009.](https://reader035.fdocuments.net/reader035/viewer/2022081718/551bd41b550346b4588b566f/html5/thumbnails/2.jpg)
Goals
Introduce basic concepts of FEV Enable you to try FEV using Cadence
Conformal Examine some corner cases
![Page 3: Introduction to Formal Equivalence Verification (FEV) Erik Seligman CS 510, Lecture 4, January 2009.](https://reader035.fdocuments.net/reader035/viewer/2022081718/551bd41b550346b4588b566f/html5/thumbnails/3.jpg)
FEV: The Basic Concepts
![Page 4: Introduction to Formal Equivalence Verification (FEV) Erik Seligman CS 510, Lecture 4, January 2009.](https://reader035.fdocuments.net/reader035/viewer/2022081718/551bd41b550346b4588b566f/html5/thumbnails/4.jpg)
What Is FEV? Best-established form of FV
• Other names: Equivalence Checking
Answers: Are two models equivalent?
![Page 5: Introduction to Formal Equivalence Verification (FEV) Erik Seligman CS 510, Lecture 4, January 2009.](https://reader035.fdocuments.net/reader035/viewer/2022081718/551bd41b550346b4588b566f/html5/thumbnails/5.jpg)
Main Uses of FEV
RTL-Netlist equivalence• Essential part of design flows
• Also leveraged for late hand edits (ECOs)
Verifying quick changes to a model• Fast & easy if model almost the same
![Page 6: Introduction to Formal Equivalence Verification (FEV) Erik Seligman CS 510, Lecture 4, January 2009.](https://reader035.fdocuments.net/reader035/viewer/2022081718/551bd41b550346b4588b566f/html5/thumbnails/6.jpg)
Types of FEV Combinatorial / Synchronous
• Models must be (mostly) state-matching• Very efficient due to no time calculations• Works very well for synthesized netlists
– Most synthesis tools expect this
• Cadence Conformal is leader– Others: Synopsys Formality, Magma Quartz
Sequential• Allows more abstract RTL, or HLM-RTL FEV• More flexibility for late netlist timing edits• Much more risk/expense• Few commercial tools (Calypto, NEC)
![Page 7: Introduction to Formal Equivalence Verification (FEV) Erik Seligman CS 510, Lecture 4, January 2009.](https://reader035.fdocuments.net/reader035/viewer/2022081718/551bd41b550346b4588b566f/html5/thumbnails/7.jpg)
State-Matching FEV
![Page 8: Introduction to Formal Equivalence Verification (FEV) Erik Seligman CS 510, Lecture 4, January 2009.](https://reader035.fdocuments.net/reader035/viewer/2022081718/551bd41b550346b4588b566f/html5/thumbnails/8.jpg)
Are these equivalent?
![Page 9: Introduction to Formal Equivalence Verification (FEV) Erik Seligman CS 510, Lecture 4, January 2009.](https://reader035.fdocuments.net/reader035/viewer/2022081718/551bd41b550346b4588b566f/html5/thumbnails/9.jpg)
Step 1: Map key points
Inputs?- Match. Outputs? Match.
States? f1->f3, f2->f4
![Page 10: Introduction to Formal Equivalence Verification (FEV) Erik Seligman CS 510, Lecture 4, January 2009.](https://reader035.fdocuments.net/reader035/viewer/2022081718/551bd41b550346b4588b566f/html5/thumbnails/10.jpg)
Step 2: Build Equations
f3 = b, f4 = f3, out = !(a&f4)
f3=b, f4 = !(!f3), out = !a | !f4
![Page 11: Introduction to Formal Equivalence Verification (FEV) Erik Seligman CS 510, Lecture 4, January 2009.](https://reader035.fdocuments.net/reader035/viewer/2022081718/551bd41b550346b4588b566f/html5/thumbnails/11.jpg)
Step 3: Compare Equations
f3 = b b EQUALf4 = f3 !(!f3) EQUALout = !(a&f4) !a | !f4 EQUAL
![Page 12: Introduction to Formal Equivalence Verification (FEV) Erik Seligman CS 510, Lecture 4, January 2009.](https://reader035.fdocuments.net/reader035/viewer/2022081718/551bd41b550346b4588b566f/html5/thumbnails/12.jpg)
What if there was an error?
f3 = b b EQUALf4 = f3 !f3 DIFFERout = !(a&f4) !a | !f4 EQUAL
![Page 13: Introduction to Formal Equivalence Verification (FEV) Erik Seligman CS 510, Lecture 4, January 2009.](https://reader035.fdocuments.net/reader035/viewer/2022081718/551bd41b550346b4588b566f/html5/thumbnails/13.jpg)
Debugging: Where To Look
Fanin cones (“support set”)• Different fanin major issue
Set of counterexample values• If only specific values cause cex, provides
hint of root cause
“Intelligent” hints from tools• Is an overall inversion suspected?
• Identify similar areas of logic within cone?– Isolate error
![Page 14: Introduction to Formal Equivalence Verification (FEV) Erik Seligman CS 510, Lecture 4, January 2009.](https://reader035.fdocuments.net/reader035/viewer/2022081718/551bd41b550346b4588b566f/html5/thumbnails/14.jpg)
Debug Schematic View
Combinational other logic irrelevant
Good tools provide annotated cex value
![Page 15: Introduction to Formal Equivalence Verification (FEV) Erik Seligman CS 510, Lecture 4, January 2009.](https://reader035.fdocuments.net/reader035/viewer/2022081718/551bd41b550346b4588b566f/html5/thumbnails/15.jpg)
Introduction To Conformal
![Page 16: Introduction to Formal Equivalence Verification (FEV) Erik Seligman CS 510, Lecture 4, January 2009.](https://reader035.fdocuments.net/reader035/viewer/2022081718/551bd41b550346b4588b566f/html5/thumbnails/16.jpg)
Conformal Terminology
Gold = golden model (often RTL) Rev = revised model (often netlist)
• Many commands have –gold/-rev option Key Point = points to map
• Basic ones: primary inputs/outputs, states
• Others: blackboxes, dangling (Z) nodes, …
• Can refer to by name or integer ID
Support Set = fanin cone
![Page 17: Introduction to Formal Equivalence Verification (FEV) Erik Seligman CS 510, Lecture 4, January 2009.](https://reader035.fdocuments.net/reader035/viewer/2022081718/551bd41b550346b4588b566f/html5/thumbnails/17.jpg)
Conformal Modes
Setup Mode: initial state• Can load models, assign renaming rules
• Can set various global options
• Return to this mode: “set sys mode setup”
LEC Mode: checking state• Transition with “set sys mode lec”
– Automatically tries to map key points
• Models have been loaded, can compare
![Page 18: Introduction to Formal Equivalence Verification (FEV) Erik Seligman CS 510, Lecture 4, January 2009.](https://reader035.fdocuments.net/reader035/viewer/2022081718/551bd41b550346b4588b566f/html5/thumbnails/18.jpg)
Conformal Usage Model
Based on command console• Startup with “LEC –nogui”
• Capable of taking general tcl scripts
“help” available for any command• Example: “help read design”
• Full manuals in /pkgs/cadence6/CONFRML71/doc
“set log file <filename>” to start logging • Always do this for homework!
“set gui on” / “set gui off” can be done any time “dofile <filename>.do” to execute script
• Script = any set of console commands
![Page 19: Introduction to Formal Equivalence Verification (FEV) Erik Seligman CS 510, Lecture 4, January 2009.](https://reader035.fdocuments.net/reader035/viewer/2022081718/551bd41b550346b4588b566f/html5/thumbnails/19.jpg)
Mapping Key Points
LEC has good automapper• Can guess many mappings
• But sometimes fails
View mapping as “renaming”• Temporarily rename RTL sig to match netlist
• “add renaming rule” to specify mappings– Or “add mapped point” in LEC mode
![Page 20: Introduction to Formal Equivalence Verification (FEV) Erik Seligman CS 510, Lecture 4, January 2009.](https://reader035.fdocuments.net/reader035/viewer/2022081718/551bd41b550346b4588b566f/html5/thumbnails/20.jpg)
Skeleton LEC Dofile
set log file lec.log –replaceread design –systemverilog –gold –f myrtl.filelist
read design –systemverilog –rev –f mynetlist.filelist
add renaming rule r1 foo bar –goldset sys mode lecreport unmapped pointsadd compare points –allcomparereport compare data
![Page 21: Introduction to Formal Equivalence Verification (FEV) Erik Seligman CS 510, Lecture 4, January 2009.](https://reader035.fdocuments.net/reader035/viewer/2022081718/551bd41b550346b4588b566f/html5/thumbnails/21.jpg)
Skeleton LEC Dofile
set log file lec.log –replaceread design –systemverilog –gold –f myrtl.filelist
read design –systemverilog –rev –f mynetlist.filelist
add renaming rule r1 foo bar –goldset sys mode lecreport unmapped pointsadd compare points –allcomparereport compare data
![Page 22: Introduction to Formal Equivalence Verification (FEV) Erik Seligman CS 510, Lecture 4, January 2009.](https://reader035.fdocuments.net/reader035/viewer/2022081718/551bd41b550346b4588b566f/html5/thumbnails/22.jpg)
Skeleton LEC Dofile
set log file lec.log –replaceread design –systemverilog –gold –f myrtl.filelist
read design –systemverilog –rev –f mynetlist.filelist
add renaming rule r1 foo bar –goldset sys mode lecreport unmapped pointsadd compare points –allcomparereport compare data
![Page 23: Introduction to Formal Equivalence Verification (FEV) Erik Seligman CS 510, Lecture 4, January 2009.](https://reader035.fdocuments.net/reader035/viewer/2022081718/551bd41b550346b4588b566f/html5/thumbnails/23.jpg)
Skeleton LEC Dofile
set log file lec.log –replaceread design –systemverilog –gold –f myrtl.filelist
read design –systemverilog –rev –f mynetlist.filelist
add renaming rule r1 foo bar –goldset sys mode lecreport unmapped pointsadd compare points –allcomparereport compare data
![Page 24: Introduction to Formal Equivalence Verification (FEV) Erik Seligman CS 510, Lecture 4, January 2009.](https://reader035.fdocuments.net/reader035/viewer/2022081718/551bd41b550346b4588b566f/html5/thumbnails/24.jpg)
Skeleton LEC Dofile
set log file lec.log –replaceread design –systemverilog –gold –f myrtl.filelist
read design –systemverilog –rev –f mynetlist.filelist
add renaming rule r1 foo bar –goldset sys mode lecreport unmapped pointsadd compare points –allcomparereport compare data
![Page 25: Introduction to Formal Equivalence Verification (FEV) Erik Seligman CS 510, Lecture 4, January 2009.](https://reader035.fdocuments.net/reader035/viewer/2022081718/551bd41b550346b4588b566f/html5/thumbnails/25.jpg)
Skeleton LEC Dofile
set log file lec.log –replaceread design –systemverilog –gold –f myrtl.filelist
read design –systemverilog –rev –f mynetlist.filelist
add renaming rule r1 foo bar –goldset sys mode lecreport unmapped pointsadd compare points –allcomparereport compare data
![Page 26: Introduction to Formal Equivalence Verification (FEV) Erik Seligman CS 510, Lecture 4, January 2009.](https://reader035.fdocuments.net/reader035/viewer/2022081718/551bd41b550346b4588b566f/html5/thumbnails/26.jpg)
Skeleton LEC Dofile
set log file lec.log –replaceread design –systemverilog –gold –f myrtl.filelist
read design –systemverilog –rev –f mynetlist.filelist
add renaming rule r1 foo bar –goldset sys mode lecreport unmapped pointsadd compare points –allcomparereport compare data
![Page 27: Introduction to Formal Equivalence Verification (FEV) Erik Seligman CS 510, Lecture 4, January 2009.](https://reader035.fdocuments.net/reader035/viewer/2022081718/551bd41b550346b4588b566f/html5/thumbnails/27.jpg)
Debugging Mismatches
Debug commands available in console• “diagnose <point>”: Display basic info
But easier to debug in gui• Report->Compare Data to see all points
• Red dots indicate mismatches
• Right-click at mismatch point, and “Diagnose”
– Gives support set, cex values, and LEC’s hints
– From Diagnose window can launch sch view
![Page 28: Introduction to Formal Equivalence Verification (FEV) Erik Seligman CS 510, Lecture 4, January 2009.](https://reader035.fdocuments.net/reader035/viewer/2022081718/551bd41b550346b4588b566f/html5/thumbnails/28.jpg)
Report -> Compare Data
![Page 29: Introduction to Formal Equivalence Verification (FEV) Erik Seligman CS 510, Lecture 4, January 2009.](https://reader035.fdocuments.net/reader035/viewer/2022081718/551bd41b550346b4588b566f/html5/thumbnails/29.jpg)
Example: Fanin Cone
![Page 30: Introduction to Formal Equivalence Verification (FEV) Erik Seligman CS 510, Lecture 4, January 2009.](https://reader035.fdocuments.net/reader035/viewer/2022081718/551bd41b550346b4588b566f/html5/thumbnails/30.jpg)
Example: Inversion
![Page 31: Introduction to Formal Equivalence Verification (FEV) Erik Seligman CS 510, Lecture 4, January 2009.](https://reader035.fdocuments.net/reader035/viewer/2022081718/551bd41b550346b4588b566f/html5/thumbnails/31.jpg)
Example: Messy Error
![Page 32: Introduction to Formal Equivalence Verification (FEV) Erik Seligman CS 510, Lecture 4, January 2009.](https://reader035.fdocuments.net/reader035/viewer/2022081718/551bd41b550346b4588b566f/html5/thumbnails/32.jpg)
Schematic View
![Page 33: Introduction to Formal Equivalence Verification (FEV) Erik Seligman CS 510, Lecture 4, January 2009.](https://reader035.fdocuments.net/reader035/viewer/2022081718/551bd41b550346b4588b566f/html5/thumbnails/33.jpg)
Model “Flattening”
Minor exceptions to state-matching Useful if flops/latches don’t map
![Page 34: Introduction to Formal Equivalence Verification (FEV) Erik Seligman CS 510, Lecture 4, January 2009.](https://reader035.fdocuments.net/reader035/viewer/2022081718/551bd41b550346b4588b566f/html5/thumbnails/34.jpg)
Are These Equal?
![Page 35: Introduction to Formal Equivalence Verification (FEV) Erik Seligman CS 510, Lecture 4, January 2009.](https://reader035.fdocuments.net/reader035/viewer/2022081718/551bd41b550346b4588b566f/html5/thumbnails/35.jpg)
Are These Equal?
set flatten model –dff_to_dlat_zero
![Page 36: Introduction to Formal Equivalence Verification (FEV) Erik Seligman CS 510, Lecture 4, January 2009.](https://reader035.fdocuments.net/reader035/viewer/2022081718/551bd41b550346b4588b566f/html5/thumbnails/36.jpg)
Are These Equal?
![Page 37: Introduction to Formal Equivalence Verification (FEV) Erik Seligman CS 510, Lecture 4, January 2009.](https://reader035.fdocuments.net/reader035/viewer/2022081718/551bd41b550346b4588b566f/html5/thumbnails/37.jpg)
Are These Equal?
set flatten model –dff_to_dlat_feedback
![Page 38: Introduction to Formal Equivalence Verification (FEV) Erik Seligman CS 510, Lecture 4, January 2009.](https://reader035.fdocuments.net/reader035/viewer/2022081718/551bd41b550346b4588b566f/html5/thumbnails/38.jpg)
Are These Equal?
![Page 39: Introduction to Formal Equivalence Verification (FEV) Erik Seligman CS 510, Lecture 4, January 2009.](https://reader035.fdocuments.net/reader035/viewer/2022081718/551bd41b550346b4588b566f/html5/thumbnails/39.jpg)
Are These Equal?
set flatten model –seq_constant
![Page 40: Introduction to Formal Equivalence Verification (FEV) Erik Seligman CS 510, Lecture 4, January 2009.](https://reader035.fdocuments.net/reader035/viewer/2022081718/551bd41b550346b4588b566f/html5/thumbnails/40.jpg)
Are These Equal?
![Page 41: Introduction to Formal Equivalence Verification (FEV) Erik Seligman CS 510, Lecture 4, January 2009.](https://reader035.fdocuments.net/reader035/viewer/2022081718/551bd41b550346b4588b566f/html5/thumbnails/41.jpg)
Are These Equal?
set flatten model –latch_fold
![Page 42: Introduction to Formal Equivalence Verification (FEV) Erik Seligman CS 510, Lecture 4, January 2009.](https://reader035.fdocuments.net/reader035/viewer/2022081718/551bd41b550346b4588b566f/html5/thumbnails/42.jpg)
Are These Equal?
![Page 43: Introduction to Formal Equivalence Verification (FEV) Erik Seligman CS 510, Lecture 4, January 2009.](https://reader035.fdocuments.net/reader035/viewer/2022081718/551bd41b550346b4588b566f/html5/thumbnails/43.jpg)
Are These Equal?
set flatten model –latch_transparent
![Page 44: Introduction to Formal Equivalence Verification (FEV) Erik Seligman CS 510, Lecture 4, January 2009.](https://reader035.fdocuments.net/reader035/viewer/2022081718/551bd41b550346b4588b566f/html5/thumbnails/44.jpg)
Model Flattening
Tool modified cases on previous slides• Internally changes view of logic
• Only on request, not automatic
• May cause mismatches rather than curing!
• Often useful if key point imbalance
In Conformal: “set flatten model…”• Many options, not just ones on slides
• Can also use “remodel …” on single point
![Page 45: Introduction to Formal Equivalence Verification (FEV) Erik Seligman CS 510, Lecture 4, January 2009.](https://reader035.fdocuments.net/reader035/viewer/2022081718/551bd41b550346b4588b566f/html5/thumbnails/45.jpg)
FEV Constraints
![Page 46: Introduction to Formal Equivalence Verification (FEV) Erik Seligman CS 510, Lecture 4, January 2009.](https://reader035.fdocuments.net/reader035/viewer/2022081718/551bd41b550346b4588b566f/html5/thumbnails/46.jpg)
Are these equivalent?
![Page 47: Introduction to Formal Equivalence Verification (FEV) Erik Seligman CS 510, Lecture 4, January 2009.](https://reader035.fdocuments.net/reader035/viewer/2022081718/551bd41b550346b4588b566f/html5/thumbnails/47.jpg)
Are these equivalent?
• No! BUT– What if ‘a’ is always 1?
![Page 48: Introduction to Formal Equivalence Verification (FEV) Erik Seligman CS 510, Lecture 4, January 2009.](https://reader035.fdocuments.net/reader035/viewer/2022081718/551bd41b550346b4588b566f/html5/thumbnails/48.jpg)
FEV: Why Constraints?
RTL is often very general`ifdef CHIP_VERSION_1
`define A 1
`else
`define A 2
`endif
Design reuse: irrelevant RTL remains assign A = 1’b1;
…
if (!A) …
![Page 49: Introduction to Formal Equivalence Verification (FEV) Erik Seligman CS 510, Lecture 4, January 2009.](https://reader035.fdocuments.net/reader035/viewer/2022081718/551bd41b550346b4588b566f/html5/thumbnails/49.jpg)
Why Do Contraints Matter?
Good synthesis tools take advantage• Assume constants to reduce size/scope
• Don’t synthesize masked-out RTL
• Allow out-of-band constraint specs in control files
FEV must recognize constraints• Otherwise get mismatches
• No effort *if* constraints visible at FEV level– But may be only in wrapper RTL– Or inside analog blackbox– Or could be due to software / outside specs
• If not visible to tool, may need to specify– add pin constraint 0 /foo/bar
![Page 50: Introduction to Formal Equivalence Verification (FEV) Erik Seligman CS 510, Lecture 4, January 2009.](https://reader035.fdocuments.net/reader035/viewer/2022081718/551bd41b550346b4588b566f/html5/thumbnails/50.jpg)
Some References
http://en.wikipedia.org/wiki/Formal_equivalence_checking
http://cad-for-vlsi.blogspot.com/2007/03/111-art-of-equivalence-checking.html
Full Conformal docs at /pkgs/cadence6/CONFRML71/doc