Instructor: Oluwayomi AdamoDigital Systems Design

Introduction to Simple ProcessorCombinational Circuit Design Using VHDLDemo – Full AdderHands-On Exercise – Combinational Circuit

Design a simple processor ,capable of picking up data from a switch register,Operate the switch register manually,Display output using LEDs or seven segment display,Perform basic operations such as add, subtract, multiply and divide as well as data movement.

Implement the processor in hardware,Test your implementation using basic set of instruction you designed.

What are the System Requirements?What are the functional blocks required?What is the size of your instruction?Types of Instructions to design:

1. Data handling and manipulation (add, sub, increment, and clear etc.)

2. Branch instructions3. Input and Output

Draw a block diagram of your simple processor,The block diagram should show the interconnection of different registers, modules and control unit.Sample instructions for testing,Control signal needed for your processor, inputs and outputs needed.Inputs and outputs with respect to the FPGA used for implementation.

Design a control unit for picking up instructions from memory address given by the program counter (PC).Interpret the instruction,Fetch the operands and feed them to the ALU,Store the result in destination registersLoad the pc with destination address in case of branch instruction,Contents of destination will be forwarded to the LED or 7 segment display for display.

Op CC SRC DST

Register Instruction

01001011

Branch Instruction

11 CC ADDRESS

Halt and I/O Instruction

1100 L H DST

1100101111000110

11100011

◦ To be drawn in class

Combinational Circuit – Output of the circuit depends solely on the current inputs.No memory and implemented using conventional logic gates.

CombinationalLogic

outin

Storageelement

CombinationalLogic

Present state

Next state

in out

Sequential logic

Combinational logic

Basic Gates

L(A1,A0,B1,B0) = A1’B1 + A0’ B1 B0 +A1’ A0’B0

A1A0B1B0 00 01 11 10

00

01

11

10

1

1

1

1

1

1

VHDL is inherently concurrent (Parallel)Only statement inside a process, function, or procedure are sequentialCombinatorial circuit are built with concurrent code.Concurrent statement in VHDL are WHEN and GENERATE.

When<output> <= <input1> WHEN <selector> ='1' ELSE

<input2>; With sel selectwith HEX SELect

LED<= "1101" when "00", "0100" when “01", "0000" when “10", "1001" when “11", "0010" when others;

Full Adder (structural model from half adder)4-bit Adder (using structural model from full adder)2-1 Multiplexer4-1 Multiplexer (using structural model)

Design, Simulate and Implement each of this units.

Assignment: Generate a truth table and use K-Map to realize a simplified equation for full adder, 2-1 multiplexer.

Good Luck!!!