Input Filter Interactions with Switching Regulators · A Practical Case Study Cascading Converters...

Input Filter Interactions with Switching Regulators

Christophe Basso Technical FellowChristophe Basso – Technical Fellow

IEEE Senior Member

Public Information

Course Agenda

A Switching Regulator as a Load EMI Filter Impact EMI Filter Impact An Introduction to FACTs Buck Converter Input/Output Impedances Buck Converter Input/Output Impedances Filtering the Input Current Damping the Filter Damping the Filter Optimum Component Selection A Practical Case Study A Practical Case Study Cascading Converters

Public InformationChristophe Basso –Input Filter Interactions2 3/7/2017

Course Agenda



EMI Filter Interaction

A LC filter is inserted to prevent input line pollution

outVLinV outVLinV

gVloadRCgVloadRC

Switching converterSwitching converter ?inZ s

What load does the converter offer?


C. Basso, “Designing Control Loops for Linear and Switching Power Supplies”, Artech House, 2012

A Negative Incremental Resistance Assume a 100%-efficient converter

out inP P in in out outI V I V

Infinite rejection

In closed-loop operation, Pout is constant, no link to Vin

outin in

in

PI V

V

P

in

For a constant Pout , if Vin increases, Iin drops11

2

out

in in in out

in in in

PddI V V P

dV dV V

0.6

0.8

AinI 0.6

0.8

AinI

10 15 20 25 300.2

0.4

10 15 20 25 300.2

0.4 The incremental input resistance is negative

2in

inout

VR

P


VinV VinV

A Simple SPICE Simulation

A constant-power current source shows the negative resistance

bulk

Vin100

B1Current

bulkparameters

100Pout/V(bulk)Pout=50W

.TF V(bulk) Vin

***** SMALL SIGNAL DC TRANSFER FUNCTION

Infinite bandwidth

output_impedance_at_V(bulk) 0.000000e+000vin#Input_impedance -2.00000e+002Transfer function 1 000000e+000

Neg. resistance


Transfer_function 1.000000e+000

A Simple LC Filter

The low-pass filter is built with L and C elements:

11 zs

H HoutV

Lr LCr

gV

10 2

0 0

1

zH s Hs sQ

R

1

1z

Cr C C 0

1 L

C

r Rr RLC

LC R

R

0 C

L C L C

LC r RQ

L C r r r R r R

A negative resistance cancels 0L C L CL C r r r R r R

A negative resistance cancels losses: poles become imaginary

If

C LL r r CRC r r

Q

Sustained oscillations


C LC r r

A Negative Resistance Oscillator

If losses are compensated, the damping ratio is zero

0 21 zsH s H

1

2Q

If ohmic losses are gone the 0 2

20 0

1s sQ

2 If ohmic losses are gone, the

damping ratio is zero, Q is infinite.

Without precautions, instability can happen!

130

150

130

150 Input voltageLr

CrL outV

110

130 Output voltage

110

130

inVC

C

I (V)

70.0

90.0

70.0

90.0C

outPI Negative resistance(constant) 0 0 0


3.64m 10.9m 18.2m 25.5m 32.7m3.64m 10.9m 18.2m 25.5m 32.7moutV Negative resistanceInfinite bandwidth

Filter Output Impedance

What is the output impedance of an LC filter? TV s

L Cr

loadR

TI s 0th

N sZ s R

D s

It follows the form

Lr C Ω ΩNo dimension

L

2

1 1||

1 ||

C outL

th L loadC load

Ls sr Cr

Z s r Rr RLs C r R r s LC

1 ||L load CL load L load

s C r R r s LCr R r R

All losses (ohmic, iron etc.) help decreasing Q


( ) p g Q

Typical Filter Output Impedance

At low frequency, the inductive ohmic loss dominates

dBΩ °

90 0

180

10 0

20.0

Phase is positive

0

90.0

0

10.0

outZ f

-90.0-10.0 outZ f

r

CrPhase is negative

1 10 100 1k 10k 100k 1Megfrequency in hertz

-180-20.0Lr


Negative Resistance at Low Frequency N i i b f f db k (P ) Neg. resistance exists because of feedback (Pout = constant )

3 18

L15u

5

R41.5m

PWMCM2_LX1L = 5u

VZin

2.70V2.70V2.70V

I d

4

Resr60m

7

Vin2.7

2

duty_cyclevout

c

cos

sy P

WM

it

ch C

M

p

duty

-cyc

le

SWD

L 5uFs = 1MegRi = -40mSe = 16.4k

I1AC = 1

L210GH

Rload

5.00V

2.70V

536mV

Average modelImpedancemeasurementsetup

16

Cout200uF

R91k 11

D1mbra210et3

13

Rdson140m

parameters

Rupper=10kC2C2

vca Lo

swi S 55.00V-455mV

-301mV

6

R1Rupper

9

14

R610k

R71k

Rupper=10kfc=8kpm=70Gfc=-20pfc=-101

G=10^(-Gfc/20)boost=pm-(pfc)-90pi=3.14159

15

R2R2

C1C1

C2

2.50V

2.50V

1.10V

99.9mV

2.50V

R310k

1

V22.5

Verr

X2AMPSIMPVHIGH = 100VLOW = 10m

SwitchMode Power Supplies: SPICESimulations and Practical Designs

pK=tan((boost/2+45)*pi/180)C2=1/(2*pi*fc*G*k*Rupper)C1=C2*(K^2-1)R2=k/(2*pi*fc*C1)

fp=1/(2*pi*R2*C2)fz=1/(2*pi*R2*C1)

G s


SwitchMode Power Supplies: SPICE Simulations and Practical DesignsChristophe Basso - McGraw-Hill, 2014

Negative Resistance at Low Frequency Th i i l i 200 H The resistance is truly negative up to 200 Hz

1 2

24.0

12 0

0

12.0

(dBΩ) 1.02Ω

Well before crossover,

-24.0

-12.0 inZ f

In this region

e be o e c osso e ,the -180° argument is gone.

0

72.0

144

inZ f

(°)

In this regionPout constant

fc

-144

-72.0

180inZ

fc


10 100 1k 10k 100k 1Meg

Course Agenda



A Filter Affects the Line Output Impedance Th li i d d i i h i l 0

thZ s inZ s ˆoutv 2H s

The line impedance driving the converter is no longer 0

1H s

ˆgv

V

Gd

inV s

G s

thV s iV s+

The system can be modeled by a minor loop

1

in thV s V s th inV s-

th inZ Z

1in th

th

in

Z sZ s

gain


ga“Input Filter Considerations in Design and Application of Switching Regulators”, R. D. Middlebrook, IEEE Proceedings, 1976

Impedance Interactions Stability can be at stake when inserting the filter

inV s

thZ s thV s inZ s

in

Filter Switching Supply thZ s inZ s

1

The Nyquist criterion applies

C diti f 1thZ s

1

1in th

th

in

V s V sZ sZ s

1 and 180th thZ s Z sZ s Z s

Conditions foroscillations

1

inZ s


in inZ s Z s

A Filter Modifies Converter’s Dynamics The EMI filter output impedance makes The converter input voltage is no longer zero in ac analysis

0thZ s

Z s ˆoutv H s

ˆoutv

0thZ ˆ 0inv H s

thZ s outout

d

d

0thZ

ˆ 0iv G s G s

outV sH s

D s

outV s

H sD s

0inv


0inV sD s

0inV s

D s

Extra Element Theorem to Help It can be shown how an EMI filter affects the open-loop gain

V s H s

ˆoutv

0th

out

Z s

V sH s

D s

Gain without the filter

Z thZ s thZ s Filter output impedance

G sd

1 thZ s

Extra-Elementcorrection factor

1

0 0

1

1th th

th

out out N

thZ s Z s

V s V s Z sH s

Z sD s D sZ

th NZ s Z s

th DZ s Z s


DZ s

What are ZD and ZN? ZD and ZN come from the Extra-Element Theorem, EET

0D i D sZ s Z s

Open-loop input impedance 0D s Open loop input impedance

ˆ 0outN i v

Z s Z s

Input impedance for a nulled outputIdeal input rejection

?DZ s ?NZ s Null

Ideal input rejection

ˆ 0outv ˆ 0outv

0 35%ˆ 0

D

d

0 35%

ˆ 0

D

d

ˆ 0outi ˆ 0outi

Ideal control

ˆ 0


Open-loop input impedance Input impedance for ˆ 0outv

Consider Closed-Loop Input Impedance Th l h l d b d i d

Converter ZN(s) ZD(s) Ze(s)

These values have already been derivedZe(s) is the input impedance for a shorted output

Buck

22 21' 'L LCs s

D R D 2' 1 sLD R

L

2

sLD

2

2

1

1

Ls s LCR RD sRC

2

RD

Boost

Buck-Boost

2 22 ' ''1

D R DD RsRC

22' 1'

D RD R

sL

2

sLD

2

2 2

' 1'

D R sDLD D R

22 2 2

2

1' ' '1

L LCs sD R D R DD sRC

D

A converter closed-loop input impedance follows the form

1 1 1 11 1in N D

T sZ s Z s T s Z s T s

L i


“Fundamentals of Power Electronics”, R. Erickson, D. Maksimovic, Springer, 2001Loop gain

The Output Impedance is Affected The filter degrades the closed-loop output impedance

1 thZ s No impact if

, ,0 01

th th

eout CL out CLZ s Z s

th

in CL

Z sZ s Z s

Z sZ s

th eZ s Z s

No impact if

,in CL

Ze(s) is the converter input impedance with a shorted output

eZ s 0outV 2H s

Short circuit


Applying Dr. Middlebrook Criteria P i i id i hi ll l Previous equations consider switching cell alone Do not include the decoupling capacitor!

H H iZ s

ˆgvˆoutv

2H s 1H s inZ s

g

If possible, move the capacitor to the filter sidep , p

ˆoutv 2H s 1H s inZ s

ˆgv outv


“Input Impedance and Filter Interactions Part I”, R. Ridley, ridleyengineering.com

At 1st-Order Check Crossover Points

dBΩdBΩ

Plot the converter input resistance value Plot the filter output impedance: check for overlaps: th inZ s Z s

65.0

36 dBΩ

undamped65.0

36 dBΩ

undamped2

in

out

VP

Overlap occurs?

1th

in

Z sZ s

5 00

35.036 dBΩ

5 00

35.036 dBΩ

1th

in

Z sZ s

Watch the

out in

-25.0

5.00

damped

3.6 /100 µF-25.0

5.00

damped

3.6 /100 µF

Watch the

argument of

th inZ Z

-55.0 outZ s-55.0 outZ s

th in

Output filter


10 100 1k 10k 100k10 100 1k 10k 100k

Condition for Oscillations Plot the ratio of magnitude Plot the difference of arguments

th inZ Zarg argth inZ Z

Check phase margin at 0-dB points if any

60.00

° dBth inZ Z Conditions for

ill ti

30.0

60.0

-90.0

0 th in

1thZ sZ s

oscillations

safe

-30.0

0

-270

-180

and

180

in

th

Z s

Z s

problem

1 10 100 1k 10k 100k 1Meg

-60.0-360

arg argth inZ Z 180

inZ s


1 10 100 1k 10k 100k 1Meg

Damping the Filter to Build Margin Damping the filter can provide phase margin at 0 dB The phase margin in this example is a bare 12°

020 0

dB °

Avoid magnitude overlaps by working on Zth and Zin!

-90.0

0

10.0

20.0

arg argth inZ Z

168

-270

-180

-10 0

0

-360

-270

-20.0

-10.0

th inZ Z


1 10 100 1k 10k 100k 1Meg

Preliminary Conclusion Y d i h i fil h i h h SMPS You design the input filter together with the SMPS

Converter loop gain T is unaffected th NZ s Z sWhen a filter is installed:

Converter output impedance is unaffected thZ s Z s

th DZ s Z sand

Converter output impedance is unaffected th eZ s Z sVout shorted, open loop

You design the input filter alone

andth th

in in

Z s Z sZ s Z s

If d i th

Don’t care about phase anymore

If damping thefilter guarantees

th in closed loopZ s Z s OK


System is stable but overall performance may be altered

Course Agenda



Classical Circuits Analysis Techniques Apply classical Kirchhoff’s voltage and current laws The expression is correct but disorganized: high-entropy form

V response

What is the t f f ti ?

Lr 1LCr

R

outV

outV sH s

response

transfer function?

Apply brute2C

1RinV

in

H sV s

stimulus

1

2 1 1 2

1 ||CC

r RsC R sR r C

H s

Apply bruteforce algebra

stimulus

2 21 1 2 1 2 1 2 2 1 1 2 1

1 12

1 ||

C

L C L C L CC L

H sR r sL sC R r C R r s C r r s C L R s C L r s

r R r sLsC

No insight: poles? Zeros? Dc gain?


o s g t po es e os c ga

Fast Analytical Circuits Techniques FACTs describe a set of tools to quickly write transfer functions

21 1 Csr CRH s

1 2 112 1 1 2

1 1

1 ||L CC L

L L

H sR r r RLs C r r R s L C

r R r R

Dc gain

1 s

Naturally showing gains, poles and zeros…

1 10

1 Cr R

0 2

0 0

1

zH s Hs sQ

2z

Cr C 0

11 2 Lr RL C

1 1Lr R

QL C r r R r r

0 0Q 01 2 1C L C LL C r r R r r

This is a low-entropy expression


R. D. Middlebrook, “Methods of Design-Oriented Analysis: Low Entropy Expressions”, New Approaches to Undergraduate Education, July 1992

Two Different Stages

Consider dc and high-frequency states for L and C

C impedance 1 Dc state Z Cap is an open circuitC p 1CZ

sC Dc state

HF state

CZ 0CZ

Cap. is an open circuit

Cap. is a short circuit

impedance D 0Z I d i h i iLimpedance

LZ sL Dc state

HF state

0LZ

LZ Inductor is a short circuit

Inductor is an open circuit

Change the circuit depending on s

C L0s 0s s s


Principles of FACTs: Time Constants

Determine time constants in two different conditions1. The excitation is set to zero (no excitation)2 The output is nulled (no response)2. The output is nulled (no response)

How do you determine a time constant?

Remove

capacitor

TI

TV1R

2R 3R1R

2R 3R 1Ccapacitor

||TVR R R R

Test generator

Remove L or C and look into its terminals: 2 3 1||T

T

R R R RI

Remove L or C and look into its terminals:

2 3 1 1||R R R C


Excitation is set to 0In your head, imagine an ohm-meter placed across C1’s terminals

Turning the Excitation off – The Pole Turning the excitation off means A 0-V source becomes a short circuit A 0-A generator is an open circuit and disappears A 0 A generator is an open circuit and disappears

1RR

1L 1RR

Set source1L

0 V2RinV 2R

to 0 V?R

1 2R R

2R?R

2R

0 V

Set source

to 0 A1R

1LinI

?R

1R 1

1

LR

0 A

to 0 A

The inverse of the time constant in this case is a pole: 1p


p p

Mathematical Definition of a Zero A zero is the root of the equation 0f x

15

2f10

2 4f x x

0f x 1x 2x

0

5f x( )

1 2x

1 2

4 2 0 2 45

x

2 2x

Transfer function zeros are the numerator roots

0N s 1 2, ...z zs s


Nulling the Response If the numerator is 0, then the response is theoretically 0

HH((sszz))ˆ 0outv

Complex excitation

(( zz))

s s 0N s

Complex response

zs s 0zN s

What is happening in the box when ? zs s

The excitation cannot reach the output: the response is nulled

0out zV s ˆ 0out zv s


How Does the Response Disappear? The signal is lost in the transformed network

1Rresponse response 1 zZ s

1Rp p 0out zV s 0out zV s

2 0zZ s in zV s in zV s1R

excitation excitations j

A series impedance A parallel impedance

s j s j

pbecomes infinite.

p pshorts the path to ground

What is a transformedtransformed network?


The Transformed Network

Reactances are replaced by their Laplace expression

1R 2R 1R 2R1R 2R

1C

1R

1

1sC

2R

1

1R

L L

1R2R 2R

2L 2sL

The circuit is then observed at the zero angular frequency


Considering a Negative Angular Frequency F h RC i d i h i i For s = sz1, the RC impedance is a short circuit

Cr 1 sr C 11 0 ΩzZ s =0

Cr

1 1

11

1 Csr CZ s

sC

1

zs shunt

1sC 11

zCr C

For s = s 2, the RL impedance is infinite For s sz2, the RL impedance is infinite

2R

2 2sL RZ

22 ΩzZ s

2sL

2 22

2 2

Z sR sL

2

2z

Rs

L =0

Poles of the RL network become


2LseriesPoles of the RL network become zeros of the transfer function.

Zeros by Inspection: Fastest Option! Id if f d i i / h i i Identify transformed open circuits/short circuits

1R 3R outV s Lrs Lr

Lr

1R2R

2sL

3R

Cr

out

2R

11

zsL 1

1z L

2R2

sL 1 inV s 2

2

2z

Rs

L

1

2

2

2z

RL

11sL1sC

31

1z

C

sr C

3

1

1z

Cr C

1 2 3

1 1 1z z z

s s sN s

Noequations!


FACTs at Work in an Example

How would you calculate Vout / Vin?

1R 3R

Cr

outV s

2RC

C

4R inV s

1C

1. Transform the circuit with a Thévenin generator2. Apply impedance divider involving C1


g 1

Apply Impedance Divider

Reduce circuit complexity with Thévenin

1 2 3||R R R1R 3R

R

outV s outV s1 2 3

Cr

1R

2R

3R

Cr thR s

thV s 2

1 2in

RV s

R R

1C

4R

1C

4R

1Z s

Apply impedance divider involving Z1 and Rth

1 2

1 1 2th

Z s RH s

Z s R s R R

1 41|| CZ s R rC

1 2 3||thR s R R R

“Who you


1 41

C sC gonna call?”

High-Entropy Expression

H2 s( )R2 R4 C1 rC s 1

R1 R2 R1 R3 R1 R4 R2 R3 R2 R4 C1 R1 R2 R4 s C1 R1 R3 R4 s C1 R2 R3 R4 s C1 R1 R2 rC s C1 R1 R3 rC s C1 R1 R4 rC s C1 R2 R3 rC s C1 R2 R4 rC s

How do you make use of this result?

what is the pole/zero position? what affects the quasi-static gain for s = 0?q g

0

20 H f

You can plot the ac -20

-40

-60

0

50 You can plot the ac response but it yields no

insight on what drives

-80

-10010 100 1k 10k 100k 1Meg 10Meg 100Meg

-50 arg H f poles and zeros!


10 100 1k 10k 100k 1Meg 10Meg 100Meg

Applying FACTs Now

What is the gain when Vin is a dc voltage?

tV s1R

R

3RCr

R

outV s

V2R

1C

4R inV s

The capacitor is open circuited, read the schematic! The capacitor is open circuited, read the schematic!

2 40

1 2 1 2 3 4||R R

HR R R R R R


Determine the First Time Constant

Look at the resistance driving the storage element1. When the excitation is turned off, Vin = 0 V

1R 3RCr

2RC

4R

?R

1 1 2 3 4 1|| ||Cr R R R R C


1 1 2 3 4 1|| ||C Denominator calculation

Determine the Second Time Constant

Inspect the circuit and find the transformed short circuit

0tV s 1R

R

3RCr

R

0out zV s

V2R

1

1sC

4R in zV s

1Z1sC1

If Z is equal to 0 the output is nulled

1

1 0Cr s C

If Z1 is equal to 0, the output is nulled

1

1z

C

sr C


1zs C 1Cr CNumerator calculation

Assemble the Terms

You immediately have a low-entropy form

R R

1 s

2 40

1 2 1 2 3 4||R R

HR R R R R R

1 0

1

zH s Hs

1

1 2 3 4 1

1|| ||p

Cr R R R R C

p

1

1z

Cr C

Way cool!

We did not write a single line of algebra!


Use Mathcad® to Check ResultsR1 1k R2 22k rC 0.1 R3 150 R4 100

|| x y( )x y

x y C1 1F

40

20

0

50

20 log H1 i 2 fk 10 arg H1 i 2 fk 180

H s( )

R4 rC1

s C1

R4 rC1

s C1

R4 rC1

R2R1 R2 80

60

40

50

0

20 log H1 i 2 fk 10 20 log H2 i 2 fk 10

1

arg H2 i 2 fk 180

R4 rC s C1

R4 rC1

s C1

R1 R2

R1 R2 R3

H2 s( )R2 R4 C1 rC s 1

R R R R R R R R R R C R R R C R R R C R R R C R R C R R C R R C R R C R R

10 100 1 103 1 104 1 105 1 106 1 107 1 108100

fk

2 R1 R2 R1 R3 R1 R4 R2 R3 R2 R4 C1 R1 R2 R4 s C1 R1 R3 R4 s C1 R2 R3 R4 s C1 R1 R2 rC s C1 R1 R3 rC s C1 R1 R4 rC s C1 R2 R3 rC s C1 R2 R4 rC s

2 C1 rC R1 || R2 R3 || R4 91.812 s

1 C1 rC 100 nsSuperimposing both transfer functions,

1 C1 rC 100 ns

H0R4

R4 R1 || R2 R3

R2R1 R2 0.079

H1 s( ) H01 s 1

matching should be perfect. If not, there is mistake.


H1 s( ) H0 1 s 2

Fractions and Dimensions

A 1st-order system follows the form

N11 a s

f t i

0 1

0 1

N s a a sH s

D s b b s

0 0

10

0

1

a aH s

bb sb

factoring

A leading term (if any) carries the unit0b

a 11a

s a

1

00

1

1

1

a sa

Z s Rb

0

1 sa

b

1

0

s Naa

time

1

0

1 sb

Unitless

1

0

1b

sb

Unitless

1

0

s Dbb

time


Unitless Unitless

2nd-Order System

A 2nd-order system follows the form

2 2

2

0 1 22

0 1 2

s sH s

s s

21 2

0 21 2

11

a s a sH s H

b s b s

Factoring 0Unitless

Factoring 0

The second fraction is unitless

Carries the unit

11 1 2

0

s N Na

2 1 222 1 2 2 1

0

s orN N N Na

sum product

time²

11 1 2

0

s D Db

1 2

2 1 222 1 2 2 1

0

s orD D D Db

time²


reactance 1 reactance 2

Alternating the Reactance States In a 1st order circuit there is one reactance In a 1st-order circuit, there is one reactance it is either in a high-frequency state or in a dc state

0s s

In a 2nd-order circuit, there are two reactances we can consider individual states

0s L s 0H H1L2C 1L2C

1L

2C

0

?R ?R

21

12

1L2C1L2C


?R ?R

Introducing the Notation Set one reactance into its high-frequency state

1 Reactance 1 is in its high-frequency state

2?R

What resistance drives reactance 2?

?R

2 Reactance 2 is in its high-frequency state

1?R

What resistance drives reactance 1?

There is redundancy: pick the simplest result1

2 1 2b 22 2 1b


2 1 2 2 2 1

Example with Capacitors Assume the following 2-capacitor circuit

R

outV s

R1RCr

2C inV s

0s 1RCr

0 1H

1C

Determine the two time constants while Vin is 0 V

R ?R C R b 1RCr

?R

1 1 1CC r R

2 2 1C R

1 1 2

1 1 1 2 1C

bb C r R C R


Determining the Higher-Order Term Place C1 in its high-frequency state and look into C2

1R r ?R1Cr ?R

12 1 2 1 1 2 1 ||C Cb C r R C R r 0 VinV

1C 2C

12 1 2|| CR r C

Place C2 in its high-frequency state and look into C1

1

2 g q y 1

1RCr

2

?R 21 1Cr C

22 2 1 2 1 1 Cb C R C r 0 VinV

1C2C


1 1Cr C

Denominator is Completed The denominator can be assembled

2 21 2 1 1 2 1 2 1 11 1 C CD s b s b s C r R C R s C R C r s

Is there a zero in this network?

0out zV s

1RCr 1

1 0r 1

1

1z

C

sr C

1sC

2sC in zV s1

0Cr sC

11

1z

Cr C

Z1sC

If Z1 becomes a transformed short, the response disappears

1Z


Final Expression and Conclusion

12

11

Csr CH s

C R C R C R C

Gather the pieces to form the transfer function

2

1 1 2 1 2 1 11 C CC r R C R s C R C r s

1 s

0 2

0 0

1

zH s Hs sQ

No algebra!

0 0Q

This expression was determined in a flashing time We did not use KVL or KCL: inspection is easy

Fast Analytical Circuits Techniques for Electrical and Electronic Circuits – Vatché Vorpérian – Cambridge Press 2002

Linear Circuit Transfer Function – A Tutorial Introduction to Fast Analytical Techniques –Christophe Basso – Wiley & Sons 2016


Course Agenda



A Buck Converter in Voltage Mode Replace the diode and the switch by the PWM switch

caVoutV

1LLr

Cr

loadRinV

Control

p2C

..

Small-signal model

V Vorpérian "Simplified Analysis of PWM Converters using Model of PWM Switch parts I and II"


V. Vorpérian, Simplified Analysis of PWM Converters using Model of PWM Switch, parts I and IIIEEE Transactions on Aerospace and Electronic Systems, Vol. 26, NO. 3, 1990

Buck Input Impedance Inductance LoL lets you sweep the input to have Zin

L1 rLLoLVZin B2

Voltage

10 4

L1100uH

5

rL10m

rC30m

a c

LoL1GH

a

B1CurrentI(Vc)*V(d)

3

V(a,p)*V(d)/V(D0)

B3CurrentI(Vc)*V(D0)

11

B4VoltageV(3,p)*V(D0)

Vc

c

D0

12.0V

5.00V 5.00V 4.99V12.0V 5.00V

417mV12.0V

Ac block

VinVin parameters

Vin=12D=0.417

6

C247uF

R35

I1AC = 1

pp

V4D

d

V5AC = 0

4.99V-582nV

0V

In this mode, is equal to zerod

ˆ 0

in

in d

V sI s

Source B2 and B1 are zero

, inV a p VNode p is ground Simplify schematic

Check ac response


0in d

inpInput impedance

Simplifying and Rearranging is Key Install the dc transformer to obtain Zin

CLr 1LIExcitation

Cr

2C

loadR

L 1TI

TV 1 0D

Tin

in

V sZ s

I s

Excitation

R

Reflect elements to the primary side

Response

p y

22 0C D

l dR2

0

LrD

12

0

LDTI

1 0D20

loadRD

20

CrD

TV


Dc input resistance

Start with s = 0 – Draw Circuit in dc Short the inductor, open the capacitor

LrI 1L

20

loadRD

2Cr

D

20DTI

TV 0 20

L loadr RR

D

2C

20D

For the time constants, suppress the excitation, IT = 0

l dR

20

LrD

l dR

20

LrD ?R

2C

1L

2C

1L

20

loadRD

20

CrD

?R

22 2 0 2

0

C Loadr RC D

D

20

loadRD

20

CrD

11 2

0

LD

2C 2C


Input impedance

Higher Order Coefficients Avoid indeterminacy with : use instead Determine

1 221

2L High frequency state21

?R2

0

LrD

1L

2C

High-frequency state

?R

2 1L ?R

20

loadRD

2Cr

D

1 20D

0D

2 2 12 2 1 2 0 2 2

0 0

0C Loadr R Lb C D

D D

2 12 0 22 2

0 0

1 1C LoadC Load

r R LD s C D s sC r R

D D


Input impedance

The Numerator is of 2nd-Order Type Null the response across the current source

Degenerate case, short the generator’s terminals!

2Lr

D Use Fast 2

2 0C D12

LD

20

loadRD

Cr

20D

TI

Use Fast Analytical Circuits

Techniques!0TV

20D

20D

212 1 21 || C load

L load CL load L load

r RLN s s C r R r s L Cr R r R


C. Basso, “Introduction to Fast Analytical Techniques, Application to Small-Signal Modeling”, APEC 2016 Professional Seminar

Assemble the Pieces

2

1 s sQ

R1

The transfer function dimension is ohm

0 0, 0

1in OL

p

QZ s R s

0 2

0

L loadr RR

D

2

1p

C Loadr R C

1 2 0

1 2

C load

L C L load C load

L C r RQ

L C r r r R r R

,in OLZ f

100°100

01 L loadr R

C load C load

Z f01 2 C loadr RL C ,in OLZ f

-90°

29.2 dBΩdBΩ

0


10 Hz 10 MHz

Closed-Loop Input Impedance

H s V s

We want the input impedance once the loop is closed

outV s

D s

Control to output

Z

PWMG2C

1C 2R3R

1R

inZ s

3C

tV s V s G s

G s err outV s V s G s


Stabilize the Buck with a Type 3 A 10 kHz crossover is selected for the compensation A 10-kHz crossover is selected for the compensation

d

a c1 2 7

L2100u

R120m v outparameters

Vout=5Pout=50

20.0V 5.20V

260mV

5.20V

5.00V

1

2

1 1z

z

ss

G G

d

PWM switch VM p4

X1PWMVML = 100uFs = 100kG

AIN

5

XPWMGAINK = 1/Vp

8

R250m

C1470u

R4Rload

Pout=50Rload=Vout^2/PoutRupper=10kAOL=1TVp=2fc=10kVin=20Gfc=-22

V3Vin

521mV

5.00V

2

1 2

0

1 1p p

G s Gs s

Neg. sign

18060.0

dB ° T f

T f

5

C2C1

3

C3C2

R7R2 R9

R3

v outPM=70PS=-119boost=PM-PS-90

G=10^(-Gfc/20)pi=3.14159

fz1=540

AC = 1V1

v out

Vin

2.50V5.00V

0

90.0

0

30.0

9

10

R5Rupper 12

R3

C5C3

E1AOL

5 0fz2=230fp1=6.8kfp2=fp12

C1=1/(2*pi*fz1*R2)C2=C1/(C1*R2*2*pi*fp1-1)C3=(fp2-fz2)/(2*pi*Rupper*fp2*fz2)R3=Rupper*fz2/(fp2 fz2)

2.50V

5.00V

10 kHzcf

m

cf

-180

-90.0

-60.0

-30.0Rlower10k

11

Vref2.5

R3=Rupper*fz2/(fp2-fz2)

a=sqrt((fc^2/fp1^2)+1)b=sqrt((fc^2/fp2^2)+1)c=sqrt((fz1^2/fc^2)+1)d=sqrt((fc^2/fz2^2)+1)

R2=((a*b/(c*d))/(fp1-fz1))*Rupper*G*fp1

2.50V

T s H s G s

60c

m

f

cf

G s


1 10 100 1k 10k 100kG0=((R2*C1)/(Rupper*(C1+C2)))*c*d/(a*b) G s

Use Large-Signal Model for Reference U h PWM i h h k h

VZin

aL2100u

R110m vout

5.00V

Use the PWM switch to check the responseH

L11T

d

a c

PWM switch VM p

4

2

5

R250

20.0V5.10V

255mV

5.10V

5.00V

10

Vin

I1AC = 1

X1PWMVML = 100uFs = 100k

GAI

N XPWMGAINK = 1/Vp

7

50m

C1

R4Rload

20.0V5.00V

d f

Vin

3

K 1/Vp C1470u

511mV

G f errV fSetup for input

impedancemeasurement.


compensator

Loop Gain Decreases as f Increases I t i d i ti t l f i l

55.0 ,in CLZ f

Input impedance is negative at low frequencies only

25 0

35.0

45.0

(dBΩ)

,

15.0

25.0

0

-80.0

-40.0

0

(°)

,in CLZ f

-160

-120 0inZ f

180inZ f Simulation


1 10 100 1k 10k 100kresults

Why Does Zin Become Positive? The below expression only holds if Pout is truly constant

2in

inV

RP

Infinite input voltage rejection

It is true at dc, where loop gain is very high201 s

inoutP

p g j

60

40

, 2

0 0

1

1

load zSC OL

load L

RA s D

R r s sQ

,SC CLA f

RejectionAudiosusceptibility

100

80

,SC OLA sA

dB

Strong rejection

weakenssusceptibility

1 10 100 1 103 1 104 1 105 1 106 1 107120

,,C 1

SC OLSC LA s

T s

Loop gain quickly drops as f increases

g j


Loop gain quickly drops as f increasesASC, audio susceptibility

Determining the Closed-Loop Impedance

Update the large-signal model with linear sourcesVZin

L2100u

R110m voutvin

B2Voltage

V(a,p)*V(d)/D Vcc

R81u 5.00V

L11T

5

R250m

a

B1CurrentI(Vc)*V(d)

16

B3CurrentI(Vc)*D

17

B4VoltageV(16,p)*D

p

c ca

20.0V 5.10V

10

VinVin

I1AC = 1

7

C1470u

R4Rload

R31u

p20.0V

5.00V

B2 needs to be linearized as d and Vin now include ac

0 0ˆ ˆˆ ˆin in in inV v D d dV v D


0 0in in in inAnalytical analysis

Simplified Circuit Helps Analysis

VZin

2 5

L2100u

R110m voutvin Vc

Final closed-loop schematic to perform analysis

inV s c

L11T

2 5

R250m

14

CI s RLCZ s

10

VinVin

I1AC = 1

7

C1470u

R4Rload

B1CurrentIout*V(d)

B3CurrentI(Vc)*D

B4VoltageV(vin)*D+V(d)*Vin

H CI s 0D

D s

pH s

G s errV s

PWMG Sanity checkis mandatory!

outV s(-)


ZRLC(s) is the filter input impedance

Derive Equations for Individual Variables

The duty ratio is linked to Vout by the error amplifier G PWM outD s G s G V s

From the previous slide, we have

0 i i

H sV s D V s D s V

Control-to-outputfunction of the buck 0out in in

in

V s D V s D s VV

0 PWM inD G G s H s V sD s

V G V G H

Divide by Vin to getthe transmittance Hp

in PWM inV G V G s H s

Current in terminal c is B4 applied to the RLC network

00

PWM inin in

in PWM inC

D G G s H s V sV s D V

V G V G s H sI s

Z s


RLCZ s

Substitute Expressions and Rearrange The input current depends on the two input sources:

0in out CI s I D s I s D Buck dc output current

Static dutyratio

Substitute D(s) and IC(s) previously obtained Substitute D(s) and IC(s) previously obtained

0

00

PWM inin

PWM in in PWM in

D G G s H s V sD V

D G G s H s V s V G V G s H sI s I D

0in out

in PWM in RLC

I s I DV G V G s H s Z s

Factor 21 I G G H G G HD I D

T s

Rearrange

20 01 1

1 1in PWM PWMout

in in in PWM RLC PWM

I s G G s H s G G s H sD I DZ s V s V G G s H s Z s G G s H s

outi

VV


0inV

D

Final Expression for Zin in Closed Loop Final expression involves two contributors

2 20 01 1

1 1T sD D

Z s R T s Z s T s

1 1in load RLCZ s R T s Z s T s

In dc or low frequency, T(s) is >> 1

2 2 R

2 20 01

1in load load

T sD DZ s R T s R

As s exceeds f and increases T(s) is << 1

20

loadin

RZ s

D

0s

As s exceeds fc and increases, T(s) is << 1

2 2

0 01 11

D DZ s Z s T s Z s

2RLC

in

Z sZ s

D

1in RLC RLCZ s Z s T s Z s 1

2

0 0

1

1RLC L load

s sQ

Z s r RR C

No gain means open-loop operationSame as 0D s

0D


11RLC L loadC loads r R C Same as 0D s

Plot the Closed-Loop Input Impedance

100100

Magnitude becomes open-loop plot in high-frequency

0

60

80

,Oin LZ f Z f

Positive

10040

,in CLZ f ,in CLZ f

,Oin LZ f

Neg area

1 10 100 1 103´ 1 104´ 1 105´ 1 106´ 1 107´1 10 100 1 103´ 1 104´ 1 105´ 1 106´ 1 107´

20

A l l i hi h f

180

Neg. area

Argument meets open-loop plot in high-frequency Negative argument occurs only at low-frequency


Open-Loop Output Impedance What is the buck converter output impedance?

outZ s1L

DinV

1

2C loadR

Voltage mode

Consider parasitic elements for L and CVoltage-mode

outout

V sZ s

I s

response

excitation

outI s2C1L

loadR outV s outI s excitation

Lr Cr

load out


Buck Output Impedance

V

Let's find the term R0 in dc: open caps, short inductors

0 ||TL load

T

VR r RI

Lr loadRTITV

0sL r 1 1 0Lr s

The zeros cancel the responseLr

0?out zV s 1 0LsL r

1 0CrC

1 0LL

r sr

21 0Csr C

1sL2

1sC

loadR

out zI s2

2

1z

Cr C

11

z L

2CsC

Lr Cr

load 2C

121 1 C

L

LN s s sr Cr


L

Low-Frequency Time Constants All elements are in their dc state Look at R driving L then R driving C

?R1 2

?R

r r

loadR

r r

loadR1L 2C 1L 2C

Lr Cr

R r R

Lr Cr

||R r R r L loadR r R ||L load CR r R r

11 2 ||L load C

L load

Lb C r R rr R


L load

High-Frequency Time Constants

12

21

Set L1 in high frequency state and look at R driving C2

loadR loadR

?R ?R

1L 2C 1L 2C

Lr Cr Lr Cr

1 2 1 2

12 2 c loadC r R 2 1

1 ||L load C

Lr R r

L L 1 12 2 2 ||

||c load L load CL load L load C

L Lb C r R C r R rr R r R r

1b 2b redundancy


2 1 2b 2 2 1b redundancy

Final Expression for ZOUT

We have our denominator!

2 r RL 21

2 1 21 || C loadL load C

L load L load

r RLD s s C r R r s L Cr R r R

The complete transfer function is now:

L

12

,21

1 1||

1 ||

CL

out OL L loadC load

l d

Ls sr Cr

Z s r Rr RLs C r R r s L C

2 1 21 ||L load CL load L load

s C r R r s L Cr R r R

This is the open-loop output impedance

Open loop


A Closed-Loop System The converter fights output perturbations

+

,out out OLI s Z s-

H(s)+

G(s)+

outV s refV s

Because the system is linear, superposition applies T 1 1

OLout ref

OL

T sV s V s

T s

2 ,out out out OL out OLV s I s Z s V s T s

out OLOL Z sT s

,

1 2 1 1out OLOL

out out out ref outOL OL

sT sV s V s V s V s I s

T s T s

,out CLZ The loop gain affects the final expression


The loop gain affects the final expressionOpen loop

Loop Gain Impact on the Impedance

0

Plots superimpose as loop gain approaches 0

20

ZoutCL i 2 fk

,out OLZ f

0fCr

60

4020 logoutCL k

1

20 logZoutOL i 2 fk

1

LrC

Peaking is gonei l d l

80

,out CLZ f

in closed-loop

10 100 1 103 1 104 1 105100

fk

Having gain at f is important to damp the filterPublic Information

Christophe Basso –Input Filter Interactions79 3/7/2017

Having gain at f0 is important to damp the filter

Course Agenda



A Design Example with a Buck Assume the following 5-V/50-W buck converter

L222u

R110m vout

X2PSW1

vout> 1 2

R220

8 vout>ini

3

20m

C1

R4Rload

7Vin20 D1

mbr1645

C1680u+ -

4 5

X1COMPAR

VrampB1

V(err)>1.9 ?1.9 :V( ) 100 kHFV(err)

Specifications are less than 15 mA peak of input ripple

100 kHzswF


Specifications are less than 15 mA peak of input ripple

What is the Necessary Attenuation? Use SPICE to analyze the input current signature

14.0 ini t .FOUR 100kHz I(V4), 5.4 Ain rmsI

10.0

11.13 A

in

4 94 A peakI

,

6.00

(A) 1 4.94 A peakI

2 00

2.00

10 µs

15 mA peakinI

10.054m 10.063m 10.072m 10.082m 10.091m

-2.00 10 µs

Attenuate by 3mor 50 dB2 2 2 25 4 2 85 4 6 AI I I


or 50 dB, 5.4 2.85 4.6 Aac in rms dcI I I Current in the capacitor

Where do you Place the Double Pole? Insert a LC filter to attenuate the pulsating current

outI

20inI I

LC

outI inI

Position f to provide a 50 dB attenuation at 100 kHz

0 3 100 17 kHzfilter SWf A f m k

Position f0 to provide a 50-dB attenuation at 100 kHz


Select the Filter Elements The resonant frequency lets us chose L and C

10 22 2

1 8.34 10 s4

LCf

2 204 f

Component selection depends on volume, cost etc. the capacitor sees the buck ac input current the capacitor sees the buck ac input current the inductor ripple current is small, consider dc only

Kemet F series 22 µHL 3 AinI

4 x 10 µFItot rms > 40 A 7447714220 Würth


Itot,rms 40 A 7447714220 Würth

Always Consider Component ESR We can show that the complete attenuation is

I2

21

Cr Cr

C

Lr

L

outI

inI

21

2 2112

21

C

in

outC L

CILI r r L

CC

CL 11

CC

Check if attenuation is ok with selected components Check if attenuation is ok with selected components

5 mΩ 1.3 mΩ4Cr

IX 4

4

50 mΩLr

50.8 dB at 100 kHzin

out

II


Control-to-Output Transfer Function The addition of the filter affects the converters

H s

ˆoutv

Lr Cr 1 s

inv

L C 2

1

1

zinH s V

s sQ

G sd

0 0Q Buck control-to-output

TF without filter.

The small-signal model needs an update


A More Complex Architecture th

L222u

R110mvin

vout

The converter becomes a 4th-order system

V(c)9 5

R220m

Vc

R3

thZ sV(c)

7

20m

C1680u

R4Rload

d

B1CurrentIout*V(d)

B3CurrentI(Vc)*D

11

B4VoltageV(vin)*D+V(d)*Vin2

R350m

L122uH

15

R81.5m

C440u 680ud 22uH 40u

VmodAC = 1 pH s RLCZ s

Simplify the circuit before solving the function


A Simplified Circuit

I

You can reuse previously-determined transfer functions

inV s outV s CI s

thZ s pH s V s D d s V

0CI s D outD s I

0in inV s D d s V

Small-signal model

Apply KVL and KCL to obtain the new expression

Small signal model


Determine and Substitute Variables Determine the input voltage expression Vin(s)

0in th out CV s Z s I D s I s D

Terminal c current is the voltage V(c) divided by ZRLC(s)

0in inV s D D s V 0in inV s D D s V

0in in

CRLC

I sZ s

00

in inin th out

RLC

V s Z s I D s DZ s

0RLC th out in thD s Z s Z s I D V D s Z s

Th t t lt i l th RLC t itt H

02

0

RLC th out in thin

th RLC

V sZ s D Z s

The output voltage involves the RLC transmittance Hp

0out in in pV s V s D D s V H s


Final Expression is Complicated Rearrange the final transfer function

2

011 thDs Z s

V

2 210

2

111

thout load in loadz

L loadload Lth

load L

V s R V RsC r RD s R r Ds s Z s

R rQ s s

0 0

0 0

1load LQ s s

Q

Classical buck, no filter Filter effect

L

2

1 1

1

fCf f

Lfth Lf

f Cf Lf f f

Lsr C s

rZ s r

sC r r s L C

1ff

f Cf Lf

LQ

C r r

01

ff fL C

1 Lfr 1 f Cf Lf f fsC r r s L C

Filter output impedance impacts the transfer function

1

1

f

zC fr C

2

Lfz

fL


Plots Show a Distorted Transfer Function

Mathcad and SPICE match each other quite well

10020

40

outV f

outV fD f

100

0

20

0

out fD f

10 100 1 103 1 104 1 105

100

f

10 100 1 103 1 104 1 105

40

f fkfk

The notch occurs because Vin drops at resonanceControl-to-output transfer function


The Extra Element Theorem at Work What is the EET principle? Identify an element whose presence complicates the analysis Calculate the transfer function with that element removed Calculate the transfer function with that element removed Apply a correction factor k to the transfer function: voilà!

H s 1 s

ˆoutv

Lr Cr

20

0 0

1

1th

zinZ

H s Vs sQ

ˆ 0inv

L C

0 0Q

G sd 0thZ s

0thZH s H s k

Correction factor


Correction factor

Determining the Correction Factor The correction factor requires two terms:1. The converter input impedance obtained in open-loop2 The converter input impedance obtained for V (s)=02. The converter input impedance obtained for Vout(s)=0

2CLr 1LTIExcitation

CrloadR

TV 1 0D

Response 0dp

The open-loop impedance has already been derived

0d s

2

0 02

0

1

1load L

D

s sQR rZ s sD


p

The Null Propagates in the Circuit Despite excitation with IT, there is no ac response This is the principle behind nulling the response

CrLr1L

TI 0outI s

0 V

0CI s 0

0 Vexcitation inV s

Cr

2C

loadRTV

0CI s D outD s I

0C s

0in inV s D D s Vresponse

2C 0outV s

0 A in the load and 0 V at r -r implies 0 V across L 0 A in the load and 0 V at rL-rC implies 0 V across L1

0 0in inV s D D s V 0

inV sD s D

V


inV

Expression for ZN Comes Easily Substitute/rearrange test and voltage expressions

0T out CI s I D s I s D I s I D

out

load

VR

0

in

in

V sD s D

V

0T out

T in

I s I DV s V

0

outVD

The input impedance ZN for a nulled response is:

2load

NR

Z sD

Nulled response implies infinite input rejectionIt is the incremental input resistance seen before

0D It is the incremental input resistance seen before

bulk 2V

We already had this with the SPICE simulation

Vin100

B1CurrentPout/V(bulk)

parameters

Pout=50W

20

0 2 20

out

in load

out out

l d

VDV R

RP V D

R

200 ΩRFor a buck


loadR0 200 ΩR

Final Expression with EET The final expression includes the filter impact

2

11

th

load

Z sRs

V s R D

2

02

2

0 0

111

out load zin

thload L

V s R DVZ sD s R r s s

Q s sQR r

0 02

0 1load L

p

QR rsD

14 13

Comparison between EET and full formula

k

0

2 10 14

4 10 14

13

4 10 13

6 10 13

8 10 13

Argumentdifference

14

4 10 14

2 10 14

13

2 10 13

0

2 10 13

Magnitudedifference


10 100 1 103 1 104 1 1056 10 14

10 100 1 103 1 104 1 1054 10 13

What is the Impact on Stability? When adding the filter, the loop gain is awfully ugly!

200

20

40

100

20

0

100

0(dB) (°)

40

10 100 10 10 103 4 5

T f

10 100 103 104 105

200

T f

Filter damping is necessary: th NZ s Z s

th DZ s Z s


The Output Impedance is Affected

0

Closed-loop output impedance peaks as filter resonates

40

20

20 logZoutCLF i 2 fk

60

40g1

20 logZoutCL i 2 fk

1

1 thZ sZ s

Withoutfilter

100

80

0

,

1th

eout out Z s

th

in CL

Z sZ s Z s

Z sZ s

10 100 1 103 1 104 1 105

Filter damping is necessary: th eZ s Z s


Course Agenda



Check Filter Output Impedance

60

Plot shows that design inequalities are not respected

(dBΩ)Open-loopimpedance th NZ s Z s No!

40

20 logZth i 2 fk

1

( )

NZ f

DZ fNulled-outputInput impedance

th DZ s Z sNo!

0

2020 log

ZinOL i 2 fk 1

20 logZN s( )

1

N f

20 thZ f

14.4fQ

10 100 1 103 1 104 1 105

fk

Gain and phase distortion of k must be minimized


Filter Peaking Also Affects Zout

(dBΩ) 14.4fQ Input impedance

Inequality for the closed-loop Zout is not respected

20

20 logZth i 2 f k

( ) 14.4fQ

eZ f

Input impedancewith shorted output

0

g1

20 logZe i 2 f k

1

40

20

thZ f

10 100 1 103 1 104 1 10540

f k

th eZ s Z s Filter damping must ensure


g

Look at the Correction Factor k S Q f th l t h d g i d i ti Sweep Qf for the least phase and gain deviation

1 th

load

Z sR

0

0.9fQ

20

21

1

th

Dk sZ s

s sQ

1

0.5

(dB)

fQ

1 3 dB0 02

0 1load L

p

QR rsD

1.5

10

10 100 103 104 105

Ph di i

Magnitude distortion k f-1.3 dB

1 2

0 2

1 1

1

z zth

s s

Z s Rs sQ

0

5

(°)

Phase distortion

-4.9°

0 0fQ

10

5

3 4 5

k f0.9fQ -6°1ff

f Cf Lf

LQ

C r r


10 100 103 104 105f f f

Determine Maximum Filter Peaking Determine maximum peaking with selected Qf

0 2 2 2 20 0

fh

R QZ 1 2

1 2

0 0th z zMAXz z

Z

22 µH50 mΩ 14.4fQ

1.3 mΩV

10.7 Ωth MAXZ

Damp

40 µF

inV

0.9fQ

0 7 ΩZ Th t t0.7 Ωth MAXZ

What damping elements will reduce to 0.7 Ω?th MAXZ

The target


What damping elements will reduce to 0.7 Ω?th MAX

Available Damping Techniques Damping means increasing the loss per cycle Increase power dissipation

dampR

Lfr fL Lfr fL

inV inVCfr

dampRCfr

fC fCParallel Series

rC-Cf parallel damping: Rdamp dissipates power rL-Lf parallel damping: Rdamp adds a zero and alters filter


Adding a Blocking Capacitor The series capacitor blocks the dc component Literature recommends Cdamp = 10 x Cf

r LLfr fL

r R40 µFfC

inVCfr

dampRx10

fCdampC 400 µFdampC

Cdamp can be extremely bulky In ac Rdamp dissipation can be an issue

Optimum combination?


damp

Analyzing the Filter Output Impedance

outZ s1L Lr

3C dampC out

1

Cr dampR0 V

23 p

Three storage elements with independent state variables: 3rd order system.

2 31 2 31D s b s a s a s


1 2 3

Start with Dc Analysis s = 0

L Lr

outZ s

response

3C dampC

1L L response

stimulus3 damp

0 V IT

Cr dampR infR

0 inf||LR r R


Rinf is the current source output resistance and ensures a dc path when IT = 0

Determine Time Constants Turn excitation off, current source is set to 0 A

?RLr

C

L1

?R

r R

0 V C3Cdamp

infR

Cr dampR

3 3 inf||C LC r r R 2 inf||damp damp LC R r R


p p

Assemble Time Constants for b1

?RLr

L1

?R0 V 1L

C3 Cdamp

infR

Cr dampR1inf LR r

1 1 2 2 1 12 31D s s s s

11 1 2 3 inf 3 inf

i f

|| ||damp damp L C LL

Lb C R r R C r r R

R r

1 2 3 1 2 1 3 2 3 1 2 31D s s s s


inf LR rinfR

1 1 2 2 1 12 3

Second-Order Time Constants 1 1 2 2 1 12 3

1 2 3 1 2 1 3 2 3 1 2 31D s s s s

t 1 t 1? ?r

LrL1 L1

tau1

tau3 tau2

tau1

tau3 tau2

?R ?R

Cr dampR

Lr

Cr dampR

C3 Cdamp C3 Cdamp0 V 0 V

12 infdamp dampC R R 1

3 3 infCC r R LrL1

tau1

tau3 tau2

?R

Cr dampR

C3 Cdamp 12

Reactance 1 is inits high-frequency state

What resistance

0 V

23 3 inf|| ||C damp LC r R r R

damp 2?R

What resistancedrives reactance 2?


3 3 inf|| ||C damp LRinf is not added for clarity purposes

Assemble Time Constants for b21 1 2

2 1 2 1 3 2 3b

12 inf

inf

1

damp dampL

Lb C R R

R rL

C R

13 inf

inf

inf 3 inf|| || ||

CL

damp damp L C damp L

C r RR r

C R r R C r R R r

infR 2 1 3 3 ||damp damp damp L C L dampb L C C C R r C r r R

LrL1 123 1 2 3b

tau1 ?R

Lr

C3 Cdamp

L1

HF state

tau3 tau2

t 12t 3

Cr dampR 3 inf2

31 ||C dampC r R R

What resistancedrives reactance 3?


tau12tau3drives reactance 3?

Build the 3rd-Order Denominator

2 31 2 31D s b s b s b s

Gather time constants and rearrange to form D(s)

||b L C C C R r C r r R

1 3damp damp L C Lb C R r C r r

2 1 3 3 ||damp damp damp L C L dampb L C C C R r C r r R

13 inf 3 1 3

infdamp damp C damp damp C damp

Lb C R R C r R L C C r R

R

3

2

1

||

damp damp L C LD s s C R r C r r

L C C C R C R

21 3 3

31 3

||damp damp damp L C L damp

damp C damp

s L C C C R r C r r R

s L C C r R


p p

Determine N(s) Swiftly with Inspection

C C1L 1 0Z s 2 0Z s

Responseis nulled3C

dampC is nulled0TV

Cr dampRLr

0Z s

Three zeros when 1 0Z s 2 0Z s

3 0Z s

3 0Z s Three zeros when 11 0zZ s 22 0zZ s

131 1 1C damp damp

LN s s sr C sR C

r

33 0zZ s


Lr

N

Run a Sanity Check to Verify Results

The complete low-entropy transfer function is thus 0out

N sZ s R

D s

131 1 1C d d

Lsr C sR C s

3

0 2 33 1 3 3 1 3

1 1 1

1 ||

C damp dampL

outdamp damp L C L damp damp damp L C L damp damp C damp

sr C sR C sr

Z s Rs C R r C r r s L C C C R r C r r R s L C C r R

The raw transfer function is || ||Z s Z s Z s Z sThe raw transfer function is 1 2 3|| ||outZ s Z s Z s Z s

40

60

50

0

2020 logHref i 2 fk

20 logH1 i 2 fk

0

arg H1 i 2 fk 180

arg Href i 2 fk 180

10 100 1 103 1 104 1 105 1 10640

20

fk10 100 1 103 1 104 1 105 1 106

50

fk


Raw and full TF plots are superimposed: good to go!fk

Trying to Rewrite the Transfer FunctionIn this 3rd-order system, it is difficult to find a canonical form such as

N sZ R

0 2

0 0

1 1out

p

Z s Rs s s

Q

0 0p Q

If rL is larger than rC and CdampRdamp larger than C3rL

2 31 3 1 31 damp damp damp damp dampD s sC R s L C C s L C C R

Unfortunately, does not dominate at low freq. 1 damp dampsC R

Cannot factor the 3rd-order denominator


S f f f 0

Neglect Parasitic Terms rL and rC Simplify the transfer function considering 0 rL and rC

13

2 3

1 1 1

1 ||

CL

L

damp damp

out

rr

rr r

Ls C sR C sZ s

s r rC R C s L C C C R C R s Lr Rr C C r

3 1 3 3 1 31 ||L C L Ldamp damp damp damp damp damp damp daC C mL pr rs r rC R C s L C C C R C R s Lr Rr C C r

Factor the L1/rL term 1 1L

damp dampsR C r

11

2 33 1 3 3 1 31 ||

LL L

damp damp

outdamp damp damp damp damp damp damp dampL L L

CsLL

Z s ss C R C s L C C

rr r r r rC R C R s L C C R

Have r go to zero Have rL go to zero

1 2 31 3 1 3

1

1damp damp

outdamp damp damp damp damp

sR CZ s sL

sC R s L C C s L C C R

Consider Cdamp = nC3

31 2 3 2

1

1 1damp

out

sR nCZ s sL

sR nC s L C n s L nC R


3 1 3 1 31 1damp dampsR nC s L C n s L nC R

Determine the magnitude of this transfer function

Rearrange Expressions Determine the magnitude of this transfer function

2

1 3 12 2 2

3 1 3 1 3 3 11 1damp

outdamp

L nR C jLZ j

C L C L n j C R n C L

2 221 3 1

2 222 2 23 1 3 1 3 3 11 1

dampout

damp

L nR C LZ

C L C L n C R n C L

mag1

Check with Middlebrook’s definitions

10

LR dampR

Q sp s 01

03

RC 0

QR

0

p s 0

1 3L C

2 3

1

1 1out

p s nQp sZ s

nQp s n p s nQp s

2 2 2

0 222 2

1

1 1 1out

x n Q xZ R

n x xnQ x

0

x

mag2


Design Techniques for Preventing Input-Filter Oscillations in Switched-Mode Regulators, R.D Middlebrook, Powercon, May 1978

Always Run a Sanity Check Check if expressions are ok versus Mathcad® calculations

60

40

20 logMag1 2 fk

20 logHref i 2 fk

0

2020 log

20 logMag2 2 fk

2020 logRload

1 10 100 1 103 1 104 1 10540

fk

Compare analytical results versus raw magnitude expression


Compare analytical results versus raw magnitude expression

Course Agenda



The damping resistor value changes the resonant frequency

The Damping Resistor Affects Q and 0 The damping resistor value changes the resonant frequency

dampR 1

dampR1L No loss

Q 0

1 3

1L C

dampC

3C0dampR

No loss 0

1 No loss

Q 0

1 3 dampL C C

There must be a RdampCdamp couple optimizing Q What is the minimum in the maximum (minmax) peaking of |Zout|? For what optimum Q value does it occur and at what frequency?


For what optimum Q value does it occur and at what frequency?

Pl i d i Q f C 10C

Changes Induced by Damping Resistor

20 logMag3 x 0( )

Plot magnitudes versus various Q factors, Cdamp = 10C3

100Q 0dampR ,outZ f Q

60

20 logMag3 x 0.01( )

20 logMag3 x 0.1( )

100Q p

Rdampdecreases

4020 log

Mag3 x 1( )

20 logMag3 x 10( )

Mag3 x 100( )

optQ

2020 log

Mag3 x 100( )

20 logMag3 x Qopt

opt0.1 1 100

x

This point isindependent of Q

10n

It is the point at whichpeaking is the lowest!

opt0


independent of Q peaking is the lowest!

Optimum Z magnitudes versus different values of n

Optimum Peak Depends on Cdamp Optimum Zout magnitudes versus different values of n

1n ,outZ f n 2

20 inVL

max

opt

30

4020 log

Mag5 x 1( )

20 logMag5 x 5( )

5n

20 in

out

LogP

opt

20

30

20 logMag5 x 10( )

20 logMag5 x 100( )

10n opt

opt

10

20 logRload

100n

Q Q0.1 1 100

x

There is an optimum R and n to match a given Z

optQ Q0


There is an optimum Rdamp and n to match a given Zout

The frequency at which the minmax occurs is immune to Q

Determine the Optimum Frequency The frequency at which the minmax occurs is immune to Q Calculate the sensitivity of Zout to Q and cancel itWork on Zout² to get rid of square roots

22 2 2 22 2

0 222 2

1

1 1 1out

x n Q xd dZ Q RdQ dQ n x xnQ x

3 6 2 22 2 2 2

0out

Qn x nx xd Z QdQ D Q

2 22 2 0nx x

2 2 2x n The point at which 2 2

22

xn

x

The point at which Qopt occurs is: 0

1 32 2opt n n L C


0

Update the magnitude definition to have |Z | at

Calculate the Magnitude at opt Update the magnitude definition to have |Zout| at opt

2 2 2

0 222 2

1

1 1 1out

x n Q xZ R

Q

0

22

optxn

2 21 1 1n x xnQ x

10

2 2 2 2out opt

n n LZ R

C

This is the valueof |Z | at

3p n n C

We want to minimize |Zout| at opt

of |Zout| at opt

Differentiate Zout² with respect to x², find the optimum Q Replace and2A x A x

2

2 2 2

220

10

1 1 1out

A n Q AZ Ad ddA R dA n A n AQ A


Apply brute force differentiation with Mathcad ®

Determine the Optimum Value of Q Apply brute-force differentiation with Mathcad ®

2 4 3 2 2 2 4 4 2 2 3 2 2 2 2 2 22 2 2 2 10outZ A AQn A Q n A Q n A Q n A n A n A AQ nd

dA R D

0dA R D

4 3 2 2 2 4 4 2 2 3 2 2 2 2 2 22 2 2 2 1 0AQ A Q A Q A Q A A A AQ

Extract Q

4 3 2 2 2 4 4 2 2 3 2 2 2 2 2 22 2 2 2 1 0AQn A Q n A Q n A Q n A n A n A AQ n

3 5 3 2 3 2 2 3 3 22 2 2 2 2A n A n A A A An An A n A n

2A

2 4 4 4

2 2 2 2 2opt

A n A n A A A An An A n A nQ

A n A n

Result from2

An

2

2 2

4 3 23 10 82 4 2 4opt

n nn nQn n n n

Result fromDr Middlebrook


Apply the Technique to the Buck The target is to reduce the filter impedance peak to 0.7 Ω

fLR 22

0f

RC

2 2out mmZ n

20 0 0

2

43.5

out mm

out mm

R R R Zn

Z

2

0

mm

R n

4 3 2n n 0 0.487damp optR R Q

target

2

4 3 20.65

2 4opt

n nQ

n n

141µFdamp fC nC

This is a rather large capacitance value An electrolytic capacitor and its ESR can do the job Watch for temperature effects as ESR increases at low temp!


p p

Check Margins with ZD and ZN

The overlap is gone for both impedances60

(dBΩ)

40

20 logZth i 2 fk

1

(dBΩ)

Z f

DZ f

0

20

20 logZinOL i 2 fk

1

20 logZN s( )

1

NZ f

20

01

thZ f

10 100 1 103 1 104 1 105

fk

Gain and phase distortion of k are minimized


p

Check Margin with Ze

60

The output impedance should not be affected by the EMI filter

damped

40

Zth i 2 fk

pfilter(dBΩ)

0

2020 logth k

1

20 logZe i 2 fk

Z f20 dB

20

1

Z f

eZ f

input impedance

10 100 1 103 1 104 1 10540

fk

thZ fwith 0-Ω Rload


k

Verify Results after Damping - Magnitude

40

Check the resulting control-to-output transfer function

damped

20

40

filter Dampedfilter

0

20 log Tfilter i 2 fk

20 log TfilterM i 2 fk Undamped

40

20

undamped T f

10 100 1 103 1 104 1 105

fk

Magnitude distorsion has disappeared after damping


Magnitude distorsion has disappeared after damping

Verify Results after Damping - Phase Original phase margin is unaffected after damping

200damped Damped

100

180

dampedfilter

Dampedfilter

0

arg Tfilter i 2 fk 180

arg TfilterM i 2 fk 180

Undamped

100

undamped T f

Undamped

10 100 1 103 1 104 1 105200

fk

f


Closed-Loop Output Impedance

0

Peaking effects of the EMI filter are now gone

damped Damped

20

ZoutCLFD i 2 fk

dampedfilter ,out CLZ f Damped

filter

Undamped(dBΩ)

60

4020 logZoutCLFD i 2 fk

1


1

80

1

undamped

10 100 1 103 1 104 1 105100

fk


Opting for a Different Strategy What if you only try to get rid of the overlap, ignoring ZD and ZN? Plot the closed-loop input impedance and build margin (10 dB)

60

40

(dBΩ)

2020 log

Zth i 2 fk 1

20 lZinCL i 2 fk

,in CLZ f

10 dBΩ10 dB

0

20 log1

10 dBΩ

3.3 Ω

10 100 1 103 1 104 1 105

20

f

thZ f


fk

Calculate the New Damping Elements Different damping elements are now required

4 3 2n n 220 0 0 4 out mm

R R R Z

2

4 3 22.4

2 4opt

n nQ

n n

2 0.5

mm

out mm

nZ

3.3Ω

0 1.8damp optR R Q 20 µFdamp fC nC 10

10

0

20 logZth i 2 fk

1

(dBΩ)

30

20 thZ fPlot includesall ohmic losses

Filter outputimpedance


10 100 1 103 1 104 1 105

Verify Results after Damping - Magnitude

The new filter effect can be observed when it resonates

40

20

40

20 l T i 2 f

damped

20

0

20 log Tfilter i 2 fk

20 log TfilterM i 2 fk

40

20

T fundamped

10 100 1 103 1 104 1 105

fk

Gain distortion is noticeable before crossover


Gain distortion is noticeable before crossover

Verify Results after Damping - Phase

200

Phase distorsion appears but do not jeopardize phase margin

100

arg Tfil i 2 fk 180

damped

0

arg Tfilter i 2 fk

arg TfilterM i 2 fk 180

100

T fundamped

10 100 1 103 1 104 1 105200

fk

Original phase margin is unaffected in this case


Original phase margin is unaffected in this case

Verify Results after Damping - Zout

0

Peaking can be observed but it remains limited

20

ZoutCLFD i 2 fk

,out CLZ fdamped

60

4020 logZoutCLFD i 2 fk

1


1

80

1

undamped

10 100 1 103 1 104 1 105100

fk


Average Model Simulation Template Both damping strategies can be tested with SPICE

0.487

141 FdampR

C

or

1.8

20 FdampR

C

141µFdampC 20 µFdampC

1 2

L222u

R110m vout

vouta c48

R350m

9

L122uH

R220m

dPWM sw itch VM p5

X1PWMVM

R81.5m

Vi 11

X3PSW1

Rdamp1.8

3

C1680u

PWMVML = 22uFs = 100kG

AIN

7

XPWMGAINK = 1/Vp

V(err)>1.9 ?

10C440u

Vin20

11

V6unknown12

Cdamp22u

Type 3

B1Voltage

V(err) 1.9 ?1.9 :V(err)

The load is stepped from 50 to 100% in 1 µs

G s


The load is stepped from 50 to 100% in 1 µs

Average Response Shows Oscillations Oscillatory but stable response to a load step

5.16

5.321.8

20 µFdamp

damp

R

C

5.00(V)

4.840.487

141µFdamp

damp

R

C

10 5m 11 5m 12 5m 13 5m 14 5m

4.68 outv t


10.5m 11.5m 12.5m 13.5m 14.5m

Switching Model Simulation Template

L222u

R110m vout

X2PSW1R3

50mL122uH

This is a simple model compensated by the type III structure

1 2

22u 10m

R220

8 vout9

IV4

10

50m

11

22uH

X3PSW1

3

20m

C1680u+

7

X1COMPAR

D1mbr164512

R81.5m

C440u

Vin20

13

V6unknow n14

Rdamp1.8

Cdamp22u

680u+ -4 5

COMPAR

VrampB1

V(err)>1.9 ?1.9 :V(err)

G s

Type 3

You can verify the step response but also the filtered signature


Oscillations in the Switched Model O

5 16

5.32

Oscillations are present but not too disturbing

1.8

20 µFdampR

C

4.84

5.00

5.16

20 µFdampC

4.68 outv t

5 00

5.16

5.32 0.487

141µFdamp

damp

R

C

4.68

4.84

5.00

outv t


10.6m 11.6m 12.5m 13.5m 14.5m

Input Current Signature is Good ff

-2.7501.8

20 FdampR

C

No difference in the signature – amplitude is within specs

, 14.8 mAin peakI

-2.760

20 µFdampC , p

-2.770(A)

-2.780

10 005m 10 016m 10 026m 10 037m 10 047m

-2.790 ini t0.487

141µFdamp

damp

R

C


10.005m 10.016m 10.026m 10.037m 10.047m

Course Agenda



A Practical Case with NCL30186

R2R

C4Cvinavg 707mV Input impedance Zin

This LED driver featuring PFC requires the insertion of a filter

4

R1R

C1C

3 8

R C

B2Voltage

VFB6

X3

GA

X4GAIN

D2unknown

2

R5

vinavg

R73Meg

1.80V 1.80V

707mV

707mV

707mV

p p in

PFCSV

X2

ton vca

tch

BCM

ton

X1PWMBCMCM2

X3AMPSIMP

AIN GAIN

K = 0.2528

V65

VCvinavg

8.2k C2470p Vin

90.0V449mV

9.95V

5.00V

QR model

14

X2XFMRRATIO = -N

18

ESRESR

13

Fswvout

c

PW

M s

wip

Fsw

(kH

z)

V221

7 21

L31m

12

R6600m

C71p

C8220nF

1

R13100m

Vout

Iout

46

L41GV11

90.0V

90.0V-130V 42.8V

42.8V28.4fV

59.4V

0V 0V 0V

0V 0V

90.0V

90.0V

Input filter Zth

CoutCoutIC = IC

LpLp

B3Voltage

V(VC)/(Ri)

Ipk5

R424

44

R1123m

45

R1232m

VinVin

V100 48

unknownAC = 1

89.9VB12CurrentI(V11)

1.47V 21.8V0V 0V 90.0V


Average model by S. Cannenterre

Plot the Impedance Ratio Zout/Zin

° dBΩ

Analysis reveals a negative phase margin: stability issue

60.0

120

180

360

1th

in

Z fZ f

th

in

Z fZ f

00

-60.0-180

th

in

Z fZ f

10m 100m 1 10 100 1k 10k 100k 1Meg

-120-360

233th

in

Z fZ f


g

A Simulation Shows Oscillations

(V)

t

The negative phase margins brings a diverging filter voltage

150

200 inv t

100

150

50

28.9m 86.7m 144m 202m 260m

0120 V

90 V C1 = 0 pF


Act on the PFC Input Voltage

inV sR

Reduce the phase stress by inserting a zero in the PFC chain

1R 1C

20

1 2

RH

R R

Addedzero

SV s

1 11 1 1C R 2 1 2 1 2||R R C C

11

s SV s

R C

10 0

2

11 1

zsH s H H

ss

2R

2C p

1

1z

2

1p


Insert the Zero to Reduce Phase Stress

360 120° dBΩ

Adding a zero in the PFC control input brings phase margin

180

360

60.0

120

th

in

Z fZ f

1th

in

Z fZ f

0 0

-180 -60.0

th

in

Z fZ f

135thZ fZ f

10m 100m 1 10 100 1k 10k 100k 1Meg

-360 -120

inZ f

Phase margin is 45°


“Interaction between EMI filter and PFC with average current control”, G. Piazzi, J. Pomilio, IEEE Transactions on Power Electronics, 1999

The Zero Insertion Cancels Oscillations

(V)

t

Adding a zero builds phase margin and tames oscillations

150

200 inv t

100

150

50.0

28.9m 86.7m 144m 202m 260m

0C1 = 22 pF90 V

120 V


Practical Experiments Placing a zero at 2.5 kHz (22-pF cap.) stops oscillations

However, PFC operations are affected: need to damp the filter!


However, PFC operations are affected: need to damp the filter!

2

Explore Another Option and Damp Filter

10

3

LR

C

2

0

2 2out mmZ n

R n

220 0 0

2

4 out mm

out mm

R R R Zn

Z

2

4 3 22 4opt

n nQ

n n

mm

0damp optR R Q

out mmZ This is the minimum of Zout peaking to avoid overlap

2Vinout mm

out

VZ k

P For a 40-W output and a 108-V input:

291Ωout mmZ Assume 10% margin, k = 0.9 262 Ωout mm

Z

0.584n

2.18optQ

220 nF 0.128 µFdampC n

0 147 Ωdamp optR R Q


optQ 0damp opt

Ch k b f l i h M h d ®

Plots with L1 = 1 mH and C3 = 220 nF

60Minimum resistance at Vin = 108 V rms

Check absence of overlap with Mathcad ®

4020 log

H1 i 2 fk

10

0

2020 log

Href i 2 fk

10

R

No overlap

20

20 logRload

10 100 1 103 1 104 1 105 1 10640

fk

Rdamp = 146 Ω and Cdamp = 0.128 µF


fk

Si l i l V 108 V P 40 W l

Check Results on the Simulation Template Simulation results Vin = 108 V rms Pout = 40 W: no overlap

54040 0

dBΩ °Rdamp = 180 Ω and Cdamp = 0.1 µF

360

540

20.0

40.0

1800

Z f

5-dB margin

0-20.0

th

in

Z fZ f

th

in

Z fZ f

10m 100m 1 10 100 1k 10k 100k 1Meg

-180-40.0


10m 100m 1 10 100 1k 10k 100k 1Meg

Final Q is affected by several other factors:

Practical Implementation in the Driver Final Q is affected by several other factors: PCB traces, dielectric losses in the caps but also iron losses in the inductor. True peaking is often lower and gives design margin.

ini t ini t

sv t sv t

No damping7.5 mH and 220 nF (no C2)after bridge. Pout > 40 W

Damping 100 nF + 180 Ω7.5 mH and 220 nF (no C2)after bridge. Pout > 40 W


Vin = 120 V rms Vin = 120 V rms Curves and experiments by J. Turchi

Course Agenda



Cascading ConvertersWhen cascading converters, impedances matter

inV s

thZ s thV s inZ s

in

Boost Buck outZ s inZ s

+

The system can be also be modeled by a gain TM

1V V thV s inV s-

th inZ Z

1in th

th

in

V s V sZ sZ s

T s


MT s

Use SPICE Models First Si l h b i d Simulate the boost converter output impedance

12

L133u

R57m

R1018m3

Vin11

2

duty_cycle

Rload

voutvout

11

c

c

WM

sw

itch

CM

p

duty

-cyc

le

0 Z f

Closed-loop Zout

16

C5820u

11 8.3vca PWX3PWMCML = 33uFs = 200kRi = -300mSe = 82k

C3282p

I1AC = 1A

40 0

-20.0

outZ f

1

R111.66k

85

9

R250k

C210n

R41m

-60.0

-40.0

R31.35k

6


V22.5

Verr

1 10 100 1k 10k 100k 1Meg

-80.0 (dBΩ)


11-15 V/24 V – 3 A

Use SPICE Models First Si l h b k i i d Simulate the buck converter input impedance

duty cycleZin

Vout

Resr14m1

V4

3 4

L18u

7

5

duty_cycle

R44m

R2

vout

vc

a c

PWM switch CM p

duty-cycle

6

L21kH

I1

5.00V

24.0V

5.05V 5.05V

210mV

24.0V

2.37V

Closed-loop Zin

19.8

2

Cout820u

24R2416m

PWMCMX2L = 8uFs = 200kRi = 176mSe = 30k

C31n

I1AC = 1 5.00V

19.0

19.4 inZ f

9

R11k

11

vout

8

R615k

C13.5n

R71m

2.50V

2.50V

2.37V

2.37V

18.6

R31k

10

V22.5

Verr

(dBΩ)10 100 1k 10k 100k 1Meg

18.2


24 V/5 V – 12 A

Compare Magnitude Curves

39.0

19.0

iZ f N l 1outZ f

-1.00

(dBΩ) inZ f No overlap

1out

inZ f

-21.0

outZ f

10 100 1k 10k 100k 1M

-41.0


10 100 1k 10k 100k 1Meg

Compare Phase Curves

270

180

iZ f

Neg. up to 1 kHz

90.0

inZ f(°)

0

Z f

1 10 100 1k 10k 100k 1M

-90.0

outZ f


1 10 100 1k 10k 100k 1Meg

Check Minor Loop Gain Th i i Th i blZ Z

dB °

There is no gain, . The system is stableout inZ Z

-90 0

0

-50 0

-40.0

-180

90.0

-60.0

50.0

-270-70.0

Z f

outZ fZ f

-360-80.0

out

in

Z fZ f

inZ f


1 10 100 1k 10k 100k 1Meg

Cascade Converters for Simulation

12

L133u

VoBoost

R57m

10

dc_buck

Iout

11.0V

11.0V209mV

4

R1018m

3

Vin11

2

dc_boost

11

vcac

PW

M s

witc

h C

Mp

duty

-cyc

le

X3

VoBuck

19

Resr14m

14 15

L28u

18

10 R44m v out

vc

a c

PWM switch CM p

duty-cycle

PWMCMI1unknown24 1V

24.1V

11.0V

545mV

11.0V

5.00V

5 00V

5.05V 5.05V

2.37V

16

C5820u

va PX3PWMCML = 33uFs = 200kRi = -300mSe = 82k

C3282p

13

Cout820u

X1L = 8uFs = 200kRi = 176mSe = 30k

C6

unknown24.1V 5.00V

1

R111.66k9

R250k

C210n

282p

21

R91k

v out

24

R615k

C13.5n

1n

R71

2.50V

2.50V

2.50V

2.37V

Boost

R31.35k

6

7


V22.5

VerrBoost

R111k

22

V32.5

23

VerrBuck

1m

2.50V

2.02V

2.50V

2.37V

Buck


Check Transient Response T i i d f h b k d b i bl

5.10

Transient response is good for the buck and boost is stable

Buck

4.95

5.00

5.05

(V)

t4.90

outv tIout from 5 to 12 A in 1 µs

24.00

24.05

24.10

(V)

23.90

23.95

outv tBoost


100u 300u 500u 700u 900u

Practical Measurements – Zin I i d i d di d i i Input impedance measurement requires a dedicated circuit

1QinV

SwitchingConverter1R

1C3R

22 Dcinput

dc load

2RinI

senseRNetworkanalyzer inV

sense

senseVacV

inin sense

sense

V sZ s R

V s


“Practical Issues of Input/Output Impedance Measurements”, Y. Panov, M. Jovanović, IEEE Transactions on Power Electronics, 2005

Practical Measurements – Zout Y d i j h b d l d V You need to inject enough current to observe a modulated Vout

1C 2CoutV

ISwitchingConverter

D Q

1R3R

outI

Dcinput

1Q

RR

biasV22

dc load

V2RsenseR

4RThermalstabilizationoutV

acV

Networkanalyzer

senseV

out

out sensesense

V sZ s R

V s


“Practical Issues of Input/Output Impedance Measurements”, Y. Panov, M. Jovanović, IEEE Transactions on Power Electronics, 2005

Literature“Fundamentals of Power Electronics”, R. Erickson, D. Maksimovic, Springer, 2001

“Designing Control Loops for Linear and Switching Power Supplies”, C. Basso, Artech House, 2012

“Practical Issues of Input/Output Impedance Measurements” Y Panov Practical Issues of Input/Output Impedance Measurements , Y. Panov,

M. Jovanović, IEEE Transactions on Power Electronics, 2005

“Physical Origins of Input Filter Oscillations in Current Programmed Converters”,

Y. Jang, R. Erickson, IEEE Transactions on Power Electronics, 1992

“Design Consideration for a Distributed Power System”, S. Schultz, B. Cho,

F Lee Power Electronics Specialists Conference June 1990 pp 611-617F. Lee, Power Electronics Specialists Conference, June 1990, pp. 611-617

“Input Filter Considerations in Design and Applications of Switching Regulators”,

R. D. Middlebrook, IAS 1976

“Design Techniques for Preventing Input-Filter Oscillations in Switched-Mode Regulators”

R.D. Middlebrook, Proceedings of Powercon, May 4-6 1978, San-Francisco

“Linear Circuit Transfer Functions” C Basso Wiley & Sons IEEE Press 2016New book!


Linear Circuit Transfer Functions , C. Basso, Wiley & Sons, IEEE Press, 2016

Conclusion Incremental input resistance of switching converter is negative Inserting a LC filter impacts the switching converter performance Y h t d i t t i You have two design strategies you design the filter together with the converter you add a filter to an unknown content converter you add a filter to an unknown-content converter You must determine open- and closed-loop input impedance Cascading converters requires knowledge of Zout and Zing q g out in

Test in the lab. dynamic responses when the filter is added Explore how damping is maintained at temperature extremes

Merci !Thank you!

Xiè-xie!


Input Filter Interactions with Switching Regulators · A Practical Case Study Cascading Converters...

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Transcript of Input Filter Interactions with Switching Regulators · A Practical Case Study Cascading Converters...